JP7342695B2 - Epitaxial wafer manufacturing system and manufacturing method - Google Patents

Description

The present invention relates to an epitaxial wafer manufacturing system and manufacturing method, and particularly to a system and method for cleaning the inside of a reactor in which wafers are processed into films.

Epitaxial silicon wafers are widely used as substrate materials for semiconductor devices. Epitaxial silicon wafers have an epitaxial silicon film formed on the main surface of a bulk silicon wafer, and have high crystal integrity, making it possible to manufacture high-quality and highly reliable semiconductor devices.

Epitaxial silicon wafers are produced by transporting the silicon wafer into the reactor of an epitaxial growth device and then introducing a silicon raw material gas such as trichlorosilane together with a carrier gas to grow a single crystal silicon film on the main surface of the wafer in a vapor phase. Manufactured. At this time, silicon adheres not only to the surface of the wafer but also to the interior of the reactor, and as the film formation process is repeated, silicon residue gradually accumulates, so cleaning is performed periodically to remove the residue. be exposed.

Regarding a cleaning method for an epitaxial growth apparatus, for example, Patent Document 1 describes a cleaning method that reduces the etching time and frequency of silicon deposited in a reactor by changing the flow rate ratio of HCl gas. Moreover, Patent Document 2 describes an operation method (multi-depot processing) in which the chamber interior is cleaned once after epitaxial growth processing of a plurality of wafers is performed in succession.

Japanese Patent Application Publication No. 2010-034424 Japanese Patent Application Publication No. 2013-123004

The interior of the reactor should be cleaned not only after a predetermined number of wafers have been continuously deposited, but also when all wafers stored in one or more cassettes have been deposited. It is being done. Conventionally, only one cleaning recipe was prepared for one reactor, so the same etching conditions were adopted for each cleaning process. That is, the final cleaning was also performed for the same etching time as the intermediate cleaning.

However, the number of wafers that are sequentially processed before final cleaning is often less than the predetermined number of wafers that are sequentially processed before intermediate cleaning. Therefore, if each cleaning process is performed for the same etching time, depending on the number of wafers in the cassette and the number of wafers that are processed continuously, the reactor may be overetched during the final cleaning, and the SiC parts and quartz in the reactor may be etched excessively. There is a problem in that the components tend to deteriorate. When the members in the reactor deteriorate, the probability that crystal defects such as stacking faults (SF) will occur in the epitaxial film increases, and deterioration of lifetime characteristics also becomes a problem.

Therefore, an object of the present invention is to provide an epitaxial wafer manufacturing method that can suppress excessive etching in a reactor during so-called multi-depot operation in which the reactor is cleaned after successively processing a plurality of wafers. The purpose of this invention is to provide a system and a manufacturing method.

An epitaxial wafer manufacturing system according to the present invention includes a reactor that processes wafers one by one, and a control unit that controls the reactor, and includes an epitaxial growth method that forms an epitaxial film on the main surface of the wafer in the reactor. and a host computer that sets the operating conditions of the epitaxial growth apparatus, and the epitaxial growth apparatus is configured to perform a film-forming process on two or more predetermined number of wafers in the reactor or after a predetermined number of wafers are continuously formed in the reactor. After the film deposition process for all wafers to be processed is completed, and before starting the film deposition process for the next wafer, the inside of the reactor is cleaned by vapor phase etching to remove residues. The host computer is characterized in that the host computer calculates the etching time in the reactor according to the number of consecutively processed wafers immediately before starting the cleaning, and provides the control unit with a cleaning recipe including the etching time. shall be.

According to the present invention, the inside of the reactor can be vapor-phase etched with an appropriate etching time at all times according to the number of wafers to be continuously processed, and excessive etching inside the reactor can be suppressed. Therefore, it is possible to prevent a decrease in the life of the SiC member and quartz member in the reactor due to repeated cleaning steps, and it is also possible to prevent the occurrence of pinholes and deterioration of lifetime characteristics.

In the present invention, the cleaning includes at least one intermediate cleaning performed after the predetermined number of wafers have been continuously subjected to film formation processing in the reaction furnace, and at least one intermediate cleaning performed after film formation of all wafers to be processed in the reaction furnace. Preferably, the etching time includes a final cleaning performed after the processing is completed, and the etching time in the final cleaning is equal to or less than the etching time in the intermediate cleaning. Thereby, the final cleaning inside the reactor can be performed in an appropriate etching time according to the number of wafers to be continuously processed, and excessive etching inside the reactor can be suppressed.

In the present invention, the epitaxial growth apparatus includes a load port capable of accommodating a plurality of cassettes, a wafer storage number detection unit that counts the number of wafers in the cassettes accommodated in the load port, and The controller further includes a wafer transport mechanism that takes out wafers one by one from the cassette and transports them into the reactor, and the control unit controls the control unit to take out the wafers one by one from the cassette and transport the wafers into the reactor, and after the film forming process of all the wafers in the cassette currently being processed is completed, If there are no other cassettes waiting in the load port to be processed next, it is determined that the film formation process for all wafers to be processed in the reactor is completed, and the cleaning in the reactor is performed. It is preferable to start. Thereby, it is possible to determine whether or not the film-forming process for all wafers to be processed in the reactor has been completed, and cleaning can be started after the series of film-forming processes have been completed.

In the present invention, when another cassette to be processed next is waiting in the load port after the film forming process of all wafers in the cassette currently being processed is completed, the control unit controls the It is preferable to continue the film forming process on the wafer to be processed in the reactor. As a result, even when wafers are continuously processed across cassettes, it is possible to periodically perform cleaning after a predetermined number of wafers have been continuously processed to form a film to remove the residue in the reactor.

In the present invention, the epitaxial growth apparatus has a plurality of reaction furnaces, and a wafer taken out from a cassette currently being processed in the load port is transferred to one of the plurality of reaction furnaces and subjected to film formation processing. It is preferable that Thereby, wafers can be processed in parallel, and the insides of a plurality of reactors can be periodically cleaned during parallel processing of wafers.

In the present invention, the plurality of reactors include first and second reactors, the load port has first and second cassettes, and the control unit includes the first and second cassettes in the load port. All wafers in one cassette are subjected to film formation processing in the first reactor, and all wafers in the second cassette in the load port are processed in the second reactor. The final cleaning of the first reactor is started when the film forming process of all the wafers in the first cassette is completed, and the final cleaning of the first reactor is started when the film forming process of all the wafers in the second cassette is completed. Preferably, the final cleaning in the second reactor is started when the membrane treatment is completed.

In the present invention, the epitaxial growth apparatus includes an epitaxial source gas supply section that supplies an epitaxial source gas into the reactor during film formation processing of the wafer, and an etchant gas supply section that supplies an etchant gas into the reactor when cleaning the reactor. It is preferable that the etchant gas supply unit and the control unit control the supply time of the etchant gas according to instructions from the host computer.

In the present invention, the etching time is preferably set according to the cumulative thickness of the epitaxial film obtained by multiplying the thickness of the epitaxial film per wafer by the number of consecutively processed wafers. As a result, the inside of the reactor can be etched with an appropriate etching time at all times according to the number of wafers to be continuously processed, and excessive etching inside the reactor can be suppressed.

Further, in the epitaxial wafer manufacturing method according to the present invention, a plurality of wafers housed in one or more cassettes in a load port are taken out one by one and transported into a reactor, and the wafers are a plurality of film forming steps for forming an epitaxial film on the main surface of the wafer, and after continuously forming a film on two or more predetermined number of wafers in the reactor, or after forming a film on all wafers in the load port. After the film processing is completed and before the next wafer is subjected to the film forming process, the inside of the reactor is vapor-phase etched to remove the residue, and the etching time in the reactor is , is set according to the number of wafers to be continuously processed immediately before starting the cleaning process.

According to the present invention, even if the number of wafers housed in one or more cassettes changes, the inside of the reactor can always be vapor-phase etched with an appropriate etching time according to the number of wafers to be continuously processed. , excessive etching in the reactor can be suppressed. Therefore, it is possible to prevent a decrease in the life of the SiC member and quartz member in the reactor due to repeated cleaning steps, and it is also possible to prevent the occurrence of pinholes and deterioration of lifetime characteristics.

In the present invention, the etching time is preferably set according to the cumulative thickness of the epitaxial film obtained by multiplying the thickness of the epitaxial film per wafer by the number of consecutively processed wafers. As a result, the inside of the reactor can be etched with an appropriate etching time at all times according to the number of wafers to be continuously processed, and excessive etching inside the reactor can be suppressed.

In the present invention, the cleaning step includes at least one intermediate cleaning step performed after the predetermined number of wafers are sequentially subjected to the film forming process in the reactor, and a film forming process performed on all the wafers in the load port. It is preferable that the etching time in the final cleaning step is equal to or less than the etching time in the intermediate cleaning step. Thereby, the final cleaning inside the reactor can be performed in an appropriate etching time according to the number of wafers to be continuously processed, and excessive etching inside the reactor can be suppressed.

In the present invention, it is preferable that the wafer is a bulk silicon wafer, that the main component of the residue is silicon, and that the cleaning step removes the residue by introducing hydrochloric acid gas into the reactor. According to this, it is possible to suppress excessive etching in the reactor, suppress deterioration of members in the reactor, and further improve productivity of epitaxial silicon wafers.

According to the present invention, an epitaxial wafer manufacturing system and an epitaxial wafer manufacturing system capable of suppressing excessive etching inside a reactor during so-called multi-depot operation in which the inside of the reactor is cleaned after sequentially forming films on a plurality of wafers; A manufacturing method can be provided.

FIG. 1 is a schematic diagram of the configuration of an epitaxial wafer manufacturing system according to an embodiment of the present invention. FIG. 2 is a schematic diagram of the configuration of reactors 11A and 11B of the epitaxial growth apparatus 10. FIG. 3 is a schematic diagram for explaining the parallel operation mode of the epitaxial wafer manufacturing system 1. FIG. 4 is a schematic diagram for explaining the serial operation mode of the epitaxial wafer manufacturing system 1. FIG. 5 is a flowchart illustrating the operation of the epitaxial wafer manufacturing system 1. FIG. 6 is a diagram showing an example of a table defining the relationship between the required amount of etching and the etching time. FIGS. 7(a) and 7(b) are schematic diagrams for explaining a series of steps in which film formation is performed on multiple wafers in a cassette in the parallel operation mode, where (a) shows all slots. (b) shows a case where wafers are set in some slots, and (b) shows a case where some wafers are not accommodated in some slots. FIG. 8 is a schematic diagram illustrating a series of steps for forming a film on a plurality of wafers in the first and second cassettes 21A and 21B in the serial operation mode.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic diagram of the configuration of an epitaxial wafer manufacturing system according to an embodiment of the present invention.

As shown in FIG. 1, an epitaxial wafer manufacturing system 1 includes an epitaxial growth apparatus 10 for vapor phase growing an epitaxial film on the main surface of a bulk silicon wafer (polished wafer), and a host that sets operating conditions for the epitaxial growth apparatus 10. A computer 40 is also provided. The epitaxial growth apparatus 10 is connected to a host computer 40 via a data communication line, and operates according to product process and etching recipes provided by the host computer 40. The host computer 40 can acquire information (recipes) regarding wafer film forming conditions and cleaning conditions from the specifications of wafer products recorded in the database 50.

The epitaxial growth apparatus 10 includes first and second reactors 11A and 11B that process wafers one by one, a load port 20 in which cassettes 21A and 21B containing a plurality of wafers are installed, and a first and second reactor. The wafer transfer mechanism 30 is provided between the two reaction furnaces 11A and 11B and the load port 20. In this embodiment, the epitaxial growth apparatus 10 includes first and second reaction furnaces 11A and 11B, and has a redundant configuration capable of processing two wafers in parallel. Moreover, the load port 20 has two ports 20A and 20B in which two cassettes 21A and 21B can be installed at the same time, and the wafers are taken out from the two cassettes 21A and 21B and transferred to the first and second reactors 11A, 11B. The load port 20 may have a function as a load lock chamber that replaces the atmosphere, or may be a mere cassette installation space that does not replace the atmosphere. In the latter case, the wafers in the load port 20 are sent to the reactors 11A, 11B via a load lock chamber prepared separately from the load port 20.

FIG. 2 is a schematic diagram of the configuration of reactors 11A and 11B of the epitaxial growth apparatus 10.

As shown in FIG. 2, the epitaxial growth apparatus 10 is a single-wafer type vapor phase growth apparatus that processes wafers W one by one by the epitaxial CVD method, and is made of quartz and has a gas inlet 11i and a gas outlet 11o. It has reaction furnaces (chambers) 11A and 11B. The epitaxial growth apparatus 10 also includes a plurality of heaters 12 that heat the inside of the reaction furnaces 11A and 11B from the outside, a susceptor 13 made of SiC that supports the wafer W in the reaction furnaces 11A and 11B, and a rotor that rotationally drives the susceptor 13. It includes a drive mechanism 14 and a control section 19 that controls each section. Gas inlets 11i of the reactors 11A and 11B are connected to a plurality of raw material tanks 17 via piping 15 and valves 16.

The load port 20 has a presence sensor 22 that detects whether or not a wafer W is accommodated in each slot in the cassette 21 . The number of wafers W accommodated in can be calculated. The number of slots (the maximum number of wafers that can be accommodated) of the cassette 21 is, for example, 25, but 25 wafers are not always accommodated, and the maximum number of wafers that can be accommodated may not be reached. It is necessary to detect whether or not it is contained. In this way, the control unit 19 and the inventory sensor 22 constitute a wafer accommodation number detection unit that counts the number of wafers accommodated in the cassette. The load port 20 also has a function of reading the product number from the label of the cassette 21, and the product number data is sent to the host computer 40 along with the number of wafers data.

The wafer transport mechanism 30 has a robot arm, and the wafer W is transported between the load port 20 and the reactors 11A and 11B. That is, the wafers W taken out from the cassette 21 are set in the reaction furnaces 11A and 11B, and the wafers W subjected to film formation in the reaction furnaces 11A and 11B are taken out from the reaction furnaces 11A and 11B and set in the reaction furnaces 11A and 11B. It will be returned to its original slot. The wafer transport mechanism 30 takes out a wafer W from each slot based on the output of the presence sensor 22.

The plurality of raw material tanks 17 include a silicon raw material tank 17a that stores an epitaxial raw material gas such as trichlorosilane, a dopant gas tank 17b that stores a dopant gas, and an etchant such as hydrochloric acid (HCl) and chlorine trifluoride (ClF ₃ ) used for cleaning. It includes a cleaning raw material tank 17c that stores gas liquefied raw materials and a carrier raw material tank 17d that stores carrier gas liquefied raw materials such as argon (Ar) and hydrogen ( _H2 ). Whether or not these raw materials are supplied and the amount to be supplied can be determined by controlling the corresponding valves 16 and the like. The gas outlet 11o of the reactor 11A, 11B is provided on the opposite side of the gas inlet 11i with the susceptor 13 in between, and the gas supplied from the gas inlet 11i into the reactor 11A, 11B is transferred to the susceptor 13. The gas passes above and is discharged from the gas outlet 11o.

The control unit 19 controls the film forming process and cleaning of the wafers W in the reactors 11A and 11B. Therefore, a silicon source gas is supplied together with a carrier gas and a dopant gas during a film forming process, and an etchant gas is supplied together with a carrier gas during cleaning. The control unit 19 controls the valve 16 and the like to control the amount of epitaxial film formed, cleaning time, and the like. The control unit 19 controls the reactors 11A and 11B based on a film forming recipe and a cleaning recipe sent from the host computer 40.

The host computer 40 is configured to be able to communicate with an external database 50, and can acquire information regarding the product specifications of the wafer based on the product number data sent from the load port 20. The information regarding the product specifications includes the film thickness of the epitaxial film, the film forming recipe number, the cleaning recipe number, the predetermined number of sheets (M1), and the like. The host computer 40 has a data table showing the relationship between the required amount of etching and the etching time for each etching recipe, and the required amount of etching determined from the amount of epitaxial film formed per wafer and the number of wafers processed. The corresponding etching time can be determined with reference to the data table.

3 and 4 are schematic diagrams for explaining the operation mode of the epitaxial wafer manufacturing system 1.

As shown in FIGS. 3 and 4, the epitaxial wafer manufacturing system 1 according to the present embodiment includes first and second reactors 11A and 11B, and has a function to process wafers in the load port 20 in parallel. ing. In this case, the epitaxial growth apparatus 10 can select two operation modes.

One is to sequentially process a plurality of wafers in a first cassette 21A set in a first port 20A in a first reactor 11A, as shown in FIG. This is a mode in which a plurality of wafers in the second cassette 21B set in the reactor 11B are sequentially processed in the second reactor 11B, and this is called a parallel operation mode. The other method, as shown in FIG. 4, is to first take out the wafers one by one from the first cassette 21A and process them in parallel in both the first and second reactors 11A and 11B. This is a mode in which processing of the wafers in the second cassette 21B is started after processing of all wafers in the cassette 21A is completed, and this is called a serial operation mode. Thus, wafers contained within one cassette may be processed using a single reactor or may be processed in parallel using multiple reactors.

FIG. 5 is a flowchart illustrating the operation of the epitaxial wafer manufacturing system 1.

As shown in FIG. 5, when starting wafer processing in the epitaxial wafer manufacturing system 1, the host computer 40 first acquires the product specifications and operation mode (step S1). Next, the presence sensor 22 in the load port 20 scans each slot in the cassette 21 to detect the presence or absence of wafers, and from the result, the number M _max of wafers accommodated in the cassette 21 is determined (step S2). . Further, the number of consecutively processed wafers N ₁ is reset to the initial value (N ₁ =N ₂ =1) (step S3). The number _N1 of wafers that are continuously processed is a count value of the number of wafers that are processed to form a film between the time when the interior of the reactor 11 is cleaned and the time when the next cleaning is performed.

In the initial settings, the cumulative number of processed wafers N ₂ is also reset to the initial value (N ₂ =1). The cumulative number of processed wafers _N2 is a count value of the number of processed wafers that are sequentially taken out from one or more cassettes to be processed and processed, regardless of whether before or after the cleaning process. Therefore, after the film formation process of all the wafers in the cassette currently being processed installed in either the first or second port 20A or 20B in the load port 20 is completed, the first and second If a new cassette containing unprocessed wafers is loaded in either port 20A or 20B, the wafer deposition process continues, and the cumulative number of processed wafers _N2 continues to be counted.

Next, after taking out the wafer W from the load port 20 and setting it in the reactor 11, a film forming process is performed to form an epitaxial film on the main surface of the wafer W (step S4). This film-forming process causes silicon to adhere not only to the surface of the wafer but also to the inside of the reactor.

In the parallel operation mode, all wafers in the first cassette 21A are processed in the first reactor 11A, and all wafers in the second cassette 21B are processed in the second reactor 11B. When the processing of all wafers in the first cassette 21A is completed, the operation of the first reactor 11A is completed, and when the processing of all the wafers in the second cassette 21B is completed, the operation of the second reaction furnace 11A is completed. The operation of the furnace 11B is completed.

On the other hand, in the serial operation mode, for example, processing of wafers in the first cassette 21A is first started, and while the first cassette 21A is being processed, the second cassette 21B is on standby. The wafers in the first cassette 21A are processed in both the first and second reactors 11A, 11B. When the processing of all wafers in the first cassette 21A is completed, processing of the next wafer in the second cassette 21B is started. The wafer in the second cassette 21B is also processed in both the first and second reactors 11A, 11B.

While the second cassette 21B is being processed, the first cassette 21A containing processed wafers is taken out from the first port 20A, and the first cassette 21A containing unprocessed wafers is newly set. In this case, processing of the wafers in the first cassette 21A is started after processing of all wafers in the second cassette 21B is completed. In this way, when a processed cassette is removed and a new unprocessed cassette is loaded, the wafer deposition process continues, and the counting of the cumulative number of processed wafers _N2 also continues. However, if the processed cassette is not removed from the first port 20A, or if it is removed but the unprocessed cassette is not loaded and remains empty as shown, then all wafers will not be deposited. This is completed, and the operation of the first and second reactors 11A and 11B also ends.

After the film forming process is completed, the cumulative number of processed wafers _N2 is less than the number of accommodated wafers _Mmax (remaining number of processed wafers ≠ zero), and the number of continuously processed wafers _N1 is equal to the predetermined cleaning start number _M1 (for example, 7 (the same applies hereafter) (step S5Y, step S6N), after incrementing N ₁ and N ₂ , the next wafer W is taken out from the cassette 21 and the film forming process is performed again (step S7, S4). In this way, the film forming process is continuously performed until the number N ₁ of wafers W to be continuously processed reaches the predetermined number M ₁ (7 wafers) (steps S4 to S7).

When the number N ₁ of wafers W to be continuously processed reaches the predetermined number M ₁ (M ₁ =7) (step S6Y), the control unit 19 controls the amount of residue (silicon A cleaning process (intermediate cleaning) for removing deposits mainly composed of is started (step S8). In the intermediate cleaning, the insides of the reactors 11A and 11B are vapor-phase etched for an etching time t=t ₀ ×N ₁ set according to the number N ₁ of wafers W to be continuously processed. However, since the number of consecutively processed wafers N ₁ is determined to be, for example, 7 times (N ₁ = M ₁ = 7) as described above, the etching time in intermediate cleaning is constant (t = t ₀ × 7). . In this way, cleaning inside the reactors 11A and 11B is not performed every time the film formation process for one wafer is completed, but is performed after the film formation process for multiple wafers (multi-depot process) is completed. be done.

When the processing of all wafers in the cassette is completed and the remaining number of wafers to be processed becomes zero, the control unit 19 checks the operation mode, and in the case of the parallel operation mode, the first and second reactors 11A and 11B The final cleaning of the inside is started (steps S5N, S9, S12). When the operation mode is the serial operation mode, the presence or absence of a cassette at the adjacent port is checked, and if there is a second cassette 21B, the number M _max of wafers accommodated in the second cassette 21B is obtained ( Steps S9, S10, S11). Thereafter, a film forming process is performed in the same way as for the wafer in the first cassette 21A (steps S4 to S8). In serial operation mode, after all wafers in the cassette have been deposited, as long as a cassette containing unprocessed wafers is set in the adjacent port, the wafer deposition process will continue, and such wafers will be deposited in the adjacent port. If no cassette is set, processing of all wafers is completed. Then, when all the wafers have been processed, final cleaning inside the reactors 11A and 11B is performed (step S12).

As described above, the cleaning process inside the first and second reactors 11A and 11B is performed even when the remaining number of sheets to be processed in the load port 20 reaches zero, regardless of whether it is in parallel operation mode or serial operation mode. It will be done. In other words, even if the number N ₁ of wafers W to be continuously processed does not reach the predetermined number M ₁ (M ₁ =7), the film forming process for all wafers W in the first and second cassettes 21A and 21B is performed. When this is completed, a cleaning process (final cleaning) inside the reactors 11A and 11B is carried out. Even in the final cleaning, the insides of the reactors 11A and 11B are subjected to vapor phase etching with an etching time t=N ₁ ×t ₀ set according to the number N ₁ of wafers W to be continuously processed.

The number _N1 of wafers that are continuously processed by the reactor 11A or 11B between the end of the last intermediate cleaning and the start of the final cleaning is the predetermined number M of wafers W that is the starting condition for intermediate cleaning. ₁ (7 sheets), and is often less than the predetermined number. For example, when 7 of the 25 wafers in the cassette are continuously processed, the number _N1 of wafers in the final group to be processed continuously is 4. In this embodiment, the final cleaning is performed in a short etching time in accordance with such a small number of wafers. In addition, the number _N1 of wafers that are continuously processed immediately before starting the final cleaning in the parallel operation mode is calculated by dividing the number M _max of wafers accommodated in one cassette 21 corresponding to one reactor by the predetermined number M ₁ . The remaining number of sheets M ₂ = M _max mod M ₁ can be obtained. This number M ₂ of wafers W is a smaller value than the predetermined number M ₁ (7 times).

The etching time for final cleaning or intermediate cleaning can also be determined by referring to a table that defines the relationship between the required amount of etching and etching time. For example, as shown in FIG. 6, a data table is prepared in advance such that the etching time is Asec when the required etching amount X is 0 μm<X≦3 μm, and the etching time is Bsec when the etching time is 3 μm<X≦6 μm. The required etching amount (cumulative film thickness of the epitaxial film) is determined from the number of consecutively processed sheets _N1 , and the etching time, which is one of the cleaning recipes, is determined using the required etching amount and the above data table. The cleaning recipe for the final cleaning may be different from the intermediate cleaning only in etching time, and other etching conditions (etching recipe) such as temperature and concentration may also be different. In this way, the etching time (t) is calculated by multiplying the epitaxial film thickness per wafer by the number of consecutively processed wafers (N), regardless of whether it is intermediate cleaning or final cleaning. It is set according to the thickness.

FIGS. 7(a) and 7(b) are schematic diagrams for explaining a series of steps for forming a film on a plurality of wafers in the cassette 21 in the parallel operation mode. is set, and (b) shows a case where some slots do not accommodate wafers.

As shown in FIG. 7(a), when wafers are accommodated in all the slots of the cassette 21 with 25 slots, first the slot No. 1 to No. After the film formation process for seven wafers up to No. 7 is successively performed, the first intermediate cleaning is performed. Next, slot no. 8 to no. After the film forming process for seven wafers W up to No. 14 is performed continuously, a second intermediate cleaning is performed. After that, slot no. 15 to no. After the film formation process for seven wafers W up to No. 21 is performed continuously, the third intermediate cleaning is performed. The etching time in each of the first to third intermediate cleanings is t=t ₀ ×7.

Finally, slot no. From 22 to No. After up to 25 four wafers have been processed in succession, a final cleaning is performed. The etching time in the final cleaning is t=t ₀ ×4, which is shorter than the etching time in the intermediate cleaning.

As shown in FIG. 7(b), the slot number of the cassette 21 having 25 slots. 2 and no. If slot No. 3 is empty and only 23 wafers are accommodated, first slot No. 1 to No. After seven wafers up to 9 have been successively processed, a first intermediate cleaning is performed. Next, slot no. 10 to no. After seven wafers W up to 16 have been continuously processed, a second intermediate cleaning is performed. After that, slot no. 17 to no. After seven wafers W up to 23 have been continuously processed, a third intermediate cleaning is performed. The etching time in each of the first to third intermediate cleanings is t=t ₀ ×7.

Finally, slot no. 24 and no. After two 25 wafers have been processed in succession, a final cleaning is performed. The etching time in the final cleaning is t=t ₀ ×2, which is shorter than the etching time in the intermediate cleaning. Furthermore, compared to FIG. 7(a), the etching time in the first to third intermediate cleanings in FIG. 7(b) is the same as in FIG. 7(a), but the etching time in the final cleaning in FIG. 7(b) is It is even shorter than that in FIG. 7(a).

Although not shown, slot No. 1~No. If any four of the slots No. 25 are empty and the number of wafers W accommodated in the cassette 21 is 21, the slot no. 15 to no. Final cleaning is performed after seven wafers W up to 21 have been continuously processed. In this case, the etching time in the final cleaning is t=t ₀ ×7, which is the same as the etching time in the first and second intermediate cleanings.

As described above, the maximum number of wafers that can be accommodated (for example, 25) is not always accommodated in the cassette 21, and the number is often less than the maximum number of wafers that can be accommodated. Further, if cleaning is performed every time after the film forming process, the production efficiency will deteriorate, and conversely, if the cleaning cycle is too long, the cleaning efficiency will decrease. Therefore, priority should be given to using a continuous processing number with good production efficiency and cleaning efficiency, rather than using a continuous processing number with a good separation based on the number of slots of the cassette 21.

FIG. 8 is a schematic diagram illustrating a series of steps for forming a film on a plurality of wafers in the first and second cassettes 21A and 21B in the serial operation mode.

As shown in FIG. 8, a total of 25 wafers A1 to A25 are stored in the first cassette 21A, and 22 wafers B1, B4 to B25 are stored in the second cassette 21B. It is assumed that there is Slot No. of the second cassette 21B. 2.No. 3.No. 4 is an empty slot, and wafers B2, B3, and B4 are not accommodated therein. In the serial operation mode, all the wafers in the first cassette 21A are first processed, and then processing of the wafers in the second cassette 21B is started. Therefore, the wafers in the first cassette 21A are taken out in slot order and are allocated alternately to the first reactor 11A and the second reactor 11B, and the first and second reactors 11A and 11B are The processed wafers are processed in order. Then, intermediate cleaning is performed when the film forming process for seven wafers is completed in the first and second reactors 11A and 11B.

When the film forming process for all wafers A1 to A25 in the first cassette 21A is completed, the film forming process for the wafers in the second cassette 21B is subsequently started. In the serial operation mode, the final cleaning is not performed when switching from the first cassette 21A to the second cassette 21B, that is, when the film formation process for all wafers in the preceding cassette is completed. This is because the film forming process for all the wafers housed in the first and second cassettes 21A and 21B has not been completed, and the film forming process for the group of wafers being processed is still ongoing. That's why.

Therefore, the final cleaning of the first reactor 11A is performed on the slot No. in the second cassette 21B. The final cleaning of the second reactor 11B is performed after the film formation process of the No. 25 wafer B25 is completed, and the final cleaning of the second reactor 11B is performed using the slot No. 25 in the second cassette 21B. This process is performed after the film formation process for the 24th wafer B24 is completed. In this case, the final cleaning of the first reactor 11A is performed after three wafers have been continuously processed, and the final cleaning of the second reactor 11B is performed after two wafers have been continuously processed.

In the serial operation mode, when the host computer 40 knows the number of wafers in the unprocessed cassette set in the load port 20, it calculates the etching time for final cleaning according to the number of wafers, and sets the etching time accordingly. A cleaning recipe including the cleaning recipe is provided to the epitaxial growth apparatus 10. That is, the host computer 40 generates a cleaning recipe for the reactors 11A and 11B in advance from the number of wafers in the load port 20 and provides it to the epitaxial growth apparatus 10. When an unprocessed cassette is newly set in the adjacent port in the load port 20, the host computer 40 deletes the currently set cleaning recipe for the final cleaning and replaces the unprocessed cassette in the newly set unprocessed cassette. A cleaning recipe for final cleaning is calculated based on the number of wafers. Therefore, the epitaxial growth apparatus 10 can always generate the latest cleaning recipe, and can generate it for each reactor used for final cleaning.

Conventionally, cleaning of the reactors 11A and 11B was carried out by the epitaxial growth apparatus 10 independently, regardless of whether it was an intermediate cleaning or a final cleaning, so a fixed cleaning recipe was used. In this embodiment, the host computer 40 calculates the etching time according to the number of consecutively processed wafers, and sends a cleaning recipe including the etching time to the epitaxial growth apparatus 10, thereby creating a system that suppresses excessive etching in the final cleaning. configurable and even automate the setting of cleaning recipes.

As explained above, in the method for manufacturing epitaxial silicon wafers according to the present embodiment, a plurality of wafers W accommodated in the cassette 21 are taken out one by one and transported into the reaction furnaces 11A and 11B, and A plurality of film forming processes in which epitaxial growth processing of wafers W is performed in reactors 11A and 11B, an intermediate cleaning process in which vapor phase etching is performed in reactors 11A and 11B after successively processing a predetermined number of wafers, and loading. A final cleaning process in which vapor phase etching is performed in the reactors 11A and 11B after processing all the wafers W in the cassette 21 set in the port 20, and wafers W immediately before starting the intermediate cleaning process or final cleaning. The etching time (t) in the reactors 11A and 11B is calculated according to the number of sheets (N ₁ ) continuously processed, and the cleaning recipe generation step includes generating a cleaning recipe including the etching time in advance, and each cleaning step includes: Since the reactors 11A and 11B are cleaned according to the cleaning recipe, excessive chamber etching can be prevented and the cleaning time can be optimized.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the present invention. Needless to say, it is included within the scope.

For example, in the embodiment described above, a method for manufacturing an epitaxial silicon wafer was taken as an example, but the present invention is not limited to silicon wafers and can be applied to various epitaxial wafers.

1 Epitaxial wafer manufacturing system 10 Epitaxial growth apparatus 11 Reactor 11i Gas inlet 11o Gas outlet 12 Heater 13 Susceptor 14 Rotation drive mechanism 15 Piping 16 Valve 17 Raw material tank 17a Silicon raw material tank 17b Dopant gas tank 17c Cleaning raw material tank 17d Carrier raw material tank 19 Control unit 20 Load port 20A First port 20B Second port 21 Cassette 22 In-stock sensor 30 Wafer transport mechanism M _1. Number of wafers continuously processed during intermediate cleaning M _2. Number of wafers continuously processed during final cleaning M _max. Number of wafers accommodated N ₁ Number of continuous processing sheets (count value)
_N2 Total number of sheets processed (count value)
W wafer

Claims (7)

Epitaxial growth that includes a reactor that processes a plurality of wafers housed in a cassette one by one, and a control unit that controls the reactor, and that forms an epitaxial film on the main surface of the wafer in the reactor. a device;
a host computer that sets operating conditions for the epitaxial growth apparatus;
The epitaxial growth apparatus is used after a predetermined number of wafers of two or more are continuously formed in the reactor, or after the film forming process of all wafers to be processed in the reactor is completed. , before starting the film formation process for the next wafer, cleaning the inside of the reactor by performing vapor phase etching to remove residue;
The cleaning includes:
at least one intermediate cleaning performed after the predetermined number of wafers are continuously subjected to film formation processing in the reactor;
including a final cleaning performed after the deposition process of all wafers in the cassette to be processed in the reactor is completed;
The etching time in the final cleaning is less than or equal to the etching time in the intermediate cleaning,
The host computer calculates the etching time in the reactor according to the number of consecutively processed wafers immediately before starting the cleaning, and provides the control unit with a cleaning recipe including the etching time;
The epitaxial growth apparatus performs the final cleaning process when the film formation process of all the wafers in the cassette to be processed in the reactor is completed, regardless of whether or not the etching recipe is changed in the next cleaning process. An epitaxial wafer manufacturing system characterized by starting. The epitaxial growth apparatus includes:
A load port that can accommodate multiple cassettes,
a wafer accommodation number detection unit that counts the number of wafers in a cassette accommodated in the load port;
further comprising a wafer transport mechanism that takes out wafers one by one from a cassette housed in the load port and transports them into the reactor,
The epitaxial growth apparatus has first and second reactors,
the load port has first and second cassettes;
The control unit is configured to perform a film forming process on all wafers in the first cassette in the load port in the first reactor, and to process all wafers in the second cassette in the load port. controlling a wafer to be processed in the second reactor;
starting the final cleaning of the first reactor when the deposition process of all wafers in the first cassette is completed;
2. The epitaxial wafer manufacturing system according to claim 1, wherein the final cleaning in the second reactor is started when film formation processing of all wafers in the second cassette is completed. The epitaxial method according to claim 1 or 2, wherein the etching time is set according to the cumulative thickness of the epitaxial film obtained by multiplying the thickness of the epitaxial film per wafer by the number of consecutively processed wafers. Wafer manufacturing system. The wafer is a silicon wafer,
The main component of the residue is silicon,
4. The epitaxial wafer manufacturing system according to claim 1, wherein the cleaning removes the residue by introducing hydrochloric acid gas into the reaction furnace. A plurality of film forming steps in which a plurality of wafers housed in a cassette are taken out one by one and transported into a reactor, and an epitaxial film is formed on the main surface of the wafer in the reactor;
After a predetermined number of wafers of two or more have been continuously deposited in the reactor, or after the deposition of all wafers to be processed in the reactor has been completed, and the next wafer is A cleaning step of performing vapor phase etching on the inside of the reactor to remove residue before starting the film forming process,
The cleaning step includes:
at least one intermediate cleaning step performed after the predetermined number of wafers are continuously subjected to film formation processing in the reactor;
Including a final cleaning step performed after the film formation process of all wafers to be processed in the reactor is completed,
The etching time in the final cleaning step is less than or equal to the etching time in the intermediate cleaning step,
The etching time in the reactor is set according to the number of wafers that are continuously processed immediately before starting the cleaning process,
The final cleaning process is started when the film formation process of all the wafers in the cassette to be processed in the reactor is completed, regardless of whether or not the etching recipe is changed in the next cleaning process. A method for manufacturing an epitaxial wafer, characterized by: The epitaxial wafer according to claim 5, wherein the etching time is set according to the cumulative thickness of the epitaxial film obtained by multiplying the thickness of the epitaxial film per wafer by the number of consecutively processed wafers. manufacturing method. the wafer is a bulk silicon wafer;
The main component of the residue is silicon,
7. The epitaxial wafer manufacturing method according to claim 5, wherein the cleaning step removes the residue by introducing hydrochloric acid gas into the reaction furnace.

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