JP2021103756A - Epitaxial wafer manufacturing system and manufacturing method - Google Patents

Abstract

To prevent excessive etching in a reaction furnace during the operation of multi-deposition in which a plurality of wafers are continuously processed and subsequently cleaning is executed.SOLUTION: An epitaxial wafer manufacturing system 1 comprises: an epitaxial growth device 10 that deposits an epitaxial film on a principal surface of a wafer in a reaction furnace 11A; and a host computer 40 that sets an operation condition of the epitaxial growth device 10. After processing of continuously depositing two or more fixed number of wafers in the reaction furnace 11A, or after the completion of the processing of depositing all the wafers to be processed in the reaction furnace and before the start of next wafer deposition processing, the epitaxial growth device 10 executes cleaning of performing gas phase etching inside the reaction furnace to remove a residual substance. The host computer 40 calculates an etching time in the reaction furnace in accordance with the number of continuously processed wafers immediately before the start of the cleaning, and provides the control unit with a cleaning recipe including the etching time.SELECTED DRAWING: Figure 1

Description

The present invention relates to an epitaxial wafer manufacturing system and a manufacturing method, and more particularly to a system and a method for cleaning the inside of a reaction furnace for forming a wafer.

Epitaxial silicon wafers are widely used as substrate materials for semiconductor devices. The epitaxial silicon wafer is obtained by forming an epitaxial silicon film on the main surface of a bulk silicon wafer, and since the crystal perfection is high, it is possible to manufacture a high-quality and highly reliable semiconductor device.

An epitaxial silicon wafer is formed by transporting a silicon wafer into the reaction furnace of an epitaxial growth apparatus and then introducing a silicon raw material gas such as trichlorosilane together with a carrier gas to vapor-deposit a single crystal silicon film on the main surface of the wafer. Manufactured. At this time, silicon adheres not only to the surface of the wafer but also to the inside of the reaction furnace, and silicon residue is gradually deposited by repeating the film forming process. Therefore, cleaning for removing the residue is performed regularly. It is said.

Regarding the cleaning method of the epitaxial growth apparatus, for example, Patent Document 1 describes a cleaning method for reducing the etching time and frequency of silicon precipitated in the reaction furnace by changing the flow rate ratio of HCl gas. Further, Patent Document 2 describes an operation method (multi-depot processing) in which the inside of the chamber is cleaned once after the epitaxial growth processing of a plurality of wafers is continuously performed.

Japanese Unexamined Patent Publication No. 2010-034424 Japanese Unexamined Patent Publication No. 2013-123004

Cleaning inside the reactor is performed not only after the film formation process of a predetermined number of wafers is continuously performed, but also when the film formation process of all the wafers housed in one or more cassettes is completed. It is done. Conventionally, since only one cleaning recipe was prepared for one reaction furnace, the same etching conditions were adopted for each cleaning step. That is, the final cleaning was also performed in the same etching time as the intermediate cleaning.

However, the number of wafers continuously processed before the final cleaning is often less than the predetermined number of wafers continuously processed before the intermediate cleaning. Therefore, if all the cleaning steps are performed in the same etching time, the etching in the reaction furnace may be excessive in the final cleaning depending on the number of wafers in the cassette and the number of wafers continuously processed, and the SiC member and quartz in the reaction furnace There is a problem that the member is easily deteriorated. When the members in the reaction furnace deteriorate, the probability that crystal defects such as stacking defects (SF) will occur in the epitaxial film increases, and deterioration of lifetime characteristics also becomes a problem.

Therefore, an object of the present invention is to manufacture an epitaxial wafer capable of suppressing excessive etching in the reactor during so-called multi-depot operation in which the inside of the reactor is cleaned after a plurality of wafers are continuously deposited. The purpose is to provide a system and a manufacturing method.

The epitaxial wafer manufacturing system according to the present invention includes a reaction furnace that processes wafers one by one and a control unit that controls the reaction furnace, and epitaxial growth that forms an epitaxial film on the main surface of the wafer in the reaction furnace. The apparatus includes an apparatus and a host computer for setting operating conditions of the epitaxial growth apparatus, and the epitaxial growth apparatus is after continuously forming a predetermined number of wafers of two or more wafers in the reaction furnace or in the reaction furnace. After the film formation process of all the wafers to be processed in is completed and before the film formation process of the next wafer is started, the inside of the reaction furnace is subjected to vapor phase etching to remove the residue. The host computer then calculates the etching time in the reactor according to the number of wafers continuously processed immediately before the start of cleaning, and provides the control unit with a cleaning recipe including the etching time. And.

According to the present invention, it is possible to carry out vapor phase etching in the reaction furnace at an appropriate etching time according to the number of continuously processed wafers, and it is possible to suppress excessive etching in the reaction furnace. Therefore, it is possible to prevent the life of the SiC member and the quartz member in the reaction furnace from being shortened by repeating the cleaning step, and it is possible to prevent the occurrence of pinholes and the deterioration of the lifetime characteristics.

In the present invention, the cleaning includes at least one intermediate cleaning performed after continuously forming a predetermined number of wafers in the reaction furnace and forming all the wafers to be processed in the reaction furnace. The etching time in the final cleaning, including the final cleaning performed after the treatment is completed, is preferably equal to or less than the etching time in the intermediate cleaning. As a result, the final cleaning in the reaction furnace can be performed with an appropriate etching time according to the number of continuously processed wafers, and excessive etching in the reaction furnace can be suppressed.

In the present invention, the epitaxial growth apparatus is accommodated in the load port, a load port capable of accommodating a plurality of cassettes, a wafer accommodating number detection unit for counting the number of wafers in the cassette accommodated in the load port, and a wafer accommodating number detection unit. The control unit further includes a wafer transfer mechanism that takes out wafers one by one from the cassette and transfers them into the reaction furnace, and the control unit performs the film formation process of all the wafers in the cassette currently being processed. When another cassette to be processed next is not waiting in the load port, it is judged that the film formation processing of all the wafers to be processed in the reaction furnace is completed, and the inside of the reaction furnace is cleaned. It is preferable to start. Thereby, it is possible to determine whether or not the film forming process of all the wafers to be processed in the reaction furnace is completed, and the cleaning after the series of film forming process is completed can be started.

In the present invention, when the control unit waits in the load port for another cassette to be processed next after the film formation processing of all the wafers in the cassette currently being processed is completed. It is preferable to continue the film forming process of the wafer to be processed in the reaction furnace. As a result, even when wafers are continuously processed across cassettes, it is possible to periodically perform cleaning after continuously forming a predetermined number of wafers to remove residues in the reactor.

In the present invention, the epitaxial growth apparatus has a plurality of reactors, and the wafer taken out from the cassette currently being processed in the load port is transported to one of the plurality of reactors for film formation processing. Is preferable. As a result, the wafers can be processed in parallel, and the inside of a plurality of reactors can be regularly cleaned during the parallel processing of the wafers.

In the present invention, the plurality of reactors include first and second reactors, the load port has first and second cassettes, and the control unit is the first in the load port. All the wafers in the cassette 1 are processed in the first reaction furnace, and all the wafers in the second cassette in the load port are processed in the second reaction furnace. When the film formation process of all the wafers in the first cassette is completed, the final cleaning of the first reactor is started, and all the wafers in the second cassette are formed. It is preferable to start the final cleaning in the second reactor when the film treatment is completed.

In the present invention, the epitaxial growth apparatus supplies an epitaxial raw material gas supply unit that supplies an epitaxial raw material gas into the reaction furnace during the film forming process of the wafer, and supplies etchant gas into the reaction furnace at the time of cleaning the inside of the reaction furnace. It is preferable that the etchant gas supply unit and the control unit control the supply time of the etchant gas according to an instruction from the host computer.

In the present invention, the etching time is preferably set according to the cumulative film thickness of the epitaxial film obtained by multiplying the film thickness of the epitaxial film per wafer by the number of continuously processed wafers. As a result, the inside of the reaction furnace can always be etched with an appropriate etching time according to the number of wafers continuously processed, and excessive etching in the reaction furnace can be suppressed.

Further, in the method for manufacturing an epitaxial wafer according to the present invention, a plurality of wafers housed in one or a plurality of cassettes in a load port are taken out one by one and conveyed into a reaction furnace, and the wafers are conveyed in the reaction furnace. A plurality of film forming steps for forming an epitaxial film on the main surface of the wafer, and after continuously forming a predetermined number of wafers of two or more wafers in the reaction furnace or forming all the wafers in the load port. After the film treatment is completed and before the next wafer is film-formed, the reaction furnace is provided with a cleaning step of vapor-phase etching to remove the residue, and the etching time in the reaction furnace is set. It is characterized in that it is set according to the number of wafers continuously processed immediately before the start of the cleaning step.

According to the present invention, even if the number of wafers housed in one or a plurality of cassettes changes, the inside of the reaction furnace can always be vapor-phase etched with an appropriate etching time according to the number of wafers continuously processed. , Excessive etching in the reactor can be suppressed. Therefore, it is possible to prevent the life of the SiC member and the quartz member in the reaction furnace from being shortened by repeating the cleaning step, and it is possible to prevent the occurrence of pinholes and the deterioration of the lifetime characteristics.

In the present invention, the etching time is preferably set according to the cumulative film thickness of the epitaxial film obtained by multiplying the film thickness of the epitaxial film per wafer by the number of continuously processed wafers. As a result, the inside of the reaction furnace can always be etched with an appropriate etching time according to the number of wafers continuously processed, and excessive etching in the reaction furnace can be suppressed.

In the present invention, the cleaning step includes at least one intermediate cleaning step performed after continuously forming the predetermined number of wafers in the reaction furnace, and the forming process of all the wafers in the load port. It is preferable that the etching time in the final cleaning step is equal to or less than the etching time in the intermediate cleaning step, including the final cleaning step performed after the completion of the above. As a result, the final cleaning in the reaction furnace can be performed with an appropriate etching time according to the number of continuously processed wafers, and excessive etching in the reaction furnace can be suppressed.

In the present invention, it is preferable that the wafer is a bulk silicon wafer, the main component of the residue is silicon, and in the cleaning step, hydrochloric acid gas is introduced into the reaction furnace to remove the residue. According to this, it is possible to suppress excessive etching in the reactor, suppress deterioration of the members in the reactor, and further improve the productivity of the epitaxial silicon wafer.

According to the present invention, an epitaxial wafer manufacturing system capable of suppressing excessive etching in the reactor during so-called multi-depot operation in which the inside of the reactor is cleaned after a plurality of wafers are continuously deposited. A manufacturing method can be provided.

FIG. 1 is a schematic diagram of the configuration of an epitaxial wafer manufacturing system according to an embodiment of the present invention. FIG. 2 is a schematic view of the configuration of the reactors 11A and 11B of the epitaxial growth apparatus 10. FIG. 3 is a schematic diagram for explaining the parallel operation mode of the epitaxial wafer manufacturing system 1. FIG. 4 is a schematic diagram for explaining the serial operation mode of the epitaxial wafer manufacturing system 1. FIG. 5 is a flowchart illustrating the operation of the epitaxial wafer manufacturing system 1. FIG. 6 is a diagram showing an example of a table that defines the relationship between the required etching amount and the etching time. 7 (a) and 7 (b) are schematic views for explaining a series of steps of performing a film forming process on a plurality of wafers in a cassette in a parallel operation mode, and FIG. 7 (a) is a schematic diagram for explaining all slots. When the wafer is set in, (b) shows the case where the wafer is not accommodated in some of the slots. FIG. 8 is a schematic diagram for explaining a series of steps for forming a plurality of wafers in the first and second cassettes 21A and 21B in the serial operation mode.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic diagram of the configuration of an epitaxial wafer manufacturing system according to an embodiment of the present invention.

As shown in FIG. 1, the epitaxial wafer manufacturing system 1 includes an epitaxial growth apparatus 10 for vapor phase growth of an epitaxial film on a main surface of a bulk silicon wafer (polished wafer), and a host for setting operating conditions of the epitaxial growth apparatus 10. It is equipped with a computer 40. The epitaxial growth apparatus 10 is connected to the host computer 40 via a data communication line and operates according to the product process and etching recipe provided by the host computer 40. The host computer 40 can acquire information (recipe) regarding wafer film formation conditions and cleaning conditions from the wafer product specifications recorded in the database 50.

The epitaxial growth apparatus 10 includes first and second reactors 11A and 11B for processing wafers one by one, load ports 20 in which cassettes 21A and 21B containing a plurality of wafers are installed, and first and first reactors. It is provided with a wafer transfer mechanism 30 provided between the reactors 11A and 11B of No. 2 and the load port 20. In the present embodiment, the epitaxial growth apparatus 10 includes the first and second reactors 11A and 11B, and has a redundant configuration capable of processing two wafers in parallel. Further, the load port 20 has two ports 20A and 20B in which two cassettes 21A and 21B can be installed at the same time, and wafers are taken out from the two cassettes 21A and 21B, respectively, and the first and second reactors 11A, respectively. It can be sent to 11B. The load port 20 may have a function as a load lock chamber that replaces the atmosphere, or may be a mere cassette installation space that does not replace the atmosphere. In the latter case, the wafer in the load port 20 is sent to the reactors 11A and 11B via a load lock chamber prepared separately from the load port 20.

FIG. 2 is a schematic view of the configuration of the reactors 11A and 11B of the epitaxial growth apparatus 10.

As shown in FIG. 2, the epitaxial growth apparatus 10 is a single-wafer type vapor deposition apparatus that processes wafers W one by one by an epitaxial CVD method, and is made of quartz and has a gas introduction port 11i and a gas discharge port 11o. It has reaction furnaces (chambers) 11A and 11B. Further, the epitaxial growth apparatus 10 includes a plurality of heaters 12 that heat the inside of the reactors 11A and 11B from the outside, a SiC susceptor 13 that supports the wafer W in the reactors 11A and 11B, and a rotation that drives the susceptor 13 to rotate. It includes a drive mechanism 14 and a control unit 19 that controls each unit. The gas inlets 11i of the reactors 11A and 11B are connected to a plurality of raw material tanks 17 via pipes 15 and valves 16.

The load port 20 has a load sensor 22 that detects whether or not a wafer W is accommodated in each slot in the cassette 21, and the control unit 19 has a load sensor 22 in the cassette 21 based on the output of the load sensor 22. The number of wafers W housed in the can be calculated. The number of slots in the cassette 21 (maximum number of wafers that can be accommodated) is, for example, 25. However, 25 wafers are not always accommodated and may be less than the maximum number of wafers that can be accommodated. It is necessary to detect whether or not it is contained. In this way, the control unit 19 and the load sensor 22 constitute a wafer storage number detection unit that counts the number of wafers stored in the cassette. Further, the load port 20 has a function of reading the product number from the label of the cassette 21, and the product number data is sent to the host computer 40 together with the number of wafers data.

The wafer transfer mechanism 30 has a robot arm, and the wafer W is transferred between the load port 20 and the reactors 11A and 11B. That is, the wafer W taken out from the cassette 21 is set in the reactors 11A and 11B, and the wafer W film-formed in the reactors 11A and 11B is taken out from the reactors 11A and 11B and put in the cassette 21. Returned to the original slot. The wafer transfer mechanism 30 takes out the wafer W from each slot based on the output of the load sensor 22.

The plurality of raw material tanks 17 include a silicon raw material tank 17a for storing an epitaxial raw material gas such as trichlorosilane, a dopant gas tank 17b for storing a dopant gas, and an etchant such as _{hydrochloric acid (HCl) used for cleaning and chlorine trifluoride (ClF 3).} including cleaning material tank 17c for storing the liquefied raw material gas, argon (Ar), the carrier material tank 17d for storing the liquefied material of the carrier gas such as hydrogen (H _2). The presence / absence and supply amount of these raw materials can be determined by controlling the corresponding valve 16 or the like. The gas discharge ports 11o of the reactors 11A and 11B are provided on the opposite sides of the susceptor 13 from the gas introduction port 11i, and the gas supplied from the gas introduction ports 11i into the reactors 11A and 11B is the susceptor 13. It is discharged from the gas discharge port 11o through the upper part of the gas discharge port 11o.

The control unit 19 controls the film forming process and cleaning of the wafer W in the reactors 11A and 11B. Therefore, the silicon raw material gas is supplied together with the carrier gas and the dopant gas at the time of the film forming process, and the etchant gas is supplied together with the carrier gas at the time of cleaning. The control unit 19 controls the valve 16 and the like to control the film formation amount of the epitaxial film, the cleaning time, and the like. The control unit 19 controls the reactors 11A and 11B based on the film formation recipe and the cleaning recipe sent from the host computer 40.

The host computer 40 is configured to be able to communicate with the external database 50, and can acquire information on the product specifications of the wafer based on the product number data sent from the load port 20. Information on the product specifications includes the film thickness of the epitaxial film, the film formation recipe number, the cleaning recipe number, the predetermined number of sheets (M1), and the like. The host computer 40 has a data table showing the relationship between the required etching amount and the etching time for each etching recipe, and the required etching amount can be obtained from the amount of epitaxial film formed per wafer and the number of wafers processed. The corresponding etching time can be determined by referring to the data table.

3 and 4 are schematic views for explaining the operation mode of the epitaxial wafer manufacturing system 1.

As shown in FIGS. 3 and 4, the epitaxial wafer manufacturing system 1 according to the present embodiment includes the first and second reactors 11A and 11B, and has a function of processing the wafers in the load port 20 in parallel. ing. In this case, the epitaxial growth apparatus 10 can select two operation modes.

One is that, as shown in FIG. 3, a plurality of wafers in the first cassette 21A set in the first port 20A are sequentially processed in the first reactor 11A, and the second port 20B is processed. This is a mode in which a plurality of wafers in the second cassette 21B set in the second cassette 21B are sequentially processed in the second reactor 11B, and this is called a parallel operation mode. The other is, as shown in FIG. 4, first, wafers are taken out one by one from the first cassette 21A in order and processed in parallel in both the first and second reactors 11A and 11B, and the first cassette is processed. This mode starts the processing of the wafers in the second cassette 21B after the processing of all the wafers in the 21A is completed, which is called the serial operation mode. As described above, the wafers housed in one cassette may be processed using a single reactor or may be processed in parallel using a plurality of reactors.

FIG. 5 is a flowchart illustrating the operation of the epitaxial wafer manufacturing system 1.

As shown in FIG. 5, at the start of wafer processing in the epitaxial wafer manufacturing system 1, the host computer 40 first acquires the product specifications and the operation mode (step S1). Next, the load sensor 22 in the load port 20 scans each slot in the cassette 21 to detect the presence or absence of wafers, and from the result, the number of wafers accommodated in the cassette 21 M _max is obtained (step S2). .. Further, the number of continuously processed wafers N ₁ is reset to the initial value (N ₁ = N ₂ = 1) (step S3). The number of continuously processed wafers N ₁ is a count value of the number of wafers processed for film formation between the time when the inside of the reactor 11 is cleaned and the time when the next cleaning is performed.

In the initial setting, the number of wafers to be integrated and N ₂ is also reset to the initial value (N ₂ = 1). The integrated number of wafers processed N ₂ is a count value of the number of wafers processed by sequentially taking out one or two or more cassettes to be processed regardless of before or after the cleaning process. Therefore, after the film formation processing of all the wafers in the cassette currently being processed installed in one of the first and second ports 20A and 20B in the load port 20 is completed, the first and second ports 20A and 20B are used. port 20A, when a new cassette containing unprocessed wafers into the other of 20B is loaded, the film forming process of the wafer continues, counting the cumulative processing number N ₂ is also continued.

Next, after the wafer W is taken out from the load port 20 and set in the reactor 11, a film forming step of forming an epitaxial film on the main surface of the wafer W is carried out (step S4). By this film forming process, silicon adheres not only to the surface of the wafer but also to the inside of the reaction furnace.

In the parallel operation mode, all the wafers in the first cassette 21A are processed in the first reactor 11A, and all the wafers in the second cassette 21B are processed in the second reactor 11B. When the processing of all the wafers in the first cassette 21A is completed, the operation of the first reactor 11A is completed, and when the processing of all the wafers in the second cassette 21B is completed, the second reaction is completed. The operation of the furnace 11B is completed.

On the other hand, in the serial operation mode, for example, the processing of the wafer in the first cassette 21A is started first, and the second cassette 21B is on standby during the processing of the first cassette 21A. The wafer in the first cassette 21A is processed in both the first and second reactors 11A and 11B. When the processing of all the wafers in the first cassette 21A is completed, the processing of the wafers in the next second cassette 21B is started. The wafer in the second cassette 21B is also processed in both the first and second reactors 11A and 11B.

During the processing of the second cassette 21B, the first cassette 21A containing the processed wafer is taken out from the first port 20A, and the first cassette 21A containing the unprocessed wafer is newly set. In this case, the processing of the wafers in the first cassette 21A is started after the processing of all the wafers in the second cassette 21B is completed. In this way, when the processed cassette is taken out and the unprocessed cassette is newly loaded, the film formation process of the wafer is continued, and _{the counting of the total number of wafers processed N 2} is also continued. However, if the processed cassette is not ejected from the first port 20A, or if the processed cassette is ejected but the unprocessed cassette is not loaded and remains empty as shown, all wafer film formation processes are performed. When completed, the operations of the first and second reactors 11A and 11B are also completed.

After the film formation process is completed, the integrated number _{of wafers N 2} is less than the number of wafers accommodated M _max (remaining number of wafers ≠ zero), and the number of continuous wafers N ₁ is the default number of cleaning starts M ₁ (for example, 7). If the number of wafers is less than (step S5Y, step S6N), N ₁ and N ₂ are incremented, and then the next wafer W is taken out from the cassette 21 and the film forming step is performed again (step S7, S4). In this way, the film forming process is continuously performed until the number of continuously processed wafers N ₁ reaches the predetermined number M ₁ (7 wafers) (steps S4 to S7).

When the number of continuously processed wafers N ₁ reaches the predetermined number M ₁ (M ₁ = 7) (step S6Y), the control unit 19 determines the residue (silicon) in the first and second reactors 11A and 11B. A cleaning step (intermediate cleaning) for removing deposits containing (step S8) as a main component is started (step S8). In the intermediate cleaning, the insides of the reactors 11A and 11B are vapor-phase etched at the etching time t = t ₀ × N ₁ set according to the number of wafers W continuously processed N _1. However, since the number of continuously processed wafers N ₁ is determined to be, for example, 7 times (N ₁ = M ₁ = 7) as described above, the etching time in the intermediate cleaning is constant (t = t ₀ × 7). .. In this way, the cleaning inside the reactors 11A and 11B is not performed every time the film forming process of one wafer is completed, but is performed after the film forming process (multi-depot process) of a plurality of wafers is completed. Will be done.

When the processing of all the wafers in the cassette is completed and the remaining number of processed wafers becomes zero, the control unit 19 confirms the operation mode, and in the case of the parallel operation mode, the first and second reactors 11A and 11B. The final cleaning of the inside is started (steps S5N, S9, S12). Further, when the operation mode is the serial operation mode, the presence or absence of a cassette in the adjacent port is confirmed, and when there is a second cassette 21B, the number of wafers accommodated in the second cassette 21B M _max is acquired ( Steps S9, S10, S11). After that, the film forming step is carried out in the same manner as for the wafer in the first cassette 21A (steps S4 to S8). In the serial operation mode, after all the wafers in the cassette are film-formed, as long as the cassette containing the unprocessed wafer is set in the adjacent port, the wafer film-forming process is continued, and such a wafer film-forming process is continued in the adjacent port. If no cassette is set, processing of all wafers is completed. Then, when the processing of all the wafers is completed, the final cleaning in the reactors 11A and 11B is performed (step S12).

As described above, the cleaning process in the first and second reactors 11A and 11B is performed even when the remaining number of processed sheets in the load port 20 becomes zero regardless of whether it is in the parallel operation mode or the serial operation mode. Will be done. That is, even before the continuous processing number N ₁ of the wafer W reaches the predetermined number M ₁ (M ₁ = 7), the film forming processing of all the wafers W in the first and second cassettes 21A and 21B is performed. When the above is completed, a cleaning step (final cleaning) in the reactors 11A and 11B is carried out. Even in the final cleaning, the insides of the reactors 11A and 11B are vapor-phase etched at the etching time t = N ₁ × t ₀ set according to the number of wafers W continuously processed N _1.

Last continuous processing number N ₁ of wafers processed by the reactor 11A or 11B until the intermediate cleaning final cleaning is started from the end, the default number of wafers W to be starting condition of the intermediate cleaning M _It does not always match 1 (7 sheets), and it is often less than the specified number. For example, when 25 wafers in a cassette are continuously processed 7 wafers at a time, the continuous processing number N ₁ of the final group wafers is 4. Then, in this embodiment, the final cleaning is performed in a short etching time in accordance with such a small number of wafers. _{The number of wafers N 1} to be continuously processed immediately before the start of final cleaning in the parallel operation mode is obtained by dividing the number of wafers accommodated in one cassette 21 corresponding to one reactor M _max by the predetermined number M _1. It can be obtained as the remaining number of sheets M ₂ = M _max mod M _1. The number of wafers W M ₂ is smaller than the predetermined number of _{wafers M 1} (7 times).

The etching time in the final cleaning or the intermediate cleaning can also be obtained by referring to a table that defines the relationship between the required etching amount and the etching time. For example, as shown in FIG. 6, a data table is prepared in advance such that the etching time is Asec when the required etching amount X is 0 μm <X ≦ 3 μm and the etching time is B sec when the etching time is 3 μm <X ≦ 6 μm. the required amount of etching from a continuous process number N ₁ obtains the (cumulative thickness of the epitaxial film), to determine the etch time, which is one of the cleaning recipe using etching required amount and the data table. The cleaning recipe for the final cleaning may differ only in the etching time from the intermediate cleaning, and other etching conditions (etching recipe) such as temperature and concentration may be different. As described above, the etching time (t) is the cumulative film of the epitaxial film obtained by multiplying the film thickness of the epitaxial film per wafer by the number of continuously processed wafers (N) regardless of whether the etching time (t) is intermediate cleaning or final cleaning. It is set according to the thickness.

7 (a) and 7 (b) are schematic views for explaining a series of steps of forming a plurality of wafers in the cassette 21 in the parallel operation mode, and FIG. 7 (a) shows wafers in all slots. When is set, (b) shows the case where the wafer is not accommodated in some of the slots.

As shown in FIG. 7A, when wafers are accommodated in all the slots of the cassette 21 having 25 slots, first, the slot No. 1 to No. After the film formation process of 7 wafers up to 7 is continuously performed, the first intermediate cleaning is performed. Next, slot No. No. 8 to No. After the film formation processing of the seven wafers W up to 14 is continuously performed, the second intermediate cleaning is performed. After that, the slot No. No. 15 to No. After the film formation processing of the seven wafers W up to 21 is continuously performed, the third intermediate cleaning is performed. The etching times in the first to third intermediate cleanings are all t = t ₀ × 7.

Finally, slot No. No. 22 to No. After the four wafers up to 25 are continuously processed, the final cleaning is performed. The etching time in the final cleaning is t = t ₀ × 4, which is shorter than the etching time in the intermediate cleaning.

As shown in FIG. 7B, the slot No. of the cassette 21 having 25 slots. 2 and No. If there is a vacancy in 3 and only 23 wafers are accommodated, first slot No. 1 to No. After the seven wafers up to 9 are continuously processed, the first intermediate cleaning is performed. Next, slot No. No. 10 to No. After the seven wafers W up to 16 are continuously processed, the second intermediate cleaning is performed. After that, the slot No. No. 17 to No. After the seven wafers W up to 23 are continuously processed, the third intermediate cleaning is performed. The etching times in the first to third intermediate cleanings are all t = t ₀ × 7.

Finally, slot No. 24 and No. After the two wafers of 25 are continuously processed, the final cleaning is performed. The etching time in the final cleaning is t = t ₀ × 2, which is shorter than the etching time in the intermediate cleaning. Further, as compared with FIG. 7A, the etching time in the 1st to 3rd intermediate cleanings in FIG. 7B is the same as that in FIG. 7A, but the etching time in the final cleaning in FIG. 7B is. It is even shorter than that in FIG. 7 (a).

Although not shown, slot No. 1-No. If any four of the 25 wafers are vacant and the number of wafers W accommodated in the cassette 21 is 21, the slot No. No. 15 to No. The final cleaning is performed after the seven wafers W up to 21 are continuously processed. In this case, the etching time in the final cleaning is t = t ₀ × 7, which is the same as the etching time in the first and second intermediate cleanings.

As described above, the maximum number of wafers (for example, 25) that can be accommodated is not always accommodated in the cassette 21, and it is often less than the maximum number of wafers that can be accommodated. Further, if cleaning is performed every time after the film forming process, the production efficiency deteriorates, and conversely, if the cleaning cycle is made too long, the cleaning efficiency decreases. Therefore, it should be given priority as much as possible to adopt the continuous processing number having good production efficiency and cleaning efficiency, rather than adopting the continuous processing number with good division with respect to the number of slots of the cassette 21.

FIG. 8 is a schematic diagram for explaining a series of steps for forming a plurality of wafers in the first and second cassettes 21A and 21B in the serial operation mode.

As shown in FIG. 8, a total of 25 wafers A1 to A25 are housed in the first cassette 21A, and 22 wafers B1 and B4 to B25 are housed in the second cassette 21B. It is assumed that there is. The slot No. of the second cassette 21B. 2. No. 3, No. Reference numeral 4 denotes an empty slot, and wafers B2, B3, and B4 are not accommodated. In the serial operation mode, first all the wafers in the first cassette 21A are processed, and then the processing of the wafers in the second cassette 21B is started. Therefore, the wafers in the first cassette 21A are taken out in the slot order and are alternately allocated to the first reactor 11A and the second reactor 11B, and the first and second reactors 11A and 11B are allocated. The wafers are processed in order. Then, intermediate cleaning is performed when the film formation processing of the seven wafers is completed in the first and second reactors 11A and 11B.

When the film forming processes of all the wafers A1 to A25 in the first cassette 21A are completed, the film forming processes of the wafers in the second cassette 21B are subsequently started. Here, in the serial operation mode, the final cleaning is not performed when the first cassette 21A is switched to the second cassette 21B, that is, when the film formation processing of all the wafers in the preceding cassette is completed. This is because the film forming process of all the wafers housed in the first and second cassettes 21A and 21B has not been completed, and the film forming process for the group of wafers to be processed is continuing. That's why.

Therefore, the final cleaning of the first reactor 11A is performed by the slot No. 2 in the second cassette 21B. The film formation process of the wafer B25 of the 25 wafers is completed, and the final cleaning of the second reactor 11B is performed at the slot No. 2 in the second cassette 21B. This is performed after the film forming process of the wafer B24 of 24 is completed. In this case, the final cleaning of the first reactor 11A is performed after the three wafers have been continuously processed, and the final cleaning of the second reactor 11B is performed after the two wafers have been continuously processed.

In the serial operation mode, when the host computer 40 grasps the number of wafers in the unprocessed cassette set in the load port 20, it calculates the etching time for final cleaning according to the number of wafers, and sets the etching time. The including cleaning recipe is provided to the epitaxial growth apparatus 10. That is, the host computer 40 generates cleaning recipes for the reactors 11A and 11B in advance from the number of wafers in the load port 20 and provides them to the epitaxial growth apparatus 10. When an unprocessed cassette is newly set in the adjacent port in the load port 20, the host computer 40 deletes the currently set cleaning recipe for the final cleaning and in the newly set unprocessed cassette. The cleaning recipe for the final cleaning is calculated based on the number of wafers. Therefore, the epitaxial growth apparatus 10 can always generate the latest cleaning recipe, and can generate it for each reactor used for the final cleaning.

Conventionally, the cleaning of the reactors 11A and 11B has been carried out independently by the epitaxial growth apparatus 10 regardless of whether the cleaning is intermediate cleaning or final cleaning, so that a fixed cleaning recipe has been used. In the present embodiment, the host computer 40 calculates the etching time according to the number of wafers continuously processed, and sends a cleaning recipe including the etching time to the epitaxial growth apparatus 10, thereby suppressing excessive etching in the final cleaning. It can be configured and the cleaning recipe settings can be automated.

As described above, in the method for manufacturing an epitaxial silicon wafer according to the present embodiment, a plurality of wafers W housed in the cassette 21 are taken out one by one in order and conveyed into the reaction furnaces 11A and 11B, and the reaction furnace is concerned. A plurality of film forming steps for performing epitaxial growth processing of wafers W in 11A and 11B, an intermediate cleaning step for performing vapor phase etching in reactors 11A and 11B after continuously processing a predetermined number of wafers, and loading. A final cleaning step of processing all the wafers W in the cassette 21 set in the port 20 and then performing vapor phase etching in the reactors 11A and 11B, and a wafer W just before starting the intermediate cleaning step or the final cleaning. Each cleaning step has a cleaning recipe generation step of calculating the etching time (t) in the reactors 11A and 11B according to the number of continuously processed sheets (N _{1) and generating a cleaning recipe including the etching time in advance.} Since the reactors 11A and 11B are cleaned according to the cleaning recipe, excessive chamber etching can be prevented and the cleaning time can be optimized.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the present invention, and these are also the present invention. Needless to say, it is included in the range.

For example, in the above embodiment, the method for manufacturing an epitaxial silicon wafer has been given as an example, but the present invention is not limited to the silicon wafer and can be applied to various epitaxial wafers.

1 Epitaxial wafer manufacturing system 10 Epitaxial growth device 11 Reactor 11i Gas inlet 11o Gas outlet 12 Heater 13 Suceptor 14 Rotary drive mechanism 15 Piping 16 Valve 17 Raw material tank 17a Silicon raw material tank 17b Dopant gas tank 17c Cleaning raw material tank 17d Carrier raw material tank 19 Control unit 20 Load port 20A First port 20B Second port 21 Cassette 22 Load sensor 30 Wafer transfer mechanism M ₁ Number of wafers continuously processed in intermediate cleaning M ₂ Number of wafers continuously processed in final cleaning M _max Number of wafers accommodated N ₁ continuous processing number (count value)
N ₂ total number of processed sheets (count value)
W wafer

Claims (12)

An epitaxial growth apparatus that includes a reaction furnace that processes wafers one by one and a control unit that controls the reaction furnace, and forms an epitaxial film on the main surface of the wafer in the reaction furnace.
A host computer for setting the operating conditions of the epitaxial growth apparatus is provided.
The epitaxial growth apparatus is after the film formation process of two or more predetermined number of wafers is continuously performed in the reaction furnace or after the film formation process of all the wafers to be processed in the reaction furnace is completed. Before starting the film formation process of the next wafer, the inside of the reaction furnace is subjected to vapor phase etching to remove the residue.
The host computer calculates the etching time in the reaction furnace according to the number of wafers continuously processed immediately before the start of cleaning, and provides the control unit with a cleaning recipe including the etching time. Epitaxial wafer manufacturing system. The cleaning
At least one intermediate cleaning performed after the predetermined number of wafers are continuously deposited in the reactor.
Including final cleaning performed after the film formation process of all wafers to be processed in the reactor is completed.
The epitaxial wafer manufacturing system according to claim 1, wherein the etching time in the final cleaning is equal to or less than the etching time in the intermediate cleaning. The epitaxial growth device is
A load port that can accommodate multiple cassettes and
A wafer storage number detection unit that counts the number of wafers in the cassette housed in the load port, and a wafer storage number detector.
It further includes a wafer transfer mechanism that takes out wafers one by one from the cassette housed in the load port and transfers them into the reaction furnace.
After the film formation process of all the wafers in the cassette currently being processed is completed, the control unit is in the reaction furnace when another cassette to be processed next is not waiting in the load port. The epitaxial wafer manufacturing system according to claim 2, wherein it is determined that the film formation processing of all the wafers to be processed has been completed, and the final cleaning in the reaction furnace is started. After the film formation process of all the wafers in the cassette currently being processed is completed, the control unit is in the reaction furnace when another cassette to be processed next is waiting in the load port. The epitaxial wafer manufacturing system according to claim 3, wherein the film formation process of the wafer to be processed is continued. The epitaxial growth apparatus has a plurality of reactors and has a plurality of reactors.
The epitaxial wafer manufacturing system according to claim 4, wherein the wafer taken out from the cassette currently being processed in the load port is transferred to one of the plurality of reactors and subjected to film formation processing. The plurality of reactors include a first and second reactors.
The load port has first and second cassettes.
The control unit processes all the wafers in the first cassette in the load port into a film in the first reaction furnace, and all the wafers in the second cassette in the load port. The wafer is controlled to be processed in the second reactor,
When the film forming process of all the wafers in the first cassette is completed, the final cleaning of the first reactor is started.
The epitaxial wafer manufacturing system according to claim 5, wherein when the film forming process of all the wafers in the second cassette is completed, the final cleaning in the second reactor is started. The etching time is set according to any one of claims 1 to 6 according to the cumulative thickness of the epitaxial film obtained by multiplying the thickness of the epitaxial film per wafer by the number of continuously processed wafers. The epitaxial wafer manufacturing system according to the section. The wafer is a silicon wafer
The main component of the residue is silicon.
The epitaxial wafer manufacturing system according to any one of claims 1 to 7, wherein the cleaning involves introducing hydrochloric acid gas into the reaction furnace to remove the residue. A plurality of wafers housed in one or a plurality of cassettes in a load port are taken out one by one and conveyed into a reactor, and a plurality of wafers are formed into a film on the main surface of the wafers in the reactor. The film formation process and
After the film formation process of two or more predetermined number of wafers is continuously performed in the reaction furnace or after the film formation process of all the wafers in the load port is completed, the film formation process of the next wafer is performed. The inside of the reaction furnace is provided with a cleaning step of vapor-etching to remove the residue before starting.
A method for manufacturing an epitaxial wafer, wherein the etching time in the reaction furnace is set according to the number of wafers continuously processed immediately before the cleaning step is started. The epitaxial wafer according to claim 9, wherein the etching time is set according to the cumulative thickness of the epitaxial film obtained by multiplying the thickness of the epitaxial film per wafer by the number of continuously processed wafers. Manufacturing method. The cleaning step is
At least one intermediate cleaning step performed after the predetermined number of wafers are continuously formed in the reaction furnace, and
Including the final cleaning step performed after the film formation process of all the wafers to be processed in the reactor is completed.
The method for manufacturing an epitaxial wafer according to claim 9 or 10, wherein the etching time in the final cleaning step is equal to or less than the etching time in the intermediate cleaning step. The wafer is a bulk silicon wafer.
The main component of the residue is silicon.
The method for producing an epitaxial wafer according to any one of claims 9 to 11, wherein the cleaning step introduces hydrochloric acid gas into the reaction furnace to remove the residue.

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