JP7298198B2 - power converter - Google Patents

Description

The technology disclosed in this specification relates to a power converter.

The power conversion device disclosed in Patent Literature 1 has a laminate configured by alternately stacking a plurality of coolers and a plurality of semiconductor modules. A plurality of coolers and a plurality of semiconductor modules are alternately stacked such that the coolers are positioned at both ends of the stack. Each semiconductor module is sandwiched between a pair of coolers. Each semiconductor module incorporates a switching element. A DC-DC converter circuit and an inverter circuit are configured by connecting the semiconductor modules to each other. When the boost DC-DC converter circuit and the inverter circuit operate, each semiconductor module generates heat. Each semiconductor module is cooled by coolers from both sides. This suppresses the temperature rise of each semiconductor module.

JP 2007-266634 A

In the step-up DC-DC converter, the semiconductor module generates a large amount of heat. Therefore, in the power conversion device, the semiconductor module of the step-up DC-DC converter tends to become hotter than the other semiconductor modules. This specification proposes a technique for suppressing temperature rise of a semiconductor module of a step-up DC-DC converter in a power converter.

A power converter disclosed in this specification has a laminate, a coolant supply pipe, and a coolant discharge pipe. The laminate has a plurality of coolers and a plurality of semiconductor modules. A plurality of the coolers and a plurality of the semiconductor modules are laminated such that each semiconductor module is sandwiched between two of the plurality of semiconductor modules to form the laminate. The coolant supply pipe supplies coolant to each cooler. The refrigerant discharged from each cooler flows into the refrigerant discharge pipe. The plurality of semiconductor modules has at least one boost semiconductor module forming part of a boost DC-DC converter circuit. Of the plurality of coolers, at least one adjacent cooler that contacts the boosted semiconductor module has a surface opposite to a contact surface with respect to the boosted semiconductor module, not in contact with any of the plurality of semiconductor modules.

In this power converter, the surface of the adjacent cooler that is in contact with the step-up semiconductor module and is opposite to the contact surface with respect to the step-up semiconductor module is not in contact with any of the plurality of semiconductor modules. The adjacent cooler is thus heated from one side. Therefore, the temperature of the refrigerant in the adjacent cooler is less likely to rise, and the adjacent cooler has high cooling performance. Therefore, the boost semiconductor module in contact with the adjacent cooler can be efficiently cooled, and the temperature rise of the boost semiconductor module can be suppressed.

A circuit diagram of a power control circuit. 1 is a perspective view of a semiconductor module; FIG. The perspective view of a power converter device. The top view of a power converter device. A perspective view of a cooler. 4 is a graph showing the relationship between the position of a semiconductor module and thermal resistance; The circuit diagram of the power control circuit of a modification. FIG. 10 is a plan view of a laminate of Modification 1; FIG. 11 is a plan view of a laminate of Modification 2; FIG. 11 is a plan view of a laminate of Modification 3;

FIG. 1 shows a power control circuit 10 mounted on a vehicle such as an electric vehicle. The vehicle has a running motor 18 . The power control circuit 10 converts the DC power of the battery 12 into AC power and supplies it to the driving motor 18 . The power control circuit 10 has a DC-DC converter circuit 14 and an inverter circuit 16 . The DC-DC converter circuit 14 boosts the output voltage (DC voltage) of the battery 12 . The inverter circuit 16 converts the output voltage (boosted DC voltage) of the DC-DC converter circuit 14 into AC power.

The DC-DC converter circuit 14 has a high potential wiring 20, a low potential wiring 22, an intermediate wiring 24, a capacitor 30, a reactor 32, IGBTs (insulated gate bipolar transistors) 34a to 34d, and a capacitor . Capacitor 30 is connected between the positive and negative terminals of battery 12 . Intermediate wiring 24 is connected to the positive electrode of battery 12 via reactor 32 . The low potential wiring 22 is connected to the negative electrode of the battery 12 . The IGBTs 34a and 34c are connected between the high potential wiring 20 and the intermediate wiring 24 with the collectors facing the high potential wiring 20 side. The IGBTs 34b and 34d are connected between the intermediate wiring 24 and the low potential wiring 22 with their collectors facing the intermediate wiring 24 side. A diode is connected in parallel with each of the IGBTs 34a-34d. The anode of each diode is connected to the emitter of the corresponding IGBT, and the cathode of each diode is connected to the collector of the corresponding IGBT. A capacitor 36 is connected between the high potential wiring 20 and the low potential wiring 22 .

The DC-DC converter circuit 14 boosts the voltage between the positive and negative electrodes of the battery 12 and applies the boosted voltage between the high potential wiring 20 and the low potential wiring 22 . The DC-DC converter circuit 14 can also step down the voltage between the high-potential wiring 20 and the low-potential wiring 22 and apply the stepped-down voltage between the positive and negative electrodes of the battery 12 .

The inverter circuit 16 has a high potential wiring 20, a low potential wiring 22, output wirings 26-28, and IGBTs 34e-34j. The output wirings 26 to 28 are connected to the running motor 18 . The IGBT 34 e is connected between the high potential wiring 20 and the output wiring 26 with the collector facing the high potential wiring 20 side. The IGBT 34g is connected between the high potential wiring 20 and the output wiring 27 with the collector facing the high potential wiring 20 side. The IGBT 34i is connected between the high potential wiring 20 and the output wiring 28 with the collector facing the high potential wiring 20 side. The IGBT 34f is connected between the output wiring 26 and the low potential wiring 22 with the collector facing the output wiring 26 side. The IGBT 34h is connected between the output wiring 27 and the low potential wiring 22 with the collector facing the output wiring 27 side. The IGBT 34j is connected between the output wiring 28 and the low potential wiring 22 with the collector facing the output wiring 28 side. A diode is connected in parallel with each of the IGBTs 34e to 34j. The anode of each diode is connected to the emitter of the corresponding IGBT, and the cathode of each diode is connected to the collector of the corresponding IGBT.

The inverter circuit 16 converts the DC power applied between the high-potential wiring 20 and the low-potential wiring 22 into three-phase AC power, and supplies the three-phase AC power to the driving motor 18 via the output wirings 26-28. do.

As shown in FIG. 1, each of a series circuit of IGBTs 34a and 34b, a series circuit of IGBTs 34c and 34d, a series circuit of IGBTs 34e and 34f, a series circuit of IGBTs 34g and 34h, and a series circuit of IGBTs 34i and 34j is a semiconductor module 40a. 40e. Note that the semiconductor modules 40a to 40e may be collectively referred to as a semiconductor module 40 hereinafter.

FIG. 2 shows the configuration of the semiconductor module 40. As shown in FIG. As shown in FIG. 2, the semiconductor module 40 has an insulating resin 42, three main terminals 44a to 44c, and a plurality of signal terminals . The insulating resin 42 incorporates two IGBTs 34 connected in series. The three main terminals 44 a to 44 c and the signal terminal 46 protrude from the side surface of the insulating resin 42 . The main terminals 44 a - 44 c are connected to the IGBT 34 inside the insulating resin 42 . The main terminal 44 a is a terminal connected to the high potential wiring 20 . The main terminal 44 b is a terminal connected to the low potential wiring 22 . The main terminal 44c is a terminal connected to the intermediate wiring 24 or the output wirings 26-28. A signal terminal 46 is a terminal for controlling the IGBT 34 . The signal terminal 46 includes a gate terminal of the IGBT 34 and a terminal for detecting current, temperature, etc. of the IGBT 34 .

3 and 4 show a power converter 50 in which the semiconductor module 40 is integrated. The power converter 50 includes a plurality of coolers 52a-52f and the above-described semiconductor modules 40a-40e. Each cooler 52 has a flat shape. A laminate 51 is configured by alternately stacking a plurality of coolers 52 and a plurality of semiconductor modules 40 . Cooler 52 and semiconductor module 40 are stacked such that cooler 52 a and cooler 52 f are positioned at both ends of stack 51 . Below, two coolers 52a and 52f arranged at both ends of layered product 51 may be called an end cooler. In addition, the plurality of coolers 52b, 52c, 52d, and 52e arranged at positions other than both ends (that is, the plurality of coolers 52 arranged between the end cooler 52a and the end cooler 52f) is sometimes called an intercooler. A semiconductor module 40a forming part of the DC-DC converter circuit 14 is sandwiched between an end cooler 52a and an adjacent intercooler 52b. A semiconductor module 40b forming part of the DC-DC converter circuit 14 is sandwiched between an end cooler 52f and an adjacent intercooler 52e. A semiconductor module 40c forming part of the inverter circuit 16 is sandwiched between the intercoolers 52b and 52c. A semiconductor module 40d forming part of the inverter circuit 16 is sandwiched between the intercoolers 52c and 52d. A semiconductor module 40e forming part of the inverter circuit 16 is sandwiched between the intercoolers 52d and 52e.

As shown in FIG. 5, connection holes 24a and 24b are provided at both ends of each cooler 52 in the longitudinal direction. Inside each cooler 52, a coolant channel is formed that communicates the connection hole 24a and the connection hole 24b. As shown in FIGS. 3 and 4, the connection hole 24a of each cooler 52 is connected to a coolant supply pipe 60, and the connection hole 24b of each cooler 52 is connected to a coolant discharge pipe 62. As shown in FIGS. The coolant supply pipe 60 and the coolant discharge pipe 62 are connected to a pump (not shown). When the pump operates, as indicated by the arrows in FIGS. 3 and 4, the refrigerant (cooling water in this embodiment) flows from the refrigerant supply pipe 60 through the refrigerant passage inside each cooler 52 to the refrigerant discharge pipe 62. . As the coolant flows through each cooler 52 , the heat generated in the semiconductor modules 40 is absorbed by the coolant and the semiconductor modules 40 are cooled.

As shown in FIGS. 3 and 4, the edge coolers 52a, 52f contact the semiconductor module 40 on only one side. On the other hand, the intercoolers 52b to 52e are sandwiched between a pair of semiconductor modules 40 and are in contact with the semiconductor modules 40 on both sides. Therefore, when each semiconductor module 40 and each cooler 52 are operated, the coolant in the end coolers 52a and 52f is less likely to be heated than the coolant in the intermediate coolers 52b to 52e. Therefore, the semiconductor modules 40a and 40b are cooled more efficiently than the semiconductor modules 40c to 40e.

FIG. 6 shows the results of experiments conducted to demonstrate the difference in cooling performance between end coolers and intercoolers. In this experiment, in a laminated body in which a plurality of semiconductor modules and a plurality of coolers are alternately laminated in the same manner as in FIGS. was measured. In this experiment, the flow rate of the coolant was changed and the thermal resistance was measured at each flow rate of the coolant. Also, in this experiment, a laminate was used in which 9 semiconductor modules and 10 coolers were alternately stacked. The horizontal axis of FIG. 6 represents the number of the semiconductor module, and this number corresponds to the position of the semiconductor module in the stack. Semiconductor module 1 and semiconductor module 9 are sandwiched between an end cooler and an intercooler. Other semiconductor modules 2 to 8 are sandwiched between a pair of intercoolers. As is clear from FIG. 6, the thermal resistance of the semiconductor modules 1 and 9 in contact with the end coolers is lower than the thermal resistance of the other semiconductor modules 2-8 regardless of the coolant flow rate. In particular, when the flow rate of the refrigerant is low, the refrigerant is easily heated, so the difference in cooling performance is noticeable. Therefore, when the flow rate of the coolant is small, the thermal resistance of the semiconductor modules 1 and 9 becomes significantly lower than the thermal resistance of the other semiconductor modules 2-8. Thus, the cooling performance for the semiconductor modules 1 and 9 sandwiched between the end coolers and the intermediate cooler is higher than the cooling performance for the semiconductor modules 2 to 8 sandwiched between the intermediate coolers.

In the power converter 50 of the embodiment shown in FIGS. 3 and 4, the cooling performance for the semiconductor modules 40a and 40b is higher than the cooling performance for the semiconductor modules 40c to 40e. As described above, the semiconductor modules 40a and 40b are mounted on the DC-DC converter circuit 14, and the semiconductor modules 40c to 40e are mounted on the inverter circuit 16. FIG. The semiconductor modules 40a and 40b mounted on the DC-DC converter circuit 14 are used in a state of higher power consumption than the semiconductor modules 40c to 40e mounted on the inverter circuit 16. FIG. Therefore, the amount of heat generated by the semiconductor modules 40a and 40b is higher than that of the semiconductor modules 40c to 40e. Therefore, in the power conversion device 50 of the embodiment, the semiconductor modules 40a and 40b that generate a large amount of heat can be efficiently cooled. As a result, the temperature rise of the semiconductor modules 40a and 40b can be suppressed, and the temperature of the semiconductor modules 40a and 40b can be prevented from becoming extremely higher than the temperature of the semiconductor modules 40c to 40e. That is, it is possible to suppress variations in temperature among the semiconductor modules 40a to 40e. Therefore, according to the structure of the power conversion device 50 of the embodiment, it is possible to prevent some of the semiconductor modules 40 from deteriorating faster than the other semiconductor modules 40, thereby extending the life of the power conversion device 50. can be done.

In addition, as shown in FIG. 6, the semiconductor modules (eg, semiconductor module 5) in the central portion of the laminate have the semiconductor modules (eg, semiconductor modules 3 and 8) outside the central portion excluding both ends. thermal resistance tends to be lower than Therefore, in the power conversion device 50, the semiconductor module 40 having the second highest heat generation amount after the semiconductor modules 40a and 40b may be arranged in the central portion of the stack.

Also, in the above embodiments, power was supplied from the DC-DC converter circuit 14 to the single inverter circuit 16 . However, power may be supplied from the DC-DC converter circuit 14 to a plurality of inverter circuits. In this case, each semiconductor module mounted on each inverter circuit can be arranged so as to be sandwiched between the intercoolers.

Further, in the above embodiment, the DC-DC converter circuit 14 has two semiconductor modules 40a and 40b. However, the number of semiconductor modules 40 mounted on the DC-DC converter circuit 14 may be one. In this case, by disposing the semiconductor module 40 mounted on the DC-DC converter circuit 14 between the end cooler and the intermediate cooler, the semiconductor module 40 can be efficiently cooled.

Also, in the above embodiments, the power control circuit 10 had a single DC-DC converter circuit 14 . However, as shown in FIG. 7, the power control circuit may have two DC-DC converter circuits 14a, 14b. Each of the DC-DC converter circuits 14a, 14b has one semiconductor module 40f, 40g. In this case, the semiconductor modules 40f, 40g can be arranged between the end cooler and the intercooler.

In the above embodiment, the end coolers 52a and 52f are examples of adjacent coolers (that is, coolers in contact with the semiconductor modules 40a and 40b forming part of the DC-DC converter circuit 14). Since the surfaces of the adjacent coolers 52a and 52f opposite to the contact surfaces with respect to the semiconductor modules 40a and 40b are not in contact with any semiconductor module, the semiconductor modules 40a and 40b can be efficiently cooled. there is

Next, laminates of modified examples 1 to 3 shown in FIGS. 8 to 10 will be described. 8 to 10, reference numeral 40x denotes a boost semiconductor module forming part of the boost DC-DC converter circuit, reference numeral 40y denotes a semiconductor module forming part of the inverter circuit, and 52x indicates an adjacent cooler adjacent to the boost semiconductor module, and reference numeral 52y indicates another cooler.

8, two booster semiconductor modules 40x (40x-1, 40x-2) are arranged at both ends of the semiconductor module 40 in the stacked body of Modification 1 shown in FIG. The stack of FIG. 8 has four adjacent coolers 52x (52x-1 to 52x-4) adjacent to the boost semiconductor module 40x. Adjacent coolers 52x-1 and 52x-4 are located at the ends of the laminate, so that they are in contact with semiconductor module 40 only on one side. Therefore, the adjacent coolers 52x-1 and 52x-4 can efficiently cool the boost semiconductor modules 40x-1 and 40x-2. Semiconductor modules 40 are arranged in a region 91 between the adjacent cooler 52x-2 and the adjacent cooler 52y, and in a region 92 between the adjacent cooler 52x-3 and the adjacent cooler 52y. not That is, the regions 91 and 92 are spaces. Therefore, the adjacent coolers 52x-2 and 52x-3 are in contact with the semiconductor module 40 only on one side. Therefore, the adjacent coolers 52x-2 and 52x-3 can efficiently cool the boost semiconductor modules 40x-1 and 40x-2.

In the stacked body of Modification 2 shown in FIG. 9, among the semiconductor modules 40, two booster semiconductor modules 40x (40x-1, 40x-2) are arranged side by side, and six semiconductor modules 40y are arranged side by side. The stack of FIG. 9 has three adjacent coolers 52x (52x-1 to 52x-3) adjacent to the boost semiconductor module 40x. Since the adjacent cooler 52x-1 is positioned at the end of the stack, it is in contact with the semiconductor module 40 only on one side. Therefore, the adjacent cooler 52x-1 can efficiently cool the boost semiconductor module 40x-1. Also, no semiconductor module 40 is arranged in the region 93 between the adjacent cooler 52x-3 and the adjacent cooler 52y. That is, the area 93 is a space. Therefore, the adjacent cooler 52x-3 is in contact with the semiconductor module 40 only on one side. Therefore, the adjacent cooler 52x-3 can efficiently cool the boost semiconductor module 40x-2.

The laminate of Modification 3 shown in FIG. 10 is obtained by providing regions 94 at regular intervals in the row of semiconductor modules 40y in the laminate of Modification 2. As shown in FIG. No semiconductor module 40 is arranged in the region 94 . That is, the area 94 is a space. By providing the region 94, the cooling performance of each cooler 52y can be improved.

In modifications 1 to 3 (FIGS. 8 to 10), dummy modules composed of non-heating elements may be arranged in the regions 91 to 94. FIG. Also, regions 91-94 may be compressed to bring the coolers on either side of them into contact.

Although the embodiments have been described in detail above, they are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or in the drawings exhibit technical usefulness either singly or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques exemplified in this specification or drawings simultaneously achieve a plurality of purposes, and achieving one of them has technical utility in itself.

10: Power control circuit 12: Battery 14: DC-DC converter circuit 16: Inverter circuit 18: Running motor 20: High potential wiring 22: Low potential wiring 24: Intermediate wiring 26: Output wiring 27: Output wiring 28: Output wiring 30: Capacitor 32: Reactor 36: Capacitor 40: Semiconductor module 50: Power converter 51: Laminate 52: Cooler 60: Refrigerant supply pipe 62: Refrigerant discharge pipe

Claims (4)

A power converter,
a plurality of coolers and a plurality of semiconductor modules, wherein the plurality of the coolers and the plurality of the semiconductor modules are stacked such that each semiconductor module is sandwiched between two of the plurality of the coolers; a laminate;
a coolant supply pipe that supplies coolant to each cooler;
a refrigerant discharge pipe into which the refrigerant discharged from each cooler flows;
and
the plurality of semiconductor modules having a first boost semiconductor module and a second boost semiconductor module that constitute a part of a boost DC-DC converter circuit;
At least one adjacent cooler among the plurality of coolers, which is in contact with the first boosted semiconductor module , has a surface opposite to a contact surface with the first boosted semiconductor module in contact with any of the plurality of semiconductor modules. not
Of the plurality of coolers, at least one adjacent cooler that is in contact with the second boosted semiconductor module has a surface opposite to a contact surface with the second boosted semiconductor module in contact with any of the plurality of semiconductor modules. do not have,
Power converter. a plurality of the coolers, a first end cooler and a second end cooler arranged at both ends of the laminate, and between the first end cooler and the second end cooler; having a plurality of intercoolers arranged,
the first boosted semiconductor module is sandwiched between the first end cooler and the adjacent intercooler;
the second boosted semiconductor module is sandwiched between the second end cooler and the adjacent intercooler;
The power converter according to claim 1. wherein the plurality of semiconductor modules have at least one inverter semiconductor module forming part of an inverter circuit;
The inverter semiconductor module is sandwiched between two of the plurality of intercoolers,
The power converter according to claim 2. 4. The power converter according to claim 3, wherein the power consumption of said first step-up semiconductor module and said second step-up semiconductor module is higher than the power consumption of said inverter semiconductor module.

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