JP7284003B2 - Semiconductor device, IC card, control method and program - Google Patents

Description

The present invention relates to a semiconductor device, IC card, control method and program.

In recent years, IC (integrated circuit) cards have been used in many industries, and there are a wide variety of operating system programs and application programs built into IC cards according to their uses.
These programs are written in a mask ROM, flash memory, or the like as program code that cannot be rewritten (hereinafter referred to as ROM (read only memory) code) when the IC card is created.

As described above, if a problem is found in the program written as ROM code due to the inability to rewrite the program written at the time of shipment, the IC card is replaced with an IC card in which a program corrected for the problem is written. There is a need to.
In recent years, it is often the case that many functions are provided to one IC card, and the number of program codes increases, resulting in an increase in the probability of problems occurring in the operation of the program.

For this reason, an entry point (hereinafter referred to as an entry point) for checking the application of a modified program (hereinafter referred to as a patch) is provided at a location where it is estimated that the ROM code is highly likely to be modified.
Then, the patch program is loaded into a rewritable flash memory or EEPROM (electrically erasable programmable read only memory), and it is determined at the above entry point whether the ROM code needs to be replaced or not, and if there is a problem. The modified ROM code is replaced with a patch program to correct the ROM code of the program (see, for example, Patent Document 1).

Japanese Patent No. 5017868

As described above, when a patch program is executed (hereinafter referred to as patch processing) in place of the ROM code of the program that needs to be corrected due to a defect, etc., the entry point provided in the ROM code of the program is used to access the external device. A patch program loaded from the .

At this time, when patching the ROM code of the program, it is searched whether a patch program corresponding to the entry point is prepared.
Here, in Patent Document 1, an entry point table is provided to indicate whether or not a patch is prepared for each entry point, and this entry point table is searched by a number assigned to each entry point.

Then, it is determined whether or not patch processing at the entry point is necessary, depending on whether or not there is a patch for the ROM code of the entry point corresponding to the entry point number extracted as a result of the search.
When patch processing is required, the address of the patch program described corresponding to the entry point in the entry point table is read, and patch processing is performed at the target entry point.

However, as the number of entry points increases, the time required to refer to the entry point table and execute the patch processing for each entry point in the ROM code of the program also increases, causing the program execution speed to decrease. Become.
Also, as in Cited Document 1, when the address of the patch program is described for each entry point in the entry point table, at least the number of entry points, the ID of the entry point, the presence or absence of the patch corresponding to the entry point, the patch A storage area is required to write the address of the ROM code, which reduces the usable area in the flash memory and EEPROM.

SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances. To suppress an increase in execution time, suppress an increase in a storage area for storing information necessary for patch processing, and reduce a usable area in a storage section composed of rewritable memory such as flash memory and EEPROM. A semiconductor device, an IC card, a control method, and a program are provided.

In order to solve the above-described problems, one aspect of the present invention provides a first storage unit that stores a program and in which the stored data cannot be rewritten, a control unit that executes the program, and a storage unit that stores the stored data. and an entry added to the function module in the program, which is provided in the second storage unit and stores a patch that is a module that replaces the function module in the program. a patch parameter area for storing patch data including a patch presence/absence flag indicating whether or not at least one entry point for which the patch is prepared exists in all of the points ;
Each of the entry points arranged in a function module is classified into a function group corresponding to a type of function of the function module, and the patch data is stored in the patch at the entry point included in the function group. includes a patch function flag indicating whether or not there is at least one prepared entry point, entry point identification information identifying the entry point includes group information indicating the function group, and the The semiconductor device is characterized in that it is generated in combination with patch information indicating a patch corresponding to the entry point .

In one aspect of the present invention, the semiconductor device further includes a patch module that includes a patch that replaces the function module and is written in the second storage unit after the semiconductor device is manufactured, and the control unit , when executing the function module, if the function module has the entry point, the patch presence/absence flag indicates that there is an entry point for which the patch is prepared, and the function indicated by the group information of the function module; If the patch feature flag for a group indicates that the feature group has the patch ready entry point, execute the patch module.

An aspect of the present invention is the semiconductor device described above, wherein in the patch module, each of the patches corresponding to the patch information of the entry point is classified into the functional group units.

An aspect of the present invention is the semiconductor device described above, wherein the control unit selects a patch corresponding to the patch information from among the patches in the functional group described in the patch module, instead of the function module. to run.

Another embodiment of the present invention is an IC card including at least the above semiconductor device.

Further, according to one aspect of the present invention, when a control unit executes a program including a function module to which an entry point is added, which is stored in a first storage unit in which stored data cannot be rewritten, the entry point includes group information indicating a functional group corresponding to the type of function of the function module and patch information indicating a patch corresponding to the function module in the functional group; a patch presence/absence flag indicating whether or not at least one entry point for which a patch is prepared exists in all of the entry points in the program stored in the second storage unit; a step of referring to a patch function flag indicating whether or not at least one entry point prepared for a patch exists in the included entry points; and the patch function flag containing the entry point indicates that there is a patch, the patch module having the entry point patch program is retrieved from the second storage section in which the stored data is rewritable. a step of reading, and when the patch module has the entry point where the patch is prepared in the functional group, the patch corresponding to the patch information is selected from the patches in the functional group by the and executing instead of the function module.

According to another aspect of the present invention, a program including a function module added with an entry point identified by entry point identification information stored in a first storage unit in which stored data cannot be rewritten is stored in a computer. a patch presence/absence flag indicating whether or not at least one entry point for which a patch is prepared exists in all of the entry points in the program stored in the second storage unit when executing the computer; means for referring to a patch function flag indicating whether or not there is at least one entry point for which a patch is prepared, among the entry points included in the function groups in which the function modules are classified according to function; and the patch presence/absence flag. indicates that the patch exists, and the patch function flag containing the entry point indicates that the patch exists, the entry point patch program group information indicating a function group corresponding to the type of function of the function module and a patch corresponding to the function module in the function group in the entry point identification information. It is a program that contains patch information .

According to another aspect of the present invention, a program including a function module added with an entry point identified by entry point identification information stored in a first storage unit in which stored data cannot be rewritten is stored in a computer. When executing the computer, if a patch module having a patch program of the entry point has the entry point for which the patch is prepared in a functional group that classifies the function modules according to function, the patch module in the functional group A patch corresponding to patch information indicating a patch corresponding to the entry point from among the patches functions as means for executing instead of the function module, and the entry point identification information is the function type of the function module. and the patch information indicating the patch corresponding to the function module in the function group.

As described above, according to the present invention, by executing a patch program without preparing an entry point table for each entry point added to the program, the execution time of the ROM code stored in the program is increased. A semiconductor device and control method that suppresses the increase in the storage area for storing information necessary for patch processing and suppresses the reduction in the usable area in the storage section composed of a rewritable memory such as an EEPROM. and provide programs.

1 is a block diagram showing a configuration example of a semiconductor device 1 according to an embodiment of the present invention; FIG. 3 is a diagram showing a configuration example of patch parameters 350 written in a patch parameter area of an EEPROM 132; FIG. 3 is a diagram showing a description example of a function module to which an entry point is added in the program 150; FIG. FIG. 10 is a diagram showing a description example of a patch module executed by a patch function in an entry point module; 4 is a flowchart for explaining an operation example of first branch processing and second branch processing in the program 150; FIG. 10 is a conceptual diagram illustrating operations of first branch processing and second branch processing when a patch corresponding to an entry point in a function module does not exist; FIG. 4 is a conceptual diagram illustrating operations of first branch processing and second branch processing when a patch corresponding to an entry point in a function module exists; FIG. 11 is a flowchart illustrating an operation example of third branch processing in a patch module read from an entry point module 700; FIG.

An embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram showing a configuration example of a semiconductor device 1 according to one embodiment of the present invention.
In FIG. 1, a semiconductor device 1 is a device that includes a CPU (central processing unit), an IC (integrated circuit) using semiconductor elements that form a memory, and the like, and processes and stores information.
The semiconductor device 1 is an IC card, a SIM (subscriber identity module) card, or the like. A semiconductor device 1 shown in FIG. 1 includes a control section 11 , a data input/output section 12 and a storage section 13 .

The control unit 11 includes a CPU 111 and executes a program stored in the storage unit 13 (for example, an application program or a program such as a module described later) to perform predetermined processing.
The data input/output unit 12 transmits and receives data to and from an external device (not shown) according to a predetermined protocol.

The storage unit 13 has a ROM 131 , an EEPROM 132 and a RAM (random access memory) 133 .
The ROM 131 stores a program 150 in the form of ROM code, which is written when the semiconductor device 1 is manufactured. This program 150 is, for example, an application program for processing services to be used with IC cards provided by industries or groups such as public, financial, and transportation. Since the program 150 is written in ROM code in the ROM 131, it cannot be rewritten even if it contains a defective function module. In this embodiment, the mask ROM 131 is used as a non-rewritable ROM in which a program is written in ROM code, but a flash memory may be used instead of the mask ROM.

For this reason, the program 150 is provided with entry points for function modules that are expected to be corrected in the event of a problem or that are rewritten depending on the application.
In this embodiment, entry point identification information for identifying the entry point is formed by a combination of a function number and an individual number.
The function number is group information for identifying a function group in which each function module in the program 150 is classified by function (for example, various functions such as encryption function, communication function, and numerical calculation function).
The individual number is patch information that individually identifies each patch included in each functional group indicated by the functional number.

In this embodiment, the entry point identification information is written in 2 bytes (xxyyh), 1 byte for the function number xxh, and 1 byte for the individual number yyh.
For example, if the function number of the cryptographic function is 01h and the individual number in the function group of the cryptographic function is 02h, the entry point identification information is represented by 0102h.
Also, in the present embodiment, it is assumed that the entry point identification information is 2 bytes consisting of a 1-byte function number and a 1-byte individual number. However, the number of bytes of the entry point identification information is arbitrarily set according to the number of types of functions of function modules (function modules to which entry points are added) included in the program and the number of patches in the function group.

The EEPROM 132 stores patch modules 250 and patch parameters 350 . The EEPROM 132 may be any rewritable nonvolatile memory, such as a flash memory.
Here, when the patch module 250 is supplied from an external device via the data input/output unit 12, the control unit 11 writes the patch module 250 and the patch parameter 350 corresponding to this patch module 250 to the EEPROM 132 and stores it. Let

The patch module 250 (800 to be described later) is a function module in the program 150 that needs to be corrected due to a defect or the like, in other words, a patch program corresponding to an entry point added to the function module. and described for each functional group (details will be described later).

The patch parameters 350 are at least a patch presence/absence flag, a patch function flag, and a patch area start address. The patch parameters 350 are written in a patch parameter area with a preset address in the EEPROM 132 .
FIG. 2 is a diagram showing a configuration example of the patch parameters 350 written in the patch parameter area of the EEPROM 132. As shown in FIG.

The patch presence/absence flag 301 is a flag indicating whether or not there is at least one or more function modules in which there is a replacement patch in each function module to which an entry point is added. For example, the patch presence/absence flag is "ON" when there is at least one function module with a replacement patch, and is "OFF" when there is no function module with a replacement patch.

Each of the patch function flags 302, 303, and 304 is a flag indicating whether or not there is at least one function module for which a patch to be replaced exists in the function group classified by function type of the function module. Each of the patch function flags 302, 303, and 304 is, for example, "ON" when there is at least one function module for which a patch to be replaced exists for each corresponding function group. It is "OFF" if there is no module at all. For example, the patch function flag 302 is a flag corresponding to, for example, the function group of the main function indicated by the function number 00h. The patch function flag 303 is a flag corresponding to, for example, a communication function function group indicated by the function number 01h. The patch function flag 304 is a flag corresponding to, for example, the function group of the encryption function indicated by the function number 02h.

A patch area start address 305 indicates the start address of the storage area in the EEPROM 132 in which the patch module 250 is written.

The RAM 133 is used as a main memory when the control section 11 executes the program 150 .

FIG. 3 is a diagram showing a description example of a function module to which an entry point is added in the program 150. As shown in FIG.
In FIG. 3, the program 150 includes, for example, a main function module 500, a function module 600, an entry point module 700, and the like.
A main function module 500 describes a plurality of functions such as functions 501 and 502 required to execute the functions of a given application.
The function module 600 describes an actual code indicating processing corresponding to the function of the function 501 actually executed by the control unit 11 .

When an entry point is set in the function 501 , the code of the entry point function 601 is added to the main function module 600 .
The entry point function 601 is a function that calls the entry point module 700 and causes it to be executed.
The entry point module 700 describes an actual code indicating processing corresponding to the function of the entry point function 601 actually executed by the control unit 11 . The entry point module 700 describes first branch processing 701 , function number extraction processing 702 and second branch processing 703 . Here, the first branch processing 701 is processing for determining whether or not the patch presence/absence flag is ON. Function number extraction processing 702 is processing for extracting a function number from the entry point identification information. The second branch processing 703 is processing for determining whether or not the patch function flag is ON.
The second branch processing 703 describes a patch function 704 that causes the patch module 800 (see FIG. 4) to be executed when the patch function flag is ON.

Returning to FIG. 1, when executing the function 501, the control unit 11 reads the stored address (the address in the mask ROM 131) of the function module 600, which is the substance of the function 501 described in the function 501, and reads the function module 600. to run. Here, the substance indicates ROM code in which the function of the function 501 actually executed by the control unit 11 is described.
Then, when the function module 600 includes the entry point function 601 , the control unit 11 reads the address for calling the entry point module 700 described in the entry point function 601 and executes the ROM code processing of the entry point module 700 .

At this time, the control unit 11 refers to the patch presence/absence flag of the patch parameter 350 in the patch parameter area of the EEPROM 132 by the process described in the first branch process 701 described in the entry point module 700 .
Then, the control unit 11 determines whether or not the patch presence/absence flag is ON, and if it is ON, executes the processing described in the function number extraction processing 702. Processing to return to the function module 600 (return processing) is performed, and the processing described in the function module 600 is executed.

Further, when the patch presence/absence flag is ON, the control unit 11 extracts the function number from the entry point identification information by the process of the function number extraction process 702 described in the entry point module 700 .
Then, the control unit 11 refers to the patch function flag corresponding to the extracted function number in the patch parameters 350 stored in the patch parameter area of the EEPROM 132 .
The control unit 11 determines whether or not the referenced patch function flag is ON. If there is, it returns to the function module 600 and executes the process described in the function module 600 .

The control unit 11 reads the patch area start address 305, which is the start address of the storage area in which the patch module 800 is stored, from the patch parameter 350 in the EEPROM 132 .
Then, the control unit 11 executes the process described in the patch module 800 stored in the area of the patch area head address 305 .

FIG. 4 is a diagram showing a description example of a patch module executed by a patch function in an entry point module. The patch module loads the code of the patch module 800 (patch module 250) from an external device by the control unit 11 when it becomes necessary to correct a problem in the program 150, and writes and stores it in the EEPROM 132 together with the patch parameters 350. .
In FIG. 4, the patch module 800 describes the actual code indicating the patch processing for the function module to be replaced in the patch function 704 actually executed by the control unit 11 . That is, the patch module 800 includes function number and individual number extraction processing 801, patch function flag confirmation processing 802, third branch processing 803, entry point correction processing 804, third branch processing 805, entry point correction processing 806, patch function A flag confirmation process 807 and the like are described.

Function number and individual number extraction processing 801 is processing for extracting each of the function number and individual number assigned to the entry point from the entry point identification information.
Each of the patch function flag confirmation processes 802 and 807 determines whether or not the patch function flags of function numbers 02h and 06h, respectively, are ON. This patch function flag confirmation process is provided corresponding to a function group in which at least one patch that replaces a function module exists.

Each of the third branch processes 803 and 805 determines whether the individual numbers extracted from the entry identification information are 01h and 03h. The third branch processing is provided in the number corresponding to the patches to be replaced with the function modules in the functional block.
Each of the entry point correction processes 804 and 806 is described as a patch process that replaces the function module with the patch when the individual numbers extracted from the entry identification information are 01h and 03h, respectively.

Returning to FIG. 1, the control unit 11 extracts each of the function number and the individual number of the corresponding entry point from the entry point identification information obtained as the argument, corresponding to the description of the function number and individual number extraction process 801. do.
Next, the control section 11 refers to the patch function flag corresponding to the extracted function number in the patch parameter 350 in the patch parameter area of the EEPROM 132 .
Then, the control unit 11 executes patch function flag confirmation processing corresponding to the extracted function number, for example, patch function flag confirmation processing 802 when the function number is 02h. On the other hand, the control unit 11 executes patch function flag confirmation processing 807 when the extracted function number is 06h.

The control unit 11 executes patch function flag confirmation processing corresponding to the extracted function number, and determines whether or not the patch function flag indicated by the extracted function number is ON.
Then, when the patch function flag indicated by the extracted function number is ON, the control unit 11 sequentially executes the third branching processes 803, 805, . . . judge. For example, when the extracted function number is 02h and the patch function flag for the function number 02h is ON, the control unit 11 sequentially performs third branch processing 803, 805, . . . It is determined whether or not there is 3-branch processing.

At this time, if the extracted individual number is 01h in the third branch processing 803 for determining whether or not the individual number is 01h, the control unit 11 performs the entry point correction processing 804 described in the third branch processing 803. to run.
Further, when the extracted individual number is 03h in the third branch processing 805 for determining whether or not the individual number is 03h, the control unit 11 performs the entry point correction processing 806 described in the third branch processing 805. Execute.
On the other hand, when the third branch processing corresponding to the extracted individual number does not exist, the control unit 11 returns to the function module 600 and executes the function processing of the function module 600 corresponding to the code description.

With the above configuration, according to the present embodiment, the first branch processing determines whether or not there is at least one function module to be replaced with a patch among the function modules of the function to which the entry point is added in the main function module 500. is checked by the patch presence/absence flag, if there is no function module to be replaced, there is no need to refer to the table to check the presence or absence of the patch corresponding to the entry point, as in the past, for each entry point in the table. processing speed can be improved.

Further, according to the present embodiment, entry point identification information for identifying each entry point is obtained by combining a function number for classifying a function module into a function group for each type of function and an individual number for identifying a patch within the function group. is configured, in order to determine whether or not there is at least one function module to be replaced with a patch by the patch function flag corresponding to the function group to which each entry point belongs, the function block to which the entry point belongs When the patch function flag corresponding to the function number is OFF, there is no need to refer to the table to confirm the presence or absence of the patch corresponding to the entry point for each entry point of the table as in the conventional case, and the processing speed of the program can be increased. can be improved. On the other hand, when the patch function flag corresponding to the function number of the function block to which the entry point belongs is ON, the number of third branch processes corresponding to the number of function modules to be replaced with the patch belonging to the function block corresponds to the individual number of the entry point. Find the patch process to do.

As described above, according to the present embodiment, the presence or absence of a patch for an entry point is determined by the first branch process, the second branch process, and the third branch process each time an entry point exists, as in the conventional art. Since the entry point is compared with each of all the entry points in the table and the process of searching for a patch to replace the function module is not performed, all function modules in the program to which the entry point is added and the function It is no longer necessary to provide a table showing the correspondence between modules and patches to be replaced, and even if the number of entry points increases, it is possible to suppress an increase in the storage area required for patch processing other than the patch code, as in the past. It is possible to prevent the available area from being squeezed in the storage unit made up of rewritable memory such as EEPROM.

The operations of the first branch processing and the second branch processing in this embodiment will be described below with reference to FIGS. 5, 6 and 7. FIG. 4 is a flowchart for explaining an operation example; FIG. 6 is a conceptual diagram illustrating operations of the first branch processing and the second branch processing when there is no patch corresponding to the entry point in the function module. FIG. 6(a) shows the setting of the patch presence/absence flag, the patch top address, and the patch function flag in the patch parameters. FIG. 6B shows an example of code descriptions of the main function module 500 , the function module 600 and the entry point module 700 . FIG. 7 is a conceptual diagram explaining the operation of the first branch processing and the second branch processing when there is a patch corresponding to the entry point in the function module. FIG. 7(a) shows the setting of the patch presence/absence flag, the patch top address, and the patch function flag in the patch parameters. FIG. 7B shows examples of code descriptions of the main function module 500, the function module 600, the entry point module 700, and the patch module 800. FIG.

The control unit 11 executes the program 150 and calls the function module 600, which is the entity of the function 501 in the main function module 500, to perform processing. At this time, the control unit 11 detects the entry point function 601 (entry point) (step S1).
The control unit 11 calls the entry point module 700 in processing the entry point function 601 . The control unit 11 refers to the patch parameter 350 in the EEPROM 132 and reads the patch presence/absence flag (step S2).

The control unit 11 determines whether or not the read patch presence/absence flag is ON (step S3). At this time, if the read patch existence flag is ON (described in FIG. 7A, for example, 012345h is described as the top address of the patch area), the control unit 11 advances the process to step S4.
On the other hand, if the read patch presence/absence flag is OFF (described in FIG. 6A, the patch area top address is not described), the control unit 11 ends the process. That is, the control unit 11 returns to the function module 600 and processes the function 501 in the function module 600 .
Steps S2 and S3 described above are the first branch processing.

The control unit 11 extracts the upper 1-byte function number 02h in 2 bytes from the entry point identification information given as an argument from the entry point function 601, for example, the entry point identification information 0201h (step S4).
The control unit 11 refers to the patch parameter 350 in the EEPROM 132, reads the patch function flag corresponding to the function number, that is, the function number 02h, and finds that there is a patch in the function group (the patch has not been applied to the function module). (step S5).

Based on whether the patch function flag is ON, the control unit 11 determines whether there is a patched function module in the function group to which the function module being processed belongs (step S6). At this time, if the patch function flag is ON (a patch is applied to the function module within the function group indicated by the function number), the control unit 11 advances the process to step S7. On the other hand, if the patch function flag is OFF (no patch is applied to the function module within the function group indicated by the function number), the control unit 11 ends the process. That is, the control unit 11 returns from the entry point module 700 to the function module 600 and processes the function 501 in the function module 600 .
Steps S5 and S6 described above are the second branch processing.

The control unit 11 executes the patch function 704, refers to the patch parameter 350 in the EEPROM 132, reads the patch area head address (012345h), calls the patch module 800 with this patch head address, and performs patch processing (third branch processing). including) is performed (step S7).

The operation of the third branching process in this embodiment will be described below with reference to FIGS. 8 and 7. FIG. 8 explains an example of the operation of the third branching process in the patch module 800 read from the entry point module 700. It is a flow chart.

In the entry point module 700, the entry point identification information 0201h given as an argument from the entry point module 700 is extracted from the entry point identification information 0201h by function number and individual number extraction processing 801. 01h is extracted as an individual number (step S11).
The control unit 11 refers to the patch parameter 350 in the EEPROM 132 and reads the patch function flag corresponding to the extracted function number 02h. The control unit 11 performs patch function flag confirmation processing 802 corresponding to the extracted function number 02h (step S12).

The control unit 11 branches depending on whether the patch function flag corresponding to the function number 02h is ON (that is, there is a patch to replace the function module in the function group corresponding to the function number 02h, and the individual number is searched for). It is determined whether or not there is a branch (step S13). At this time, if the patch function flag corresponding to function number 02h is ON (there is a branch to search for an individual number), control unit 11 advances the process to step S13. On the other hand, if the patch function flag is OFF (there is no branch to search for the individual number), the control unit 11 terminates the process. That is, the control unit 11 returns from the patch module 800 to the function module 600 via the entry point module 700 and performs the function 501 in the function module 600 .

The control unit 11 sequentially performs the third branch processing in the patch function flag confirmation processing 802, and confirms whether or not there is a third branch processing 803 for the extracted individual number 01h, that is, whether or not there is a branch to apply the patch (step S14). and step S15). At this time, if there is a third branch process 803 as a branch to apply a patch, the control unit 11 advances the process to step S16. On the other hand, if there is a third branch process 803 as a branch to apply a patch, the control unit 11 ends the process. That is, the control unit 11 returns from the patch module 800 to the function module 600 via the entry point module 700 and performs the function 501 in the function module 600 .
The control unit 11 performs correction processing (entry point correction processing 804) for the function module of the entry point identification information 0201h (step S16).

Although the embodiments of the present invention have been described in detail above with reference to the drawings, the specific configuration is not limited to these embodiments, and designs and the like are included within the scope of the gist of the present invention.

DESCRIPTION OF SYMBOLS 1... Semiconductor device 11... Control part 12... Data input-output part 13... Storage part 111... CPU
131 Mask ROM
132 EEPROM
133 RAM
150... Program 250, 800... Patch module 350... Patch parameter 600... Function module 700... Entry point module

Claims (8)

a first storage section in which a program is stored and in which stored data cannot be rewritten;
a control unit that executes the program;
a second storage unit in which stored data can be rewritten and in which patches that are modules that replace function modules in the program are stored;
A patch presence/absence flag provided in the second storage unit and indicating whether or not there is at least one entry point for which the patch is prepared in all of the entry points added to the function modules in the program. a patch parameter area for storing patch data including
each of the entry points arranged in the function module is classified into each function group corresponding to the type of function of the function module;
the patch data includes a patch function flag indicating whether or not there is at least one entry point prepared for the patch among the entry points included in the function group;
Entry point identification information for identifying the entry point is generated by combining group information indicating the functional group and patch information indicating the patch corresponding to the entry point in the functional group.
A semiconductor device characterized by : further comprising a patch module containing a patch to replace the function module, which is written in the second storage unit after its manufacture;
When the function module is executed by the control unit, if the function module has the entry point, the patch presence/absence flag indicates that there is an entry point for which the patch is prepared, and group information of the function module 2. The semiconductor device according to claim 1 , wherein said patch module is executed when said patch function flag of said function group indicated by indicates that said function group has an entry point for which said patch is prepared. In the patch module,
3. The semiconductor device according to claim 2 , wherein each of said patches corresponding to said entry point patch information is classified into said functional group units. The control unit
4. The semiconductor device according to claim 3 , wherein a patch corresponding to said patch information among said patches in said functional group described in said patch module is executed instead of said function module. An IC card on which at least the semiconductor device according to any one of claims 1 to 4 is mounted. When the control unit executes a program containing a function module to which an entry point is added, which is stored in the first storage unit in which the stored data cannot be rewritten,
The entry point identification information for identifying the entry point includes group information indicating a function group corresponding to the function type of the function module and patch information indicating a patch corresponding to the function module in the function group. cage,
The control unit includes a patch presence/absence flag indicating whether or not at least one entry point for which a patch is prepared exists in all of the entry points in the program stored in the second storage unit, and the function module. a step of referring to a patch function flag indicating whether or not there is at least one entry point for which a patch is prepared, among the entry points included in the function group corresponding to the function type of
A second storage capable of rewriting stored data when the control unit indicates that the patch presence/absence flag indicates that the patch exists and the patch function flag that includes the entry point indicates that the patch exists. reading from the unit a patch module having an entry point patch program;
When the functional group in the patch module has the entry point where the patch is prepared, the control unit selects the patch corresponding to the patch information from among the patches in the functional group instead of the function module. A control method, comprising: When causing a computer to execute a program containing a function module to which an entry point identified by the entry point identification information is added and which is stored in a first storage unit in which stored data cannot be rewritten,
said computer,
A patch presence/absence flag indicating whether or not at least one entry point for which a patch is prepared exists in all of the entry points in the program stored in the second storage unit, and the function modules are classified by function. means for referring to a patch function flag indicating whether or not there is at least one entry point for which a patch is prepared among the entry points included in the function group;
When the patch presence/absence flag indicates that the patch exists and the patch function flag containing the entry point indicates that the patch exists, the entry point function as a means for executing a patch module having a program of the patch, and the entry point identification information includes group information indicating a function group corresponding to the function type of the function module, and corresponding to the function module in the function group. Contains patch information that indicates which patch to use
program . When causing a computer to execute a program containing a function module to which an entry point identified by the entry point identification information is added and which is stored in a first storage unit in which stored data cannot be rewritten,
said computer,
In a patch module having a patch program for the entry point, if the entry point for which the patch is prepared is in a functional group that classifies the function modules according to function, the entry point is selected from the patches in the functional group. means for executing a patch corresponding to patch information indicating a patch corresponding to instead of the function module;
and the entry point identification information includes group information indicating a function group corresponding to the type of function of the function module, and patch information indicating a patch corresponding to the function module in the function group. program.

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