JP2021006973A - Semiconductor device, ic card, control method, and program - Google Patents

Abstract

To provide a semiconductor device configured to prevent increase in run time of ROM codes stored in a program due to increase in the number of entry points in the program, to prevent increase of storage area for storing information necessary for patch treatment, and to prevent available areas in a storage unit comprising rewritable memories, such as EEPROM, from being compressed.SOLUTION: A semiconductor device 1 includes: a first storage unit 131 in which programs are stored and data cannot be rewritten; a control unit 11 which executes the programs; a second storage unit 132 which allows data to be rewritten and stores patches being modules which are to be replaced with function modules in the programs; and a patch parameter area 350 arranged in the second storage unit 132, and storing patch data including patch flags indicating whether there are one or more entry points with patches, in all of entry points added to the function modules of the programs.SELECTED DRAWING: Figure 1

Description

The present invention relates to semiconductor devices, IC cards, control methods and programs.

In recent years, IC (integrated circuit) cards have been used in many industries, and the operating system programs and application programs incorporated in IC cards are also diverse depending on the application.
These programs are written in a mask ROM, a flash memory, or the like as a program code that cannot be rewritten (hereinafter referred to as a ROM (read only memory) code) when the IC card is created.

As described above, if a defect is found in the program written as the ROM code due to the inability to rewrite the program written at the time of shipment, replace the IC card with the program that corrects the defect in this IC card. There is a need to.
In recent years, one IC card is often provided with many functions, the number of program codes increases, and the rate of problems in program operation increases.

For this reason, an entrance (hereinafter, entry point) for checking the application of the patch (hereinafter, referred to as a patch) is provided at a place where it is presumed that the ROM code is likely to be modified.
Then, the patch program is loaded into a rewritable flash memory or EEPROM (electrically erasable programmable read only memory), and whether or not the ROM code needs to be replaced is determined at the above entry point, and there is a problem. The ROM code of the program is replaced with a patch program to correct the ROM code of the program (see, for example, Patent Document 1).

Japanese Patent No. 5017868

As described above, when a patch program is executed (hereinafter referred to as patch processing) instead of the ROM code of the program that needs to be corrected due to a defect or the like, an external device is used from the entry point provided in the ROM code of the program. The patch program loaded from and written to the flash memory or EEPROM is called.

At this time, when patch processing is performed on the ROM code of the program, it is searched whether or not the patch program corresponding to the entry point is prepared.
Here, in Patent Document 1, an entry point table indicating whether or not a patch is prepared for each entry point is provided, and the entry point table is searched by a number assigned to each entry point.

Then, it is determined whether or not patch processing at the entry point is necessary depending on whether or not there is a patch for the ROM code of the entry point corresponding to the number of the entry point extracted in the search result.
When patch processing is required, the address of the patch program described corresponding to the entry point is read in the entry point table, and patch processing is performed at the target entry point.

However, as the number of entry points increases, the time required to refer to the entry point table and execute patch processing for each entry point in the program ROM code also increases, which causes the program execution speed to decrease. Become.
Further, when the address of the patch program is described for each entry point in the entry point table as in Reference 1, at least the number of entry points, the ID of the entry point, the presence / absence of the patch corresponding to the entry point, and the patch A storage area for describing the address of the ROM code is required, and the available area in the flash memory or the EEPROM is reduced.

The present invention has been made in view of such a situation, and the ROM code stored in the program can be obtained by executing the patch program without preparing an entry point table for each entry point added to the program. Suppressing the increase in execution time, suppressing the increase in the storage area for storing information required for patch processing, and reducing the available area in the storage unit consisting of rewritable memory such as flash memory and EEPROM. Provides semiconductor devices, IC cards, control methods and programs without flash memory.

In order to solve the above-mentioned problems, one aspect of the present invention is a first storage unit in which a program is stored and the stored data cannot be rewritten, a control unit that executes the program, and stored data. A second storage unit in which a patch, which is a module to replace the function module in the program, is stored, and an entry provided in the second storage unit and added to the function module in the program. A semiconductor device characterized in that all of the points include a patch parameter area for storing patch data including a patch presence / absence flag indicating whether or not at least one entry point for which the patch is prepared exists. is there.

Further, one aspect of the present invention is the above-mentioned semiconductor device, in which each of the entry points arranged in the function module is classified into each function group corresponding to the type of function of the function module, and the patch. The data includes a patch function flag indicating whether or not at least one or more prepared entry points of the patch exist at the entry point included in the function group.

Further, one aspect of the present invention is the semiconductor device, in which the entry point identification information for identifying the entry point indicates group information indicating the functional group and a patch corresponding to the entry point in the functional group. It is generated in combination with patch information.

Further, one aspect of the present invention is the semiconductor device, further comprising a patch module including a patch to replace the function module written to the second storage unit after its manufacture, and the control unit. , When the function module is executed, if the function module has the entry point, the patch presence / absence flag indicates that there is an entry point for which the patch is prepared, and the function indicated by the group information of the function module. If the patch function flag of the group indicates that the function group has an entry point for which the patch is prepared, the patch module is executed.

Further, one aspect of the present invention is the semiconductor device, in which each of the patches corresponding to the patch information of the entry point is classified into the functional group unit in the patch module.

Further, one aspect of the present invention is the semiconductor device, in which the control unit replaces the patch corresponding to the patch information from the patches in the functional group described in the patch module with the function module. And execute.

Further, one aspect of the present invention is at least an IC card on which the above-mentioned semiconductor device is mounted.

Further, one aspect of the present invention is the entry point when the control unit executes a program including a function module to which an entry point is added, which is stored in a first storage unit in which the stored data cannot be rewritten. The entry point identification information for identifying the function includes group information indicating a function group corresponding to the type of function of the function module and patch information indicating a patch corresponding to the function module in the function group. The control unit sets the patch presence / absence flag indicating whether or not at least one patch-prepared entry point exists in all the entry points in the program stored in the second storage unit, and the function group. In the included entry point, the process of referring to the patch function flag indicating whether or not at least one entry point for which a patch is prepared exists, and the control unit has the patch presence / absence flag of the patch. When the fact is indicated and the patch function flag including the entry point indicates that there is a patch, the patch module having the entry point patch program is output from the second storage unit capable of rewriting the stored data. In the process of reading and when the control unit has the entry point in which the patch is prepared in the function group in the patch module, the patch corresponding to the patch information is selected from the patches in the function group. It is a control method including a process to be executed instead of a function module.

Further, one aspect of the present invention is to provide a computer with a program including a function module in which an entry point identified by an entry point identification information is added, which is stored in a first storage unit in which the stored data cannot be rewritten. When executing the computer, a patch presence / absence flag indicating whether or not at least one patch-prepared entry point exists in all the entry points in the program stored in the second storage unit, and A means for referring to a patch function flag indicating whether or not at least one entry point for which a patch is prepared exists at the entry point included in a function group in which the function module is classified by function, the patch presence / absence flag. Indicates that the patch is present, and the patch function flag that includes the entry point indicates that the patch is present, the program of the entry point patch is provided from the second storage unit in which the stored data can be rewritten. It is a program that functions as a means for executing a patch module having.

Further, one aspect of the present invention is to provide a computer with a program including a function module in which an entry point identified by an entry point identification information is added, which is stored in a first storage unit in which the stored data cannot be rewritten. When the computer is executed, in the patch module having the program of the patch of the entry point, if the entry point in which the patch is prepared is in the functional group in which the function module is classified according to the function, the said in the functional group. Among the patches, the patch corresponding to the patch information indicating the patch corresponding to the entry point is made to function as a means for executing the patch in place of the function module, and the entry point identification information is the type of function of the function module. It is a program including the group information indicating the function group corresponding to the above and the patch information indicating the patch corresponding to the function module in the function group.

As described above, according to the present invention, by executing the patch program without preparing an entry point table for each entry point added to the program, the execution time of the ROM code stored in the program is increased. A semiconductor device and a control method that suppresses an increase in a storage area for storing information required for patch processing and does not reduce the available area in a storage unit composed of a rewritable memory such as an EEPROM. And provide programs.

It is a block diagram which shows the structural example of the semiconductor device 1 by one Embodiment of this invention. It is a figure which shows the configuration example of the patch parameter 350 written in the patch parameter area of the EEPROM 132. It is a figure which shows the description example of the function module with the entry point added in the program 150. It is a figure which shows the description example of the patch module executed by the patch function in the entry point module. It is a flowchart explaining the operation example of the 1st branch processing and the 2nd branch processing in the program 150. It is a conceptual diagram explaining the operation of the 1st branch processing and the 2nd branch processing when the patch corresponding to the entry point in a function module does not exist. It is a conceptual diagram explaining the operation of the 1st branch processing and the 2nd branch processing when the patch corresponding to the entry point in a function module exists. It is a flowchart explaining the operation example of the 3rd branch processing in the patch module read from the entry point module 700.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a configuration example of a semiconductor device 1 according to an embodiment of the present invention.
In FIG. 1, the semiconductor device 1 is a device including an IC (integrated circuit) using semiconductor elements constituting a CPU (central processing unit), a memory, and the like, and processes and stores information.
The semiconductor device 1 is an IC card, a SIM (subscriber identity module) card, or the like. The semiconductor device 1 shown in FIG. 1 includes a control unit 11, a data input / output unit 12, and a storage unit 13.

The control unit 11 includes a CPU 111 and executes a program stored in the storage unit 13 (for example, a program such as an application program or a module described later) to perform a predetermined process.
The data input / output unit 12 transmits / receives data to / from an external device (not shown) according to a predetermined protocol.

The storage unit 13 has a ROM 131, an EEPROM 132, and a RAM (random access memory) 133.
The ROM 131 stores a program 150 in the form of a ROM code, which is written when the semiconductor device 1 is manufactured. The program 150 is, for example, an application program that processes services used by IC cards provided by industries or groups such as public, financial, and transportation systems. In the ROM 131, since the program 150 is written in the ROM code, it cannot be rewritten even if a defective function module is included. In the present embodiment, the mask ROM 131 is used as the non-rewritable ROM in which the program is described by the ROM code, but a flash memory may be used instead of the mask ROM.

For this reason, the program 150 is provided with an entry point for a function module that is expected to be corrected due to a problem or that is premised on being rewritten in relation to an application.
In the present embodiment, the entry point identification information for identifying the entry point is formed by a combination of a function number and an individual number.
The function number is group information that identifies a function group in which each of the function modules in the program 150 is classified according to a function (for example, various functions such as a cryptographic function, a communication function, and a numerical calculation function).
The individual number is patch information that individually identifies each of the patches included in this function group in each function group indicated by the function number.

In the present embodiment, the entry point identification information is described in 2 bytes (xxxhyh), the function number is 1 byte of xxxh, and the individual number is 1 byte of yyh.
For example, when the function number of the cryptographic function is 01h and the individual number in the function group of the cryptographic function is 02h, the entry point identification information is represented by 0102h.
Further, in the present embodiment, the entry point identification information is described as 2 bytes by the 1-byte function number and the 1-byte individual number. However, the number of bytes of the entry point identification information is arbitrarily set according to the number of function types of the function module (function module to which the entry point is added) included in the program and the number of patches in the function group.

The patch module 250 and the patch parameter 350 are stored in the EEPROM 132. The EEPROM 132 may be any rewritable non-volatile memory, and may be configured using, for example, a flash memory.
Here, when the patch module 250 is supplied from the external device via the data input / output unit 12, the control unit 11 writes and stores the patch module 250 and the patch parameter 350 corresponding to the patch module 250 in the EEPROM 132. Let me.

The patch module 250 (800 described later) is a function module that needs to be corrected due to a defect in the program 150, in other words, a patch program corresponding to an entry point added to the function module is a type of function of the function module. It is classified by and described in each function group unit (details will be described later).

The patch parameter 350 is at least a patch presence / absence flag, a patch function flag, and a patch area start address. In the patch parameter 350, a preset address in the EEPROM 132 is written in a known patch parameter area.
FIG. 2 is a diagram showing a configuration example of the patch parameter 350 written in the patch parameter area of the EEPROM 132.

The patch presence / absence flag 301 is a flag indicating whether or not there is at least one function module in which a patch to be replaced exists in each of the function modules to which the entry point is added. The patch presence / absence flag is, for example, "ON" when there is at least one function module having a patch to be replaced, and "OFF" when there is no function module having a patch to be replaced.

Each of the patch function flags 302, 303, and 304 is a flag indicating whether or not there is at least one function module in which the patch to be replaced exists in the function group classified according to the function type of the function module. Each of the patch function flags 302, 303 and 304 is, for example, "ON" when there is at least one function module having a patch to be replaced for each function group corresponding to each, while a function having a patch to be replaced. If there are no modules, it is "OFF". For example, the patch function flag 302 is a flag corresponding to, for example, the function group of the main function indicated by the function number 00h. The patch function flag 303 is a flag corresponding to, for example, the function group of the communication function indicated by the function number 01h. The patch function flag 304 is a flag corresponding to, for example, a function group of a cryptographic function, which is indicated by the function number 02h.

The patch area start address 305 indicates the start address of the storage area in which the patch module 250 in the EEPROM 132 is written.

The RAM 133 is used as the main memory when the control unit 11 executes the program 150.

FIG. 3 is a diagram showing a description example of a function module to which an entry point is added in the program 150.
In FIG. 3, the program 150 includes, for example, a main function module 500, a function module 600, an entry point module 700, and the like.
In the main function module 500, a plurality of functions such as functions 501 and 502 necessary for executing the function of a predetermined application are described.
In the function module 600, an entity code indicating a process corresponding to the function of the function 501 actually executed by the control unit 11 is described.

When an entry point is set in the function 501, the code of the entry point function 601 is added to the main function module 600.
The entry point function 601 is a function that calls and executes the entry point module 700.
In the entry point module 700, the code of the entity indicating the processing corresponding to the function of the entry point function 601 actually executed by the control unit 11 is described. In the entry point module 700, the first branch processing 701, the function number extraction processing 702, and the second branch processing 703 are described. Here, the first branch processing 701 is a processing for determining whether or not the patch presence / absence flag is ON. The function number extraction process 702 is a process of extracting the function number from the entry point identification information. The second branch processing 703 is a processing for determining whether or not the patch function flag is ON.
In the second branch processing 703, a patch function 704 that executes the patch module 800 (see FIG. 4) when the patch function flag is ON is described.

Returning to FIG. 1, when executing the function 501, the control unit 11 reads the stored address (address in the mask ROM 131) of the function module 600, which is the entity of the function 501 described in the function 501, and the function module 600. To execute. Here, the entity indicates a ROM code in which the function of the function 501 actually executed by the control unit 11 is described.
Then, when the function module 600 includes the entry point function 601, the control unit 11 reads the address for calling the entry point module 700 described in the entry point function 601 and executes the processing of the ROM code of the entry point module 700.

At this time, the control unit 11 refers to the patch presence / absence flag of the patch parameter 350 in the patch parameter area of the EEPROM 132 by the process of the description of the first branch process 701 described in the entry point module 700.
Then, the control unit 11 determines whether or not the patch presence / absence flag is ON, and if it is ON, executes the process of describing the function number extraction process 702. On the other hand, if the patch presence / absence flag is OFF, the control unit 11 executes the description. The process of returning to the function module 600 (return process) is performed, and the process described in the function module 600 is executed.

Further, when the patch presence / absence flag is ON, the control unit 11 extracts the function number from the entry point identification information by the process of the function number extraction process 702 described in the entry point module 700.
Then, the control unit 11 refers to the patch function flag corresponding to the extracted function number in the patch parameter 350 stored in the patch parameter area in the EEPROM 132.
The control unit 11 determines whether or not the referenced patch function flag is ON, and if it is ON, executes the processing of the patch module 800 corresponding to the patch function 704, while the patch function flag is OFF. If there is, it returns to the function module 600 and executes the process described in the function module 600.

In the EEPROM 132, the control unit 11 reads the patch area start address 305, which is the start address of the storage area in which the patch module 800 is stored, from the patch parameter 350.
Then, the control unit 11 executes the process described in the patch module 800 stored in the area of the patch area start address 305.

FIG. 4 is a diagram showing a description example of a patch module executed by a patch function in the entry point module. When it becomes necessary for the patch module to correct a defect in the program 150, the control unit 11 loads the code of the patch module 800 (patch module 250) from an external device, writes it in the EEPROM 132 together with the patch parameter 350, and stores it. ..
In FIG. 4, the patch module 800 describes the actual code indicating the patch processing for the function module to be replaced of the patch function 704 actually executed by the control unit 11. That is, the patch module 800 includes a function number and individual number extraction process 801 and a patch function flag confirmation process 802, a third branch process 803, an entry point correction process 804, a third branch process 805, an entry point correction process 806, and a patch function. The flag confirmation process 807 and the like are described.

The function number and individual number extraction process 801 is a process of extracting each of the function number and the individual number assigned to the entry point from the entry point identification information.
Each of the patch function flag confirmation processes 802 and 807 determines whether or not the patch function flags of the function numbers 02h and 06h are ON, respectively. This patch function flag confirmation process is provided corresponding to a function group in which at least one patch that replaces a function module exists.

Each of the third branch processing 803 and 805 determines whether or not the individual numbers extracted from the entry identification information are 01h and 03h, respectively. In this third branch processing, the number corresponding to the patch to be replaced with the function module in the functional block is provided.
Each of the entry point correction processes 804 and 806 is described as a patch process that replaces the function module and the patch when the individual numbers extracted from the entry identification information are 01h and 03h, respectively.

Returning to FIG. 1, the control unit 11 extracts each of the function number and the individual number of the corresponding entry point from the entry point identification information obtained as an argument corresponding to the description of the function number and the individual number extraction process 801. To do.
Next, the control unit 11 refers to the patch function flag corresponding to the extracted function number in the patch parameter 350 in the patch parameter area of the EEPROM 132.
Then, the control unit 11 executes the patch function flag confirmation process corresponding to the extracted function number, for example, when the function number is 02h, the patch function flag confirmation process 802. On the other hand, the control unit 11 executes the patch function flag confirmation process 807 when the extraction function number is 06h.

The control unit 11 executes the patch function flag confirmation process corresponding to the extracted function number, and determines whether or not the patch function flag indicated by the extracted function number is ON.
Then, when the patch function flag indicated by the extracted function number is ON, the control unit 11 sequentially executes the third branch processing 803, 805, ..., And the presence or absence of the third branch processing corresponding to the extracted individual number. To judge. For example, when the extracted function number is 02h and the patch function flag of the function number 02h is ON, the control unit 11 sequentially matches the extracted individual number in the third branch processing 803, 805, .... It is determined whether or not there is a 3-branch process.

At this time, when the extracted individual number is 01h in the third branch processing 803 for determining whether or not the individual number is 01h, the control unit 11 describes the entry point correction process 804 in the third branch processing 803. To execute.
Further, in the third branch processing 805 for determining whether or not the individual number is 03h, when the extracted individual number is 03h, the control unit 11 performs the entry point correction process 806 described in the third branch processing 805. Execute.
On the other hand, when the third branch processing corresponding to the extracted individual number does not exist, the control unit 11 returns to the function module 600 and executes the functional processing of the function module 600 corresponding to the code description.

With the above configuration, according to the present embodiment, whether or not there is at least one function module to be replaced with the patch in the function module of the function to which the entry point is added in the main function module 500 by the first branch processing. If there is no function module to replace, there is no need to check the existence of the patch corresponding to the entry point by referring to the table as in the past, and the program does not need to confirm the existence of the patch corresponding to the entry point of the table. Processing speed can be improved.

Further, according to the present embodiment, the entry point identification information for identifying each entry point by combining the function number classified into the function group for each function type of the function module and the individual number for identifying the patch in the function group. Therefore, in order to determine whether or not there is at least one function module to replace the patch by the patch function flag corresponding to each function group to which the entry point belongs, the function block to which the entry point belongs When the patch function flag corresponding to the function number is OFF, it is not necessary to refer to the table and check the presence or absence of the patch corresponding to the entry point for each entry point in the table as in the past, and the processing speed of the program can be increased. Can be improved. On the other hand, when the patch function flag corresponding to the function number of the function block to which the entry point belongs is ON, the individual number of the entry point is supported by the third branch processing of the number corresponding to the function module to be replaced with the patch belonging to the function block. Search for patching to do.

As described above, according to the present embodiment, the presence or absence of the patch for the entry point is determined by the first branch processing, the second branch processing, and the third branch processing, each time the entry point exists, as in the conventional case. Since the process of comparing the entry point with each of all the entry points in the table and searching for the patch to be replaced with the function module is not performed, all the function modules to which the entry point is added in the function module in the program and the function concerned. It is no longer necessary to provide a table showing the correspondence between the module and the patch to be replaced, and even if the entry point increases, it is possible to suppress the increase in the storage area required for patch processing other than the patch code as in the past. It is possible to prevent pressure on the available area in the storage unit including the rewritable memory such as the EEPROM.

Hereinafter, the operations of the first branch processing and the second branch processing in the present embodiment will be described with reference to FIGS. 5, 6 and 7. FIG. 5 shows the first branch processing and the second branch processing in the program 150. It is a flowchart explaining an operation example. FIG. 6 is a conceptual diagram illustrating the operation of the first branch processing and the second branch processing when there is no patch corresponding to the entry point in the function module. FIG. 6A shows the settings of the patch presence / absence flag, the patch start address, and the patch function flag in the patch parameters. FIG. 6B shows a description example of the code of the main function module 500, the function module 600, and the entry point module 700. FIG. 7 is a conceptual diagram illustrating the operation of the first branch processing and the second branch processing when a patch corresponding to the entry point in the function module exists. FIG. 7A shows the setting of the patch presence / absence flag, the patch start address, and the patch function flag in the patch parameters. FIG. 7B shows a description example of the code of the main function module 500, the function module 600, the entry point module 700, and the patch module 800.

The control unit 11 executes the program 150 and calls the function module 600, which is an entity of the function 501 in the main function module 500, to perform processing. At this time, the control unit 11 detects the entry point function 601 (entry point) (step S1).
The control unit 11 calls the entry point module 700 in the processing of the entry point function 601. The control unit 11 refers to the patch parameter 350 in the EEPROM 132 and reads the patch presence / absence flag (step S2).

The control unit 11 determines whether or not the read patch presence / absence flag is ON (step S3). At this time, when the read patch presence / absence flag is ON (the description in FIG. 7A, for example, 012345h is described as the patch area start address), the control unit 11 proceeds to the process in step S4.
On the other hand, when the read patch presence / absence flag is OFF (the description in FIG. 6A and the patch area start address are not described), the control unit 11 ends the process. That is, the control unit 11 returns to the function module 600 and processes the function 501 in the function module 600.
The above-mentioned steps S2 and S3 are the first branch processing.

The control unit 11 extracts the function number 02h of the upper 1 byte in 2 bytes from the entry point identification information given as an argument from the entry point function 601 such as the entry point identification information 0201h (step S4).
The control unit 11 refers to the patch parameter 350 in the EEPROM 132, reads the patch function flag corresponding to the function number, that is, corresponds to the function number 02h, and has a patch in the function group (the patch is applied to the function module). (Yes) (step S5).

The control unit 11 determines whether or not there is a function module to which the patch is applied in the function group to which the function module being processed belongs, depending on whether or not the patch function flag is ON (step S6). At this time, if the patch function flag is ON (the patch is applied to the function module in the function group indicated by the function number), the control unit 11 proceeds to step S7. On the other hand, when the patch function flag is OFF (the patch is not applied to the function module in the function group indicated by the function number), the control unit 11 ends the process. That is, the control unit 11 returns from the entry point module 700 to the function module 600, and processes the function 501 in the function module 600.
The above-mentioned steps S5 and S6 are the second branch processing.

The control unit 11 executes the patch function 704, refers to the patch parameter 350 in the EEPROM 132, reads the patch area start address (012345h), calls the patch module 800 by this patch start address, and performs patch processing (third branch processing). Including) (step S7).

Hereinafter, the operation of the third branch processing in the present embodiment will be described with reference to FIGS. 8 and 7. FIG. 8 describes an operation example of the third branch processing in the patch module 800 read from the entry point module 700. It is a flowchart.

In the entry point module 700, the control unit 11 uses the upper 1 byte 02h as the function number and the lower 1 byte from the entry point identification information 0201h given as an argument from the entry point module 700 by the function number and individual number extraction process 801. 01h is extracted as an individual number (step S11).
The control unit 11 refers to the patch parameter 350 in the EEPROM 132 and reads the patch function flag corresponding to the extracted function number 02h. The control unit 11 performs the patch function flag confirmation process 802 corresponding to the extracted function number 02h (step S12).

The control unit 11 has a branch depending on whether or not the patch function flag corresponding to the function number 02h is ON (there is a patch to replace the function module in the function group corresponding to the function number 02h, and the individual number is searched. It is determined whether or not there is a branch (step S13). At this time, if the patch function flag corresponding to the function number 02h is ON (there is a branch to search for an individual number), the control unit 11 advances the process to step S13. On the other hand, when the patch function flag is OFF (there is no branch to search for an individual number), the control unit 11 ends the process. That is, the control unit 11 returns from the patch module 800 to the function module 600 via the entry point module 700, and processes the function 501 in the function module 600.

The control unit 11 sequentially performs the third branch processing in the patch function flag confirmation processing 802, and confirms whether or not there is the extracted third branch processing 803 of the individual number 01h, that is, whether there is a branch to apply the patch (step S14). And step S15). At this time, if there is a third branch process 803 as a branch to apply the patch, the control unit 11 advances the process to step S16. On the other hand, the control unit 11 ends the process when there is a third branch process 803 as a branch to apply the patch. That is, the control unit 11 returns from the patch module 800 to the function module 600 via the entry point module 700, and processes the function 501 in the function module 600.
The control unit 11 performs a correction process (entry point correction process 804) for the function module of the entry point identification information 0201h (step S16).

Although the embodiment of the present invention has been described in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and the design and the like within a range not deviating from the gist of the present invention are also included.

1 ... Semiconductor device 11 ... Control unit 12 ... Data input / output unit 13 ... Storage unit 111 ... CPU
131 ... Mask ROM
132 ... EEPROM
133 ... RAM
150 ... Program 250, 800 ... Patch module 350 ... Patch parameter 600 ... Function module 700 ... Entry point module

Claims (10)

The first storage unit where the program is stored and the stored data cannot be rewritten,
A control unit that executes the program and
A second storage unit that can rewrite the stored data and stores a patch that is a module that replaces the function module in the program, and
A patch presence / absence flag provided in the second storage unit and indicating whether or not at least one entry point for which the patch is prepared exists in all the entry points added to the function module in the program. A semiconductor device including a patch parameter area for storing patch data including. Each of the entry points placed in the function module is classified into each function group corresponding to the type of function of the function module.
The first aspect of the present invention is characterized in that the patch data includes a patch function flag indicating whether or not at least one or more prepared entry points of the patch exist at the entry point included in the function group. The described semiconductor device. The entry point identification information for identifying the entry point is generated by combining group information indicating the function group and patch information indicating a patch corresponding to the entry point in the function group. The semiconductor device according to claim 2. It further comprises a patch module containing a patch to replace the function module written to the second storage after its manufacture.
When the control unit executes the function module, if the function module has the entry point, the patch presence / absence flag indicates that there is an entry point for which the patch is prepared, and the group information of the function module. The semiconductor device according to claim 3, wherein the patch module is executed when the patch function flag of the function group indicated by indicates that the function group has an entry point in which the patch is prepared. In the patch module
The semiconductor device according to claim 4, wherein each of the patches corresponding to the patch information of the entry point is classified into the functional group unit. The control unit
The semiconductor device according to claim 5, wherein a patch corresponding to the patch information is executed in place of the function module from the patches in the functional group described in the patch module. An IC card characterized in that at least the semiconductor device according to any one of claims 1 to 6 is mounted. When the control unit executes a program containing a function module with an entry point added, which is stored in the first storage unit in which the stored data cannot be rewritten.
The entry point identification information that identifies the entry point includes group information indicating a function group corresponding to the type of function of the function module and patch information indicating a patch corresponding to the function module in the function group. Ori,
The control unit has a patch presence / absence flag indicating whether or not at least one patch-prepared entry point exists in all the entry points in the program stored in the second storage unit, and the function module. In the process of referring to the patch function flag indicating whether or not at least one patch-prepared entry point exists in the entry point included in the function group corresponding to the function type of
When the control unit indicates that the patch presence / absence flag indicates that the patch is present, and the patch function flag that includes the entry point indicates that the patch is present, the stored data can be rewritten. The process of reading the patch module with the entry point patch program from the section,
When the control unit has the entry point in which the patch is prepared in the function group in the patch module, the patch corresponding to the patch information from the patches in the function group is replaced with the function module. A control method characterized by including a process to be performed. When a computer is made to execute a program including a function module in which an entry point identified in the entry point identification information is added, which is stored in the first storage unit in which the stored data cannot be rewritten.
The computer
The patch presence / absence flag indicating whether or not at least one patch-prepared entry point exists in all the entry points in the program stored in the second storage unit, and the function module are classified by function. A means for referring to a patch function flag indicating whether or not at least one patch-prepared entry point exists in the entry point included in the function group.
When the patch presence / absence flag indicates that the patch is present and the patch function flag including the entry point indicates that the patch is present, the entry point is transmitted from the second storage unit capable of rewriting the stored data. A program that acts as a means of executing a patch module that has a patch program for. When a computer is made to execute a program including a function module in which an entry point identified in the entry point identification information is added, which is stored in the first storage unit in which the stored data cannot be rewritten.
The computer
In a patch module having a patch program for the entry point, if the entry point for which the patch is prepared is in a function group in which the function module is classified by function, the entry point is selected from the patches in the function group. A means for executing a patch corresponding to the patch information indicating the patch corresponding to the above function module in place of the function module.
The entry point identification information includes group information indicating a function group corresponding to the type of function of the function module and patch information indicating a patch corresponding to the function module in the function group. Program.

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