JP7276028B2 - power converter - Google Patents

Description

The present invention relates to power converters.

Patent Literature 1 below discloses a power converter that is mounted on a vehicle such as an electric vehicle or a hybrid vehicle. This power converter includes a plurality of semiconductor modules arranged in layers, a capacitor, and a busbar module electrically connecting each of the plurality of semiconductor modules to the capacitor. Each semiconductor module has a positive terminal connected to a capacitor by a positive busbar of the busbar module, and a negative terminal connected to the capacitor by a negative busbar of the busbar module.

The positive bus bar and the negative bus bar that constitute the bus bar module are laminated so as to run in parallel with each other with an insulating plate interposed therebetween. Further, in each of the positive bus bar and the negative bus bar, a plurality of through holes used for connection with the positive terminal and the negative terminal of each semiconductor module are provided at intervals in the arrangement direction of the plurality of semiconductor modules. there is A plurality of semiconductor modules are stacked and attached to the busbar module using a plurality of through holes provided in each of the positive and negative busbars.

Assuming that the most upstream in the arrangement direction is the first stage, first, the positive terminal of the semiconductor module in the first stage is inserted into the through hole in the first stage among the plurality of through holes of the positive electrode busbars. , the negative terminal of this semiconductor module is inserted into the first through hole among the plurality of through holes of the negative bus bar. Also, the positive terminal of the semiconductor module in the second stage is inserted into the through hole of the second stage of the positive bus bar, and the negative terminal of this semiconductor module is inserted into the through hole of the second stage of the negative bus bar. The positive terminal of the semiconductor module at the final stage is inserted into the through hole of the final stage of the positive bus bar, and the negative terminal of this semiconductor module is inserted into the through hole of the final stage of the negative bus bar. That is, when the N-th semiconductor module is assembled, the positive terminal of this semiconductor module is inserted into the N-th through-hole of the positive bus bar, and the negative terminal of this semiconductor module is inserted into the N-th through-hole of the negative bus bar. inserted.

JP 2018-98913 A

By the way, in the design of this type of busbar module, there is a demand to keep the inductance low by minimizing the through holes of the positive busbar and the negative electrode terminal. That is, as the inductance of the busbar module increases, the surge voltage also increases, so it is necessary to take measures to increase the element breakdown voltage of the semiconductor module, which is disadvantageous in terms of cost.

However, due to the influence of tolerance when assembling a plurality of semiconductor modules, the positions in the arrangement direction of the positive terminal and the negative terminal protruding from each semiconductor module may vary.
Therefore, it has been a common practice to widen the opening width of each through-hole in the arrangement direction so as to absorb variations in the positions of the positive terminal and the negative terminal of each semiconductor module. Specifically, in consideration of the accumulation of tolerances, the opening width of the through-hole into which the positive terminal and negative terminal of the semiconductor module in the final stage can be inserted is set as the reference opening width, and all the through-holes are opened according to this reference opening width. The opening width of the

When the semiconductor module at the final stage is used as a reference, the opening width of the through hole becomes too large compared to the terminal widths of the positive terminal and the negative terminal in the upper semiconductor module. As the opening width of the through hole increases, the unnecessary opening area other than the space necessary for inserting the terminal increases, which may cause the inductance of the busbar module to increase. Therefore, it is preferable that the opening width of each of the plurality of through holes is appropriately set according to the arrangement position of each semiconductor module.

SUMMARY OF THE INVENTION The present invention has been made in view of such problems, and an object thereof is to provide a power conversion device capable of reducing the inductance of a busbar module that electrically connects a plurality of semiconductor modules to a capacitor.

One aspect of the present invention is
A plurality of semiconductor modules (4) assembled in layers from the upper stage side to the lower stage side in the arrangement direction (X1), capacitors (11, 12), and each of the plurality of semiconductor modules electrically connected to the capacitor. a bus bar module (30, 130, 230) to be connected,
The busbar module has a positive electrode busbar (31) electrically connected to the positive electrode of the capacitor and a negative electrode busbar (34) electrically connected to the negative electrode of the capacitor, and accommodates the capacitor. The positive electrode bus bar and the negative electrode bus bar extend from the capacitor case (13),
Both the positive electrode bus bar and the negative electrode bus bar are provided with a plurality of openings (32, 35) along the arrangement direction, and the plurality of openings (32, 35) of the positive electrode bus bar are respectively connected to the plurality of semiconductor modules. The positive terminal (4b) of the plurality of semiconductor modules penetrates and is joined to the positive electrode bus bar, and the negative terminal (4c) of each of the plurality of semiconductor modules penetrates through each of the plurality of openings of the negative electrode bus bar and connects to the negative electrode bus bar. are joined,
When at least one of the positive electrode bus bar and the negative electrode bus bar is a target bus bar, the target bus bar has an opening width (D1, D2 ) is equal to or larger than the opening width of the upper opening, and one of the openings lower than the opening width of the upper opening in the arrangement direction of the plurality of openings The opening is configured to include two adjacent openings with a larger opening width ,
a power conversion device (1, 101, 201) , wherein the target bus bar is configured such that the opening width of each of the plurality of openings gradually increases in the arrangement direction;
It is in.
Another aspect of the present invention is
A plurality of semiconductor modules (4) assembled in layers from the upper stage side to the lower stage side in the arrangement direction (X1), capacitors (11, 12), and each of the plurality of semiconductor modules electrically connected to the capacitor. A bus bar module (30, 130, 230) to be connected,
The busbar module has a positive electrode busbar (31) electrically connected to the positive electrode of the capacitor and a negative electrode busbar (34) electrically connected to the negative electrode of the capacitor, and accommodates the capacitor. The positive electrode bus bar and the negative electrode bus bar extend from the capacitor case (13),
Both the positive electrode bus bar and the negative electrode bus bar are provided with a plurality of openings (32, 35) along the arrangement direction, and the plurality of openings (32, 35) of the positive electrode bus bar are respectively connected to the plurality of semiconductor modules. The positive terminal (4b) of the plurality of semiconductor modules penetrates and is joined to the positive electrode bus bar, and the negative terminal (4c) of each of the plurality of semiconductor modules penetrates through each of the plurality of openings of the negative electrode bus bar and connects to the negative electrode bus bar. are joined,
When at least one of the positive electrode bus bar and the negative electrode bus bar is a target bus bar, the target bus bar has an opening width (D1, D2 ) is equal to or larger than the opening width of the upper opening, and one of the openings lower than the opening width of the upper opening in the arrangement direction of the plurality of openings The opening is configured to include two adjacent openings with a larger opening width,
The positive bus bar and the negative bus bar of the bus bar module extend in parallel from the capacitor case with different extension lengths (L), and extend in the stacking direction (Z ) is a plate member laminated to
Of the positive electrode bus bar and the negative electrode bus bar, the bus bar with a relatively shorter extension length is a first bus bar (31), and the bus bar with a relatively longer extension length is a second bus bar (34). At least the first bus bar is the target bus bar, and the overlapping portion (34b) of the second bus bar that overlaps the first bus bar in the stacking direction includes the plurality of openings of the first bus bar. and each of the plurality of communication holes has a hole width (D3) in the arrangement direction that is the same as that of the plurality of openings of the first bus bar. A power conversion device (1, 101, 201) configured to have a value obtained by adding a constant value (C) to the opening width of the opening communicating with the communication hole,
It is in.

In the power conversion device described above, the busbar module is for electrically connecting each of the plurality of semiconductor modules assembled in the arrangement direction to the capacitor. The positive electrode busbar of the busbar module is joined to the positive electrode busbar in a state in which the positive electrode terminals of the plurality of semiconductor modules pass through each of the plurality of openings provided along the array direction. is electrically connected to Similarly, the negative bus bar of the bus bar module is joined to the negative bus bar in a state in which the negative terminals of the plurality of semiconductor modules pass through the plurality of openings provided along the arrangement direction. It is electrically connected to the negative terminal of the capacitor.

Here, in the target bus bar, which is at least one of the positive bus bar and the negative bus bar, the opening width of each of the plurality of openings excluding the uppermost opening is equal to or greater than the opening width of the upper opening. In addition, the plurality of openings include two adjacent openings in which the width of the other opening on the lower side is larger than the opening width of the other opening on the upper side. It's becoming That is, in the target bus bar, the opening width of one of the two openings adjacent to each other is larger than the opening width of the other opening, and the opening widths of the plurality of openings are gradually increased in the arrangement direction. Alternatively, a plurality of openings having the same opening width and provided continuously in the arrangement direction are included in the plurality of openings.

According to such a configuration, the opening corresponding to the semiconductor module in the last stage is designed in consideration of the effect of stacking tolerances when a plurality of semiconductor modules are stacked and assembled from the upper stage to the lower stage in the arrangement direction. To make the opening width of a part of openings relatively smaller than the opening width of another opening adjacent to the lower side, compared to the case where the opening widths of all openings are determined according to the reference opening width. becomes possible. That is, when the opening width of the lower opening of two adjacent openings is matched with the reference opening width, the opening width of the upper opening can be made smaller than the reference opening width. As a result, the inductance of the busbar module can be reduced by reducing the unnecessary opening area compared to the case where the opening widths of all the openings of the target busbar are made constant according to the reference opening width.

As described above, according to the above aspect, it is possible to provide a power conversion device capable of reducing the inductance of a busbar module that electrically connects a plurality of semiconductor modules to a capacitor.

It should be noted that the symbols in parentheses described in the claims and the means for solving the problems indicate the corresponding relationship with the specific means described in the embodiments described later, and limit the technical scope of the present invention. not a thing

1 is a diagram showing the overall configuration of a power converter according to Embodiment 1; FIG. FIG. 2 is an inverter circuit diagram of the power converter of FIG. 1; FIG. 2 is an exploded perspective view showing how a plurality of semiconductor modules are attached to the capacitor device shown in FIG. 1; FIG. 2 is a perspective view of the semiconductor lamination unit in FIG. 1; The figure which looked the busbar module in FIG. 3 from the arrow A direction. FIG. 5 is a cross-sectional view taken along line VI-VI. VII-VII line arrow sectional view of FIG. FIG. 6 is an exploded view of the busbar module of FIG. 5; Sectional drawing corresponding to FIG. 6 about the busbar module of the power converter device of Embodiment 2. FIG. Sectional drawing corresponding to FIG. 7 about the bus bar module of the power converter device of Embodiment 2. FIG. FIG. 9 is an exploded view corresponding to FIG. 8 of the busbar module of the power converter of Embodiment 3;

An embodiment of a power conversion device will be described below with reference to the drawings.

In the drawings of this specification, unless otherwise specified, the thickness direction of the semiconductor module is indicated by arrow X as the first direction, and the direction in which the positive terminal and the negative terminal are juxtaposed in the semiconductor module is indicated by arrow Y as the second direction. A direction orthogonal to both the first direction X and the second direction Y is indicated by an arrow Z as a third direction. Also, one of the first directions X is defined as an arrangement direction X1 when assembling a plurality of semiconductor modules, and the most upstream position in the arrangement direction X1 is called "first stage" for convenience of explanation.

(Embodiment 1)
As shown in FIG. 1, the power conversion device 1 of Embodiment 1 includes a case 2, a semiconductor lamination unit 3, a control circuit board 7, a reactor 8, a capacitor device 10, and a discharge resistor board 24. I have. The case 2 accommodates a plurality of elements including the semiconductor lamination unit 3 , the control circuit board 7 , the reactor 8 , the capacitor device 10 and the discharge resistor board 24 . The case 2 is made of a metal material with good thermal conductivity, that is, a metal material with good heat dissipation.

This power conversion device 1 is mounted in, for example, an electric vehicle or a hybrid vehicle, and is used as an inverter that converts DC power supply power into AC power required to drive a drive motor.

The semiconductor lamination unit 3 includes a plurality of semiconductor modules 4 each of which contains a semiconductor element 5 in its main body, and a cooler 6 . In this semiconductor lamination unit 3, a plurality of semiconductor modules 4 and a plurality of cooling pipes 6a of a cooler 6 are alternately laminated in the first direction X. As shown in FIG.

The cooler 6 includes a plurality of cooling pipes 6a through which a cooling medium (hereinafter simply referred to as "refrigerant") for cooling each semiconductor module 4 flows, and an inflow header pipe communicating with each of the cooling pipes 6a. 6b, and outflow header pipes 6d communicating with respective refrigerant outlets of the plurality of cooling pipes 6a. Both the inflow header pipe 6b and the outflow header pipe 6d extend in the first direction X. As shown in FIG. Only one cooling pipe 6a is shown in FIG.

In the cooler 6, the refrigerant flows through the inflow header pipe 6b from the upstream side to the downstream side in the first direction X, branches to the refrigerant inlet portions of the respective cooling pipes 6a, and flows in the second direction Y through the respective cooling pipes 6a. Afterwards, the refrigerant joins from the refrigerant outlets of the respective cooling pipes 6a and flows from the upstream side to the downstream side through the outflow header pipe 6d.

Typical refrigerants include water mixed with ethylene glycol-based antifreeze, natural refrigerants such as water and ammonia, fluorocarbon-based refrigerants such as Fluorinert, Freon-based refrigerants such as HCFC123 and HFC134a, and alcohol-based refrigerants such as methanol and alcohol. , a ketone-based refrigerant such as acetone, or the like can be used.

The order of assembly of the plurality of semiconductor modules 4 is predetermined, and during this assembly, the semiconductor modules 4 are stacked and assembled from the upper stage side toward the lower stage side in the arrangement direction X1. In this case, the arrangement direction X1 is the direction along the thickness direction of the rectangular parallelepiped body portion of each semiconductor module 4 .
Note that the arrangement direction X1 can also be called the mounting direction of the plurality of semiconductor modules 4 . Also, the upper side in the arrangement direction X1 can be called the upstream side in the arrangement direction X1, and the lower side in the arrangement direction X1 can be called the downstream side in the arrangement direction X1.

The surfaces 4e to be cooled on both sides in the first direction X of each semiconductor module 4 are sandwiched by two cooling pipes 6a of the cooler 6 from both sides in the first direction X. As shown in FIG. Also, the lowermost cooling pipe 6a receives a pressing load from a spring member 9 (see FIG. 4) as a pressure means, so that the cooling surfaces of the two cooling pipes 6a are in close contact with the cooled surface 4e of each semiconductor module 4. can be made At this time, the plurality of semiconductor modules 4 as a whole are compressed in the direction opposite to the arrangement direction X1 with the uppermost semiconductor module 4 arranged farthest from the spring member 9 as a reference.

Each semiconductor module 4 has a plurality of control terminals 4a, positive terminals 4b, negative terminals 4c, and AC terminals 4d. All of the plurality of control terminals 4 a protrude upward in the third direction Z from the body portion of each semiconductor module 4 . The positive terminal 4 b , the negative terminal 4 c , and the AC terminal 4 d all protrude downward in the third direction Z from the body portion of each semiconductor module 4 . That is, the plurality of control terminals 4a protrude in the direction opposite to the other three terminals 4b, 4c, 4d.

The control circuit board 7 is electrically connected to the plurality of control terminals 4 a of the plurality of semiconductor modules 4 . The control circuit board 7 is configured to control the switching operation (ON/OFF operation) of the semiconductor element 5 incorporated in the semiconductor module 4 in order to convert the DC power supplied to the semiconductor module 4 into AC power. It is Any switching element such as an IGBT (that is, an insulated gate bipolar transistor) or a MOSFET (that is, a MOS field effect transistor) is typically used as the semiconductor element 5 .

The reactor 8 is arranged below the semiconductor lamination unit 3 . The reactor 8 has a coil (also referred to as an "inductor") that generates magnetic flux when energized through the current-carrying portion 8a, and has a function of converting electrical energy into magnetic energy using this coil.

The capacitor device 10 is provided in an energization circuit (inverter circuit 17 described later) between a power source (battery B described later) and a semiconductor module 4 as a power supply device. This capacitor device 10 includes a filter capacitor 11 , two smoothing capacitors 12 , and a capacitor case 13 that accommodates the filter capacitor 11 and a plurality of smoothing capacitors 12 . A filter capacitor 11 and two smoothing capacitors 12 (hereinafter simply referred to as "capacitors 11 and 12") are composed of similar capacitor elements. This capacitor device 10 is also called a "capacitor module" or a "capacitor assembly".

The capacitor case 13 is a bottomed box-like case having an accommodation opening 14 and is fixed to the case 2 via a plurality of fixing portions 16 . The capacitors 11 and 12 are sealed with potting resin while being housed through the housing opening 14 of the capacitor case 13 . Therefore, the opening surface 14a of the accommodation opening 14 can also be called a potting surface formed by potting resin.

The capacitor device 10 includes a busbar module 30 that electrically connects the capacitors 11 and 12 and the semiconductor module 4 to supply power to the semiconductor module 4 .

The busbar module 30 has a positive electrode busbar 31 and a negative electrode busbar 34 both extending from the capacitor case 13, and an insulating plate 38 having electrical insulation. Positive electrode bus bar 31 is electrically connected to the positive electrodes of capacitors 11 and 12 . Negative bus bar 34 is electrically connected to the negative electrodes of capacitors 11 and 12 .

Both the positive bus bar 31 and the negative bus bar 34 run in parallel with mutually different extending lengths (dimensions in the second direction Y) from the smoothing capacitor 12 through the accommodation opening 14 of the capacitor case 13 with the thickness direction being the third direction Z, and They are configured as plate members stacked in the third direction Z, which is the stacking direction, with insulating plates 38 interposed therebetween. The positive bus bar 31 is the first bus bar of the positive bus bar 31 and the negative bus bar 34 which has a relatively shorter extending length. On the other hand, the negative bus bar 34 is the second bus bar of the positive bus bar 31 and the negative bus bar 34 having a relatively longer extension length.

The positive terminal 4b protruding from each semiconductor module 4 is inserted into a plurality of openings (a plurality of openings 32 described later) provided to penetrate the positive electrode bus bar 31 in the third direction Z, and is welded or otherwise welded. is joined to the positive electrode bus bar 31 by . Similarly, the negative terminal 4c protruding from each semiconductor module 4 is inserted into a plurality of openings (a plurality of openings 35 to be described later) provided to penetrate the negative bus bar 34 in the third direction Z. is joined to the negative electrode bus bar 34 by welding or the like.

A substrate fixing portion 15 is provided so as to protrude upward in the third direction Z from the side wall 13 a of the capacitor case 13 . A discharge resistor board 24 is attached to the board fixing portion 15 , and the discharge resistor board 24 is provided with a discharge resistor 25 for discharging electric charges accumulated in the capacitor device 10 . In order to suppress thermal interference with the capacitors 11 and 12, the discharge resistor board 24 is preferably provided at a position off the projection plane of the accommodation opening 14 of the capacitor case 13 in the second direction Y. As shown in FIG.

A voltage detection terminal 26 is provided so as to protrude upward in the third direction Z from the board fixing portion 15 . This voltage detection terminal 26 extends between the discharge resistor board 24 and the control circuit board 7 and has the function of detecting the voltage of the capacitors 11 and 12 . The voltage detection terminal 26 is preferably configured to protrude from the capacitor case 13 in order to prevent the capacitors 11 and 12 from being affected by electromagnetic noise.

Here, the electric circuit of the power converter 1 will be described in detail.

As shown in FIG. 2, in the inverter circuit 17 of the power conversion device 1, the switching operation (on/off operation) of the semiconductor elements 5 incorporated in each of the plurality of semiconductor modules 4 is controlled by the control circuit board 7, The DC power of battery B is converted to AC power.

The multiple semiconductor modules 4 are classified into multiple (two in FIG. 2) semiconductor modules 4A and multiple (six in FIG. 2) semiconductor modules 4B. The number of semiconductor modules 4 and the number of each of the semiconductor modules 4A and 4B are not limited to this, and can be appropriately changed as necessary.

In this embodiment, the reactor 8, the filter capacitor 11, and the semiconductor module 4A constitute the booster section 18 of the inverter circuit 17. As shown in FIG. The boosting unit 18 has a function of boosting the voltage of the battery B. FIG. The filter capacitor 11 is a capacitor for removing noise currents contained in currents input from a pair of power supply input terminals 20, which will be described later. The filter capacitor 11 is electrically provided upstream of the plurality of smoothing capacitors 12 with respect to the battery B. As shown in FIG.

On the other hand, the converter 19 of the inverter circuit 17 is configured by the capacitor 12 and the semiconductor module 4B. The converter 19 has a function of converting the DC power boosted by the booster 18 into three-phase (that is, U-phase, V-phase, and W-phase) AC power. The capacitor 12 is a capacitor for smoothing the voltage boosted by the booster 18 . A three-phase AC motor M for running the vehicle is driven by the AC power obtained by the conversion unit 19 .

Also, the discharge resistor 25 is provided in parallel with the filter capacitor 11 and the smoothing capacitor 12 . As a result, the internal charges of the capacitors 11 and 12 are discharged via the discharge resistor 25 when the power converter 1 is stopped or the like.

Here, the semiconductor module 4A is a high-load semiconductor module that operates for a longer period of time than the semiconductor module 4B and has a higher electrical load in terms of specifications than the semiconductor module 4B. On the other hand, the semiconductor module 4B is a low-load semiconductor module that operates for a shorter period of time than the semiconductor module 4A and has a lower electrical load in terms of specifications than the semiconductor module 4A.

It should be noted that the number and arrangement of the respective elements constituting the inverter circuit 17 are not limited to those shown in FIG. 2, and can be appropriately changed as required. For example, the respective numbers of the semiconductor modules 4A and the semiconductor modules 4B are not limited to those shown in FIG. 2, and can be appropriately changed as required.

As shown in FIG. 3, the semiconductor module 4A, which is a high-load semiconductor module, is arranged above the semiconductor module 4B, which is a low-load semiconductor module, in the arrangement direction X1.

The capacitor case 13 of the capacitor device 10 is configured such that the first direction X is the longitudinal direction. The capacitors 11 and 12 are arranged side by side in the first direction X and housed in the capacitor case 13 . That is, two smoothing capacitors 12 are arranged adjacent to each other in the first direction X, and one of the two smoothing capacitors 12 and the filter capacitor 11 are arranged adjacent to each other in the first direction X.

The capacitor device 10 supplies a pair of power input terminals 20 electrically connected to the battery B (see FIG. 2) and the power input to the pair of power input terminals 20 to other electronic equipment including the reactor 8. and a pair of power supply terminals 21 for

One of the pair of power supply input terminals 20 is the positive terminal 20p, and the other of the pair of power supply input terminals 20 is the negative terminal 20n. On the other hand, one of the pair of power supply terminals 21 is the positive terminal 21p, and the other of the pair of power supply terminals 21 is the negative terminal 21n.

The positive electrode side terminal 20p is configured by one end portion 22a of a bus bar 22 having a bent plate shape, and the negative electrode side terminal 20n is configured by one end portion 23a of a bus bar 23 having a bent plate shape. On the other hand, the positive terminal 21 p is configured by the other end 22 b of the bus bar 22 , and the negative terminal 21 n is configured by the other end 23 b of the bus bar 23 . Busbar 23 has a region between one end 23a and the other end 23b embedded in the potting resin of capacitor case 13 .

A positive terminal 20p and a negative terminal 20n, which are a pair of power supply input terminals 20, are electrically connected to the positive and negative terminals of an external battery B (see FIG. 2), respectively. It is electrically connected to each of the side terminals 21n. A positive terminal 21p and a negative terminal 21n, which are a pair of power supply terminals 21, are electrically connected to the reactor 8, and are configured to be able to supply power input to the pair of power supply input terminals 20 to the reactor 8. ing.

A pair of power supply input terminals 20 and a pair of power supply terminals 21 are electrically connected to the filter capacitor 11 and the plurality of smoothing capacitors 12, respectively, and are positioned closer to the filter capacitor 11 than the plurality of smoothing capacitors 12. is provided.

As shown in FIG. 4, among the plurality of cooling pipes 6a of the cooler 6, the cooling pipe 6a for cooling the semiconductor module 4A, which is the high-load semiconductor module, is the cooling pipe 6A, and the semiconductor module 4B, which is the low-load semiconductor module, is used as the cooling pipe 6A. When the cooling pipe 6a that cools is assumed to be a cooling pipe 6B, the refrigerant inlet of the cooling pipe 6A is connected to a position closer to the inlet 6c of the inflow header pipe 6b than the refrigerant inlet of the cooling pipe 6B. That is, the cooler 6 is configured such that the refrigerant flowing through the inflow header pipe 6b flows into the cooling pipe 6A before the cooling pipe 6B.

As shown in FIG. 5, the positive bus bar 31 of the bus bar module 30 has a main body portion 31a that is substantially rectangular in plan view in the third direction Z, and a plurality of ( In this embodiment, eight (8) openings 32 are provided. Each opening 32 is configured as a through hole penetrating in the third direction Z through the main body portion 31 a of the positive bus bar 31 .

The positive terminals 4 b of the semiconductor modules 4 pass through the openings 32 of the positive bus bar 31 . Also, the main body portion 31 a of the positive bus bar 31 is provided with a joining piece 33 that is joined to the positive electrode terminal 4 b penetrating through each opening 32 . The joint piece 33 is configured to extend upward in the third direction Z from the edge of each opening 32 (see FIG. 6).

Similarly, the negative busbar 34 of the busbar module 30 has a main body portion 34a which is substantially rectangular in plan view in the third direction Z, and a plurality of (8 in this embodiment) the main body portion 34a along the arrangement direction X1. 2) openings 35 are provided. Each opening 35 is configured as a through hole penetrating in the third direction Z through the body portion 34 a of the negative bus bar 34 .

Negative terminals 4 c of the plurality of semiconductor modules 4 pass through each of the plurality of openings 35 of the negative bus bar 34 . Also, the main body portion 34 a of the negative bus bar 34 is provided with a joining piece 36 that is joined to the negative electrode terminal 4 c penetrating through each opening 35 . The joint piece 36 is configured to extend upward in the third direction Z from the edge of each opening 35 (see FIG. 7).

Further, the body portion 34a of the negative bus bar 34 is divided into an overlapping portion 34b overlapping the positive bus bar 31 in the third direction Z and a non-overlapping portion 34c not overlapping the positive bus bar 31 in the third direction Z. The overlapping portion 34 b of the negative bus bar 34 is provided with a plurality of communication holes 37 that respectively communicate with the plurality of openings 32 of the positive bus bar 31 .

As shown in FIGS. 5 and 6, the insulating plate 38 has an intervening portion 38a interposed between the body portion 31a of the positive bus bar 31 and the overlapping portion 34b of the negative bus bar 34 in the third direction Z. As shown in FIGS. The intervening portion 38a of the insulating plate 38 is provided with a plurality of cylindrical cylindrical portions 39 erected so as to surround the through hole 39a. Each cylindrical portion 39 of the insulating plate 38 is inserted into each communicating hole 37 of the negative bus bar 34 . Each joint piece 33 of the positive bus bar 31 is joined to the positive electrode terminal 4b of each semiconductor module 4 while penetrating through a through hole 39a defined by a cylindrical portion 39 inserted into each communicating hole 37. As shown in FIG.

As shown in FIGS. 5 and 7 , each joint piece 36 of the negative bus bar 34 is joined to the negative terminal 4 c of each semiconductor module 4 while passing through each opening 35 .

As shown in FIGS. 6 and 8, the positive bus bar 31 as the target bus bar is configured such that the opening widths D1 of the plurality of openings 32 are different from each other. Specifically, the positive bus bar 31 is configured such that the opening width D1 of each of the plurality of openings 32 gradually increases in the arrangement direction X1, that is, is expanded stepwise in the arrangement direction X1. there is

As shown in FIG. 6, for the three openings 32 from the first row in the arrangement direction X1 of the positive busbars 31 of the busbar module 30, the respective opening widths D1 are D1 (1st), D1 (2nd), and D1 in order. (3rd), a relationship of D1(1st)<D1(2nd)<D1(3rd) holds, and a relationship similar to this relationship continues to the eighth stage, which is the lowest stage. Therefore, the opening width D1 (1st) at this time is the minimum opening width D1.

The positive electrode bus bar 31 has an opening width D1 in the arrangement direction X1 of any of the plurality of openings 32 excluding the first opening 32 which is the uppermost opening. 32, and moreover, among the plurality of openings 32, the opening width D1 of the opening 32 on the lower side of the opening 32 on the upper side in the arrangement direction X1 is lower than the opening width D1 of the opening 32 on the upper side. At least two adjacent openings 32, 32 with a large .DELTA.

Here, the opening width D1 of each opening 32 is set by using the tolerance T for each assembly of each semiconductor module 4 with reference to the opening width D1 (1st) of the first stage opening 32. be able to. The tolerance T may be a constant value or a variable value. For example, when the tolerance T is a constant value, the value obtained by adding the tolerance T to the opening width D1 (1st) of the opening 32 at the first stage is set as the opening width D1 (2nd) of the opening 32 at the second stage. , a value obtained by adding the tolerance T to the opening width D1 (2nd) of the second stage opening 32 can be set as the opening width D1 (3rd) of the third stage opening 32 .

Regarding the three communication holes 37 from the first stage in the arrangement direction X1 among the negative busbars 34 of the busbar module 30, the hole widths D3 in the arrangement direction X1 are D3 (1st), D3 (2nd), and D3 (3rd) in order. Then, a relationship of D3(1st)<D3(2nd)<D3(3rd) holds, and a relationship similar to this relationship continues to the eighth stage, which is the lowest stage. Therefore, the hole width D3 (1st) at this time is the minimum hole width D3.

Each of the plurality of communication holes 37 has a hole width D3 in the arrangement direction X1 of the opening 32 of the plurality of openings 32 of the positive electrode bus bar 31 that communicates with the communication hole 37 and a constant value C added thereto. is configured to be That is, the hole width D3 (1st) is a value obtained by adding a constant value C to the opening width D1 (1st), and the hole width D3 (2nd) is a value obtained by adding a constant value C to the opening width D1 (2nd). The hole width D3 (3rd) is a value obtained by adding a constant value C to the opening width D1 (3rd). As a result, the size relationship between the hole widths D3 of the plurality of communicating holes 37 of the negative bus bar 34 is determined according to the size relationship of the opening width D1 of the opening 32 of the positive bus bar 31 .

As the constant value C mentioned here, typically, a value obtained by adding the gap in the arrangement direction X1 between the tubular portion 39 and the communicating hole 37 to the width of the tubular portion 39 in the arrangement direction X1 is used. be able to.

Furthermore, regarding the through holes 39a of the three insulating plates 38 from the first row in the arrangement direction X1, when the hole widths D4 in the arrangement direction X1 are D4 (1st), D4 (2nd), and D4 (3rd) in order, A relationship of D4(1st)<D4(2nd)<D4(3rd) is established, and a relationship similar to this relationship continues to the eighth stage, which is the lowest stage. Therefore, the hole width D4 (1st) at this time is the minimum hole width D4.

As shown in FIGS. 7 and 8, the negative bus bar 34 as the target bus bar is configured such that the opening widths D2 of the plurality of openings 35 are different from each other. Specifically, the negative bus bar 34 is configured such that the opening width D2 of each of the plurality of openings 35 gradually increases in the arrangement direction X1, that is, is expanded stepwise in the arrangement direction X1. there is

As shown in FIG. 7, for three openings 35 from the first stage in the arrangement direction X1 of the negative busbars 34 of the busbar module 30, the respective opening widths D2 are D2(1st), D2(2nd), D2 in order. (3rd), a relationship of D2(1st)<D2(2nd)<D2(3rd) holds, and a relationship similar to this relationship continues to the eighth stage, which is the lowest stage. Therefore, the opening width D2 (1st) at this time is the minimum opening width D2.

The negative electrode bus bar 34 has an opening width D2 in the arrangement direction X1 of any of the plurality of openings 35 excluding the first opening 35 which is the uppermost opening. 35, and moreover, among the plurality of openings 35, the opening width D2 of the other opening 35 on the lower side than the opening width D2 of the one opening 35 on the upper side in the arrangement direction X1. At least two adjacent openings 35, 35 having a large diameter are included.

Here, the opening width D25 of each opening 35 can be set by using the above tolerance T with reference to the opening width D2 (1st) of the first stage opening 35 . For example, the value obtained by adding the tolerance T to the opening width D2 (1st) of the first-stage opening 35 is set as the opening width D2 (2nd) of the second-stage opening 35, A value obtained by adding the above tolerance T to the opening width D2 (2nd) can be set as the opening width D2 (3rd) of the opening 35 on the third stage.

As shown in FIG. 8, the busbar module 30 has an extension length L1, which is the extension length L of the positive electrode busbar 31, and an extension length L of the negative electrode busbar 34, where L is the length in the second direction Y. The extension length L2, which is the extension length L, is configured to satisfy the relationship of L1<L2.

According to the first embodiment described above, the following operational effects are obtained.

In the power converter 1 described above, the busbar module 30 is for electrically connecting each of the plurality of semiconductor modules 4 assembled in the arrangement direction X1 to the capacitors 11 and 12 . The positive electrode busbar 31 of the busbar module 30 is joined to the positive terminal 4b of each of the plurality of semiconductor modules 4 passing through each of the plurality of openings 32 provided along the arrangement direction X1. A positive electrode busbar 31 is electrically connected to the positive electrodes of the capacitors 11 and 12 . Similarly, the negative busbar 34 of the busbar module 30 is joined to the negative terminal 4c of each of the plurality of semiconductor modules 4 passing through each of the plurality of openings 35 provided along the arrangement direction X1. , thereby electrically connecting the negative electrode bus bar 34 to the negative electrodes of the capacitors 11 and 12 .

In the positive electrode bus bar 31, the opening width D1 of the other opening 32 on the lower side is larger than the opening width D1 of one of the openings 32 on the upper side for all of the two openings 32 adjacent to each other. The opening width D1 of the opening portion 32 of is gradually increased in the arrangement direction X1. Similarly, in the negative bus bar 34, the opening width D2 of the other opening 35 on the lower side is larger than the opening width D2 of one of the openings 35 on the upper side for all of the two openings 35 adjacent to each other. The opening width D2 of the opening portion 35 of is gradually increased in the arrangement direction X1.

According to such a configuration, the semiconductor module 4 at the final stage is dealt with in consideration of the effect of stacking tolerances when assembling a plurality of semiconductor modules 4 from the upper stage side to the lower stage side in the arrangement direction X1. Compared to the case where the opening widths D1 and D2 of all the openings 32 and 35 are determined in accordance with the reference opening widths of the openings 32 and 35, the opening widths D1 and D2 of some of the openings 32 and 35 are set on the lower side. can be made relatively smaller than the opening widths D1, D2 of the other openings 32, 35 adjacent to the . That is, compared to the opening widths D1 and D2 of the openings 32 and 35 corresponding to the semiconductor module 4 in the final stage, the opening widths D1 and D2 of the openings 32 and 35 corresponding to the semiconductor module 4 on the upper stage side are set to can be made smaller. As a result, in each of the positive bus bar 31 and the negative bus bar 34, the inductance can be reduced by reducing the unnecessary opening area compared to the case where the opening widths D1 and D2 of all the openings 32 and 35 are constant. can be done.

At this time, in the positive electrode bus bar 31, since the opening width D1 of the opening 32 on the upper side is smaller, the inductance of the upper side can be suppressed to be low. Therefore, among the plurality of openings 32 of the positive bus bar 31, the inductance around the first stage opening 32 is the smallest. Similarly, in the negative bus bar 34, the opening width D2 of the opening 35 on the upper side is smaller, so that the inductance can be kept lower in the upper side. Therefore, among the plurality of openings 35 of the negative bus bar 34, the inductance around the first-stage opening 35 is the smallest.

In addition, since the opening width D1 of each of the plurality of openings 32 of the positive electrode bus bar 31 is configured to gradually increase in the arrangement direction X1, the accumulation of tolerances when assembling the plurality of semiconductor modules 4 is taken into consideration. It is possible to set the optimum opening width D1 for reducing the inductance. Similarly, since the opening width D2 of each of the plurality of openings 35 of the negative bus bar 34 is configured to gradually increase in the arrangement direction X1, the accumulation of tolerances when assembling the plurality of semiconductor modules 4 is taken into consideration. After that, it becomes possible to set the optimum opening width D2 for reducing the inductance.

According to the first embodiment described above, it is possible to provide the power converter 1 capable of reducing the inductance of the busbar module 30 that electrically connects the plurality of semiconductor modules 4 to the capacitors 11 and 12 .

Further, according to the power conversion device 1 described above, by determining the size relationship of the hole widths D3 of the plurality of communication holes 37 of the negative electrode busbar 34 according to the size relationship of the opening width D1 of the opening 32 of the positive electrode busbar 31, Unnecessary opening areas in the plurality of communication holes 37 can be reduced. In this case, the area of the parallel running portion where the non-opening portion of the positive electrode bus bar 31 and the non-opening portion of the negative electrode bus bar 34 run in parallel, that is, the area of the portion where the positive electrode bus bar 31 and the negative electrode bus bar 34 overlap in the third direction Z should be increased. can be done. Thereby, the effect of reducing the inductance of the busbar module 30 can be further enhanced.

Further, according to the power converter 1 described above, by connecting the refrigerant inlet of the cooling pipe 6A of the cooler 6 to a position closer to the inlet 6c of the inflow header pipe 6b than the refrigerant inlet of the cooling pipe 6B, The semiconductor module 4A, which is a high-load semiconductor module, can be cooled preferentially. Moreover, this semiconductor module 4A is assigned to the first stage where the effect of reducing the inductance of each of the positive bus bar 31 and the negative bus bar 34 is the highest. As a result, it is possible to use an inexpensive semiconductor element 5 with a small chip size as the semiconductor element 5 of the semiconductor module 4A.

As a modification (modification 1) particularly related to the busbar module 30 according to the first embodiment, one of the positive electrode busbar 31 and the negative electrode busbar 34 is set as the target busbar, and each of the plurality of openings 32 of the positive electrode busbar 31 is one of a bus bar structure in which the opening width D1 of the negative electrode bus bar 34 gradually increases in the arrangement direction X1, and a bus bar structure in which the opening width D2 of each of the plurality of openings 35 of the negative electrode bus bar 34 gradually increases in the arrangement direction X1. It is also possible to employ only the busbar structure.

Other embodiments related to the first embodiment will be described below with reference to the drawings. In other embodiments, the same reference numerals are given to the same elements as those of the first embodiment, and the description of the same elements will be omitted.

(Embodiment 2)
As shown in FIGS. 9 and 10, the power conversion device 101 of the second embodiment differs from the power conversion device 1 of the first embodiment in the structure of the busbar module 130 .

As shown in FIG. 9, for the opening widths D1 of the three openings 32 from the first stage in the arrangement direction X1 among the positive electrode busbars 31 of the busbar module 130, D1(1st)<D1(2nd)=D1(3rd) The relationship between After that, although not shown, the relationship in which the opening width D1 gradually increases in the arrangement direction X1 continues up to the eighth stage, which is the lowest stage.

In this case, the opening width D1 of each arbitrary opening 32 excluding the opening 32 of the first stage is equal to or greater than the opening width D1 of the opening 32 above the opening 32, and includes at least two adjacent openings 32, 32 in which the opening width D1 of the other opening 32 on the lower side is larger than the opening width D1 of the one opening 32 on the upper side.

Further, the hole widths D3 of the three communicating holes 37 from the first stage in the arrangement direction X1 among the negative busbars 34 of the busbar module 130 are arranged so that the relationship D3(1st)<D3(2nd)=D3(3rd) is established. It's becoming After that, although not shown, the relationship in which the hole width D3 gradually increases in the arrangement direction X1 continues up to the eighth stage, which is the lowest stage.

Further, the hole widths D4 of the through holes 39a of the three insulating plates 38 from the first stage in the arrangement direction X1 have a relationship of D4(1st)<D4(2nd)<D4(3rd). Thereafter, although not shown, the relationship in which the hole width D4 gradually increases in the arrangement direction X1 continues up to the eighth stage, which is the lowest stage.

As shown in FIG. 10, for the opening widths D2 of the three openings 35 from the first stage in the arrangement direction X1 among the negative busbars 34 of the busbar module 130, D2(1st)<D2(2nd)<D2(3rd) The relationship between After that, although not shown, the relationship in which the opening width D2 gradually increases in the arrangement direction X1 continues up to the eighth stage, which is the lowest stage.

In this case, the opening width D2 of each arbitrary opening 35 excluding the opening 35 of the first stage is equal to or larger than the opening width D2 of the opening 35 above the opening 35, and includes at least two adjacent openings 35, 35 in which the opening width D2 of the other opening 35 on the lower side is larger than the opening width D2 of the opening 35 on the upper side.

Other configurations are the same as those of the first embodiment.

According to the second embodiment described above, in the positive electrode busbar 31 of the busbar module 130, the opening widths D1 of two mutually adjacent openings 32, 32, which are part of the plurality of openings 32, can be made the same. can. Similarly, in the negative busbar 34 of the busbar module 130, the opening widths D2 of two adjacent openings 35, 35, which are part of the plurality of openings 35, can be the same.

In addition, the same effects as those of the first embodiment are obtained.

As a modification (modification 2) particularly related to the busbar module 130 according to the second embodiment, a busbar in which three or more openings 32 having the same opening width D1 in the positive electrode busbar 31 are juxtaposed in the arrangement direction X1. A structure or a busbar structure in which two openings 32 having the same opening width D1 in the positive electrode busbar 31 are arranged at a plurality of locations can be adopted. Similarly, a busbar structure in which three or more openings 35 having the same opening width D2 in the negative electrode busbar 34 are arranged in parallel in the arrangement direction X1, or a structure in which two openings 35 having the same opening width D2 in the negative electrode busbar 34 are arranged side by side. A busbar structure arranged at a plurality of locations can be employed.

(Embodiment 3)
As shown in FIG. 11, the power converter 201 of the third embodiment differs from the power converter 1 of the first embodiment in the structure of the busbar module 230 .

In the busbar module 230, each opening 232 of the positive electrode busbar 31 is configured as a cutout hole which penetrates the main body portion 31a of the positive electrode busbar 31 in the third direction Z and is cut at one end side in the second direction Y. . Similarly, each opening 235 of the negative bus bar 34 is configured as a cutout hole that penetrates the main body portion 34a of the negative busbar 34 in the third direction Z and is cut out at one end side in the second direction Y. As shown in FIG.

Other configurations are the same as those of the first embodiment.

According to the busbar module 230 of the third embodiment described above, compared with the busbar module 30 of the first embodiment, the weight of the positive busbar 31 and the negative busbar 34 can be reduced, and the opening 235 of the negative busbar 34 can have a semiconductor The operation of penetrating the negative terminal 4c of the module 4 is facilitated.

In addition, the same effects as those of the first embodiment are obtained.

As a modification (modification 3) particularly related to the busbar module 230 according to the third embodiment, one of the opening 232 of the positive electrode busbar 31 and the opening 235 of the negative electrode busbar 34 is cut out. It is possible to adopt a bus bar structure that has Further, as another modified example (modified example 4), the busbar structure according to the modified example 3 is applied to the busbar module 130 according to the second embodiment, and the opening 32 of the positive electrode busbar 31 and the opening portion of the negative electrode busbar 34 are At least one of 35 can also be a notched hole.

The present invention is not limited to the exemplary embodiments described above, and various applications and modifications are conceivable without departing from the scope of the present invention. For example, it is also possible to implement the following forms that apply the above-described embodiments.

In the above-described embodiment, the case where the extension length L1 of the positive electrode bus bar 31 is shorter than the extension length L2 of the negative electrode bus bar 34 is illustrated. It is also possible to employ a busbar structure that exceeds the extension length L2.

In the above-described embodiment, the eight semiconductor modules 4 assembled in layers from the top side to the bottom side in the arrangement direction X1 were illustrated, but the number of the semiconductor modules 4 is not limited to eight, and the number of the semiconductor modules 4 is not limited to eight. The number of semiconductor modules 4 can be appropriately changed according to the specifications of the conversion device.

In the above-described embodiment, the refrigerant inlet of the cooling pipe 6A among the plurality of cooling pipes 6a of the cooler 6 is connected to a position closer to the inlet 6c of the inflow header pipe 6b than the refrigerant inlet of the cooling pipe 6B. , the positional relationship between each cooling pipe 6a and the inflow port 6c of the inflow header pipe 6b is not limited to this, and this positional relationship can be appropriately changed as necessary.

DESCRIPTION OF SYMBOLS 1, 101, 201... Power converter, 4... Semiconductor module, 4A... Semiconductor module (high load semiconductor module), 4B... Semiconductor module (low load semiconductor module), 4b... Positive terminal, 4c... Negative terminal, 6... Cooling 6a, 6A, 6B cooling pipe 6b inflow header pipe 6c inflow port 6d outflow header pipe 11 filter condenser (condenser) 12 smoothing condenser (condenser) 13 condenser case 30 , 130, 230... bus bar module, 31... positive bus bar (target bus bar, first bus bar), 32, 232... opening, 34... negative electrode bus bar (target bus bar, second bus bar), 34b... overlapping portion, 35, 235... Opening 37... Communication hole C... Constant value D1, D2... Opening width D3... Hole width L, L1, L2... Extension length X1... Arrangement direction Y... Stacking direction

Claims (4)

A plurality of semiconductor modules (4) assembled in layers from the upper stage side to the lower stage side in the arrangement direction (X1), capacitors (11, 12), and each of the plurality of semiconductor modules electrically connected to the capacitor. a bus bar module (30, 130, 230) to be connected,
The busbar module has a positive electrode busbar (31) electrically connected to the positive electrode of the capacitor and a negative electrode busbar (34) electrically connected to the negative electrode of the capacitor, and accommodates the capacitor. The positive electrode bus bar and the negative electrode bus bar extend from the capacitor case (13),
Both the positive electrode bus bar and the negative electrode bus bar are provided with a plurality of openings (32, 35) along the arrangement direction, and the plurality of openings (32, 35) of the positive electrode bus bar are respectively connected to the plurality of semiconductor modules. The positive terminal (4b) of the plurality of semiconductor modules penetrates and is joined to the positive electrode bus bar, and the negative terminal (4c) of each of the plurality of semiconductor modules penetrates through each of the plurality of openings of the negative electrode bus bar and connects to the negative electrode bus bar. are joined,
When at least one of the positive electrode bus bar and the negative electrode bus bar is a target bus bar, the target bus bar has an opening width (D1, D2 ) is equal to or larger than the opening width of the upper opening, and one of the openings lower than the opening width of the upper opening in the arrangement direction of the plurality of openings The opening is configured to include two adjacent openings with a larger opening width ,
A power conversion device (1, 101, 201), wherein the target bus bar is configured such that the opening width of each of the plurality of openings gradually increases in the arrangement direction. A plurality of semiconductor modules (4) assembled in layers from the upper stage side to the lower stage side in the arrangement direction (X1), capacitors (11, 12), and each of the plurality of semiconductor modules electrically connected to the capacitor. a bus bar module (30, 130, 230) to be connected,
The busbar module has a positive electrode busbar (31) electrically connected to the positive electrode of the capacitor and a negative electrode busbar (34) electrically connected to the negative electrode of the capacitor, and accommodates the capacitor. The positive electrode bus bar and the negative electrode bus bar extend from the capacitor case (13),
Both the positive electrode bus bar and the negative electrode bus bar are provided with a plurality of openings (32, 35) along the arrangement direction, and the plurality of openings (32, 35) of the positive electrode bus bar are respectively connected to the plurality of semiconductor modules. The positive terminal (4b) of the plurality of semiconductor modules penetrates and is joined to the positive electrode bus bar, and the negative terminal (4c) of each of the plurality of semiconductor modules penetrates through each of the plurality of openings of the negative electrode bus bar and connects to the negative electrode bus bar. are joined,
When at least one of the positive electrode bus bar and the negative electrode bus bar is a target bus bar, the target bus bar has an opening width (D1, D2 ) is equal to or larger than the opening width of the upper opening, and one of the openings lower than the opening width of the upper opening in the arrangement direction of the plurality of openings The opening is configured to include two adjacent openings with a larger opening width,
The positive bus bar and the negative bus bar of the bus bar module extend in parallel from the capacitor case with different extension lengths (L) and extend in the stacking direction ( Z ) is a plate member laminated to
Of the positive electrode bus bar and the negative electrode bus bar, the bus bar with a relatively shorter extension length is a first bus bar (31), and the bus bar with a relatively longer extension length is a second bus bar (34). At least the first bus bar is the target bus bar, and the overlapping portion (34b) of the second bus bar that overlaps the first bus bar in the stacking direction includes the plurality of openings of the first bus bar. and each of the plurality of communication holes has a hole width (D3) in the arrangement direction that is the same as that of the plurality of openings of the first bus bar. A power conversion device (1, 101, 201) configured to have a value obtained by adding a constant value (C) to the opening width of the opening communicating with the communication hole. 3. The power conversion device according to claim 2 , wherein said target bus bar is configured such that the opening width of each of said plurality of openings gradually increases in said arrangement direction. a plurality of cooling pipes (6a) through which a coolant for cooling the plurality of semiconductor modules flows; an inflow header pipe (6b) communicating with a coolant inlet portion of each of the plurality of cooling pipes; a cooler (6) having an outflow header pipe (6d) communicating with the refrigerant outlet;
The plurality of semiconductor modules include a high-load semiconductor module (4A) and a low-load semiconductor module (4B) having different energized loads in specifications, and the high-load semiconductor module is arranged in the arrangement direction more than the low-load semiconductor module. are arranged on the upper side of the
Among the plurality of cooling pipes of the cooler, the coolant inlet portion of the cooling pipe (6A) for cooling the high-load semiconductor module is connected to the coolant inlet portion of the cooling pipe (6B) for cooling the low-load semiconductor module. 4. The power conversion device according to claim 1 or 3 , wherein is connected to a position close to the inflow port (6c) of the inflow header pipe.

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