JP7275065B2 - power converter - Google Patents

Description

The present invention relates to power converters.

Conventionally, as described in Patent Document 1, for example, a power transmission terminal, a secondary power receiving terminal, a main power receiving terminal, and a transformer are provided, and power is supplied from the power transmission terminal to the secondary power receiving terminal and the main power receiving terminal via the transformer. Power converters are known.

This power conversion device further includes a power transmission circuit, a sub power reception circuit, a main power reception circuit, and a control section. The power transmission circuit connects a power transmission coil provided in the transformer and a power transmission terminal. The sub power receiving circuit connects the sub power receiving coil provided in the transformer and the sub power receiving terminal. The main power receiving circuit connects a main power receiving coil provided in the transformer and a main power receiving terminal. The power transmitting coil, the sub power receiving coil, and the main power receiving coil are magnetically coupled to each other.

The control unit performs switching control of the power transmission circuit, the sub power reception circuit, and the main power reception circuit. By controlling the switching of the power transmission circuit, the DC voltage input from the power transmission terminal is converted into an AC voltage and supplied to the power transmission coil. By controlling the switching of the sub power receiving circuit, the AC voltage output from the sub power receiving coil is converted into a DC voltage and supplied to the sub power receiving terminal. By controlling the switching of the main power receiving circuit, the AC voltage output from the main power receiving coil is converted into a DC voltage and supplied to the main power receiving terminal.

JP 2015-119598 A

Here, a surge voltage is generated in the main power receiving circuit due to switching control of the main power receiving circuit. This surge voltage increases as the main power receiving current flowing through the main power receiving terminal increases.

Moreover, the surge voltage generated in the main power receiving circuit becomes a problem, for example, in the following cases. That is, consider a case where the number of turns of the main power receiving coil is smaller than the number of turns of the power transmitting coil and the sub power receiving coil. In this case, since the inductance of the main power receiving coil is smaller than the inductance of the power transmitting coil and the sub power receiving coil, the magnitude of the main power receiving current is greater than the magnitude of the power transmitting current flowing through the power transmitting terminal and the magnitude of the sub power receiving current flowing through the sub power receiving terminal. Become. Therefore, the surge voltage generated in the main power receiving circuit may increase.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a main object thereof is to provide a power converter capable of suppressing a surge voltage generated in a main power receiving circuit.

The present invention provides a power conversion device comprising a power transmission terminal, a secondary power receiving terminal, a main power receiving terminal, and a transformer, wherein power is supplied from the power transmission terminal to the secondary power receiving terminal and the main power receiving terminal via the transformer, wherein the transformer has a power transmitting coil, a sub power receiving coil, and a main power receiving coil that are magnetically coupled to each other, a power transmitting circuit connecting the power transmitting coil and the power transmitting terminal, and a sub power receiving circuit connecting the sub power receiving coil and the sub power receiving terminal a circuit, a main power receiving circuit connecting the main power receiving coil and the main power receiving terminal, and switching control of the power transmission circuit to convert a DC voltage input from the power transmission terminal into an AC voltage and supply the voltage to the power transmission coil. performs switching control of the auxiliary power receiving circuit so that the AC voltage output from the auxiliary power receiving coil is converted to a DC voltage and supplied to the auxiliary power receiving terminal, and the AC voltage output from the main power receiving coil is converted to a DC voltage a control unit that performs switching control of the main power receiving circuit to convert the voltage into a voltage and supply it to the main power receiving terminal, wherein the control unit controls the voltage of the main power receiving terminal to a voltage command value, A period from when the voltage polarity of the main power receiving coil is switched from the first polarity to the second polarity and when the voltage polarity of the power transmitting coil is switched from the second polarity to the first polarity by performing switching control of the main power receiving circuit , the voltage command value is set based on the voltage of the power transmission terminal and the voltage of the sub power reception terminal so as to gradually increase the magnitude of the current flowing through the main power reception terminal.

At the timing when the voltage polarity of the main power receiving coil is switched from the first polarity to the second polarity, the smaller the magnitude of the current flowing through the main power receiving terminal, the more the surge voltage generated in the main power receiving circuit is suppressed. However, if the magnitude of the current flowing through the main power receiving terminal is small, there is a concern that the power supplied from the power transmission circuit to the main power receiving circuit will decrease.

Therefore, the inventors of the present application have found that during the period from when the voltage polarity of the main power receiving coil is switched from the first polarity to the second polarity to when the voltage polarity of the power transmitting coil is switched from the second polarity to the first polarity, the main power receiving coil is A configuration for gradually increasing the magnitude of the current flowing through the terminals was studied. According to this configuration, compared to the configuration in which the magnitude of the current flowing through the main power receiving terminal is constant during the above-described period, the voltage polarity of the main power receiving coil is switched from the first polarity to the second polarity. , the magnitude of the current flowing through the main power receiving terminal is reduced. As a result, the surge voltage generated in the main power receiving circuit is suppressed. Moreover, since the magnitude of the current flowing through the main power receiving coil is gradually increased, it is possible to prevent or suppress a decrease in power supplied from the power transmission circuit to the main power receiving circuit.

Here, the voltage command value of the main power receiving terminal used for switching control of the main power receiving circuit affects the magnitude of the current flowing through the main power receiving terminal. In addition, the amount of time change in the magnitude of the current flowing through the main power receiving terminal depends on the voltage of the power transmitting terminal, the voltage of the sub power receiving terminal, and the voltage of the main power receiving terminal. In view of this point, in the present invention, the voltage command value is set based on the voltage of the power transmitting terminal and the voltage of the sub power receiving terminal so that the magnitude of the current flowing through the main power receiving terminal during the period described above is gradually increased. . According to the present invention described above, the surge voltage generated in the main power receiving circuit can be suppressed.

The figure which shows the power converter device which concerns on 1st Embodiment. FIG. 2 is a block diagram showing processing contents of a control unit; 4 is a time chart showing the operation state of each switch and transition of the voltage of the transformer; 4 is a flowchart of processing executed by a control unit; The figure which shows the equivalent circuit of a transformer. A time chart showing changes in transformer voltage and current. 5 is a time chart showing changes in the current and voltage of the transformer and the terminal voltage of the fifth conversion switch according to the first embodiment and the comparative example; The figure which shows a simulation result. The figure which shows the setting method of the voltage command value which concerns on 2nd Embodiment. The figure which shows the setting method of the voltage command value which concerns on 3rd Embodiment. The figure which shows the power converter device which concerns on 4th Embodiment. The figure which shows the power converter device which concerns on 5th Embodiment. The figure which shows the power converter device which concerns on 6th Embodiment. The figure which shows the power converter device which concerns on other embodiment.

<First embodiment>
DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment embodying a power converter according to the present invention will be described below with reference to the drawings. The power conversion device of this embodiment is of a multi-port type, and is mounted on an electric vehicle such as a plug-in hybrid vehicle (PHEV) or an electric vehicle (EV).

As shown in FIG. 1, the power supply system includes a first storage battery 10, a second storage battery 20, a third storage battery 30, an electric load 31, and a power converter 40. Each storage battery 10, 20, 30 is a rechargeable secondary battery. The first and second storage batteries 10 and 20 are, for example, lithium-ion storage batteries or nickel-hydrogen storage batteries, and the third storage battery 30 is, for example, a lead-acid battery. In this embodiment, the rated voltage (eg, 400 V) of the first storage battery 10 is higher than the rated voltage (eg, 300 V) of the second storage battery 20, and the rated voltage of the second storage battery 20 is the rated voltage (eg, 14 V) of the third storage battery 30. ). The electrical load 31 also includes a constant voltage load that requires a constant supply voltage or a supply voltage fluctuation within a predetermined range. Specific examples of constant voltage loads include navigation devices, audio devices, meter devices, and various ECUs.

The power conversion device 40 has a first full bridge circuit 50 . The first full bridge circuit 50 includes first to fourth switches Q1 to Q4 and a first capacitor 51. As shown in FIG. In this embodiment, the first through fourth switches Q1 through Q4 are N-channel MOSFETs. A first high potential side terminal CH1 of the power converter 40 is connected to the drains of the first switch Q1 and the third switch Q3. The drain of the second switch Q2 is connected to the source of the first switch Q1, and the drain of the fourth switch Q4 is connected to the source of the third switch Q3. A first low potential side terminal CL1 of the power converter 40 is connected to the sources of the second switch Q2 and the fourth switch Q4. The first end of the first capacitor 51 and the positive terminal of the first storage battery 10 are connected to the first high potential side terminal CH1, and the second end of the first capacitor 51 is connected to the first low potential side terminal CL1. and the negative terminal of the first storage battery 10 are connected.

In this embodiment, the first full bridge circuit 50 corresponds to the "power transmission circuit", the first switch Q1 and the third switch Q3 correspond to the "upper arm power transmission switch", and the second switch Q2 and the fourth switch Q4 It corresponds to a "lower arm power transmission switch".

Instead of the first storage battery 10, the first high-potential terminal CH1 and the first low-potential terminal CL1 are connected to the output side of an ACDC converter that converts AC power input from an external power source into DC power and outputs the DC power. may be connected. Further, in the present embodiment, the first high potential side terminal CH1 and the first low potential side terminal CL1 correspond to "power transmission terminals".

The power conversion device 40 has a second full bridge circuit 60 . The second full bridge circuit 60 includes first to fourth conversion switches SW1 to SW4 and a second capacitor 61. As shown in FIG. In this embodiment, the first to fourth conversion switches SW1 to SW4 are N-channel MOSFETs. A second high potential side terminal CH2 of the power converter 40 is connected to the drains of the first conversion switch SW1 and the third conversion switch SW3. The drain of the second conversion switch SW2 is connected to the source of the first conversion switch SW1, and the drain of the fourth conversion switch SW4 is connected to the source of the third conversion switch SW3. A second low potential side terminal CL2 of the power converter 40 is connected to the sources of the second conversion switch SW2 and the fourth conversion switch SW4. The first end of the second capacitor 61 and the positive terminal of the second storage battery 20 are connected to the second high potential side terminal CH2, and the second end of the second capacitor 61 is connected to the second low potential side terminal CL2. and the negative terminal of the second storage battery 20 are connected.

In the present embodiment, the second high potential side terminal CH2 and the second low potential side terminal CL2 correspond to the "sub power receiving terminal", the second full bridge circuit 60 corresponds to the "sub power receiving circuit", and the first The conversion switch SW1 and the third conversion switch SW3 correspond to the "upper arm secondary power receiving switch", and the second conversion switch SW2 and the fourth conversion switch SW4 correspond to the "lower arm secondary power receiving switch".

The power conversion device 40 has a third full bridge circuit 70 . The third full bridge circuit 70 includes fifth to eighth conversion switches SW5 to SW8 and a third capacitor 71. As shown in FIG. In this embodiment, the fifth to eighth conversion switches SW5 to SW8 are N-channel MOSFETs. A third high potential side terminal CH3 of the power conversion device 40 is connected to the drains of the fifth conversion switch SW5 and the seventh conversion switch SW7. The drain of the sixth conversion switch SW6 is connected to the source of the fifth conversion switch SW5, and the drain of the eighth conversion switch SW8 is connected to the source of the seventh conversion switch SW7. A third low potential side terminal CL3 of the power conversion device 40 is connected to the sources of the sixth conversion switch SW6 and the eighth conversion switch SW8. A first end of the third capacitor 71 is connected to the third high potential side terminal CH3, and a second end of the third capacitor 71 is connected to the third low potential side terminal CL3. The voltage between the third high-potential terminal CH3 and the third low-potential terminal CL3 is controlled so as to fall within a predetermined voltage range (40 to 48 V, for example).

In this embodiment, the third high potential side terminal CH3 and the third low potential side terminal CL3 correspond to the "main power receiving terminal", the third full bridge circuit 70 corresponds to the "main power receiving circuit", and the fifth The conversion switch SW5 and the seventh conversion switch SW7 correspond to the "upper arm main power receiving switch", and the sixth conversion switch SW6 and the eighth conversion switch SW8 correspond to the "lower arm main power receiving switch".

The power converter 40 includes a step-down chopper circuit 72 . The step-down chopper circuit 72 includes a first transformer switch SC<b>1 , a second transformer switch SC<b>2 , a reactor 73 and a fourth capacitor 74 . In this embodiment, the first transformation switch SC1 and the second transformation switch SC2 are N-channel MOSFETs. A third high-potential side terminal CH3 of the power conversion device 40 is connected to the drain of the first transformation switch SC1. The first end of the reactor 73 and the drain of the second transformation switch SC2 are connected to the source of the first transformation switch SC1. A first end of the fourth capacitor 74 and a fourth high potential side terminal CH4 of the power conversion device 40 are connected to the second end of the reactor 73 . The third and fourth low-potential terminals CL3 and CL4 of the power converter 40 and the second end of the fourth capacitor 74 are connected to the source of the second transformation switch SC2. The positive terminal of the third storage battery 30 and the first end of the electric load 31 are connected to the fourth high potential side terminal CH4, and the negative terminal of the third storage battery 30 and the electric load 31 are connected to the fourth low potential side terminal CL4. A second end is connected. In this embodiment, the step-down chopper circuit 72 corresponds to a "DCDC converter".

The power conversion device 40 includes a transformer 80 having a first coil 81 , a second coil 82 and a third coil 83 . The first end of the first coil 81 is connected to the source of the first switch Q1 and the drain of the second switch Q2, and the second end of the first coil 81 is connected to the source of the third switch Q3 and the fourth switch Q4. drain is connected. The source of the first conversion switch SW1 and the drain of the second conversion switch SW2 are connected to the first end of the second coil 82, and the source of the third conversion switch SW3 and the drain of the second conversion switch SW2 are connected to the second end of the second coil 82. The drain of the 4 conversion switch SW4 is connected. The source of the fifth conversion switch SW5 and the drain of the sixth conversion switch SW6 are connected to the first end of the third coil 83, and the source of the seventh conversion switch SW7 and the drain of the sixth conversion switch SW6 are connected to the second end of the third coil 83. The drain of the 8 conversion switch SW8 is connected.

The first coil 81, the second coil 82, and the third coil 83 are magnetically coupled to each other, for example, via a core included in the transformer 80. When the potential of the first end of the first coil 81 with respect to the second end of the first coil 81 becomes higher, an induced voltage is applied to each of the second coil 82 and the third coil 83 such that the potential of the first end becomes higher than that of the second end. occurs. On the other hand, when the potential of the second end of the first coil 81 with respect to the first end becomes higher, each of the second coil 82 and the third coil 83 is provided with a voltage such that the potential of the second end becomes higher than that of the first end. An induced voltage is generated. In this embodiment, the first coil 81 corresponds to the "transmitting coil", the second coil 82 corresponds to the "sub power receiving coil", and the third coil 83 corresponds to the "main power receiving coil".

When the potential of the first end of the first coil 81 with respect to the second end of the first coil 81 becomes higher, the polarity of the voltage Vt1 of the first coil 81 is defined as positive, and in this case the direction of the current IL1 flowing through the first coil 81 is positive. defined as When the potential of the first end of the second coil 82 with respect to the second end of the second coil 82 becomes higher, the polarity of the voltage Vt2 of the second coil 82 is defined as positive, and in this case the direction of the current IL2 flowing through the second coil 82 is positive. defined as When the potential of the first end of the third coil 83 with respect to the second end becomes higher, the polarity of the voltage Vt3 of the third coil 83 is defined as positive, and in this case the direction of the current IL3 flowing through the third coil 83 is positive. defined as In this embodiment, when the polarity of the first to third coils 81 to 83 is positive, it is referred to as "first polarity", and when the polarity of the first to third coils 81 to 83 is negative, " 2nd polarity”. On the other hand, when the polarity of the first to third coils 81 to 83 is negative, it is defined as "first polarity", and when the polarity of the first to third coils 81 to 83 is positive, it is defined as "second polarity". Equivalent to.

The power conversion device 40 includes first to third voltage sensors 91-93 and first to third current sensors 94-96. The first voltage sensor 91 detects a first voltage V1r that is the terminal voltage of the first capacitor 51, the second voltage sensor 92 detects a second voltage V2r that is the terminal voltage of the second capacitor 61, and the third A voltage sensor 93 detects a third voltage V3r, which is the terminal voltage of the third capacitor 71 .

The first current sensor 94 detects a first current I1r that flows between the first high potential side terminal CH1 and the first full bridge circuit 50 . The second current sensor 95 detects a second current I2r that flows between the second full bridge circuit 60 and the second high potential side terminal CH2. The third current sensor 96 detects a third current I3r that flows between the third full bridge circuit 70 and the third high potential side terminal CH3. In this embodiment, the signs of the first to third currents I1r to I3r are defined as follows. As for the sign of the first current I1r, the direction from the positive terminal of the first storage battery 10 to the first high potential side terminal CH1 is defined as positive. As for the sign of the second current I2r, the direction from the second high potential side terminal CH2 to the positive terminal of the second storage battery 20 is defined as positive. The sign of the third current I3r defines positive in the direction from the third high potential side terminal CH3 to the drain of the first transformation switch SC1.

The detected values of the first to third voltage sensors 91 to 93 and the first to third current sensors 94 to 96 are input to the control section 100 provided in the power converter 40 . The control unit 100 turns on and off the first to fourth switches Q1 to Q4, the first to eighth conversion switches SW1 to SW8, the first transformation switch SC1 and the second transformation switch SC2. A method of operating these switches Q1 to Q4, SW1 to SW8, SC1 and SC2 will be described below with reference to FIG. FIG. 2 is a block diagram of processing executed by the control unit 100. As shown in FIG.

The controller 100 includes a first command current calculator 200 and a first current controller 210 . The first command current calculator 200 includes a first current calculator 201 and a first minimum value selector 202 . The first current calculation unit 201 divides the input first command power P1* by the second voltage V2r detected by the second voltage sensor 92, and obtains the command value of the charging current to be supplied to the second storage battery 20. A certain command current I1p is calculated. The command current I1p is set to supply power to the second storage battery 20 by constant power control (CP). When the sign of the command current I1p is positive, the second current I2r flows through the second high potential side terminal CH2 on the side where the second storage battery 20 is charged. Note that when the first command electric power P1* input to the first command current calculator 200 is 0, the command current I1p is 0.

First minimum value selection section 202 selects the smaller one of command current I1p calculated by first current calculation section 201 and first constant current command value I1* as first command current Iref1. The first constant current command value I1* is set to supply power to the second storage battery 20 by constant current control (CC). First command current Iref1 output from first minimum value selection section 202 has its upper limit value or lower limit value limited by first limiter 203 .

The first current controller 210 includes a first current deviation calculator 211 , a first feedback controller 212 and a second limiter 213 . The first current deviation calculator 211 calculates the first current deviation ΔI1 by subtracting the second current I2r detected by the second current sensor 95 from the first command current Iref1 output from the first limiter 203. do.

The first feedback control unit 212 calculates the first command phase φa as an operation amount for feedback-controlling the calculated first current deviation ΔI1 to zero. In this embodiment, proportional integral control is used as this feedback control. The first command phase φa will be described later. The feedback control used in the first feedback control section 212 is not limited to proportional-integral control, and may be proportional-integral-derivative control, for example.

The first command phase φa calculated by the first feedback control section 212 has its upper limit value or lower limit value limited by the second limiter 213 and is input to the PWM generation section 320 included in the control section 100 .

The controller 100 includes a second command current calculator 300 and a second current controller 310 . The second command current calculator 300 includes a second current calculator 301 , a voltage deviation calculator 302 , a second feedback controller 303 and a second minimum value selector 304 . The second current calculator 301 divides the input second command power P2* by the third voltage V3r detected by the third voltage sensor 93 to obtain a command current I2p to be supplied to the third high potential side terminal CH3. Calculate Command current I2p is set to supply power to step-down chopper circuit 72 by constant power control (CP). When the sign of the command current I2p is positive, the third current I3r flows in the direction from the third high potential side terminal CH3 to the drain of the first transformation switch SC1.

Voltage deviation calculator 302 calculates voltage deviation ΔV by subtracting third voltage V3r from voltage command value V3* of the voltage applied to step-down chopper circuit 72 . The voltage command value V3* will be described later. Second feedback control section 303 calculates command current I2v as a manipulated variable for feedback-controlling calculated voltage deviation ΔV to zero. In this embodiment, proportional integral control is used as this feedback control. Command current I2v is set to supply power to step-down chopper circuit 72 by constant voltage control (CV). The feedback control used in the second feedback control section 303 is not limited to proportional-integral control, and may be proportional-integral-derivative control, for example.

The second minimum value selection unit 304 selects the minimum value among the command current I2p calculated by the second current calculation unit 301, the command current I2v calculated by the second feedback control unit 303, and the second constant current command value I2*. is selected as the second command current Iref2. The second constant current command value I2* is set to supply power to the step-down chopper circuit 72 by constant current control. Third limiter 305 limits the upper limit or lower limit of second command current Iref2 output from second minimum value selection section 304 .

The second current controller 310 includes a second current deviation calculator 311 , a third feedback controller 312 and a fourth limiter 313 . Second current deviation calculator 311 calculates second current deviation ΔI2 by subtracting third current I3r detected by third current sensor 96 from second command current Iref2 output from third limiter 305. do.

The third feedback control section 312 calculates a second command phase φb as an operation amount for feedback-controlling the calculated second current deviation ΔI2 to zero. In this embodiment, proportional integral control is used as this feedback control. The second command phase φb will be described later. Feedback control used in the third feedback control section 312 is not limited to proportional-integral control, and may be proportional-integral-derivative control, for example.

The second command phase φb calculated by the third feedback control section 312 has its upper limit or lower limit limited by the fourth limiter 313 and is input to the PWM generation section 320 .

Based on the first command phase φa and the second command phase φb, the PWM generation unit 320 generates operation signals for the first to fourth switches Q1 to Q4 and the first to eighth conversion switches SW1 to SW8. Output to the gates of the 1st to 4th switches Q1 to Q4 and the 1st to 8th conversion switches SW1 to SW8. Hereinafter, the operating modes of the first to fourth switches Q1 to Q4 and the first to eighth conversion switches SW1 to SW8 will be described with reference to FIG.

3(a) and 3(b) show the operating states of the first to fourth switches Q1 to Q4. FIG. 3(c) shows transition of the voltage Vt1 of the first coil 81. FIG. 3(d) and (e) show the operating states of the first to fourth conversion switches SW1 to SW4. FIG. 3(f) shows transition of the voltage Vt2 of the second coil 82. FIG. FIGS. 3(g) and 3(h) show the operating states of the fifth to eighth conversion switches SW5 to SW8. FIG. 3(i) shows transition of the voltage Vt3 of the third coil 83. FIG. FIG. 3(j) shows the operating states of the first transformation switch SC1 and the second transformation switch SC2.

The first switch Q1 and the second switch Q2 are alternately turned on, and the third switch Q3 and the fourth switch Q4 are alternately turned on. When the first switch Q1 and the fourth switch Q4 are turned on and the second switch Q2 and the third switch Q3 are turned off, the polarity of the voltage Vt1 of the first coil 81 becomes positive. Further, when the first switch Q1 and the fourth switch Q4 are turned off and the second switch Q2 and the third switch Q3 are turned on, the polarity of the voltage Vt1 of the first coil 81 becomes negative.

The first conversion switch SW1 and the second conversion switch SW2 are alternately turned on, and the third conversion switch SW3 and the fourth conversion switch SW4 are alternately turned on. When the first conversion switch SW1 and the fourth conversion switch SW4 are turned on and the second conversion switch SW2 and the third conversion switch SW3 are turned off, the polarity of the voltage Vt2 of the second coil 82 becomes positive. Further, when the first conversion switch SW1 and the fourth conversion switch SW4 are turned off and the second conversion switch SW2 and the third conversion switch SW3 are turned on, the polarity of the voltage Vt2 of the second coil 82 becomes negative. .

The fifth conversion switch SW5 and the sixth conversion switch SW6 are alternately turned on, and the seventh conversion switch SW7 and the eighth conversion switch SW8 are alternately turned on. When the fifth conversion switch SW5 and the eighth conversion switch SW8 are turned on and the sixth conversion switch SW6 and the seventh conversion switch SW7 are turned off, the polarity of the voltage Vt3 of the third coil 83 becomes positive. Further, when the fifth conversion switch SW5 and the eighth conversion switch SW8 are turned off and the sixth conversion switch SW6 and the seventh conversion switch SW7 are turned on, the polarity of the voltage Vt3 of the third coil 83 becomes negative. . In this embodiment, the switching periods Ts of the first to fourth switches Q1 to Q4 and the first to eighth conversion switches SW1 to SW8 are the same.

When the first command phase φa is positive, the timing of turning on the first switch Q1 is set as the reference timing, and the timing of turning on the first conversion switch SW1 is changed by the first command phase φa with respect to this reference timing. delay.

When the second command phase φb is positive, the timing of turning on the first switch Q1 is used as a reference timing, and the timing of turning on the fifth conversion switch SW5 is changed by the second command phase φb with respect to this reference timing. delay.

The first transformation switch SC1 and the second transformation switch SC2 are alternately turned on. The control unit 100 reduces the third voltage V3r to the target voltage and supplies the power to the third storage battery 30, thereby controlling the duty ratio, which is the on/off ratio of the first and second transformation switches SC1 and SC2.

FIG. 4 is a flow chart showing a process repeatedly executed by the control unit 100 at predetermined intervals.

In step S10, it is determined whether or not there is a request to drive the power electronics device 40 . When a negative determination is made in step S10, the process proceeds to step S11 to set the power conversion device 40 to the standby mode. Then, in step S12, the first to fourth switches Q1 to Q4, the first to eighth conversion switches SW1 to SW8, the first transformation switch SC1 and the second transformation switch SC2 are turned off.

If an affirmative determination is made in step S10, the process proceeds to step S13 to acquire the first voltage V1r and the second voltage V2r. In step S14, the voltage command value V3* is set based on the first voltage V1r and the second voltage V2r. In step S15, the constant voltage control described with reference to FIG. 2 is executed based on the voltage command value V3* to set the second command phase φb. In step S16, switching control of the first to fourth switches Q1 to Q4 and the first to eighth conversion switches SW1 to SW8 is performed based on the first command phase φa and the second command phase φb set to desired values. Execute. A method of setting the voltage command value V3* will be described below with reference to FIGS. 5 and 6. FIG.

As shown in FIG. 5, the relationship between the first to third coils 81 to 83 provided in the transformer 80 is expressed as an equivalent circuit in which the first to third equivalent coils 84 to 86 are delta-connected. In addition, in FIG. 5, the same reference numerals are assigned to the configurations described in FIG. 1 for the sake of convenience.

A first equivalent coil 84 represents the relationship between the first coil 81 and the second coil 82 and has a mutual inductance of L12. Also, the current flowing through the first equivalent coil 84 is Itra12, and its sign is positive in the direction from the first coil 81 to the second coil 82 .

A second equivalent coil 85 represents the relationship between the first coil 81 and the third coil 83, and its mutual inductance is L13. Also, the current flowing through the second equivalent coil 85 is Itra13, and its sign is positive in the direction from the first coil 81 to the third coil 83 .

A third equivalent coil 86 represents the relationship between the second coil 82 and the third coil 83 and has a mutual inductance of L23. Also, the current flowing through the third equivalent coil 86 is Itra23, and its sign is positive in the direction from the second coil 82 to the third coil 83 .

In this equivalent circuit, the current IL3 flowing through the third coil 83 is the sum of the current Itra13 flowing through the second equivalent coil 85 and the current Itra23 flowing through the third equivalent coil 86 . Hereinafter, transitions of current and voltage in this equivalent circuit will be described with reference to FIG.

6, (a) shows transition of the voltage Vt1 of the first coil 81, (b) shows transition of the voltage Vt2 of the second coil 82, and (c) shows transition of the voltage Vt3 of the third coil 83. (d) shows the transition of the current Itra13 flowing through the second equivalent coil 85, (e) shows the transition of the current Itra23 flowing through the third equivalent coil 86, and (f) shows the transition of the current IL3 flowing through the third coil 83. shows the transition of Note that the first command phase φa is set to 0 in the example shown in FIG.

At time t1, the polarity of the voltage Vt1 of the first coil 81 and the polarity of the voltage Vt2 of the second coil 82 are changed from negative to positive. At time t2, which is delayed by the second command phase φb from time t1, the polarity of the voltage Vt3 of the third coil 83 is changed from negative to positive. At time t3, which is half the switching period Ts after time t1, the polarity of the voltage Vt1 of the first coil 81 and the polarity of the voltage Vt2 of the second coil 82 change from positive to negative. A period between these times t2 and t3 is defined as a control period TA. In order to control the amount of change over time of the current IL3 flowing through the third coil 83 during the control period TA, the amount of change over time of the current Itra13 flowing through the second equivalent coil 85 and the amount of change over time of the current Itra13 flowing through the third equivalent coil 86 are think.

The amount of time change of the current Itra13 flowing through the second equivalent coil 85 is represented by the following formula (c1) using the first voltage V1r and the third voltage V3r.

ここで、Ｎ１は第１コイル８１の巻き数を表し、Ｎ３は第３コイル８３の巻き数を表す。本実施形態において、第３コイル８３の巻き数Ｎ３は、第１コイル８１の巻き数Ｎ１よりも小さい。図６（ｄ）は、上式（ｃ１）で表される第２等価コイル８５に流れる電流Ｉｔｒａ１３の時間変化量が、制御期間ＴＡにおいて正とされる一例である。

Here, N 1 represents the number of turns of the first coil 81 and N 3 represents the number of turns of the third coil 83 . In the present embodiment, the number of turns N3 of the third coil 83 is smaller than the number of turns N1 of the first coil 81 . FIG. 6(d) is an example in which the time change amount of the current Itra13 flowing through the second equivalent coil 85 represented by the above equation (c1) is positive during the control period TA.

A time change amount of the current Itra23 flowing through the third equivalent coil 86 is expressed by the following formula (c2) using the second voltage V2r and the third voltage V3r.

ここで、Ｎ２は第２コイル８２の巻き数を表す。本実施形態において、第３コイル８３の巻き数Ｎ３は、第２コイル８２の巻き数Ｎ２よりも小さい。図６（ｅ）は、上式（ｃ２）で表される第３等価コイル８６に流れる電流Ｉｔｒａ２３の時間変化量が、制御期間ＴＡにおいて負とされる一例である。

Here, N2 represents the number of turns of the second coil 82 . In the present embodiment, the number of turns N3 of the third coil 83 is smaller than the number of turns N2 of the second coil 82 . FIG. 6(e) is an example in which the amount of change over time of the current Itra23 flowing through the third equivalent coil 86 represented by the above equation (c2) is negative during the control period TA.

According to the equivalent circuit shown in FIG. 5, the current IL3 flowing through the third coil 83 is the sum of the current Itra13 flowing through the second equivalent coil 85 and the current Itra23 flowing through the third equivalent coil 86. The following formula (c3) is obtained.

図６（ｆ）では、上式（ｃ３）で表される第３コイル８３に流れる電流ＩＬ３の時間変化量が、制御期間ＴＡにおいて正とされる。このように、制御部１００は、第３コイル８３に流れる電流ＩＬ３の時間変化量が、制御期間ＴＡにおいて正となるように電圧指令値Ｖ３＊を設定する。そのために、制御部１００は、下式（ｃ４）を満たすように、第１電圧Ｖ１ｒ及び第２電圧Ｖ２ｒに基づいて、電圧指令値Ｖ３＊を設定する。

In FIG. 6(f), the time change amount of the current IL3 flowing through the third coil 83 represented by the above equation (c3) is positive during the control period TA. In this manner, control unit 100 sets voltage command value V3* such that the amount of change over time of current IL3 flowing through third coil 83 is positive during control period TA. Therefore, the control unit 100 sets the voltage command value V3* based on the first voltage V1r and the second voltage V2r so as to satisfy the following formula (c4).

図７に、上式（ｃ４）を満たすように電圧指令値Ｖ３＊が設定された本実施形態と、上式（ｃ４）を満たさない電圧指令値Ｖ３＊が設定された比較例とのそれぞれにおける各波形を示す。図７において、（ａ）は第３コイル８３に流れる電流ＩＬ３の推移を示し、（ｂ）は第３コイル８３の電圧Ｖｔ３の推移を示し、（ｃ）は第５変換スイッチＳＷ５の端子電圧（ドレイン及びソース間電圧）の推移を示す。

FIG. 7 shows the present embodiment in which the voltage command value V3* is set so as to satisfy the above equation (c4) and the comparative example in which the voltage command value V3* is set not to satisfy the above equation (c4). Each waveform is shown. In FIG. 7, (a) shows the transition of the current IL3 flowing through the third coil 83, (b) shows the transition of the voltage Vt3 of the third coil 83, and (c) shows the terminal voltage of the fifth conversion switch SW5 ( drain-source voltage).

In this embodiment, the current IL3 flowing through the third coil 83 during the control period TA is controlled to gradually increase. Therefore, when the power of the same magnitude as in the comparative example is supplied from the first full bridge circuit 50 and the second full bridge circuit 60 to the third full bridge circuit 70, the third coil 83 is supplied with power at the start timing of the control period TA. The flowing current IL3 is smaller in this embodiment than in the comparative example. As a result, the surge voltage generated in the third full bridge circuit 70 is reduced compared to the comparative example. As a result, as shown in FIG. 7C, the surge voltage generated at the start timing of the control period TA is reduced as compared with the comparative example.

In the above description, the control period TA is defined as a period in which the polarity of the voltage Vt1 of the first coil 81 is switched from positive to negative after the polarity of the voltage Vt3 of the third coil 83 is switched from negative to positive. However, the control period TA is not limited to this. A period in which the polarity of the voltage Vt1 of the first coil 81 is switched from negative to positive after the polarity of the voltage Vt3 of the third coil 83 is switched from positive to negative may be the control period TA. In this control period TA, the surge voltage generated in the third full bridge circuit 70 is also reduced by setting the voltage command value V3* so as to satisfy the above equation (c4).

FIG. 8 shows simulation results of the configuration according to this embodiment. In FIG. 8, (a) shows changes in the current IL3 flowing through the third coil 83, and (b) shows changes in the terminal voltage of the fifth conversion switch SW5. The current IL3 flowing through the third coil 83 is controlled to have the waveform described with reference to FIG. 6(f). This simulation result confirmed that the surge voltage generated in the third full bridge circuit 70 was reduced by 23% compared to the comparative example.

According to this embodiment detailed above, the following effects can be obtained.

At the start timing of the control period TA, the smaller the magnitude of the current IL3 flowing through the third coil 83, the more the surge voltage generated in the third full bridge circuit 70 is suppressed. However, if the magnitude of the current IL3 flowing through the third coil 83 is small, there is concern that the power supplied from the first full bridge circuit 50 to the third full bridge circuit 70 will decrease.

Therefore, the inventors of the present application have studied a configuration for gradually increasing the magnitude of the current IL3 flowing through the third coil 83 during the control period TA. According to this configuration, compared to the comparative example in which the magnitude of the current IL3 flowing through the third coil 83 is constant during the control period TA, the current IL3 flowing through the third coil 83 at the start timing of the control period TA is reduced in size. As a result, the surge voltage generated in the third full bridge circuit 70 is suppressed. In addition, since the magnitude of the current IL3 flowing through the third coil 83 is gradually increased, it is possible to prevent or suppress a decrease in power supplied from the first full bridge circuit 50 to the third full bridge circuit .

Here, the voltage command value V3* used for switching control of the third full bridge circuit 70 affects the magnitude of the current IL3 flowing through the third coil 83. FIG. Also, the amount of time change in the magnitude of the current IL3 flowing through the third coil 83 depends on the first voltage V1r, the second voltage V2r, and the third voltage V3r. In view of this point, in the present embodiment, the voltage command value V3* is set so that the magnitude of the current IL3 flowing through the third coil 83 during the control period TA is gradually increased based on the first voltage V1r and the second voltage V2r. is set to According to this embodiment described above, the surge voltage generated in the third full bridge circuit 70 can be suppressed.

The left side of the above equation (c4) represents the amount of change over time of the current IL3 flowing through the third coil 83, and the amount of change over time is taken as a positive value in the above equation (c4). Therefore, by setting the voltage command value V3* so as to satisfy the above equation (c4), the current IL3 flowing through the third coil 83 is accurately gradually increased during the control period TA. As a result, the current IL3 flowing through the third coil 83 at the start timing of the control period TA can be appropriately reduced. As a result, the surge voltage generated in the third full bridge circuit 70 can be suppressed appropriately.

In order to suppress the surge voltage generated in the third full bridge circuit 70, the voltage command value V3* is set based on the first voltage V1r and the second voltage V2r. Therefore, the voltage command value V3* also changes according to the first voltage V1r and the second voltage V2r, and the third voltage V3r fluctuates within a predetermined voltage range.

By the way, if the voltage supplied to the third storage battery 30 and the electric load 31 fluctuates, the charging voltage of the third storage battery 30 may become unstable, or the operation of the electric load 31 may become unstable. Therefore, in the present embodiment, the third voltage V3r is stepped down by the step-down chopper circuit 72 . In this configuration, even if the third voltage V3r fluctuates within a predetermined voltage range, the voltage supplied from the step-down chopper circuit 72 to the third storage battery 30 and the electric load 31 is maintained at the target voltage. Therefore, the voltage supplied to the 3rd storage battery 30 and the electric load 31 can be stabilized. As a result, it is possible to prevent the charging voltage of the third storage battery 30 from becoming unstable and the operation of the electric load 31 from becoming unstable.

The number of turns N3 of the third coil 83 is smaller than the number of turns N1 of the first coil 81 and the number of turns N2 of the second coil . In this configuration, since the inductance of the third coil 83 is smaller than the inductance of the first coil 81 and the inductance of the second coil 82, the current IL3 flowing through the third coil 83 is equal to the current IL1 flowing through the first coil 81 and It becomes larger than the current IL2 flowing through the second coil 82 . As a result, the surge voltage generated in the third full bridge circuit 70 may increase. Therefore, there is a great advantage in using a configuration that gradually increases the current IL3 flowing through the third coil 83 during the control period TA.

<Second embodiment>
The second embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, as shown in FIG. 9, the method of setting the voltage command value V3* is changed.

As the voltage difference between the first voltage V1r and the third voltage V3r and the voltage difference between the second voltage V2r and the third voltage V3r increase, the current IL3 flowing through the third coil 83 increases. The generated surge voltage may increase.

Therefore, as shown in FIG. 9, the control unit 100 sets the voltage command value V3* higher as the first voltage V1r and the second voltage V2r are higher in step S14 of FIG. As a result, even when the first voltage V1r and the second voltage V2r increase, the voltage difference between the first voltage V1r and the third voltage V3r and the voltage difference between the second voltage V2r and the third voltage V3r increase. is suppressed. As a result, the current IL3 flowing through the third coil 83 is reduced, and the surge voltage generated in the third full bridge circuit 70 can be suppressed.

<Third Embodiment>
The third embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, as shown in FIG. 10, the method of setting the voltage command value V3* is changed.

As the power P2 supplied from the first full bridge circuit 50 to the third full bridge circuit 70 through the transformer 80 increases, the current IL3 flowing through the third coil 83 increases and is generated in the third full bridge circuit 70. Surge voltage may increase.

Therefore, as shown in FIG. 10, control unit 100 sets voltage command value V3* to be lower as power P2 increases in step S14 of FIG. The electric power P2 may be calculated from the product of the third current I3r and the third voltage V3r, or may be calculated from the product of the voltage command value V3* and the second command current Iref2 in the previous control cycle.

In the control period TA, the lower the voltage command value V3*, the larger the temporal variation of the current IL3 flowing through the third coil 83. Therefore, according to the present embodiment, by increasing the time change amount of the current IL3 flowing through the third coil 83 without limiting the magnitude of the power P2, the third coil 83 at the start timing of the control period TA The magnitude of the flowing current IL3 is reduced. As a result, the surge voltage generated in the third full bridge circuit 70 can be suppressed.

<Fourth Embodiment>
The fourth embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, as shown in FIG. 11, the power conversion device 40 includes a first half bridge circuit 110 instead of the first full bridge circuit 50, and a second half bridge circuit 60 instead of the second full bridge circuit 60. A bridge circuit 120 is provided. In FIG. 11, the same components as those shown in FIG. 1 are denoted by the same reference numerals for convenience. In FIG. 11, illustration of the current sensors 94 to 96 is omitted.

The first half bridge circuit 110 includes a fifth switch Q5, a sixth switch Q6, a fifth capacitor 111 and a sixth capacitor 112. In this embodiment, the fifth switch Q5 and the sixth switch Q6 are N-channel MOSFETs. A drain of the fifth switch Q5 and a first end of the fifth capacitor 111 are connected to a first high potential side terminal CH1. The drain of the sixth switch Q6 and the first end of the first coil 81 are connected to the source of the fifth switch Q5. A first end of the sixth capacitor 112 and a second end of the first coil 81 are connected to the second end of the fifth capacitor 111 . The source of the sixth switch Q6 and the second end of the sixth capacitor 112 are connected to the first low potential side terminal CL1. In this embodiment, the fifth switch Q5 corresponds to the "upper arm power transmission switch" and the sixth switch Q6 corresponds to the "lower arm power transmission switch".

The second half bridge circuit 120 includes a ninth conversion switch SW9, a tenth conversion switch SW10, a seventh capacitor 121 and an eighth capacitor 122. In this embodiment, the ninth conversion switch SW9 and the tenth conversion switch SW10 are N-channel MOSFETs. A second high potential side terminal CH2 is connected to the drain of the ninth conversion switch SW9 and the first end of the seventh capacitor 121 . The drain of the tenth conversion switch SW10 and the first end of the second coil 82 are connected to the source of the ninth conversion switch SW9. A first end of the eighth capacitor 122 and a second end of the second coil 82 are connected to the second end of the seventh capacitor 121 . A second low potential side terminal CL2 is connected to the source of the tenth conversion switch SW10 and the second end of the eighth capacitor 122 . In this embodiment, the ninth conversion switch SW9 corresponds to the "upper arm secondary power receiving switch", and the tenth conversion switch SW10 corresponds to the "lower arm secondary power receiving switch".

The fifth switch Q5 and the sixth switch Q6 are alternately turned on. The operation mode of the fifth switch Q5 and the sixth switch Q6 corresponds to the previous FIG. 3(a). Also, the ninth conversion switch SW9 and the tenth conversion switch SW10 are alternately turned on. The operation modes of the ninth conversion switch SW9 and the tenth conversion switch SW10 correspond to FIG. 3(d). When the first command phase φa is positive, the timing of turning on the fifth switch Q5 is used as a reference timing, and the timing of turning on the ninth conversion switch SW9 is changed by the first command phase φa with respect to this reference timing. You should delay. When the second command phase φb is positive, the timing of turning on the fifth switch Q5 is used as a reference timing, and the timing of turning on the fifth conversion switch SW5 is changed by the second command phase φb with respect to this reference timing. You should delay.

In this embodiment, the control unit 100 sets the voltage command value V3* so as to satisfy the following formula (c5).

以上説明した本実施形態によっても、第３フルブリッジ回路７０に発生するサージ電圧を抑制することができる。

The surge voltage generated in the third full bridge circuit 70 can also be suppressed according to the present embodiment described above.

<Fifth Embodiment>
The fifth embodiment will be described below with reference to the drawings, focusing on differences from the fourth embodiment. In this embodiment, as shown in FIG. 12 , the power conversion device 40 includes an asymmetric third half bridge circuit 130 and an asymmetric fourth half bridge circuit 140 . In FIG. 12, the same components as in FIG. 11 are denoted by the same reference numerals for convenience. 12, illustration of the current sensors 94 to 96 is omitted.

The third half bridge circuit 130 comprises a seventh switch Q7, an eighth switch Q8 and a ninth capacitor 131. In this embodiment, the seventh switch Q7 and the eighth switch Q8 are N-channel MOSFETs. A first high potential side terminal CH1 is connected to the drain of the seventh switch Q7. The drain of the eighth switch Q8 and the first end of the first coil 81 are connected to the source of the seventh switch Q7. A first end of the ninth capacitor 131 is connected to a second end of the first coil 81 . A first low potential side terminal CL1 is connected to the second end of the ninth capacitor 131 and the source of the eighth switch Q8. In this embodiment, the seventh switch Q7 corresponds to the "upper arm power transmission switch" and the eighth switch Q8 corresponds to the "lower arm power transmission switch".

The fourth half bridge circuit 140 includes an eleventh conversion switch SW11, a twelfth conversion switch SW12 and a tenth capacitor 141. In this embodiment, the eleventh conversion switch SW11 and the twelfth conversion switch SW12 are N-channel MOSFETs. A drain of the eleventh conversion switch SW11 is connected to the second high potential side terminal CH2. The drain of the twelfth conversion switch SW12 and the first end of the second coil 82 are connected to the source of the eleventh conversion switch SW11. A first end of a tenth capacitor 141 is connected to a second end of the second coil 82 . A second low potential side terminal CL2 is connected to the second end of the tenth capacitor 141 and the source of the twelfth conversion switch SW12. In this embodiment, the eleventh conversion switch SW11 corresponds to the "upper arm secondary power receiving switch", and the twelfth conversion switch SW12 corresponds to the "lower arm secondary power receiving switch".

The operation modes of the seventh switch Q7, the eighth switch Q8, the eleventh conversion switch SW11 and the twelfth conversion switch SW12 of the present embodiment are the same as those of the fifth switch Q5, the sixth switch Q6 and the ninth conversion switch SW9 of the fourth embodiment. and the tenth conversion switch SW10. Also in this embodiment, similarly to the fourth embodiment, the control unit 100 sets the voltage command value V3* so as to satisfy the above equation (c5).

<Sixth embodiment>
The sixth embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, the power converter 40 includes a fourth full bridge circuit 150, as shown in FIG. In FIG. 13, the same components as those shown in FIG. 1 are denoted by the same reference numerals for convenience. In FIG. 13, illustration of the current sensors 94 to 96 is omitted.

The fourth full bridge circuit 150 includes thirteenth to sixteenth conversion switches SW13 to SW16 and an eleventh capacitor 151. As shown in FIG. In this embodiment, the thirteenth to sixteenth conversion switches SW13 to SW16 are N-channel MOSFETs. The drains of the thirteenth conversion switch SW13 and the fifteenth conversion switch SW15 are connected to the fifth high potential side terminal CH5 of the power conversion device 40 . The drain of the 14th conversion switch SW14 is connected to the source of the 13th conversion switch SW13, and the drain of the 16th conversion switch SW16 is connected to the source of the 15th conversion switch SW15. A fifth low potential side terminal CL5 of the power converter 40 is connected to the sources of the fourteenth conversion switch SW14 and the sixteenth conversion switch SW16. The first end of the eleventh capacitor 151 and the positive terminal of the fourth storage battery 21 are connected to the fifth high potential side terminal CH5, and the second end of the eleventh capacitor 151 is connected to the fifth low potential side terminal CL5. and the negative terminal of the fourth storage battery 21 are connected. In this embodiment, the rated voltage of the fourth storage battery 21 is 48 V, which is lower than the rated voltage of the second storage battery 20, for example.

In this embodiment, the thirteenth conversion switch SW13 and the fifteenth conversion switch SW15 correspond to the "upper arm secondary power receiving switch", and the fourteenth conversion switch SW14 and the sixteenth conversion switch SW16 correspond to the "lower arm secondary power receiving switch". Equivalent to.

Transformer 80 further includes a fourth coil 87 . The source of the 13th conversion switch SW13 and the drain of the 14th conversion switch SW14 are connected to the first end of the fourth coil 87, and the source of the 15th conversion switch SW15 and the drain of the 14th conversion switch SW14 are connected to the second end of the fourth coil 87. The drain of the 16 conversion switch SW16 is connected. The fourth coil 87 is magnetically coupled with the first to third coils 81 to 83 via, for example, cores. When the potential of the first end of the first coil 81 with respect to the second end becomes higher, an induced voltage is generated in the fourth coil 87 such that the potential of the first end becomes higher than that of the second end.

The power conversion device 40 has a fourth voltage sensor 97 . A fourth voltage sensor 97 detects a fourth voltage V4r, which is the terminal voltage of the eleventh capacitor 151 . The detected fourth voltage V4r is input to the control section 100 . The control unit 100 turns on and off the first to fourth switches Q1 to Q4, the first to eighth, the thirteenth to sixteenth conversion switches SW1 to SW8, SW13 to SW16, the first transformation switch SC1 and the second transformation switch SC2. .

Since the fifth high potential side terminal CH5 and the fifth low potential side terminal CL5 are connected to the fourth storage battery 21, the fourth voltage V4r, which is the terminal voltage of the eleventh capacitor 151, is set to higher than 0V. Therefore, the condition for making the amount of change with time of the current IL3 flowing through the third coil 83 positive in the control period TA is the following formula (c6).

ここで、Ｎ４は第４コイル８７の巻き数を表し、Ｌ３４は第３コイル８３及び第４コイル８７間の相互インダクタンスを表す。第４コイル８７の巻き数Ｎ４は、第３コイル８３の巻き数Ｎ３よりも大きい。制御部１００は上式（ｃ６）を満たすように電圧指令値Ｖ３＊を設定する。

Here, N4 represents the number of turns of the fourth coil 87, and L34 represents the mutual inductance between the third coil 83 and the fourth coil 87. The number of turns N4 of the fourth coil 87 is greater than the number of turns N3 of the third coil 83 . Control unit 100 sets voltage command value V3* so as to satisfy the above equation (c6).

<Other embodiments>
- The power conversion device 40 may include, for example, a step-up/step-down chopper circuit instead of the step-down chopper circuit 72 .

- In 6th Embodiment, as shown in FIG. 14, it replaces with the 4th storage battery 21 and the power supply system may be equipped with the resistive load 152. FIG. The resistive load 152 is a heater that has a resistor and utilizes heat generated by energizing the resistor. The resistive load 152 is an electric device that does not have a voltage higher than 0 V before the power conversion device 40 is started, such as a storage battery. In this case, since resistive load 152 does not serve as a power supply source, control unit 100 may set voltage command value V3* so as to satisfy the above equation (c4).

- Instead of the third full-bridge circuit 70, a half-bridge circuit and an asymmetrical half-bridge circuit may be provided. As the half bridge circuit, for example, a configuration corresponding to the second half bridge circuit 120 described in the fourth embodiment may be used. Also, as the asymmetric half bridge circuit, for example, the fourth half bridge circuit 140 described in the fifth embodiment may be used. If a configuration corresponding to the second half bridge circuit 120 is used instead of the third full bridge circuit 70, the second command phase φb may be defined as follows. That is, when the second command phase φb is positive, the switching timing of the first switch Q1 to ON is used as the reference timing, and the switch corresponding to the ninth conversion switch SW9 is turned on by the second command phase φb with respect to this reference timing. It is sufficient to delay the switching timing to ON.

- The controller and techniques described in this disclosure can be performed by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program; may be implemented. Alternatively, the controls and techniques described in this disclosure may be implemented by a dedicated computer provided by configuring the processor with one or more dedicated hardware logic circuits. Alternatively, the control units and techniques described in this disclosure can be implemented by a combination of a processor and memory programmed to perform one or more functions and a processor configured by one or more hardware logic circuits. It may also be implemented by one or more dedicated computers configured. The computer program may also be stored as computer-executable instructions on a computer-readable non-transitional tangible recording medium.

CH1 to CH3: first to third high potential side terminals, CL1 to CL3: first to third low potential side terminals, 50: first full bridge circuit, 60: second full bridge circuit, 70: third full bridge circuit, 80...transformer, 81 to 83...first to third coils, 100...control unit.

Claims (7)

Power transmitting terminals (CH1, CL1), sub power receiving terminals (CH2, CL2, CH5, CL5), main power receiving terminals (CH3, CL3), and a transformer (80), the sub power receiving terminal from the power transmitting terminals via the transformer. and in a power conversion device (40) that supplies power to the main power receiving terminal,
The transformer has a power transmitting coil (81), sub power receiving coils (82, 87) and a main power receiving coil (83) that are magnetically coupled to each other,
a power transmission circuit (50, 110, 130) connecting the power transmission coil and the power transmission terminal;
a sub power receiving circuit (60, 120, 140, 150) connecting the sub power receiving coil and the sub power receiving terminal;
a main power receiving circuit (70) connecting the main power receiving coil and the main power receiving terminal;
Switching control of the power transmission circuit is performed so that the DC voltage input from the power transmission terminal is converted into an AC voltage and supplied to the power transmission coil, and the AC voltage output from the sub power receiving coil is converted into a DC voltage and the switching control of the secondary power receiving circuit to supply power to the secondary power receiving terminal, conversion of the AC voltage output from the main power receiving coil to DC voltage, and switching control of the main power receiving circuit to supply the DC voltage to the main power receiving terminal; A control unit (100) that performs
The control unit
performing switching control of the main power receiving circuit in order to control the voltage of the main power receiving terminal to a voltage command value;
A current that flows through the main power receiving terminal during a period from when the voltage polarity of the main power receiving coil is switched from the first polarity to the second polarity until the voltage polarity of the power transmitting coil is switched from the second polarity to the first polarity. A power converter that sets the voltage command value based on the voltage of the power transmission terminal and the voltage of the sub power reception terminal so as to gradually increase in magnitude. The power converter according to claim 1, wherein the control unit sets the voltage command value higher as the voltage of the power transmission terminal and the voltage of the sub power reception terminal are higher. The power converter according to claim 1 or 2, wherein the controller sets the voltage command value lower as the power supplied from the power transmission terminal to the main power reception terminal increases. Let N1 be the number of turns of the power transmitting coil, N2 be the number of turns of the sub power receiving coil, N3 be the number of turns of the main power receiving coil, V1r be the voltage of the power transmitting terminal, and V2r be the voltage of the sub power receiving terminal. , where the voltage command value is V3*, the mutual inductance between the power transmitting coil and the main power receiving coil is L13, and the mutual inductance between the sub power receiving coil and the main power receiving coil is L23, the control unit The power converter according to any one of claims 1 to 3, wherein the voltage command value is set to a value that satisfies the following formula (b1).

The power converter according to any one of claims 1 to 4, further comprising a DCDC converter connected to the main power receiving terminal for stepping down and outputting a voltage of the main power receiving terminal. The power converter according to any one of claims 1 to 5, wherein the number of turns of the main power receiving coil is smaller than the number of turns of the power transmitting coil and the number of turns of the sub power receiving coil. The power transmission circuit is a bridge circuit having a series connection of upper arm power transmission switches (Q1, Q3, Q5, Q7) and lower arm power transmission switches (Q2, Q4, Q6, Q8),
The sub power receiving circuit is a bridge having a series connection of upper arm sub power receiving switches (SW1, SW3, SW9, SW11, SW13, SW15) and lower arm sub power receiving switches (SW2, SW4, SW10, SW12, SW14, SW16). is a circuit,
the main power receiving circuit is a bridge circuit having a series connection of upper arm main power receiving switches (SW5, SW7) and lower arm main power receiving switches (SW6, SW8);
The control unit performs switching control to alternately turn on the upper arm power transmission switch and the lower arm power transmission switch, performs switching control to alternately turn on the upper arm secondary power receiving switch and the lower arm secondary power receiving switch, and The power converter according to any one of claims 1 to 6, wherein switching control is performed to alternately turn on the upper arm main power receiving switch and the lower arm main power receiving switch.

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