JP7272253B2 - Power converter controller - Google Patents

Description

The present invention relates to a control device for a power conversion device.

Conventionally, while improving the power factor of the input AC power, a conversion unit that converts the input AC power to DC power, a DC link capacitor connected to the output side of the conversion unit, and a DC link capacitor on the input side , and a DCDC converter that transforms and outputs an input DC voltage is known. In this device, the voltage across the terminals of the DC link capacitor fluctuates by driving the conversion section and the DCDC converter.

As the DC link capacitor ages, the capacitance of the DC link capacitor decreases. In this case, when the conversion unit and the DCDC converter are driven, the amount of variation in the inter-terminal voltage of the DC link capacitor increases. As a result, the amount of heat generated in the DC link capacitor increases, and there is a concern that the DC link capacitor will fail. Therefore, as can be seen in Japanese Unexamined Patent Application Publication No. 2002-100000, there is also known a technique for determining deterioration of a DC link capacitor over time.

JP 2012-60814 A

In addition to the deterioration of the DC link capacitor over time, the capacitance of the DC link capacitor also decreases during cold weather when the temperature of the DC link capacitor becomes excessively low. As the capacitance decreases, the amount of variation in the voltage across the DC link capacitor increases as described above. As a result, there is concern that the voltage across the terminals of the DC link capacitor may exceed its allowable upper limit value (breakdown voltage), or a rush current may flow through the DC link capacitor.

Therefore, it is conceivable to use a DC link capacitor with a large initial capacitance in preparation for a situation in which the capacitance decreases. However, in this case, the size of the DC link capacitor is increased.

SUMMARY OF THE INVENTION The main object of the present invention is to provide a control device for a power converter that can reduce the amount of fluctuation in the voltage across the terminals of the DC link capacitor while avoiding an increase in the size of the DC link capacitor.

The present invention provides a conversion unit that converts input AC power to DC power while improving the power factor of the input AC power;
a DC link capacitor connected to the output side of the conversion unit;
A control device for a power conversion device applied to a power conversion device including a DCDC converter connected to the input side of the DC link capacitor and for transforming and outputting an input DC voltage,
an operation unit that operates the DCDC converter to control the output power of the DCDC converter to a target output power;
a limit value calculation unit that calculates a limit output power that reduces the target output power when it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value,
The operation unit operates the DCDC converter to control the output power of the DCDC converter to the limit output power when it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value.

In the present invention, the operation unit operates the DCDC converter to control the output power of the DCDC converter to the target output power.

When the capacitance of the DC link capacitor decreases over time or when the DC link capacitor is cold, the fluctuation amount of the voltage across the terminals of the DC link capacitor increases. Here, the output power of the DCDC converter and the variation amount have a positive correlation. In view of this point, the limit value calculation unit of the present invention determines that the capacitance of the DC link capacitor is reduced when it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value. Then, the limit output power is calculated by lowering the target output power. Then, the operation unit operates the DCDC converter to control the output power of the DCDC converter to the limit output power instead of the target output power. As a result, it is possible to reduce the amount of variation in the voltage across the terminals of the DC link capacitor while avoiding an increase in the size of the DC link capacitor. As a result, it is possible to prevent the voltage across the terminals of the DC link capacitor from exceeding its withstand voltage, and prevent a rush current from flowing through the DC link capacitor.

1 is an overall configuration diagram of an ACDC converter according to a first embodiment; FIG. FIG. 3 is a functional block diagram showing processing of a microcomputer; The time chart which shows transition of a link voltage. 4 is a flowchart showing a processing procedure of a microcomputer; 4 is a time chart showing changes in limited output power and the like when the DC link capacitor has not deteriorated; 4 is a time chart showing transitions of limited output power and the like when deterioration occurs in a DC link capacitor; 6 is a time chart showing transitions of limited output power and the like according to the second embodiment; The figure which shows the structure of the input side of the ACDC converter which concerns on other embodiment. The figure which shows the structure of the input side of the ACDC converter which concerns on other embodiment. The figure which shows the structure of the output side of the ACDC converter which concerns on other embodiment.

<First embodiment>
Hereinafter, a first embodiment embodying a control device according to the present invention will be described with reference to the drawings. The control device according to this embodiment is applied to, for example, an ACDC converter that constitutes an on-vehicle charger.

As shown in FIG. 1 , the ACDC converter 10 includes a noise removal filter 11 , a first capacitor 12 , and an input side rectifier circuit 13 . An external AC power supply 100 is connected to the first high potential side terminal TH1 and the first low potential side terminal TL1 of the ACDC converter 10 . An input side rectifier circuit 13 is connected to each of the terminals TH1 and TL1 via a filter 11 and a first capacitor 12 .

The input side rectifier circuit 13 includes first to fourth input side diodes 13a to 13d. The cathode of the second input diode 13b and the first end of the first capacitor 12 are connected to the anode of the first input diode 13a. The cathode of the fourth input diode 13d and the second end of the first capacitor 12 are connected to the anode of the third input diode 13c.

The ACDC converter 10 includes a boost chopper circuit 20 and a DCDC converter 30 . The boost chopper circuit 20 functions as a power factor correction circuit and includes a reactor 21 , a switch 22 , a diode 23 and a DC link capacitor 24 . In this embodiment, an N-channel MOSFET is used as the switch 22 and an electrolytic capacitor is used as the DC link capacitor 24 . Cathodes of the first and third input diodes 13a and 13c are connected to the first end of the reactor 21 . A second end of the reactor 21 is connected to the drain of the switch 22 and the anode of the diode 23 . A first end of a DC link capacitor 24 is connected to the cathode of the diode 23 . A second end of the DC link capacitor 24 is connected to the source of the switch 22 and the anodes of the second and fourth input diodes 13b and 13d. Incidentally, the DC link capacitor 24 may be arranged outside the boost chopper circuit 20 . Further, in the present embodiment, the input-side rectifier circuit 13 and the boost chopper circuit 20 correspond to the "conversion section".

The DCDC converter 30 includes a full bridge circuit 31 , a transformer 32 , a rectifier circuit 33 , a reactor 34 and a second capacitor 35 . The full bridge circuit 31 has first to fourth conversion switches 31a to 31d. In this embodiment, N-channel MOSFETs are used as the conversion switches 31a to 31d.

A first end of the DC link capacitor 24 is connected to the drain of each of the first conversion switch 31a and the third conversion switch 31c. A second end of the DC link capacitor 24 is connected to each source of the second conversion switch 31b and the fourth conversion switch 31d. A first end of a first coil 32a constituting a transformer 32 is connected to the source of the first conversion switch 31a and the drain of the second conversion switch 31b. The source of the third conversion switch 31c and the drain of the fourth conversion switch 31d are connected to the second end of the first coil 32a.

The rectifier circuit 33 has first to fourth diodes 33a to 33d. A first end of a second coil 32b that constitutes the transformer 32 is connected to the anode of the first diode 33a and the cathode of the second diode 33b. The second coil 32b is magnetically coupled to the first coil 32a via a core that constitutes the transformer 32, for example. The anode of the second diode 33b and the cathode of the fourth diode 33d are connected to the second end of the second coil 32b.

A cathode of each of the first diode 33a and the third diode 33c is connected to the second high-potential side terminal TH2 of the ACDC converter 10 via the reactor . A second low potential side terminal TL2 of the ACDC converter 10 is connected to the respective anodes of the second diode 33b and the fourth diode 33d. A second capacitor 35 connects the second high potential side terminal TH2 and the second low potential side terminal TL2. A positive terminal of the power storage device 110 is connected to the second high potential side terminal TH2, and a negative terminal of the power storage device 110 is connected to the second low potential side terminal TL2. In this embodiment, the power storage device 110 is a storage battery such as a nickel-metal hydride storage battery or a lithium-ion storage battery.

ACDC converter 10 includes input voltage sensor 40 , input current sensor 41 , intermediate voltage sensor 42 , output voltage sensor 43 and output current sensor 44 . The input voltage sensor 40 detects the inter-terminal voltage of the first capacitor 12 as an AC input voltage Vac output from the AC power supply 100 . Input current sensor 41 detects input current Iac, which is the current flowing through boost chopper circuit 20 . The intermediate voltage sensor 42 detects the voltage across the terminals of the DC link capacitor 24 as the link voltage Vdclink. The output voltage sensor 43 detects the terminal voltage of the second capacitor 35 as the output voltage Vor of the DCDC converter 30 . Output current sensor 44 detects output current Ior of DCDC converter 30 . Detected values of the sensors 40 to 41 are input to a microcomputer 50 (corresponding to a “controller”) provided in the ACDC converter 10 .

The microcomputer 50 turns on and off the switch 22 based on the detected values of the input voltage sensor 40 and the input current sensor 41 to perform power factor improvement operation. Further, the microcomputer 50 feedback-controls the output power Por of the DCDC converter 30 to the target output power Pr* by turning on/off the first to fourth conversion switches 31a to 31d. The functions provided by the microcomputer 50 can be provided by, for example, software recorded in a physical memory device, a computer executing the software, hardware, or a combination thereof.

FIG. 2 shows a functional block diagram of the feedback control executed by the microcomputer 50. As shown in FIG.

The microcomputer 50 includes a target current calculator 51 , a deviation calculator 52 and a feedback controller 53 . The target current calculator 51 divides the target output power Pr* by the output voltage Vor detected by the output voltage sensor 43 to calculate the target output current Io*, which is the target value of the output current of the DCDC converter 30. . Deviation calculator 52 calculates current deviation ΔI by subtracting output current Ior detected by output current sensor 44 from target output current Io*.

The feedback control unit 53 calculates a duty ratio Duty as an operation amount for feedback-controlling the calculated current deviation ΔI to zero. As the feedback control in the feedback control section 53, proportional integral control may be used, for example. The duty ratio Duty defines the ratio (=Ton/Tsw) of the ON period Ton to the switching cycle Tsw of each of the conversion switches 31a to 31d. Based on the calculated duty ratio Duty, the set of the first and third conversion switches 31a and 31c and the set of the second and fourth conversion switches 31b and 31d are alternately turned on.

By the way, when the DC link capacitor 24 deteriorates with time or when the ambient temperature of the ACDC converter 10 is low, the capacitance of the DC link capacitor 24 decreases. In this case, the amount of periodic variation in the link voltage Vdclink increases. As a result, the maximum value of the link voltage Vdclink may exceed the allowable upper limit value Vmaxlim (breakdown voltage) of the voltage across the terminals of the DC link capacitor 24 . The maximum value of the link voltage Vdclink is indicated by Vdcmax in FIG. 3(b), and the minimum value of the link voltage Vdclink is indicated by Vdcmin in FIG. 3(b).

Moreover, when the capacitance decreases, the minimum value of the link voltage Vdclink may fall below the allowable lower limit value Vminlim of the voltage across the terminals of the DC link capacitor 24 . In this case, if the voltage between the terminals of the DC link capacitor 24 is even slightly lower than the output voltage of the AC power supply 100, the path electrically connecting the DC link capacitor 24 and the AC power supply 100 has a low impedance. An inrush current may flow from the power supply 100 to the DC link capacitor 24 . Note that the allowable lower limit value Vminlim is, for example, the upper limit value of the range that the output voltage of the AC power supply 100 can take, or a value larger than this upper limit value, and the DC link capacitor 24 and the AC power supply 100 are electrically connected. Among the plurality of elements such as the diode 23 existing in the path to which the current flows, the current flowing through the element with the smallest allowable upper limit current is set to a value that does not exceed the allowable upper limit current of the element.

In order to avoid such problems, it is conceivable to use a DC link capacitor with a large initial capacitance. However, in this case, the size of the DC link capacitor is increased, which in turn increases the size of the ACDC converter.

Therefore, when the microcomputer 50 determines that the maximum value of the link voltage Vdclink has exceeded the allowable upper limit value Vmaxlim, it calculates the limit output power Po* by lowering the target output power Pr*. The calculated limit output power Po* is used instead of the target output power Pr* in FIG. As a result, the link voltage Vdclink changes from the state shown in FIG. 3(a) to the state shown in FIG. 3(b).

Further, the microcomputer 50 increases the limit output power Po* from its initial value toward the target output power Pr* over time. As a result, after the temperature of the DC link capacitor 24 rises, as shown in FIG. Increase output power. This process will be described below with reference to FIG.

In step S10, the detected output voltage Vor, output current Ior and link voltage Vdclink are obtained.

In step S11, it is determined whether or not the acquired maximum value of the link voltage Vdclink exceeds the allowable upper limit value Vmaxlim.

If it is determined in step S11 that it has exceeded, the process proceeds to step S12, multiplies the obtained output voltage Vor by the output current Ior, and subtracts the first predetermined power Pdown (>0) from the multiplied value to obtain the limited output Power Po* is calculated.

In step S13, a second predetermined power Pup (>0) is added to the previously calculated limit output power Po*(t−1) at a timing after a predetermined period of time has elapsed since the calculation of the limit output power Po* in step S12 was completed. The limit output power Po*(t) is updated by adding

In subsequent step S14, the detected output voltage Vor, output current Ior and link voltage Vdclink are acquired. Then, in step S15, it is determined whether or not the acquired maximum value of the link voltage Vdclink exceeds the allowable upper limit value Vmaxlim.

When it is determined in step S15 that the maximum value of the link voltage Vdclink is equal to or less than the allowable upper limit value Vmaxlim, the process proceeds to step S16. In step S16, it is determined whether or not the limit output power Po*(t) updated in step S13 has reached the target output power Pr*. If it is determined in step S16 that the distance has not been reached, the process proceeds to step S13.

On the other hand, if it is determined in step S16 that it has reached, the process proceeds to step S10. If a negative determination is made in subsequent step S11, the process proceeds to step S17 to determine whether flag F is 0 or not. In this embodiment, the initial value of the flag F is set to 0.

If it is determined in step S17 that the flag F is 0, the process proceeds to step S18, and the process of FIG. 2 is performed using the target output power Pr* instead of the limit output power Po*(t).

On the other hand, after the limit output power Po*(t) is updated in step S13, if the determination in step S15 is affirmative, the process proceeds to step S19, where the previously calculated limit output power Po*(t−1) is changed to the second By subtracting the predetermined power Pup, the limit output power Po*(t) is updated. This update reduces the limited output power Po*(t). Also, the flag F is set to 1.

After completing the process of step S19, the process proceeds to step S11 via step S10. If a negative determination is made in step S11, the process proceeds to step S17. When it is determined in step S17 that the flag F is 1, the process proceeds to step S20, and the limit output power Po*(t) is maintained at the previously calculated limit output power Po*(t-1).

The processing of the microcomputer 50 in the cold state when the DC link capacitor 24 has not deteriorated over time will be described with reference to FIG. FIG. 5(a) shows transition of the charging mode of the ACDC converter 10, and FIG. 5(b) shows transition of the capacitance of the DC link capacitor 24. As shown in FIG. FIG. 5(c) shows changes in the target output power Pr* and the limit output power Po*, and FIG. 5(d) shows changes in the maximum value of the link voltage Vdclink.

By setting the soft start mode as the charging mode, the target output power Pr* starts to gradually increase from zero. After that, it is determined that the maximum value of the link voltage Vdclink has exceeded the allowable upper limit value Vmaxlim at time t1 before the target output power Pr* has completely increased. Therefore, the initial value of the limit output power Po* is calculated as "Vor×Ior−Pdown".

After that, at time t2 when a predetermined period has passed since the initial value of the limit output power Po* was calculated, the second predetermined power Pup is added to the previously calculated limit output power Po*(t−1), The limit output power Po*(t) is updated. After that, the link voltage Vdclink
does not exceed the allowable upper limit value Vmaxlim, at time t3, the second predetermined power Pup is added to the previously calculated limit output power Po*(t−1), whereby The output power Po*(t) is updated again.

After that, it is determined that the maximum value of the link voltage Vdclink does not exceed the allowable upper limit value Vmaxlim. , the limit output power Po*(t) is further updated. Then, since it is determined that the updated limit output power Po*(t) has reached the target output power Pr*, the normal mode is set as the charging mode, and instead of the limit output power Po*, the target output power Pr * is used. Thus, in the present embodiment, the output power of the DCDC converter 30 is increased step by step until the temperature of the DC link capacitor 24 reaches a temperature at which the capacitance can be increased.

Next, the processing of the microcomputer 50 in the cold state when the DC link capacitor 24 has deteriorated over time will be described with reference to FIG. FIGS. 6(a) to (d) correspond to FIGS. 5(a) to (d). In FIG. 6A, the solid line shows the transition when the DC link capacitor 24 deteriorates over time, and the broken line shows the transition when there is no deterioration over time.

In FIG. 6, the same processing as the processing up to time t3 in FIG. 5 is performed until time t3. Thereafter, at time t4, second predetermined power Pup is added to previously calculated limit output power Po*(t−1), thereby further updating limit output power Po*(t). After the update, it is determined that the maximum value of the link voltage Vdclink has exceeded the allowable upper limit value Vmaxlim. Therefore, at time t5, the limit output power Po*(t) is updated by subtracting the second predetermined power Pup from the previously calculated limit output power Po*(t−1), and the flag F is set to 1. be. Since the flag F is set to 1, the limit output power Po* updated at time t5 is continuously used thereafter. As a result, the output power of the DCDC converter 30 is controlled to a value lower than the target output power Pr*.

According to this embodiment detailed above, the following effects can be obtained.

When the microcomputer 50 determines that the maximum value of the link voltage Vdclink has exceeded the allowable upper limit value Vmaxlim, the microcomputer 50 calculates the limit output power Po* by lowering the target output power Pr*. Then, the microcomputer 50 controls the output power of the DCDC converter 30 to the limit output power Po* instead of the target output power Pr*. As a result, it is possible to reduce the fluctuation amount of the link voltage Vdclink while avoiding an increase in the size of the DC link capacitor 24 . As a result, it is possible to prevent the link voltage Vdclink from exceeding the allowable upper limit value Vmaxlim and prevent a rush current from flowing through the DC link capacitor 24 .

After a certain amount of time has passed since the DCDC converter 30 started to output power, the temperature of the DC link capacitor 24 rises and the capacitance of the DC link capacitor 24 increases. In this case, even if the output power of the DCDC converter 30 is increased, there is no possibility that the maximum value of the link voltage Vdclink will exceed the allowable upper limit value Vmaxlim or the minimum value of the link voltage Vdclink will fall below the allowable lower limit value Vminlim. be done. Therefore, the microcomputer 50 increases the limit output power Po* from the initial value toward the target output power Pr* by the second predetermined power Pup every predetermined period. As a result, it is possible to increase the output power of the DCDC converter 30 while preventing overvoltage and rush current from occurring in the DC link capacitor 24 .

After the microcomputer 50 starts controlling the output power of the DCDC converter 30 to the limit output power Po*, the maximum value of the link voltage Vdclink reaches the allowable upper limit value Vmaxlim before the limit output power Po* reaches the target output power Pr*. is exceeded, the limit output power Po* is reduced by the second predetermined power Pup. As a result, even if the DC link capacitor 24 deteriorates over time and an increase in capacitance cannot be expected, the maximum value of the link voltage Vdclink exceeds the allowable upper limit value Vmaxlim or the minimum value of the link voltage Vdclink exceeds the allowable limit. It is possible to avoid falling below the lower limit value Vminlim.

<Modified Example of First Embodiment>
The variation amount of the link voltage Vdclink, the output power of the DCDC converter 30, and the capacitance of the DC link capacitor 24 are correlated. In view of this point, in step S12 of FIG. 4, the capacitance C of the DC link capacitor 24 is estimated based on the fluctuation amount of the link voltage Vdclink and the output power of the DCDC converter 30, and the estimated capacitance C is large, the first predetermined power Pdown may be made smaller than when the estimated capacitance C is small. Specifically, the larger the estimated capacitance C is, the smaller the first predetermined power Pdown may be. As a result, the larger the estimated capacitance C is, the larger the initial value of the limit output power Po* becomes. can be brought closer to

The amount of variation in the link voltage Vdclink used for estimating the capacitance C is, for example, a value obtained by subtracting the minimum value Vdcmin from the maximum value Vdcmax of the link voltage Vdclink, or a value half of that value (that is, the link voltage Vdclink amplitude). Also, the output power of the DCDC converter 30 used for estimating the capacitance C may be, for example, "Vor×Ior" or the limit output power Po*.

- The process of steps S11 and S15 in FIG. 4 may be changed to a process of determining whether or not the minimum value of the link voltage Vdclink is below the allowable lower limit value Vminlim. In this case, if the microcomputer 50 determines that the minimum value of the link voltage Vdclink is below the allowable lower limit value Vminlim, it proceeds to steps S12 and S19. Then, the process proceeds to steps S17 and S16.

- The processing of steps S11 and S15 in FIG. 4 may be changed to the processing of determining whether or not the fluctuation amount of the link voltage Vdclink exceeds the allowable upper limit fluctuation amount ΔVmax. In this case, if the microcomputer 50 determines that the amount of variation in the link voltage Vdclink has exceeded the allowable upper limit variation ΔVmax, it proceeds to steps S12 and S19, and determines that the amount of variation in the link voltage Vdclink does not exceed the allowable upper limit variation ΔVmax. If so, the process proceeds to steps S17 and S16.

The amount of variation may be, for example, a value obtained by subtracting the minimum value Vdcmin from the maximum value Vdcmax of the link voltage Vdclink. In this case, the allowable upper limit fluctuation amount ΔVmax may be, for example, a value obtained by subtracting the allowable lower limit value Vminlim from the allowable upper limit value Vmaxlim.

Further, the amount of variation may be, for example, half the value obtained by subtracting the minimum value Vdcmin from the maximum value Vdcmax of the link voltage Vdclink. In this case, the allowable upper limit fluctuation amount ΔVmax may be, for example, half the value obtained by subtracting the allowable lower limit value Vminlim from the allowable upper limit value Vmaxlim.

<Second embodiment>
The second embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment.

As shown in FIG. 7, the microcomputer 50 may gradually increase the limit output power Po* from its initial value (value at time t1) toward the target output power Pr*. In this case, when the output power of the DCDC converter 30 is large, the microcomputer 50 may increase the gradual increase speed of the limited output power Po* more than when the output power is small. Specifically, the microcomputer 50 may increase the gradual increase speed of the limit output power Po* as the output power of the DCDC converter 30 increases. As a result, it is possible to bring the output power of the DCDC converter 30 closer to the target output power Pr* as quickly as possible while avoiding the occurrence of an inrush current or the like.

<Other embodiments>
It should be noted that each of the above-described embodiments may be modified as follows.

・As a circuit on the input side of the ACDC converter, for example, as shown in FIG. 60 (corresponding to a "converter"). In FIG. 8, the same components as those shown in FIG. 1 are denoted by the same reference numerals for convenience.

Further, as a circuit on the input side of the ACDC converter, for example, as shown in FIG. . . 73d (corresponding to the “converter”).

- In the DCDC converter 30 shown in FIG. 1, the rectifier circuit 33 may be replaced with a full-bridge circuit. In this case, the DCDC converter 30 is of the DAC type.

Further, as the DCDC converter 30, for example, as shown in FIG. A push-pull type DCDC converter 80 including a second transformer 83 having 83a and 83b, first and second diodes 84a and 84b, a reactor 85 and a capacitor 86 may be used.

10...ACDC converter, 20...Boost chopper circuit, 24...DC link capacitor, 30...DCDC converter, 50...Microcomputer.

Claims (8)

a conversion unit (13, 20, 60, 70) that converts the input AC power into DC power while improving the power factor of the input AC power;
a DC link capacitor (24) connected to the output side of the converter;
A power conversion device control device ( 50),
an operation unit for operating the DCDC converter to control the output power of the DCDC converter to a target output power (Pr*);
a limit value calculation unit that calculates a limit output power (Po*) that reduces the target output power when it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value,
When it is determined that the voltage across the terminals of the DC link capacitor straddles the allowable value, the operation unit operates the DCDC converter to control the output power of the DCDC converter to the limit output power ,
The limit value calculator,
performing an increasing process for gradually increasing the limit output power from its initial value toward the target output power;
A control device for a power conversion device that increases the gradual increase speed of the limited output power when the output power of the DCDC converter is large compared to when the output power is small. a conversion unit (13, 20, 60, 70) that converts the input AC power into DC power while improving the power factor of the input AC power;
a DC link capacitor (24) connected to the output side of the converter;
A power conversion device control device ( 50),
an operation unit for operating the DCDC converter to control the output power of the DCDC converter to a target output power (Pr*);
a limit value calculation unit that calculates a limit output power (Po*) that reduces the target output power when it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value,
When it is determined that the voltage across the terminals of the DC link capacitor straddles the allowable value, the operation unit operates the DCDC converter to control the output power of the DCDC converter to the limit output power ,
The limit value calculator,
performing an increasing process for increasing the limit output power from its initial value toward the target output power over time;
estimating the capacitance (C) of the DC link capacitor based on the voltage between the terminals of the DC link capacitor and the output power of the DCDC converter; and if the estimated capacitance is large, the estimated capacitance A control device for a power converter that makes the initial value larger than when is small . a conversion unit (13, 20, 60, 70) that converts the input AC power into DC power while improving the power factor of the input AC power;
a DC link capacitor (24) connected to the output side of the converter;
A power conversion device control device ( 50),
an operation unit for operating the DCDC converter to control the output power of the DCDC converter to a target output power (Pr*);
a limit value calculation unit that calculates a limit output power (Po*) that reduces the target output power when it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value,
When it is determined that the voltage across the terminals of the DC link capacitor straddles the allowable value, the operation unit operates the DCDC converter to control the output power of the DCDC converter to the limit output power ,
The limit value calculator,
performing an increasing process for increasing the limit output power from its initial value toward the target output power over time;
After starting to control the output power of the DCDC converter to the limit output power, it is determined that the voltage across the terminals of the DC link capacitor straddles the allowable value before the limit output power reaches the target output power. a control device for a power conversion device that again lowers the limited output power in this case . 4. The limit value calculator according to claim 2 or 3 , wherein, as the increase processing, the limit output power is increased by a predetermined power (Pup) every predetermined period from the initial value toward the target output power. A controller for the described power converter. The allowable value is an allowable upper limit value (Vmaxlim) of the voltage between the terminals of the DC link capacitor,
The case where it is determined that the voltage between the terminals of the DC link capacitor straddles the allowable value is a case where it is determined that the maximum value of the voltage between the terminals of the DC link capacitor exceeds the allowable upper limit value. 5. A control device for a power conversion device according to any one of 1 to 4 . The allowable value is an allowable lower limit value (Vminlim) of the voltage between the terminals of the DC link capacitor,
The case where it is determined that the voltage across the terminals of the DC link capacitor straddles the allowable value is a case where it is determined that the minimum value of the voltage across the terminals of the DC link capacitor is below the allowable lower limit value. 5. A control device for a power conversion device according to any one of 1 to 4 . The allowable value is an allowable upper limit value for the amount of variation in the inter-terminal voltage of the DC link capacitor,
The case where it is determined that the voltage across the terminals of the DC link capacitor straddles the allowable value is a case where it is determined that the fluctuation amount of the voltage between the terminals of the DC link capacitor exceeds the allowable upper limit value. 5. A control device for a power conversion device according to any one of 1 to 4 . a conversion unit (13, 20, 60, 70) that converts the input AC power into DC power while improving the power factor of the input AC power;
a DC link capacitor (24) connected to the output side of the converter;
A power conversion device control device ( 50),
an operation unit for operating the DCDC converter to control the output power of the DCDC converter to a target output power (Pr*);
When it is determined that the fluctuation amount of the voltage between the terminals of the DC link capacitor exceeds the allowable upper limit value of the fluctuation amount of the voltage between the terminals of the DC link capacitor, the limit output power (Po* ) and a limit value calculation unit that calculates
The operation unit controls the DCDC converter to control the output power of the DCDC converter to the limit output power when it is determined that the fluctuation amount of the voltage between the terminals of the DC link capacitor exceeds the allowable upper limit value. A controller for the power converter to operate.

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