JP7271363B2 - Standard radio wave distribution device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a technique for distributing radio waves simulating standard radio waves used for automatic correction of radio clocks and the like.

A standard radio wave is a radio wave transmitted by a government agency or the like as a national or international standard for standard time and frequency. A time code that expresses information about time in a predetermined format is transmitted by standard radio waves, and devices such as radio clocks (hereinafter simply referred to as radio clocks) have the function of receiving standard radio waves and adjusting the time. are doing.

In order to maintain the accuracy of the time of the radio-controlled timepiece, it is preferable to periodically adjust the time. In this respect, the installation location of the radio-controlled timepiece must be in an environment where the standard radio wave can be stably received. However, the environment in which the user uses the radio-controlled timepiece is not necessarily an environment suitable for receiving the standard radio wave.

Therefore, there has been proposed a device that enables the time adjustment function of a radio clock even in places where the standard radio wave does not reach properly from the transmitting station by transmitting a radio wave corresponding to the standard radio wave. In Patent Document 1 below, a long-wave standard radio wave signal received from a transmitting station is modulated to be in the VHF band or UHF band, multiplexed with a TV signal, and transmitted through a cable laid in a building. , a device that demodulates the standard radio wave signal of the original band at the transmission destination and radiates it from an antenna.

Japanese Patent No. 5329253

When a standard radio wave signal is superimposed on other signals and transmitted over a cable, processing and circuits for multiplexing and demodulation are required, which complicates signal processing and increases circuit size. , which can increase the cost and power consumption of the device. In addition, the transmission module that demodulates and radiates the standard radio wave signal transmitted by the cable is basically regulated to weak intensity of the radio wave output, so that it can be installed in a plurality of places in a large building or the like. Since their installation locations can vary, it is advantageous for the transmitter module to be discreetly small and not require connection to a mains power outlet.

The present invention has been made to solve the above problems and problems, and by simplifying the signal processing and circuit configuration, it is possible to reduce costs and power consumption, and to improve the convenience of installing a transmission module. The purpose is to provide a standard radio wave distribution device that

(1) A standard radio wave distribution device according to the present invention is a device that receives time information in a master clock module and transmits a simulated standard radio wave from a transmission module that is connected to the master clock module by a transmission line. and the master clock module generates a time code in a format used for the standard radio wave based on the time information, and sets the first voltage state in response to a high level of a pulse signal representing the time code. and generates a voltage signal in a second voltage state corresponding to the low level, and the transmission line is a pair of wires wired to transmit the voltage signal applied between the two wires. , the transmission module has a pair of input terminals connected to the transmission line and to which the voltage signal is applied, operates with the voltage between the input terminals as a power supply, and uses a standard frequency radio wave as the simulated standard radio wave. is transmitted by switching the amplitude according to the voltage state of the voltage signal.

(2) In the standard radio wave distribution device according to (1) above, the first voltage state is a voltage equal to or higher than a threshold at which the transmission module operates, and the second voltage state is a voltage less than the threshold. and the transmission module is configured to operate and transmit radio waves of the standard frequency when the voltage signal is in the first voltage state, and to stop operating when the voltage signal is in the second voltage state. can do.

(3) In the standard radio wave distribution device according to (2) above, when the first input terminal is at a higher potential than the second input terminal in the first voltage state, the transmission module transmits a radio wave whose standard frequency is a first standard frequency, and when the second input terminal is at a higher potential than the first input terminal, transmits a radio wave whose standard frequency is a second standard frequency It can be configured to

(4) In the standard radio wave distribution device according to (3) above, the transmission module includes a first oscillation circuit that generates an oscillation signal of the first standard frequency and an oscillation signal of the second standard frequency. a switching signal generating circuit for generating a switching control signal according to the level relationship between the potentials of the first input terminal and the second input terminal; and based on the switching control signal, the a switching unit for switching which of the oscillation signals input from the first oscillation circuit and the second oscillation circuit is to be output; and a transmission unit for converting the oscillation signal output from the switching unit into radio waves and transmitting the signals. And, it can be configured to have.

(5) In the standard radio wave distribution device according to (3) above, the transmission module includes an oscillation circuit that generates a multiplied oscillation signal having a common multiple of the first standard frequency and the second standard frequency; a switching signal generation circuit for generating a switching control signal according to the potential level relationship between a first input terminal and the second input terminal; a frequency conversion circuit that selects one of them and generates an oscillation signal of the selected standard frequency from the multiplied oscillation signal; a transmission unit that converts the oscillation signal output from the frequency conversion circuit into a radio wave and transmits it; can be configured to have

(6) In the standard radio wave distribution device according to (1) above, both the first and second voltage states are voltages equal to or higher than a threshold at which the transmission module operates, and the transmission module receives the input determining means for determining whether the voltage signal is in the first voltage state or the second voltage state; transmitting the radio wave of the standard frequency with a first amplitude in the first voltage state; and transmitting means for transmitting at a second amplitude that is reduced by a predetermined ratio with respect to the first amplitude in a voltage state.

(7) In the standard radio wave distribution device described in (6) above, the determining means determines whether a marker or a position marker is arranged in a predetermined format within the time code based on the change pattern of the voltage signal. A configuration is possible in which a pulse is detected and the voltage state corresponding to the pulse is determined to be the first voltage state.

(8) In the standard radio wave distribution device described in (7) above, when the first input terminal is at a higher potential than the second input terminal in the first voltage state, the transmission means , setting the standard frequency to a first standard frequency, and setting the standard frequency to a first standard frequency when the second input terminal is at a higher potential than the first input terminal in the first voltage state. It can be configured to be set to a second standard frequency.

(9) In the standard radio wave distribution device described in (3) to (5) and (8) above, the master clock module switches whether to reverse the direction of application of the voltage signal to the transmission line. A configuration having output polarity switching means may be employed.

(10) In the standard radio wave distribution device described in (1) to (9) above, the transmission module includes: a housing; a pillar erected on an inner surface of the housing; A circuit board supported apart from the inner surface of the body and a bar antenna tied to the circuit board and supported apart from the inner surface of the housing may be provided.

According to the present invention, it is possible to obtain a standard radio wave distribution device that simplifies signal processing and circuit configuration, thereby reducing costs and power consumption. A standard radio wave distribution device with improved convenience is realized.

1 is a schematic diagram showing a schematic configuration of a standard radio wave distribution device according to an embodiment of the present invention; FIG. FIG. 2 is a schematic diagram for explaining the structure of a time code used for standard radio waves in Japan; 2 is a block diagram showing a schematic configuration of a master clock module according to the first embodiment of the invention; FIG. 3 is a diagram showing a schematic circuit configuration of a transmission module according to the first embodiment of the present invention; FIG. FIG. 4 is a schematic flowchart of operations and processing of the master clock module according to the first embodiment of the present invention; FIG. 4 is a schematic signal waveform diagram of voltage signals output from the master clock module and radio waves transmitted from the transmission module according to the first embodiment of the present invention; FIG. 4 is a schematic perspective view of a transmission module in an embodiment of the invention; FIG. 10 is a diagram showing a schematic circuit configuration of a transmission module according to a second embodiment of the present invention; FIG. FIG. 10 is a flow chart explaining the general operation of the control circuit of the transmission module according to the second embodiment of the present invention; FIG. 11 is a diagram showing a schematic circuit configuration of a transmission module according to a third embodiment of the present invention; FIG. FIG. 11 is a schematic flow diagram of the operation and processing of the master clock module according to the third embodiment of the present invention; FIG. 11 is a schematic signal waveform diagram of a voltage signal output from a master clock module and radio waves transmitted from a transmission module according to a third embodiment of the present invention; FIG. 8 is a schematic flow diagram of the operation of the control circuit of the transmission module in the third embodiment of the present invention;

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments (hereinafter referred to as embodiments) of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic diagram showing a schematic configuration of a standard radio wave distribution device 1 according to an embodiment. The configuration shown in FIG. 1 is an example, and is a configuration example common to each embodiment described below.

A standard radio wave distribution device 1 includes a master clock module 2, a transmission module 4, and a transmission line 6, and has a function of distributing a radio signal corresponding to the standard radio wave to a radio clock 8 to enable time adjustment. .

The master clock module 2 and the transmission module 4 are connected by a transmission line 6 . In addition, the standard radio wave distribution device 1 can be provided with a plurality of transmission modules 4, which can be commonly connected to one master clock module 2. FIG.

The master clock module 2 receives time information from the outside of the standard radio wave distribution device 1 and transmits a voltage signal modulated based on the time information from terminals A and B to the transmission line 6 . Specifically, the master clock module 2 generates a time code in the format used for the standard radio wave based on the time information, and responds to the high level (H level) of the pulse signal representing the time code by generating the first time code. , and generates a voltage signal in a second voltage state corresponding to the low level (L level).

The transmission line 6 consists of electric wires 6a and 6b wired in a pair. A voltage signal is applied between the electric wires 6a and 6b from the master timepiece module 2, and the voltage signal is transmitted. In this embodiment, the electric wire 6a is connected to the terminal A of the master timepiece module 2, and the electric wire 6b is connected to the terminal B of the master timepiece module 2. FIG.

The transmission module 4 has a pair of input terminals P and Q connected to the transmission line 6 and applied with a voltage signal, and operates using the voltage between the input terminals as a power source. Further, the transmission module 4 generates and transmits a radio wave corresponding to the standard radio wave based on the voltage signals applied to the input terminals P and Q. Here, a radio wave corresponding to this standard radio wave is referred to as a simulated standard radio wave. In other words, the radio wave transmitted by the transmission module 4 is not the standard radio wave itself, but a simulated standard radio wave simulating the standard radio wave. Specifically, the transmission module 4 transmits a standard frequency radio wave as a simulated standard radio wave by switching the amplitude according to whether the voltage signal is in the first voltage state or the second voltage state.

In addition, the standard frequency is the frequency of the standard radio wave. In Japan, the standard radio wave transmitted from the Mount Otakadoya Standard Radio Transmitting Station in Fukushima Prefecture is 40 kHz, and the standard radio wave transmitted from the Haganeyama Standard Radio Transmitting Station in Saga Prefecture is 40 kHz. 60 kHz for radio waves.

For example, the standard radio wave distribution device 1 is used in a building, the master clock module 2 is installed in the building at a location convenient for acquiring time information from the outside, and the transmission line 6 is installed inside the building. It is laid across multiple rooms and floors. Also, a plurality of transmission modules 4 can be installed so that the radio clocks 8 installed at a plurality of locations in the building can receive the simulated standard radio waves. Although FIG. 1 shows an example in which there is only one transmission line 6, a plurality of transmission lines 6 may be extended from the master clock module 2, or the transmission line 6 may be branched. may Further, as described above, the transmission module 4 can supply power and transmit time information simply by connecting the pair of input terminals P and Q to the transmission line 6, so it is necessary to prepare a power line in addition to the transmission line. There is no Therefore, it is possible to realize the standard radio wave distribution device 1 without performing new wiring work by using the existing transmission lines such as the transmission line for in-house broadcasting and the transmission line for in-house telephone as they are. .

FIG. 2 is a schematic diagram for explaining the structure of the time code used for the standard radio wave in Japan. Specifically, FIG. 2 shows an example in which the time information is "17:25 on 92nd April, 2004, Thursday, no leap second within one month".

The time code is transmitted with a repetition of one cycle of 60 seconds (60 bits). That is, each second of a minute is assigned one bit and one pulse is output. A marker (M) and position markers (P0 to P5) are arranged in a predetermined format in the time code, and time and the like are represented by binary data stored in bit positions other than M and P0 to P5. M and P0 to P5 are represented by pulses with a width of 0.2 seconds, and "0" and "1" constituting binary data are represented by pulses with a width of 0.8 seconds and 0.5 seconds, respectively. The minimum unit of time included in binary data is "minute", and "second" information is obtained by counting pulses in one period of the time code.

In FIG. 2, the right direction of each of the upper and lower stages is the positive direction of time t. The hatched rectangle is the pulse period. The rising position of the pulse of M corresponds to the minute (0 second every minute), and the rising positions of P1 to P5 and P0 correspond to 9 seconds, 19 seconds, 29 seconds, 39 seconds, 49 seconds and 59 seconds, respectively. . Here, the state in which the pulse rises is the H level of the pulse signal, and the state in which the pulse falls is the L level. Bits corresponding to M and P0 to P5 become H level in the first 0.2 seconds of one second assigned to the bits, and become L level in the following remaining 0.8 seconds. Similarly, the bits forming the binary data are at H level for a period of 0.8 seconds or 0.5 seconds corresponding to the pulse width from the beginning of 1 second, and are at L level for the rest of the period. The standard radio wave is generated by amplitude-modulating the standard frequency carrier wave according to the H level and L level of the time code, and the amplitude at the H level is 100%, and the amplitude at the L level is 10% is defined.

Several embodiments will be described in order below. In this case, elements having functions similar to those in the previously described embodiment may be denoted by the same reference numerals, and redundant description may be omitted in later embodiments.

[First Embodiment]
FIG. 3 is a block diagram showing a schematic configuration of the master clock module 2 in the standard radio wave distribution device 1 of the first embodiment.

The master clock module 2 has receiving means 20 , time adjusting means 22 , internal clock counting means 24 , time code bit extracting means 26 , output polarity switching means 28 and pulse output means 30 .

The receiving means 20 receives time information from a time information source. As time information sources, it uses radio signals such as long-wave standard radio waves from standard radio wave transmitting stations, satellite radio waves from GPS (Global Positioning System), and signals from Internet time servers such as NTP (Network Time Protocol) servers. can do. Specifically, the receiving means 20 has an antenna or is connected to the Internet to acquire time information from these time information sources.

Based on the current time information acquired by the receiving means 20, the time adjusting means 22 adjusts the time kept by the internal clock measuring means 24 as needed. For example, the time correction means 22 corrects the timekeeping error in the internal clock timekeeping means 24 . In addition, the time adjustment means 22 corrects the delay caused by signal processing and transmission in the standard radio wave distribution device 1 from the internal clock timing means 24 to the radio wave emission of the transmission module 4, and adjusts the time set in the internal clock timing means 24. can be determined.

The internal clock timing means 24 measures the passage of time and generates time information. Specifically, the internal clock counting means 24 uses the time set by the time adjusting means 22 as a reference, measures the elapsed time from that time, and updates the time information. For example, the internal clock counting means 24 generates binary data representing the year, the day from January 1st, the day of the week, the hour, the minute, and the second as the time information.

The time code bit extraction means 26 determines the pulse width of the bit corresponding to the second in the time code for each second timed by the internal clock timing means 24 . Specifically, if the second is the timing of M, P0 to P5 in the time code, the time code bit extracting means 26 sets the pulse width to 0.2 seconds. A bit corresponding to the timing is extracted from the bit string of the binary data generated by the internal clock timing means 24, and the pulse width is set to either 0.8 seconds or 0.5 seconds according to the value.

The output polarity switching means 28 is a circuit for switching the direction of the voltage signal output from the pulse output means 30 to the transmission line 6 . Here, the direction of the voltage signal is defined by the magnitude relationship between the potentials of the terminals A and B. For example, the forward direction of the voltage signal is the state where the terminal A has a higher potential than the terminal B, and the reverse direction of the voltage signal is defined as A state in which the terminal B is at a higher potential than the terminal A is defined. For example, the user can set which direction to use, and depending on the setting, the output polarity switching means 28 applies the voltage signal to the transmission line in the forward direction or reverses it. switch between reverse direction and reverse direction. As will be described later, the direction of the voltage signal set by the output polarity switching means 28 determines which of two standard frequencies (40 kHz and 60 kHz) should be used as the frequency of the simulated standard radio wave transmitted from the transmission module 4. can be controlled.

The pulse output means 30 is a circuit that generates a pulse having a pulse width set by the time code bit extraction means 26 and outputs it from terminals A and B to the transmission line 6 as a voltage signal. Specifically, the rising timing of the pulse is the timing of the second measured by the internal clock timing means 24. The pulse starts to go high from the second, and when the time corresponding to the pulse width elapses, the pulse Falls from H level to L level.

The voltage signal output to the transmission line 6, that is, the potential difference between the terminals A and B becomes larger than the L level at the H level of the pulse. In this embodiment, when the output polarity switching means 28 sets the output of the voltage signal to the transmission line 6 in the forward direction, the terminal B is set to the ground potential and the pulse is output to the terminal A. When the output to is set in the opposite direction, a pulse is output to the terminal B with the terminal A set to the ground potential. In this embodiment, the pulse voltage is 24 volts [V]. That is, a potential difference of 24V is applied between the wires 6a and 6b of the transmission line 6 corresponding to the H level of the pulse, and the potential difference is 0V at the L level.

The pulse output means 30 controls on/off of the pulse by switch operation of a transistor or the like. Further, the pulse output means 30 is configured so as to ensure a sufficient driving capability for the transmission line 6 to be laid. That is, in an example where the pulse output means 30 outputs a pulse of 24V, basically, a voltage signal of 24V is substantially applied over the entire length of the transmission line 6 connected to the pulse output means 30 . On the other hand, when the transmission line 6 is laid longer than the driving capability of the pulse output means 30, a circuit for amplifying the voltage signal may be additionally provided in the middle of the transmission line 6. FIG.

FIG. 4 is a diagram showing a schematic circuit configuration of the transmission module 4 according to the first embodiment. The transmission module 4 includes a bridge circuit 40 , a constant voltage regulator 42 , a 40 kHz oscillator circuit 44 , a 60 kHz oscillator circuit 46 , a switching signal generator circuit 48 , an analog switch 50 , an amplifier circuit 52 and an antenna 54 .

The bridge circuit 40 is a bridge rectifier composed of diodes D1 to D4, and can full-wave rectify an input signal applied between the terminals P and Q from the transmission line 6 and output it. Here, the direction of the voltage signal applied between the terminals P and Q is switched depending on which of the wires 6a and 6b these two terminals are connected to. setting. The bridge circuit 40 generates a voltage of constant polarity from the voltage signal of the transmission line 6 whose direction can change, and outputs it to the constant voltage regulator 42 . Specifically, the connection point between D1 and D2 and the connection point between D3 and D4 are connected to the input terminals GND and VIN of the constant voltage regulator 42, respectively, and the direction of the voltage signal input to the bridge circuit 40 is Regardless, the potential of VIN with respect to GND is kept non-negative. Assuming that GND is the ground potential and the potential of VIN is referred to as the input voltage of the constant voltage regulator 42, in the present embodiment, corresponding to the H level period of the pulse in the pulse output means 30 of the master clock module 2, , the input voltage of the constant voltage regulator 42 becomes positive.

The constant voltage regulator 42 converts the input voltage into a predetermined voltage used as the power supply for the transmission module 4 . Specifically, the constant voltage regulator 42 outputs the predetermined voltage during the H level period of the pulse in the master clock module 2 . In other words, the constant voltage regulator 42 functions as a power source during the H level period, and the transmission module 4 operates accordingly. On the other hand, during the L level period of the pulse, the voltage between the wires 6a and 6b becomes 0 V, and the output of the predetermined voltage from the constant voltage regulator 42 stops, so the transmission module 4 stops operating.

A 40 kHz oscillator circuit 44 is a first oscillator circuit that generates an oscillation signal of a first standard frequency (40 kHz), and a 60 kHz oscillator circuit 46 is a second oscillator circuit that generates an oscillation signal of a second standard frequency (60 kHz). , both operate to generate an oscillating signal when powered, and stop oscillating when powered off. In other words, the 40 kHz oscillator circuit 44 and the 60 kHz oscillator circuit 46 output oscillation signals only while being supplied with power.

The switching signal generation circuit 48 generates a switching control signal according to the level relationship between the potential φ _P of the first input terminal P and the potential φ _Q of the second input terminal Q, and outputs the switching control signal to the analog switch 50 . In this embodiment, the switching signal generation circuit 48 is configured using a diode D5 and resistor elements R1 and R2 connected in series. D5 has an anode connected to terminal P, a cathode connected to one end of a resistor string composed of R1 and R2, and the other end of the resistor string being grounded. A potential corresponding to φ _P appears at the cathode of D5, and a potential obtained by resistance division at the connection point between R1 and R2 is applied to the analog switch 50 as a switching control signal. Specifically, when the master timepiece module 2 outputs an H level, the side of the electric wires 6a and 6b to which the terminal P is connected has a high potential φ _H (=24 V), and the side to which the terminal Q is connected has a high potential φ _L (= 0 V), the switching signal generating circuit 48 outputs a _{positive potential} as a switching control signal. A ground potential is output as a control signal. Note that the positive potential of the switching control signal when the terminal P side becomes 24 V is adjusted to the rated input voltage of the analog switch 50 by resistance division by R1 and R2.

The analog switch 50 is a switching unit that switches which of the oscillation signals input from each of the first oscillation circuit and the second oscillation circuit is to be output based on the switching control signal. In this embodiment, the analog switch 50 is configured to perform switching depending on whether the potential of the switching control signal is above or below the threshold. The 40 kHz oscillation signal generated by the oscillation circuit 44 is selectively output, and when the switching control signal is at the ground potential, the 60 kHz oscillation signal generated by the 60 kHz oscillation circuit 46, which is the second oscillation circuit, is selectively output. Output.

The amplifier circuit 52 and the antenna 54 are a transmission section that converts an oscillation signal output from the analog switch 50, which is a switching section, into radio waves and transmits the radio waves. The amplifier circuit 52 current-amplifies the oscillation signal output from the analog switch 50 and outputs it to the antenna 54 . The antenna 54 transmits the oscillation signal input from the amplifier circuit 52 into the air as radio waves. For example, the antenna 54 is composed of a ferrite bar antenna or a loop antenna.

The standard radio wave distribution device 1 configured as described above emits radio waves from the transmission module 4 only during the H level period of the master clock module 2 . In other words, the amplitude of the radio wave is 0 during the L level period of the master clock module 2, and the simulated standard radio wave transmitted from the transmission module 4 becomes an intermittent wave.

Also, as described above, there are two ways to connect the transmission module 4 and the transmission line 6, and correspondingly, the terminals P and Q of the transmission module 4 and the terminals A and B of the master clock module 2 are connected. There are two directions. Here, the state in which the terminal P is connected to the terminal A and the terminal Q to the terminal B is the forward connection state of the transmission module 4, and the state in which the terminal P is connected to the terminal B and the terminal Q is connected to the terminal A is transmitted. Define the reverse connection state of module 4 . The transmission module 4 in the forward connection state emits radio waves of 40 kHz when the master clock module 2 outputs forward voltage signals, and emits radio waves of 60 kHz when the master clock module 2 outputs reverse voltage signals. radiate. Correspondingly, regarding the setting state of the output polarity switching means 28, the voltage signal is forward-directed at a setting frequency of 40 kHz, and the voltage signal is reverse-directed at a setting frequency of 60 kHz. will be defined as

Next, the operation of the standard radio wave distribution device 1 according to this embodiment will be further described.

FIG. 5 is a schematic flowchart of operations and processing in the master clock module 2. As shown in FIG. When the power of the master clock module 2 is turned on (step S2), the receiving means 20 continuously executes the process of receiving time information (steps S4 and S6). When the receiving means 20 acquires the time information ("YES" in step S6), the time adjusting means 22 uses the acquired time information to correct the time information kept by the internal clock measuring means 24 ( step S8).

The internal clock timing means 24 keeps time (step S10), and the time code bit extracting means 26 detects that the count values of seconds in the internal clock timing means 24 are "00", "09", "19", "29", and "39". , “49” and “59” (“YES” in step S12), the pulse width is set to 0.2 seconds representing the marker M and the position markers P0 to P5, and the pulse output means 30 outputs the voltage A pulse with a width of 0.2 seconds is output as a signal. The direction of the voltage signal is selected according to the state of the set frequency of the output polarity switching means 28 (step S14). When the set frequency is 40 kHz, a pulse of 0.2 seconds is output to the terminal A side (step S16), and the set frequency is 60 kHz. In this case, a pulse of 0.2 seconds is output to the terminal B side (step S18).

On the other hand, if the count value of seconds in the internal clock counting means 24 is other than "00", "09", "19", "29", "39", "49" and "59" (" NO"), the time code bit extraction means 26 extracts the bit corresponding to the position indicated by the count value in the time code from the bit string of the binary data generated by the internal clock timing means 24 (step S20). , the pulse width is set to either 0.5 seconds or 0.8 seconds according to the value of the extracted bit (step S22).

Specifically, when the bit value is "1", the pulse width is 0.5 seconds. Then, the direction of the voltage signal is selected according to the state of the set frequency (step S24). When the set frequency is 40 kHz, a pulse of 0.5 seconds is output to the terminal A side (step S26), and when the set frequency is 60 kHz, the terminal A 0.5-second pulse is output to the B side (step S28).

If the bit value is "0", the pulse width is 0.8 seconds. Then, the direction of the voltage signal is selected according to the state of the set frequency (step S30), and if the set frequency is 40 kHz, a pulse of 0.8 seconds is output to the terminal A side (step S32), and if the set frequency is 60 kHz, the terminal A pulse of 0.8 seconds is output to the B side (step S34).

The master clock module 2 repeats the processes of steps S12 to S34 in conjunction with the counting of the internal clock timing means 24 in step S10. In addition, the counting by the internal clock counting means 24 is normally performed based on the clock generated by the crystal oscillation circuit. The master clock module 2 periodically performs steps S4 to S8, for example, so that errors in the count do not accumulate.

FIG. 6 is a schematic signal waveform diagram of the voltage signal output from the master clock module 2 and the radio waves transmitted from the transmission module 4. FIG. 6(a) and 6(b) respectively show the case where the voltage signal is in the forward direction and the case where the voltage signal is in the reverse direction. , and the amplitude of the radio wave transmitted from the transmission module 4 are shown on a common time axis. Incidentally, the time axis is horizontal, and the right direction is the positive direction.

When the voltage signal is forward, a pulse is output from the pulse output means 30 to the terminal A as shown in FIG. 6(a). That is, in this embodiment, the potential of the terminal A is set to 24 V during the output period of the H level, and the potential of the terminal A is set to 0 V during the output period of the L level. Also, the terminal B is maintained at 0V. On the other hand, when the voltage signals shown in FIG. 6(b) are reversed, the potential changes at the terminals A and B are reversed from the case of FIG. 6(a), and a pulse is output to the terminal B. That is, in this embodiment, the potential of the terminal B is set to 24V during the output period of the H level, the potential of the terminal B is set to 0V during the output period of the L level, and the terminal A is maintained at 0V.

Regardless of the direction of the voltage signal, the transmission module 4 transmits an amplitude intermittent wave during the period of the H level. If the transmission module 4 is in the forward connection state, the transmission frequency is set to 40 kHz for the forward voltage signal and to 60 kHz for the reverse voltage signal. On the other hand, if the transmission module 4 is in the reverse connection state, the transmission frequency is set to 60 kHz for the forward voltage signal and to 40 kHz for the reverse voltage signal.

FIG. 7 is a schematic perspective view of the transmission module 4. FIG. The transmission module 4 has a structure in which the circuit shown in FIG. 4 is housed in a housing 60, and FIG. The internal structure includes posts 62 , circuit boards 64 and bar antennas 66 .

The housing 60 is, for example, box-shaped and can be a cuboid with a longitudinal direction corresponding to the bar antenna 66 .

The strut 62 is erected, for example, on one of the inner surfaces (the bottom surface) forming the rectangular parallelepiped of the housing 60 . For example, the pillars 62 are arranged beside the bar antenna 66, and are arranged two apart in the long axis direction of the bar antenna 66. As shown in FIG.

The circuit board 64 is basically mounted with the main parts of the circuit shown in FIG. 4 other than the antenna 54 . The bar antenna 66 corresponds to the antenna 54 of the circuits of the transmission module 4 and includes a ferrite bar and a winding around it. The bar antenna 66 is tied to the circuit board 64 with, for example, a binding band 68 . The binding band 68 is, for example, relatively wide and positioned in the central portion of the bar antenna 66 . For example, a heat-shrinkable tube is used as the binding band 68 .

The bar antenna 66 and the circuit board 64 bundled together are supported separately from the inner surface of the housing 60 by supports. Specifically, a circuit board 64 is connected to the post 62 . For example, in plan view, the circuit board 64 has an antenna adjoining portion 64a extending along the bar antenna 66 and a portion protruding from the antenna adjoining portion 64a to the side of the bar antenna 66 and fixed to the post 62. and a post attachment portion 64b. For example, the circuit board 64 is attached to the upper end of the post 62 with the bundled bar antenna 66 down.

In this structure, since the bar antenna 66 is not in contact with the housing 60, when an impact is applied to the transmission module 4 from the outside, the impact does not directly reach the bar antenna 66. It is transmitted to the bar antenna 66 after being relieved by the bending of the circuit board 64 having a supporting beam structure and the flexibility of the binding band 68 . Therefore, damage to the bar antenna 66 such as breakage of the ferrite bar is less likely to occur. In other words, since the transmission module 4 has a shock-resistant structure, it becomes easy to handle at the time of installation.

[Second embodiment]
Of the configuration of the standard radio wave distribution device 1 shown in FIG. 1, the master clock module 2 and the transmission line 6 of the second embodiment are common to those of the first embodiment. The above description can be used. The difference between the second embodiment and the first embodiment lies in the transmission module 4, and this difference will be mainly described below. For convenience of explanation, the code of the transmission module is assumed to be "4B" in the second embodiment.

FIG. 8 is a diagram showing a schematic circuit configuration of a transmission module 4B according to the second embodiment. The transmission module 4B includes a bridge circuit 40, a constant voltage regulator 42, a crystal oscillator circuit 80, a control circuit 82, a motor driver 84, a low pass filter 86 and an antenna 54.

A crystal oscillation circuit 80 generates a multiplied oscillation signal having a common multiple of the first standard frequency of 40 kHz and the second standard frequency of 60 kHz. For example, the crystal oscillation circuit 80 generates a clock signal of 12 MHz as the multiplied oscillation signal.

The control circuit 82 selects either the first or second standard frequency based on the switching control signal input from the switching signal generation circuit 48, and generates an oscillation signal of the selected standard frequency from the multiplied oscillation signal. It functions as a frequency conversion circuit. For example, the control circuit 82 divides the frequency of the multiplied oscillation signal of 12 MHz by 1/300 to generate an oscillation signal of 40 kHz, and divides the frequency by 1/200 to generate an oscillation signal of 60 kHz. For example, the control circuit 82 is configured using a microprocessor, and the switching signal generation circuit 48 generates a switching control signal with a voltage representing a logical value in the control circuit 82 and inputs it to the control circuit 82 . Specifically, the switching signal generation circuit 48 outputs a predetermined positive voltage representing the logic state "H" when φ _P >φ _Q , and outputs the logic state "H" when φ _P <φ _Q. Output 0V representing "L".

The motor driver 84, the low-pass filter 86, and the antenna 54 are a transmission unit that converts an oscillation signal output from the control circuit 82, which is a frequency conversion circuit, into radio waves and transmits the radio waves. The motor driver 84 amplifies the current of the oscillation signal output by the control circuit 82 and supplies power to the antenna 54 . In other words, the transmission module 4B uses the motor driver 84 as an antenna drive circuit, not for driving the motor. By using the motor driver 84, it is possible to drive the coil antenna 54 with a large amount of current in positive and negative polarities, and as a result, the transmission module 4B can output radio waves over a wide range. The motor driver 84 generates a positive oscillation signal and an inverted negative oscillation signal from the input oscillation signal and outputs them in a balanced manner. The low-pass filter 86 is composed of, for example, a CR low-pass filter, and removes harmonics that may be included in the oscillation signal output from the bipolar output of the motor driver 84. Send as

The control circuit 82 and the motor driver 84 can be composed of digital circuits, and by making them into an IC, it is possible to reduce the size of the circuit configuration and thus the transmission module 4B.

As in the first embodiment, the constant voltage regulator 42 functions as a power source only during the H level output period of the pulse output means 30 . Therefore, the control circuit 82 and the like operate when power is supplied from the constant voltage regulator 42, and stop operating when the supply is stopped. intermittent wave. FIG. 9 is a flowchart for explaining the general operation of the control circuit 82 of the transmission module 4B. When power is supplied from the constant voltage regulator 42, the control circuit 82 enters a power-on state and starts operating (step S40). If the switching control signal from the switching signal generating circuit 48 is at H level ("YES" in step S42), the control circuit 82 divides the clock signal from the crystal oscillator circuit 80 to generate an oscillation signal of 40 kHz. (step S44), and on the other hand, if the switching control signal is at L level ("NO" in step S42), the clock signal from the crystal oscillation circuit 80 is frequency-divided and an oscillation signal of 60 kHz is output. (step S46).

As in the first embodiment, the connection between the transmission module 4B and the transmission line 6 can be selected from the forward connection state and the reverse connection state. You can switch the frequency of radio waves.

[Third embodiment]
In the third embodiment as well, the above description can be used for the components common to the first or second embodiment. The following description will focus on the points of difference.

The standard radio wave distribution device 1 of the first and second embodiments described above outputs intermittent waves as simulated standard radio waves from the transmission module 4 . In other words, the amplitude of the radio wave is 0 during the L level period in the master clock module 2 . On the other hand, in the standard radio wave distribution device 1 of the third embodiment, the amplitude of the radio wave during the L level period in the master clock module 2 is not set to 0, and is smaller than the radio wave (signal wave) when the H level is output. Output a residual wave with amplitude. The difference in structure corresponding to the difference in function lies in the pulse output means 30 of the master clock module 2 and the transmission module 4. For convenience of explanation, the reference numeral for the pulse output means 30 in the third embodiment is " 30C", and the code of the transmitting module 4 is "4C".

The pulse output means 30C outputs a pulse having the pulse width set by the time code bit extraction means 26 (referred to as a normal phase pulse) and a pulse opposite in phase to the normal phase pulse (referred to as a reverse phase pulse). and output them from terminals A and B to the transmission line 6 .

For example, the positive phase pulse can be the same as in the first and second embodiments, and becomes a high potential _φH corresponding to the H level of the pulse signal representing the time code, and the L level of the pulse signal representing the time code. corresponding to the low potential _φL . Note that φ _H and φ _L are set to 24 V and 0 V in this embodiment as well. On the other hand, the opposite phase pulse becomes _φL corresponding to the H level of the pulse signal representing the time code, and becomes _φH corresponding to the L level of the pulse signal representing the time code.

When the direction of the voltage signal output to the transmission line 6 is set forward by the output polarity switching means 28, the pulse output means 30C outputs a positive phase pulse from the terminal A and a reverse phase pulse from the terminal B. Output. In other words, in the voltage signal from the master clock module 2 to the transmission line 6, the state in which the pulse signal representing the time code is output corresponding to the H level is defined as the first voltage state, and the voltage signal is output in response to the L level. Assuming that the state is the second voltage state, in the forward voltage signal, the first voltage state is a state in which the terminal A is φ _H and the terminal B is φ _L. The second voltage state is a state in which the terminal A is φ H . φ _L and the terminal B is in the state of φ _H. In the case of the voltage signal in the opposite direction, the potentials of the terminals A and B are reversed from those in the case of the forward direction, and the terminal B outputs a positive-phase pulse and the terminal B outputs a negative-phase pulse. That is, the terminals A and B are respectively φ _L and φ _H in the first voltage state, and φ _H and φ _L in the second voltage state. That is, a potential difference of 24V between _φH and _φL is applied between the wires 6a and 6b of the transmission line 6 in both the first and second voltage states, regardless of whether the voltage signal is in the forward direction or the reverse direction. , the constant voltage regulator 42 of the transmission module 4C functions as a power supply, so that the transmission module 4C operates. This enables the transmission module 4C to generate residual waves.

FIG. 10 is a diagram showing a schematic circuit configuration of a transmission module 4C according to the third embodiment. The transmission module 4C has a power supply voltage switching circuit 90 in addition to the configuration of the transmission module 4B of the second embodiment shown in FIG.

In the above-described first and second embodiments, the amplitude of the radio waves is switched according to whether the constant voltage regulator 42 is turned on or off, and intermittent waves are obtained. In contrast, in the present embodiment, residual waves can be generated by operating the constant voltage regulator 42 in both the first and second voltage states. cannot switch the amplitude of the radio wave based on Therefore, the control circuit 82 constitutes determination means for determining whether the voltage signal input from the transmission line 6 to the transmission module 4C is in the first or second voltage state. to control the amplitude of

The power supply voltage switching circuit 90 constitutes transmission means together with the motor driver 84, the low-pass filter 86, and the antenna 54, and the transmission means transmits a signal wave having a first amplitude as a standard frequency radio wave in a first voltage state. and, in a second voltage state, transmit a remnant wave having a second amplitude reduced by a predetermined percentage of the first amplitude. Specifically, the power supply voltage switching circuit 90 receives a switching control signal corresponding to the determination result from the control circuit 82, and for example, changes the output voltage of the constant voltage regulator 42 while the determination result is in the first voltage state. While in the second voltage state, the voltage supplied to the motor driver 84 is reduced from the voltage in the first voltage state. As a result, the oscillation signal input from the control circuit 82 to the motor driver 84 is output to the antenna 54 with a smaller amplitude during the period of the second voltage state than during the period of the first voltage state, and the residual wave is transmitted. is realized. By outputting the residual wave according to the specifications of the standard radio wave, the radio-controlled watch can continuously receive the simulated standard radio wave, and the detection waveform obtained by detecting the received signal can also maintain continuity, so the transmission frequency is reduced. Stable reception is possible without noise that occurs when intermittent. The second amplitude can be set to 10% of the first amplitude in accordance with the specifications of the standard radio wave described above. It may be adjusted according to conditions such as the number of shields in the range.

FIG. 11 is a schematic flow diagram of operations and processes in the master clock module 2 of the third embodiment. In FIG. 11, the same reference numerals are assigned to the same operations and processes as in FIG. 5 described in the first embodiment. 11 differs from FIG. 5 in the operation and processing relating to the pulse output means 30C. Specifically, in steps S16, S18, S26, S28, S32, and S34 of FIG. In FIG. 11, steps S16C, S18C, S26C, S28C, S32C, and S34C, which are processes for outputting pulses to both terminals A and B, respectively, instead of outputting pulses, are replaced.

That is, when the set frequency is 40 kHz in steps S14, S24, and S30, the pulse output means 30C outputs positive-phase pulses to terminal A in steps S16C, S26C, and S32C, respectively, similarly to steps S16, S26, and S32. On the other hand, the opposite phase pulse is output to the terminal B. If the set frequency is 60 kHz at steps S14, S24, and S30, the pulse output means 30C outputs positive-phase pulses to terminal B at steps S18C, S28C, and S34C in the same manner as steps S16, S26, and S32, respectively. On the other hand, the opposite phase pulse is output to the terminal A. The pulse width in each case is the same as in FIG.

FIG. 12 is a schematic signal waveform diagram of voltage signals output from the master clock module 2 and radio waves transmitted from the transmission module 4C of the third embodiment. The manner of expression is the same as in FIG. 6, and FIGS. 12(a) and 12(b) respectively show the case where the voltage signal is in the forward direction and the case where the voltage signal is in the reverse direction.

When the voltage signal is in the forward direction, the pulse output means 30C outputs a positive-phase pulse to the terminal A and a negative-phase pulse to the terminal B, as shown in FIG. 12(a). In other words, as already described, in the present embodiment, the potentials of the terminals A and B are set to 24 V and 0 V, respectively, during the H level output period of the time code, and the potentials of the terminals A and B are set to 0 V during the L level output period. , 24V. On the other hand, when the voltage signals shown in FIG. A pulse is output. That is, the potentials of the terminals A and B are set to 0 V and 24 V during the H level output period, and are set to 24 V and 0 V during the L level output period.

The transmission module 4C transmits a radio wave having a large amplitude as a signal wave during the H level period, and transmits a radio wave having a small amplitude as a residual wave during the L level period. If the transmission module 4C is in the forward connection state, the transmission frequency is set to 40 kHz for the forward voltage signal and to 60 kHz for the reverse voltage signal. On the other hand, if the transmission module 4 is in the reverse connection state, the transmission frequency is set to 60 kHz for the forward voltage signal and 40 kHz for the reverse voltage signal.

FIG. 13 is a schematic flow diagram of the operation of the control circuit 82 of the transmission module 4C. The determination means described above detects the pulse of the marker M or the position markers P0 to P5 arranged in a predetermined format in the time code based on the change pattern of the voltage signal input to the transmission module 4C, and A voltage state corresponding to the pulse can be determined as the first voltage state, and in this embodiment, the control circuit 82 as determination means detects pulses P0 to P5.

Therefore, the control circuit 82 continuously monitors the potential _φP of the terminal P based on the switching control signal input from the switching signal generating circuit 48 (step S50). When the potential φ _P changes with the switching of the voltage state of the voltage signal from the master clock module 2 (“YES” in step S50), the control circuit 82 changes the potential φ _P before the change to 0.2. It is determined whether the state of duration of seconds has appeared at a period of 10 seconds (steps S54, S56, S60, S62). As a result, the timing of the pulse of the position marker can be detected, and it can be seen that the potential _φP at that timing represents the first voltage state of the voltage signal.

Specifically, if φ _P after the change is φ _L (“YES” in step S52), the duration of the state of φ _P =φ _H immediately before that is 0.2 seconds, and If 10 seconds have passed since the previous detection of the state of φ _P =φ _H with a width of 0.2 seconds (“YES” in steps S54 and S56), then φ _P =φ _H is the voltage signal. corresponds to a first voltage state of . This is the case when the transmitter module 4C is forward connected for a forward voltage signal or when the transmitter module 4C is reverse connected for a reverse voltage signal, in which case the control circuit 82 is a simulated standard A first standard frequency (40 kHz) is selected as the radio wave frequency, the frequency of the output clock generated by dividing the clock from the crystal oscillation circuit 80 is set to 40 kHz, and the output clock is sent to the motor driver 84 as an oscillation signal. (step S58).

On the other hand, if φ _P after the change is φ _H (“NO” in step S52), the time width of the state of φ _P =φ _L immediately before that is 0.2 seconds, and the previous time width is 0.2 seconds. If 10 seconds have elapsed since the detection of the 2-second wide φ _P =φ _L condition (“YES” in steps S60 and S62), then φ _P =φ _L corresponds to the first voltage state. This is the case where the transmission module 4C is in the reverse connection state with respect to the forward voltage signal or in the forward connection state with respect to the reverse voltage signal, and the control circuit 82 selects the second standard frequency as the frequency of the simulated standard radio wave. (60 kHz) is selected, the frequency of the output clock is set to 60 kHz, and the output clock is supplied to the motor driver 84 (step S64).

Here, if the timing of the position marker cannot be detected ("NO" in steps S54, S56, S60 and S62), the standard frequency is not set. In this case ("NO" in step S66), control circuit 82 repeats the process from step S50.

On the other hand, if the standard frequency is set in step S58 or S64 ("YES" in step S66), the control circuit 82 determines whether the voltage state is the first voltage state or the second voltage state. While switching the amplitude, the process of transmitting the simulated standard radio wave at the set standard frequency (steps S70 to S82) is started. The switching of the amplitude is performed by the control circuit 82 sending a switching control signal to the power supply voltage switching circuit 90 according to the determination result, and determining whether the output voltage of the power supply voltage switching circuit 90 should be a predetermined high voltage or a predetermined low voltage. This is done by switching

Specifically, when φ _P is φ _H (“YES” in step S70), if the set frequency is 40 kHz (step S72), control circuit 82 switches power supply voltage switching circuit 90 to If the high voltage side is set (step S74) and the set frequency is 60 kHz (step S72), the power supply voltage switching circuit 90 is set to the low voltage side (step S76). Further, during the period in which _φP is _φL (“NO” in step S70), if the set frequency is 40 kHz (step S78), the power supply voltage switching circuit 90 is set to the low voltage side (step S80), if the set frequency is 60 kHz (step S78), the power supply voltage switching circuit 90 is set to the high voltage side (step S82).

Steps S70 to S82 are repeated in loop processing, and the amplitude is switched each time φ _P is switched. As a result, a simulated standard radio wave corresponding to the time code generated by the master clock module 2 is generated.

[Modification]
(1) In the first embodiment, the first and second voltage states of the voltage signal are 24 V and 0 V between the terminals A and B, respectively. In embodiment 3, the first and second voltage states of the voltage signal are not limited to that example.

For example, in the first and second embodiments, the first voltage state may be a voltage equal to or higher than the threshold at which the transmission modules 4 and 4B operate, and the second voltage state may be a voltage below the threshold. Well, according to this, the transmission module 4, 4B operates to transmit standard frequency radio waves when the voltage signal is in the first voltage state, and stops operating when the voltage signal is in the second voltage state. A configuration similar to that described above is obtained.

Further, in the third embodiment, for example, the voltage signal in the forward direction sets the first voltage state to the potential φ _A1 =24 V at the terminal A and the potential φ _B1 =0 V at the terminal B, and the second voltage An example has been described in which the potential of the terminal A is φ _A2 =0V and the potential of the terminal B is φ _B2 =24V. However, not limited to this example, if the potential differences |φ _A1 −φ _B1 | and |φ _A2 −φ _B2 | can be realized.

(2) In the third embodiment, φ _A1 =φ _B2 and φ _A2 =φ _B1 . The potential relationship of the voltage signal is symmetrical with respect to the inversion of the forward connection state and the reverse connection state. Therefore, the transmission module 4C determines the first voltage state based on the change pattern of the voltage signal without relying on the potential relationship of the voltage signal, and switches the amplitude of the transmission radio wave.

However, if the potential relationship of the voltage signal is made asymmetrical between the first voltage state and the second voltage state by, for example, setting φ _A1 ≠φ _B2 , then the transmission module 4C changes the potential relationship from the potential relationship to the second voltage state. It is possible to determine one potential state. That is, in the third embodiment, the determination means for determining whether the voltage signal input to the transmission module is in the first or second voltage state does not depend on the change pattern of the voltage signal. It is possible to realize the standard radio wave distribution device 1 that transmits the residual wave described in the third embodiment by using the determination means.

(3) In the above embodiment, as the standard frequency and time code transmitted by the standard radio wave distribution device 1, the standard radio wave in Japan has been described as an example, but it is not particularly limited to this. Other countries' standard frequencies and time codes may be used, such as DCF77 (Germany 77.5 kHz). In recent years, many radio clocks can receive not only Japanese standard radio waves but also multiple types of standard radio waves such as WWVB and DCF77. A possible configuration may be adopted, and the plurality of types of simulated standard radio waves may be switched and transmitted according to the radio noise environment of the transmission module 4 or the like.

1 standard radio wave distribution device, 2 master clock module, 4 transmission module, 6 transmission line, 6a, 6b electric wire, 8 radio clock, 20 reception means, 22 time adjustment means, 24 internal clock timing means, 26 time code bit extraction means, 28 output polarity switching means, 30 pulse output means, 40 bridge circuit, 42 constant voltage regulator, 44 40 kHz oscillation circuit, 46 60 kHz oscillation circuit, 48 switching signal generation circuit, 50 analog switch, 52 amplifier circuit, 54 antenna, 60 housing , 62 strut, 64 circuit board, 66 bar antenna, 68 binding band, 80 crystal oscillator circuit, 82 control circuit, 84 motor driver, 86 low-pass filter, 90 power supply voltage switching circuit.

Claims (8)

A standard radio wave distribution device for receiving time information in a master clock module and transmitting a simulated standard radio wave from a transmission module connected to the master clock module by a transmission line,
The master clock module generates a time code in the format used for the standard radio wave based on the time information, and changes to a first voltage state to a low level in response to the high level of the pulse signal representing the time code. correspondingly generating a voltage signal in a second voltage state;
The transmission line is a pair of wires wired to transmit the voltage signal applied between the two wires,
The transmission module has a pair of input terminals connected to the transmission line to which the voltage signal is applied, operates with the voltage between the input terminals as a power source, and uses a standard frequency radio wave as the simulated standard radio wave. switching the amplitude according to the voltage state of the voltage signal and transmitting the voltage signal;
wherein the first voltage state is a voltage above a threshold at which the transmission module operates and the second voltage state is a voltage below the threshold;
the transmission module operates to transmit radio waves of the standard frequency when the voltage signal is in the first voltage state, and stops operating when the voltage signal is in the second voltage state;
The transmission module transmits radio waves having a first standard frequency when the first input terminal is at a higher potential than the second input terminal in the first voltage state. , on the other hand, when the second input terminal is at a higher potential than the first input terminal, transmitting a radio wave having a second standard frequency;
A standard radio wave distribution device characterized by In the standard radio wave distribution device according to claim 1 ,
The transmission module is
a first oscillation circuit that generates an oscillation signal of the first standard frequency;
a second oscillation circuit that generates an oscillation signal of the second standard frequency;
a switching signal generation circuit that generates a switching control signal according to the potential level relationship between the first input terminal and the second input terminal;
a switching unit that switches between outputting one of the oscillation signals input from each of the first oscillation circuit and the second oscillation circuit based on the switching control signal;
a transmitting unit that converts the oscillation signal output from the switching unit into a radio wave and transmits the radio wave;
A standard radio wave distribution device characterized by having: In the standard radio wave distribution device according to claim 1 ,
The transmission module is
an oscillation circuit that generates a multiplied oscillation signal having a common multiple of the first standard frequency and the second standard frequency;
a switching signal generation circuit that generates a switching control signal according to the potential level relationship between the first input terminal and the second input terminal;
a frequency conversion circuit that selects one of the first and second standard frequencies based on the switching control signal and generates an oscillation signal of the selected standard frequency from the multiplied oscillation signal;
a transmission unit that converts the oscillation signal output from the frequency conversion circuit into a radio wave and transmits the radio wave;
A standard radio wave distribution device characterized by having: A standard radio wave distribution device for receiving time information in a master clock module and transmitting a simulated standard radio wave from a transmission module connected to the master clock module by a transmission line,
The master clock module generates a time code in the format used for the standard radio wave based on the time information, and changes to a first voltage state to a low level in response to the high level of the pulse signal representing the time code. correspondingly generating a voltage signal in a second voltage state;
The transmission line is a pair of wires wired to transmit the voltage signal applied between the two wires,
The transmission module has a pair of input terminals connected to the transmission line and to which the voltage signal is applied, operates with the voltage between the input terminals as a power supply, and uses a standard frequency radio wave as the simulated standard radio wave. switching the amplitude according to the voltage state of the voltage signal and transmitting the voltage signal;
Both the first and second voltage states are at or above a threshold voltage at which the transmission module operates;
The transmission module is
determining means for determining which of the first and second voltage states the input voltage signal is in;
Transmission in which the radio wave of the standard frequency is transmitted with a first amplitude in the first voltage state, and is transmitted with a second amplitude that is reduced by a predetermined ratio to the first amplitude in the second voltage state. means and
A standard radio wave distribution device characterized by having: In the standard radio wave distribution device according to claim 4 ,
The determination means detects a pulse of a marker or position marker arranged in a predetermined format in the time code based on the change pattern of the voltage signal, and determines the voltage state corresponding to the pulse to the first voltage signal. determining that the voltage state of
A standard radio wave distribution device characterized by In the standard radio wave distribution device according to claim 5 ,
the transmitting means sets the standard frequency to a first standard frequency when the first input terminal is at a higher potential than the second input terminal in the first voltage state; setting the standard frequency to a second standard frequency when the second input terminal is at a higher potential than the first input terminal in the first voltage state;
A standard radio wave distribution device characterized by In the standard radio wave distribution device according to any one of claims 1 to 3 and claim 6 ,
The standard radio wave distribution device, wherein the master clock module has output polarity switching means for switching whether or not the direction of application of the voltage signal to the transmission line is reversed. In the standard radio wave distribution device according to any one of claims 1 to 7 ,
The transmission module is
a housing;
a pillar erected on the inner surface of the housing;
a circuit board attached to the support and supported away from the inner surface of the housing;
a bar antenna attached to the circuit board and supported away from the inner surface of the housing;
A standard radio wave distribution device characterized by having:

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