JP5349009B2 - Time receiver and radio-controlled clock - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem wherein a conventional time receiving apparatus has different sensitivity depending on a receiving signal because the threshold value voltage is not optimized when a received analog signal is converted to a digital signal. <P>SOLUTION: A time receiving apparatus can obtain the optimized threshold value for the receiving signal by weighting time constants on charging and discharging when the threshold value voltage is generated from the received analog signal. As the result, an excellent receiving sensitivity can be obtained not depending on the receiving signal. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a time receiving device and a radio-controlled timepiece capable of receiving a plurality of standard radio waves, and more particularly to a time receiving device and a radio-controlled timepiece having an integral detection circuit.

  Currently, time receivers are used in various situations around us. For example, in Japan, the United States, Germany, and other countries, standard radio waves with time information are transmitted, and as a type of time receiver that receives this standard radio wave, a radio-controlled clock that corrects the timekeeping time has been put to practical use. .

Standard radio waves are sent serially in binary code as time data from the cumulative number of days since January 1 to hours and minutes, with one frame being one minute. Specifically, the carrier wave is amplitude-modulated by one rectangular pulse per second, and “0”, “1”, etc. are expressed by the pulse width of the rectangular pulse. (Hereafter, this rectangular pulse is called a time code.)
Since the time information is represented by a combination of “0”, “1”, etc., the radio-controlled timepiece receives the standard radio wave and extracts the time code from it to obtain accurate time information. Can do.

  Standard radio waves have different time code pulse widths and carrier wave frequencies depending on the country. For example, standard radio waves in Japan have three types of time code pulse widths of 200 ms, 500 ms, and 800 ms, and two carrier frequencies of 40 kHz and 60 kHz are used. On the other hand, standard radio waves in Germany have three types of time code pulse widths of 100 ms, 200 ms, and 1000 ms, and the carrier frequency is 77.5 kHz.

  Here, the reception operation of a general reception circuit will be described with reference to FIG. The standard radio wave received by the antenna 101 is amplified by the amplifier 102, filtered by the filter circuit 103, and then detected by the detection circuit 104. Then, the signal after detection (detection signal) is branched into two, one of which is output to the averaging circuit 109 and the other is output to the waveform shaping circuit 105. The averaging circuit 109 averages the input detection signal and outputs the average voltage value to the waveform shaping circuit 105. The waveform shaping circuit 105 shapes the waveform of the detection signal input from the detection circuit 104 using the average voltage value input from the averaging circuit 109 as a threshold value, and outputs it as a time code. That is, the waveform shaping circuit 105 and the averaging circuit 109 constitute an analog-digital converter that binarizes the detection signal output from the detection circuit.

A typical circuit diagram of the waveform shaping circuit and the averaging circuit is shown in FIG.
The waveform shaping circuit 105 includes a comparator 112. The averaging circuit 109 includes a resistor 110 and a capacitor 111. The detection signal output from the detection circuit is branched into two, one connected to the minus input of the comparator 112 via the averaging circuit 109 and the other connected to the plus input of the comparator 112 as it is. Since the resistor 110 and the capacitor 111 constituting the averaging circuit 109 are low-pass filters having a sufficiently large time constant with respect to the time code, the output of the averaging circuit 109 becomes a DC voltage equal to the average value of the detection signal. .

With this configuration, waveform shaping can be performed using the average value of the detection signal as the threshold voltage, so that the detection signal always crosses the threshold voltage even when the DC component of the detection waveform fluctuates. As a result, binarization can be performed reliably. Further, since the cutoff frequency of the averaging circuit 109 is set sufficiently lower than the frequency of the detection signal, even if a large noise appears instantaneously in the detection signal, the noise is smoothed by the averaging circuit 109. The influence on the output waveform is reduced.
As described above, the method shown in FIG. 8 has advantages such that the threshold voltage automatically follows the fluctuation of the DC component of the detection signal and has excellent noise resistance. Applying causes serious problems. That is, the threshold voltage deviates from the optimum value.

  As described above, the pulse width of the time code varies depending on the country, but the time code of most countries does not have a high / low ratio, that is, a duty ratio of 50%. Particularly in Germany, the pulse widths are 100 ms, 200 ms, and 1000 ms, and the duty ratio is very small. Since the detection waveform is a waveform reproducing the time code, the duty ratio of the detection signal is naturally not 50% unless the duty ratio of the time code is 50%. Therefore, when the detection signal is smoothed, the average value thereof becomes a voltage lower than the center of the wave height of the detection signal as shown by a broken line as shown in FIG. Therefore, if the average value of the detection signal is used as the threshold voltage, the influence of the waveform rounding near the bottom of the pulse is large as shown in FIG. 9, and a portion wider than the original pulse width is detected. The pulse width of the waveform shaping circuit output becomes wider than the pulse width of the time code, resulting in a bit error.

Various measures have been taken to solve this problem. For example, as in Patent Document 1, a technique for generating or selecting an optimum threshold value according to a detection signal has been developed.
Here, the prior art shown in FIG. 26 of Patent Document 1 will be described with reference to FIG.
In the following description, the same number may be assigned to the already described configuration, and the overlapping description may be omitted.
FIG. 10 is a diagram obtained by simplifying the prior art shown in FIG. 26 of Patent Document 1 within a range in which the gist is not changed so that it can be easily understood. Reference numeral 106 denotes a threshold control circuit.

The receiving circuit illustrated in FIG. 10 outputs the detection signal output from the detection circuit 104 to the waveform shaping circuit 105 and the threshold value control circuit 106. The threshold control circuit 106 detects the peak voltage and the bottom voltage of the detection signal, and outputs a voltage obtained by dividing the peak voltage and the bottom voltage at a constant ratio to the waveform shaping circuit 105 as a threshold voltage. The waveform shaping circuit 105 binarizes the detection signal using the threshold voltage input from the threshold control circuit 106.
For example, when the voltage is divided by 1: 1, the voltage output to the waveform shaping circuit 105 is the center value of the peak voltage and the bottom voltage. When the voltage is divided by 6: 4, the voltage output to the waveform shaping circuit 105 is the peak voltage and the bottom voltage. It is closer to the peak voltage than the center value.
By using such a threshold control circuit, it is possible to generate an optimum threshold regardless of the duty ratio of the time code.

Next, another prior art shown in FIG. 19 of Patent Document 1 will be described with reference to FIG. FIG. 13 is a diagram obtained by simplifying the prior art disclosed in Patent Document 1 within a range in which the gist is not changed so as to be easily understood. Reference numeral 107 denotes a threshold selection circuit, and 108 denotes a microcomputer.
The microcomputer 108 outputs the received standard radio wave identification information to the threshold selection circuit 107. The threshold selection circuit 107 stores the optimum threshold voltage for each standard radio wave, and based on the standard radio wave identification information input from the microcomputer 108, the optimum threshold voltage for the received time code is obtained. Output to the waveform shaping circuit 105.
The waveform shaping circuit 105 binarizes the detection signal using the threshold voltage input from the threshold selection circuit 107.
By using such a threshold control circuit, an optimum threshold voltage can be selected regardless of the duty ratio of the time code.

JP 2007-139705 (FIGS. 19 and 26)

Although the prior art disclosed in Patent Document 1 can obtain an optimum threshold value regardless of the duty ratio of the time code, it has been found that there are some problems when actually applied to a radio-controlled timepiece. .
First, the method shown in FIG. 10 has a problem that the bit error rate increases when sudden noise (hereinafter referred to as burst noise) is superimposed on the detection signal. This will be described with reference to FIGS. 11 and 12.
FIG. 11 shows a case where there is no noise in the detection signal, and shows how the threshold voltage Vt is generated by holding the peak voltage Vp and the bottom voltage Vb of the detection signal. Since the threshold voltage Vt is generated by dividing the peak voltage Vp and the bottom voltage Vb at a fixed ratio, if there is no noise, the threshold voltage Vt should be generated at any position with respect to the detection signal. Can do.
However, as shown in FIG. 12, when burst noise Nb is added to the detection signal, the noise peak voltage is held as the peak voltage Vp of the detection signal. Since the threshold voltage Vt is generated based on the peak voltage Vp generated by the noise, the generated threshold voltage is generated at a position greatly deviating from the originally intended threshold voltage.
As a result, the pulse width output from the waveform shaping circuit 105 becomes smaller than the planned width.
Usually, in order to sufficiently stabilize the threshold voltage, the time constant at the time of holding is usually set sufficiently large with respect to the frequency of the time code. Therefore, when burst noise is held in this way, a state in which the threshold value is greatly shifted is held for several bits. The bits in the meantime are misrecognized, resulting in an increase in the bit error rate.
That is, it can be said that the method shown in FIG. 10 is inferior in noise resistance compared to the method shown in FIG.

Next, the method shown in FIG. 13 has a problem that the bit error rate increases when the DC component of the detection waveform fluctuates. This will be described with reference to FIGS. 14 and 15.
FIG. 14 shows the operation of the method shown in FIG. 13 when the DC component of the detection waveform comes out as expected. The threshold selection circuit 107 stores a fixed threshold voltage according to the received time code, and outputs a threshold voltage corresponding to the received time code.
In this way, by storing the optimum threshold voltage for the detected waveform in advance, the optimum threshold voltage can be obtained according to the time code.
However, the DC component of the actual detection signal varies depending on the completion of the receiver and the reception environment. This is shown in FIG. In order to obtain good sensitivity, if the DC component of the detection signal fluctuates, it is necessary to follow the threshold voltage accordingly. However, in the method shown in FIG. 13, the threshold voltage is a fixed voltage depending on the time code. For this reason, when the DC component of the detection waveform varies, the threshold voltage viewed from the waveform varies relatively downward. That is, the threshold voltage deviates from the optimum value. As a result, the bit error rate increases.
That is, it can be said that the method shown in FIG. 13 is inferior to the method shown in FIG. 7 in the followability to the DC component of the detection signal.

As described above, the prior art disclosed in Patent Document 1 has the above-mentioned advantages inherent in the method shown in FIG. 7, that is, the noise resistance in which the threshold voltage automatically follows the fluctuation of the DC component of the detection signal. An optimum threshold voltage can be obtained only at the expense of superiority. In short, this is true only under ideal conditions, that is, the condition that the detection signal is sufficiently pure and the DC component is stable. The following problems arise. In the first place, the reception sensitivity becomes a problem when there is a non-ideal condition, that is, when the purity of the detection signal is not sufficiently high and the DC component is not stable. From this point of view, it cannot be said that the prior art disclosed in Patent Document 1 contributes to improving the sensitivity of the radio-controlled timepiece.

In order to solve the above problems, the time receiving apparatus of the present invention employs the following configuration.
A channel selection means for selecting a transmitting station that transmits a standard radio wave including time information;
Reception detection means for receiving and detecting a standard radio wave transmitted from the transmission station selected by the channel selection means;
Threshold generation means for controlling to output a threshold signal based on the detection signal detected and output by the reception detection means;
Waveform shaping means for generating a time code signal composed of binary values based on the detection signal and the threshold signal output by the threshold value generation means;
Time information extraction means for extracting time information from the time code signal generated by the waveform shaping means,
The threshold value generation means variably controls the threshold value by setting a charge / discharge time constant corresponding to the transmitting station selected by the channel selection means.

In addition, it has setting storage means for storing threshold setting information for each transmitting station to receive,
The setting storage means may output a threshold selection signal to the threshold generation means based on the channel selection signal input from the channel selection means and the stored threshold setting information. it can.

Further, based on the time code signal output from the waveform shaping means, an error rate measuring means for obtaining an error rate;
Error rate storage means for storing the error rate measured by the error rate measurement means;
Selection control means for generating the threshold selection signal from the error rate stored in the error rate storage means and the threshold setting information stored in the setting storage means;
The selection control means can generate a threshold selection signal so as to minimize the error rate and output the threshold selection signal to the threshold generation means.

Further, the threshold value generating means includes
An integration circuit including a first resistor and a first capacitor, and a plurality of resistors and switches;
A time constant selection circuit that selectively connects the plurality of resistors in parallel to the first resistor by turning on or off one of the plurality of switches according to the threshold selection signal; A first switch connecting a constant selection circuit in parallel with the first resistor;
The first switch can control the on / off state according to the binary output level of the waveform shaping means.

Further, the threshold value generating means includes
An integration circuit including a first resistor and a first capacitor, and a plurality of resistors and switches;
A time constant selection circuit for selectively connecting the plurality of resistors in parallel with the first resistor by turning on or off one of the plurality of switches according to the threshold selection signal; and the time constant The selection circuit is connected in parallel to the first resistor via a diode,
The current flowing through the time constant selection circuit can be controlled according to the level of the detection signal.

Further, the threshold value generating means includes
An integration circuit including a first resistor and a first capacitor, a plurality of resistors, a plurality of switches, and an operational amplifier;
An inverting amplifier that selectively connects the plurality of resistors between the output of the operational amplifier and a negative input by turning on or off one of the switches according to the threshold selection signal, and in parallel with the first resistor Consisting of connected variable impedance means,
The variable impedance means can control the impedance value according to the output level of the inverting amplifier.

And the time receiving device;
A time keeping means for keeping time, and
Time display means for displaying the time measured by the time counting means,
The time counting means can correct the time measured internally with the time information input from the time receiving device.

The waveform shaping circuit used in the time receiving device and the radio-controlled timepiece according to the present invention has a smoothing circuit that averages the detection signal and a switching circuit that switches a time constant of charge / discharge of the smoothing circuit.
With such a configuration, when receiving a plurality of standard radio waves, it is possible to generate an optimum threshold value according to the time code, and it is possible to obtain good reception sensitivity in any time code. .

Hereinafter, embodiments of a time receiving device and a radio-controlled timepiece according to the present invention will be described with reference to the drawings. In the following description, the same constituent elements are denoted by the same reference numerals, and the description thereof is omitted or simplified.

Example 1
[Configuration of time receiver]
First, FIG. 1 shows the configuration of the time receiving apparatus according to the first embodiment of the present invention.
In FIG. 1, 1 is an antenna, 2 is reception detection means, 3 is waveform shaping means, 4 is time information extraction means, 5 is channel selection means, and 6 is threshold generation means.

[Description of operation of each part]
The antenna 1 receives standard radio waves and converts them into electrical signals, and outputs the converted electrical signals to the reception detection means 2.
The channel selection unit 5 has preset reception station information, and outputs the reception station information to the reception detection unit 2 and the threshold generation unit 6 as a channel selection signal.
The reception detection means 2 amplifies and detects the electric signal input from the antenna 1 and outputs the detection signal to the waveform shaping means 3 and the threshold value generation means 6. Further, when receiving an electrical signal from the antenna 1, the reception detection according to the channel selection signal from the channel selection means 5 so that the setting of the reception detection means 2 is optimal with respect to the frequency of the standard radio wave of the receiving station. The setting of means 2 is switched.
The threshold generation unit 6 generates a threshold voltage based on the detection signal input from the reception detection unit 2 and outputs the threshold voltage to the waveform shaping unit 3. At that time, the threshold value generating means 6 is set according to the channel selection signal from the channel selecting means 5 so that the setting of the threshold value generating means 6 is optimal with respect to the standard radio wave of the receiving station. Switch. Details of this switching will be described later.
The waveform shaping unit 3 compares the detection signal input from the reception detection unit 2 with the threshold voltage input from the threshold generation unit 6. If the detection signal is greater than the threshold voltage, a positive voltage (representing 1 of digital data) is output, and if the threshold voltage is greater than the detection signal, a negative voltage (representing 0 of digital data) is output. Thus, the detection signal is converted into a digital signal of 1 and 0. The converted digital signal is output to the time information extraction means 4.
The time information extraction means 4 processes the digital signal input from the waveform shaping means 3, extracts the time information contained therein, and outputs it. The time information extraction means 4 is constituted by a microcomputer.

[Configuration of waveform shaping means and threshold generation means]
FIG. 3 shows the configuration of the waveform shaping means 3 and the threshold value generation means 6 in this embodiment. 3, 61 is a capacitor, 62 is a first resistor, 63 is a plurality of resistors, 64 is a first switch, 65 is a plurality of switches, 66 is a first control line, 67 is a second control line, 31 Is a comparator.
In FIG. 3, the input signal from the reception detection means 2 input to the terminal X is branched into two, one being input to the first resistor 62 and the other being input to the plus terminal of the comparator 31.
The first resistor 62 and the capacitor 61 are connected in series, and the contact is connected to the negative input of the comparator 31.
First switch 64 and a plurality of switches 65 (sw21, sw22, sw23)
The plurality of resistors 63 (R21, R22, R23) are connected in series, and are connected in parallel with the first resistor. That is, sw21 and R21, sw22 and R22, and sw23R23 are each connected in series, and these series connections are connected in parallel to each other and in parallel with the first resistor. It is a connected configuration.
The channel selection means 5 and the control terminals of the plurality of switches 65 are connected by a first control line 66, and the output of the comparator 31 and the control terminal of the first switch 64 are connected by a second control line 67. Has been.

[Description of operations of waveform shaping means 3 and threshold value generating means 6]
Here, the operations of the waveform shaping means 3 and the threshold generation means 6 in this embodiment will be described with reference to FIGS.
The channel selection means 5 outputs a channel selection signal corresponding to the station to be received to the first control line 66 to control the plurality of switches 65.
The detection signal Vin is input from the reception detection means 2 to the input terminal X. A voltage Vy obtained by averaging the detected signals appears at the contact Y between the first resistor 62 and the capacitor 61. The resistance value of the first resistor 62 is abbreviated as R1, and the combined resistance value of the resistors connected to the switches that are in a conductive state among the plurality of switches 65 among the plurality of resistors 63 is abbreviated as R2.
First, the initial value of Vy is set to 0V. At this time, when a pulse signal having a predetermined width having a positive voltage as the voltage value (Vin) of the detection signal is input to the input terminal X, the output of the comparator 31 becomes Hi, and the first switch 64 is in the conductive state. Become.
At this time, a difference voltage between Vin and Vy is applied to both ends of the first resistor 62, and a current of (Vin−Vy) / (R1 // R2) flows into the capacitor 61, so that Vy rises. Note that (R1 // R2) represents the total resistance value when the resistance values R1 and R2 are connected in parallel, and means (R1 * R2) / (R1 + R2).

When the pulse output of the detection signal ends, Vin decreases, and when Vy becomes larger than Vin, the output of the comparator 31 becomes Low. Thereby, the 1st switch 64 will be in the interruption | blocking state.
At this time, a difference voltage between Vin and Vy is applied to both ends of the first resistor 62, and a current of (Vin−Vy) / R1 flows out of the capacitor 61. Therefore, Vy decreases.
That is, in the circuit configuration of FIG. 3, during the period when the pulse of the detection signal is input, the capacitor 61 is charged by the resistance value (R1 // R2) in which R1 and R2 are connected in parallel, and the non-pulse is output. During the input period, the capacitor 61 is discharged by the resistance value R1, and as can be seen from the relationship (R1 // R2) <R1, a pulse of a detection signal is input as the charge / discharge current of the capacitor 61. Since the period (charging period) is longer than the non-input period (discharging period) and Vy is higher than the average value of the detection signal, for example, in the case of a 50% duty pulse like a time code with a pulse width of 500 ms In this case, a value higher than the center value of the peak voltage and bottom voltage of the detection signal is output as Vy.
If such an operation is sufficiently repeated, the circuit shown in FIG. 3 is in a balanced state at a predetermined Vy corresponding to the pulse width of the detection signal between the charge amount and the discharge amount of the capacitor 61 within one cycle.

[Description of switching operation for each station]
The operation when the receiving station is switched will be described with reference to FIG. The plurality of resistors 63 and the plurality of switches 65 described above are represented by three resistors RS21, RS22, and RS23 and switches SW21, SW22, and SW23 arranged in series corresponding to the resistors. Therefore, the combined resistance value R2 of the plurality of resistors 63 is represented as R21, R22, R23, or the like depending on the on / off state of each switch.
First, a case where a Japanese time code, that is, JJY is received will be described. The time code of JJY represents time information using three kinds of pulses having a pulse width of 200 ms, 500 ms, and 800 ms. Generally, since the probability of appearance of a 200 ms pulse is high, the detection waveform is simply averaged. A value lower than the center value of the peak voltage and bottom voltage of the detection signal is output.
Therefore, the plurality of switches 65 are controlled by the channel selection means 5 so that only the SW 21 is in a conductive state.
Therefore, the charging current value when charging the capacitor is (Vin−Vy) / (R1 // R21). Since the discharge current value at the time of discharge is (Vin−Vy) / R1, the value of Vy in the equilibrium state is higher than the average value of Vin. As a result, Vy can be set to the center value of the detection signal, and the digital signal output using that value can correctly restore the time code.

Next, a case where a German time code, that is, a DCF is received will be described. Since the DCF time code represents time information using three types of pulses of 100 ms, 200 ms, and 1000 ms, the overall pulse width is shorter than that of the JJY time code. , Vy is lower than the center value of the detection waveform, causing a bit error.
Therefore, the plurality of switches 65 are controlled by the channel selection means 5 so that SW21 and SW22 are in a conductive state.
Therefore, the charging current value during capacitor charging is (Vin−Vy) / (R1 // R21 // R22). This is a larger value than the charging current value at the time of receiving JJY. Since the discharge current value at the time of discharging is (Vin−Vy) / R1 without changing from the time of receiving JJY, the value of Vy in the equilibrium state is higher than that at the time of receiving JJY. In this way, Vy can be set to an optimum value for DCF.

(Example 2)
Next, a second embodiment of the present invention will be described.
In the second embodiment, the configuration of the time receiving apparatus is the same as that of FIG. 1, and the operation thereof is also the same as that of the first embodiment, so that the description thereof is omitted.

[Configuration of waveform shaping means and threshold generation means]
FIG. 4 shows the configuration of the waveform shaping means 3 and the threshold value generation means 6 in this embodiment.
The circuit of FIG. 4 differs from the circuit of FIG. 3 of the first embodiment in that a diode 68 is used instead of the first switch 64 of FIG.
The anode terminal of the diode 68 is connected to the input terminal X, and the cathode terminal of the diode 68 is connected to one end of the plurality of switches 65. That is, the diode 68, the plurality of switches 65, and the plurality of resistors 63 are connected in series, and these and the first resistor 62 are connected in parallel.

[Description of operations of waveform shaping means 3 and threshold value generating means 6]
Here, the operations of the waveform shaping means 3 and the threshold generation means 6 in this embodiment will be described with reference to FIGS.
First, the initial value of Vy is set to 0V. At this time, a pulse signal having a predetermined width having a positive voltage as the voltage of the detection signal is input to the input terminal X. At this time, since the anode voltage of the diode 68 becomes higher than the cathode voltage of the diode 68, the diode 68 becomes conductive. Further, the output of the comparator 31 becomes Hi, and the first switch 64 becomes conductive. Since the current of (Vin−Vy) / (R1 // R2) flows into the capacitor 61, Vy rises.

When the pulse output of the detection signal ends and Vin decreases and Vy becomes larger than Vin, the cathode voltage of the diode 68 becomes higher than the anode voltage of the diode 68, so that the diode 68 is cut off. Since the current of (Vin−Vy) / R1 flows out of the capacitor 61, Vy decreases.
When such an operation is sufficiently repeated, in the circuit shown in FIG. 4, the charged amount and discharged amount of the capacitor 61 within one cycle are in a balanced state at a predetermined Vy corresponding to the pulse width of the detection signal. Thus, by using the diode 68 in place of the first switch 64 in FIG. 3, the same effect as in the first embodiment can be obtained.

Also in the second embodiment, as in the first embodiment, an optimum threshold value corresponding to the time code can be obtained by controlling the plurality of switches 65 by the channel selection means 5.

(Example 3)
Next, a third embodiment of the present invention will be described.
Also in the third embodiment, the configuration of the time receiving apparatus is the same as that of FIG.

[Configuration of waveform shaping means and threshold generation means]
FIG. 5 shows the configuration of the waveform shaping means 3 and the threshold value generating means 6 in this embodiment. In FIG. 5, 69 denotes a MOS resistor, 610 denotes an operational amplifier, and 611 denotes a VI (voltage / current) conversion resistor. One end of the VI conversion resistor 611 is connected to the negative input of the operational amplifier 610. One end of a plurality of switches 65 is connected to the negative input of the operational amplifier 610, and the other end of the plurality of switches 65 is connected to a plurality of resistors 63. The other ends of the plurality of resistors 63 are connected to the output of the operational amplifier 610. The positive input of the operational amplifier 610 is grounded. That is, the operational amplifier 610, the plurality of resistors 63, the plurality of switches 65, and the VI conversion resistor 611 form an inverting amplifier 612. The input terminal of the inverting amplifier 612 is connected to the output terminal of the comparator 31, and the output terminal of the inverting amplifier 612 is connected to the gate of the MOS resistor 69. The source terminal of the MOS resistor 69 is connected to the input terminal X, and the drain terminal is connected to the first resistor 62.

[Description of operations of waveform shaping means 3 and threshold value generating means 6]
Here, the operation of the waveform shaping means 3 and the threshold generation means 6 in this embodiment will be described with reference to FIGS.
When the resistance value of the VI conversion resistor 611 is represented by R3, and the combined resistance value of the resistors connected to the switches that are in the conductive state among the plurality of switches 65 is represented by R2, the inverting amplifier 612 is represented. The amplification factor is-(R2 / R3).
First, the initial value of Vy is set to 0V. At this time, when a pulse signal having a predetermined width having a positive voltage as the voltage value (Vin) of the detection signal is input to the input terminal X, the output of the comparator 31 becomes Hi, and the inverting amplifier 612 receives the Hi voltage, That is, the power supply voltage VDD is input. Therefore, the output of the inverting amplifier 612 becomes − (R2 / R3) VDD, and this output is input to the gate of the MOS resistor 69.

  The MOS resistor 69 is composed of a P-channel type MOSFET, and the resistance value Rm between the drain and the source is expressed by the following equation when the drain-source voltage is sufficiently small.

Rm≈1 / {μCox (W / L) (| Vgs + Vt |)}
Here, μ is the electron mobility, W is the gate width, L is the gate length, Vgs is the gate-source voltage, and Vt is the threshold voltage.

  That is, the resistance value between the drain and source of the MOS resistor 69 is inversely proportional to the gate-source voltage. Here, when the gate voltage of the MOS resistor is expressed as Vg and a coefficient other than | Vgs + Vt | of Rm is set as K, Rm is expressed by the following equation.

Rm≈K / (| Vg−Vin + Vt |)
Here, K = 1 / μCox (W / L).

When the output of the inverting amplifier 612 is low, Rm has a small value. Since the current of (Vin−Vy) / (R1 + Rm) flows into the capacitor 61 via Rm and the first resistor 62, Vy rises.
When the pulse output of the detection signal ends and Vin decreases and Vy becomes larger than Vin, the output of the comparator 31 becomes Low (VSS), and the output of the inverting amplifier 612 becomes-(R2 / R3) VSS. At that time, the current of (Vin−Vy) / (R1 + Rm) flows out of the capacitor 61. However, since the value of Rm is larger than that of the output of the comparator 31 being Hi (VDD), The discharge current is smaller than the charge current during charging.
When such an operation is sufficiently repeated, the circuit shown in FIG. 5 is in a balanced state at a predetermined Vy corresponding to the pulse width of the detection signal between the charge amount and the discharge amount of the capacitor 61 within one cycle. That is, the optimum threshold value corresponding to the time code can be obtained by changing the resistance value of the MOS resistor 69 during charging and discharging and weighting the charging current value and the discharging current value.
Thus, by using the MOS resistor 69 instead of the first switch 64 in FIG. 3, the same effect as that of the first embodiment can be obtained.

Also in the third embodiment, as in the first embodiment, an optimum threshold value corresponding to the time code can be obtained by controlling the plurality of switches 65 by the channel selection means 5.

Example 4
Next, a fourth embodiment of the present invention will be described with reference to FIG.
In FIG. 2, 7 is a setting storage means, 8 is an error rate measurement means, 9 is an error rate storage means, and 10 is a selection control means.

[Description of operation of each part]
The setting storage means 7 stores the control signal selected by the channel selection means. That is, a combination of ON and OFF of the plurality of switches 65 in FIG. 3 is stored.
The error rate measuring means 8 calculates the error rate from the output of the time information extracting means 4. Then, the calculated error rate is output to the error rate storage unit 9, and the error rate storage unit 9 stores the error rate.
Then, the setting information stored in the setting storage unit 7 and the error rate stored in the error rate storage unit 9 are output to the selection control unit 10. The selection control means 10 searches for the lowest error rate among the error rates stored in the error rate storage means for the receiving station. Then, the setting at that time is referred to from the setting storage means 7 and the setting is output to the threshold value generating means 6.

By adopting such a configuration, even when the reception conditions change due to the reception environment, the remaining battery level, or the aging of the reception system, etc., the threshold is automatically set so that the error rate is the lowest, that is, the reception sensitivity is the highest. It is possible to change the value setting. Further, by adopting such a configuration, it is possible to automatically absorb variations during manufacturing.

(Example 5)
Next, a fifth embodiment of the present invention will be described with reference to FIG.
FIG. 6 shows the configuration of the radio-controlled timepiece. In the figure, reference numeral 13 denotes a time receiving device described in any one of the first to fourth embodiments, 11 is a time counting means, and 12 is a time display means.

[Description of operation of each part]
The antenna 1, reception detection means 2, waveform shaping means 3, time information extraction means 4, channel selection means 5, and threshold value generation means 6 constitute a time reception device 13 that is periodically (for example, once a day). ) The standard radio wave is received and accurate time information is output to the time measuring means 11.
The time measuring means 11 has a reference signal source such as a crystal resonator, and measures the time based on the signal source. When the time information is input from the radio wave receiver 13, the time measured internally is compared with the time information input from the radio wave receiver 13, and when the time information is different, the time is internally measured. Is corrected to the time input from the radio wave receiver 13.
The time display device 12 displays time information input from the time measuring means 11.

By adopting such a configuration, the time display means 12 can always display a substantially accurate time.

The time receiving device and the radio-controlled timepiece of the present invention can obtain an optimum threshold value corresponding to the received time code by switching the setting of the waveform shaping circuit. Therefore, it is suitable for a time receiver that requires high sensitivity.

It is a block diagram for demonstrating the time receiver of Example 1 of this invention. It is a block diagram for demonstrating the time receiver of Example 4 of this invention. It is a circuit diagram which shows the threshold value production | generation means and waveform shaping means of the time receiver of FIG. It is a figure which shows Example 2 of this invention, and is a circuit diagram which shows the 2nd example of the threshold value production | generation means and waveform shaping means of the time receiver of FIG. It is a figure which shows Example 3 of this invention, and is a circuit diagram which shows the 3rd example of the threshold value production | generation means and waveform shaping means of the time receiver of FIG. It is a block diagram which shows the radio wave correction timepiece of Example 5 of the present invention. It is a block diagram which shows the 1st structure of the time receiver in a prior art. It is a figure which shows the structure of the averaging circuit and waveform shaping circuit in FIG. It is a figure which shows the output waveform of the circuit of FIG. It is a block diagram which shows the 2nd structure of the time receiver in a prior art. It is a wave form diagram explaining the problem of the time receiver shown in FIG. It is a wave form diagram explaining the problem of the time receiver shown in FIG. It is a block diagram which shows the 3rd structure of the time receiver in a prior art. It is a wave form diagram explaining the problem of the time receiver shown in FIG. It is a wave form diagram explaining the problem of the time receiver shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Antenna 2 Reception detection means 3 Waveform shaping means 4 Time information extraction means 5 Channel selection means 6 Threshold value generation means 7 Setting storage means 8 Error rate measurement means 9 Error rate storage means 10 Selection control means 61 Capacitor 62 First resistance 63 Multiple Resistors 64 First Switch 65 Multiple Switches 66 First Control Line 67 Second Control Line 68 Diode 69 MOS Resistor 610 Operational Amplifier 611 VI (Voltage-Current) Conversion Resistor 612 Inverting Amplifier 101 Antenna 102 Amplifier 103 Filter circuit 104 Detection circuit 105 Waveform shaping circuit 106 Threshold control circuit 107 Threshold selection circuit 108 Microcomputer 109 Averaging circuit 110 Resistance 111 Capacitor 112 Comparator

Claims (7)

A channel selection means for selecting a transmitting station that transmits a standard radio wave including time information;
Reception detection means for receiving and detecting a standard radio wave transmitted from the transmission station selected by the channel selection means;
Based on the detection signal detected and output by the reception detection means ,
Threshold generating means for controlling to output a threshold signal;
It said detection signal, and the threshold signal output by the threshold generating means, a waveform shaping means for generating a time code signal composed of binary value based on,
Time information extraction means for extracting time information from the time code signal generated by the waveform shaping means,
The threshold generation means is
The discharge current of the discharge period when the pulse of the detection signal is not input,
A time receiving device, wherein the threshold value is variably controlled by being set smaller than a charging current during a charging period in which a pulse of the detection signal is input . When the transmission station having a short pulse width is selected by the channel selection means,
2. The time receiver according to claim 1 , wherein the charging current value is set to be larger than that when a transmitting station having a long pulse width is selected . It has setting storage means for storing threshold setting information for each transmitting station to receive,
The setting storage means includes
The threshold selection signal is output to the threshold generation unit based on a channel selection signal input from the channel selection unit and stored threshold setting information. The time receiving device according to any one of 1 to 2 . The threshold generation means includes
An integration circuit including a first resistor and a first capacitor, and a plurality of resistors and switches;
A time constant selection circuit that selectively connects the plurality of resistors in parallel to the first resistor by turning on or off one of the plurality of switches according to the threshold selection signal;
A first switch for connecting the time constant selection circuit in parallel with the first resistor;
4. The time receiving device according to claim 1, wherein the first switch controls an on / off state according to a binary output level of the waveform shaping unit. 5. The threshold generation means includes
An integration circuit including a first resistor and a first capacitor, and a plurality of resistors and switches;
By turning on or off any of the plurality of switches by the threshold selection signal,
A time constant selection circuit for selectively connecting the plurality of resistors in parallel to the first resistor;
The time constant selection circuit is connected in parallel to the first resistor via a diode;
4. The time receiving device according to claim 1, wherein a current flowing through the time constant selection circuit is controlled in accordance with a level of the detection signal. 5. The threshold generation means includes
An integrating circuit comprising a first resistor and a first capacitor, a plurality of resistors, a plurality of switches, and an operational amplifier;
Consists of
By turning on or off one of the switches by the threshold selection signal,
An inverting amplifier that selectively connects the plurality of resistors between an output of the operational amplifier and a negative input; and variable impedance means connected in parallel to the first resistor;
4. The time receiving apparatus according to claim 1, wherein the variable impedance means controls an impedance value according to an output level of the inverting amplifier. A time receiving device according to any one of claims 1 to 6;
A time keeping means for keeping time, and
Time display means for displaying the time measured by the time counting means,
The radio-controlled timepiece characterized in that the timekeeping means corrects the time measured internally with time information input from the time receiving device.

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