JP7254224B2 - Substrate processing equipment - Google Patents

Description

The disclosed embodiments relate to a substrate processing apparatus.

2. Description of the Related Art Conventionally, a substrate processing apparatus that removes a film from a peripheral edge of a substrate such as a silicon wafer or a compound semiconductor wafer by supplying a chemical solution to the peripheral edge of the substrate (hereinafter referred to as "peripheral edge removal process"). It has been known.

In this type of substrate processing apparatus, in order to confirm whether or not the film on the peripheral edge of the substrate has been properly removed, a device for imaging the peripheral edge of the substrate is installed inside the chamber where the peripheral edge removal process is performed. A camera may be provided.

For example, Patent Literature 1 describes that an imaging unit for imaging the periphery of a substrate is fixedly provided with respect to the chamber. Moreover, Patent Document 1 also describes that the camera is provided for a measurement jig that can be attached to and removed from the chamber.

JP 2016-100565 A

However, providing the imaging unit in the chamber may increase the size of the apparatus.

An object of one aspect of the embodiment is to provide a substrate processing apparatus capable of checking the state of a peripheral portion of a substrate while suppressing an increase in the size of the apparatus.

A substrate processing apparatus according to one aspect of an embodiment includes a plurality of processing units, an imaging unit, and an analysis section. A plurality of processing units processes substrates. The imaging unit is arranged at the delivery station and images the peripheral edge of one of the upper surface and the lower surface of the substrate and the end surface of the substrate. The analysis section analyzes the image captured by the imaging unit. At least one of the plurality of processing units is a peripheral edge processing unit that etches away a film from the beveled portion including the peripheral edge and edge of the substrate. The imaging unit includes a rotation holding subunit and an imaging subunit. The rotation holding subunit rotatably holds the substrate. The imaging subunit is arranged around the transfer position of the substrate with respect to the rotation holding subunit, and picks up an image of the edge of one of the top surface and the bottom surface of the substrate held by the rotation holding subunit at the transfer position and the edge surface of the substrate. do. Based on the image, the analysis unit performs at least one of determining the degree of removal of the film at the edge of one of the upper surface and the lower surface of the substrate and the end surface of the substrate and calculating the removal width.

According to one aspect of the embodiment, it is possible to check the state of the peripheral portion of the substrate while suppressing an increase in the size of the apparatus.

FIG. 1 is a schematic plan view of a substrate processing system according to this embodiment. FIG. 2 is a schematic side view of the substrate processing system according to this embodiment. FIG. 3 is a schematic diagram of a peripheral processing unit. FIG. 4 is a schematic diagram of a lower surface processing unit. FIG. 5 is a schematic side view of the substrate platform and the imaging unit. FIG. 6 is a schematic diagram of the imaging unit viewed from above. FIG. 7 is a schematic diagram of the imaging unit viewed from the side. FIG. 8 is a schematic diagram of the first imaging subunit and the second imaging subunit viewed obliquely from above. FIG. 9 is a schematic diagram of the first imaging subunit and the second imaging subunit viewed obliquely from above. FIG. 10 is a schematic diagram of the first imaging subunit viewed from the side. FIG. 11 is a schematic side view of the illumination module and the mirror member. FIG. 12 is a schematic diagram showing how the light from the lighting module is reflected by the mirror member. FIG. 13 is a schematic diagram showing how light from a wafer is reflected by a mirror member. FIG. 14 is a schematic diagram showing an example of a captured image captured by the first imaging subunit. FIG. 15 is a schematic diagram of the second imaging subunit as viewed from the side. FIG. 16 is a block diagram showing an example of the configuration of the control device. FIG. 17 is a diagram showing the flow of wafers in the substrate processing system according to this embodiment. FIG. 18 is a flow chart showing a series of processes executed in the imaging unit. FIG. 19 is a timing chart showing the flow of imaging processing. FIG. 20 is a diagram showing the flow of wafers in the substrate processing system according to the first modification. FIG. 21 is a diagram showing the flow of wafers in the substrate processing system according to the second modification. FIG. 22 is a diagram showing the flow of wafers in the substrate processing system according to the third modification.

<Configuration of substrate processing system>
First, the configuration of the substrate processing system according to this embodiment will be described with reference to FIGS. 1 and 2. FIG. FIG. 1 is a schematic plan view of a substrate processing system according to this embodiment. FIG. 2 is a schematic side view of the substrate processing system according to this embodiment. In the following, to clarify the positional relationship, the X-axis, Y-axis and Z-axis are defined to be orthogonal to each other, and the positive direction of the Z-axis is defined as the vertically upward direction.

As shown in FIG. 1 , the substrate processing system 1 according to this embodiment includes a loading/unloading station 2 , a transfer station 3 and a processing station 4 . These are arranged side by side in the order of loading/unloading station 2 , delivery station 3 and processing station 4 .

The substrate processing system 1 conveys a substrate loaded from a loading/unloading station 2, which is a semiconductor wafer (hereinafter referred to as a wafer W) in this embodiment, to a processing station 4 via a transfer station 3, where it is processed. In addition, the substrate processing system 1 returns the processed wafer W from the processing station 4 to the loading/unloading station 2 via the transfer station 3, and unloads the wafer W from the loading/unloading station 2 to the outside.

The loading/unloading station 2 includes a cassette mounting section 11 and a transport section 12 . A plurality of cassettes C accommodating a plurality of wafers W in a horizontal state are mounted on the cassette mounting portion 11 .

The transport section 12 is arranged between the cassette mounting section 11 and the delivery station 3 and has a first transport device 13 therein. The first transfer device 13 includes a plurality of (here, five) wafer holders that hold one wafer W. As shown in FIG. The first transfer device 13 is capable of horizontal and vertical movement and rotation about a vertical axis. W can be transported at the same time.

Next, the delivery station 3 will be explained. As shown in FIGS. 1 and 2, inside the delivery station 3, a plurality of substrate platforms (SBU) 14 and a plurality of imaging units (CAM) 15 are arranged. Specifically, the processing station 4, which will be described later, has an upper first processing station 4U and a lower second processing station 4L. and a position corresponding to the second processing station 4L. The configurations of the substrate mounting portion 14 and the imaging unit 15 will be described later.

Next, processing station 4 will be described. The processing station 4, as shown in FIG. 2, includes a first processing station 4U and a second processing station 4L. The first processing station 4U and the second processing station 4L are spatially partitioned by a partition wall, a shutter, or the like, and arranged side by side in the height direction.

The first processing station 4U and the second processing station 4L have the same configuration, and as shown in FIG. 18 and a plurality of lower surface processing units (CH2) 19 .

The second transfer device 17 is arranged inside the transfer section 16 and transfers the wafer W between the substrate mounting section 14 , the imaging unit 15 , the peripheral processing unit 18 and the lower surface processing unit 19 .

The second transfer device 17 includes one wafer holder that holds one wafer W. As shown in FIG. The second transfer device 17 can move in the horizontal direction and the vertical direction and rotate about the vertical axis, and transfers one wafer W using the wafer holder.

A plurality of peripheral edge processing units 18 and lower surface processing units 19 are arranged adjacent to the transport section 16 . As an example, the plurality of edge processing units 18 are arranged side by side along the X-axis direction on the Y-axis positive direction side of the transport section 16, and the plurality of lower surface processing units 19 are arranged on the Y-axis negative direction side of the transport section 16. They are arranged side by side along the X-axis direction.

The peripheral portion processing unit 18 performs a predetermined process on the peripheral portion of the wafer W. As shown in FIG. In the present embodiment, the edge portion processing unit 18 performs bevel removal processing (an example of edge portion processing) for removing a film from the bevel portion of the wafer W by etching. The bevel portion refers to an inclined portion formed on the edge surface of the wafer W and its periphery. The inclined portions are formed on the upper and lower peripheral edges of the wafer W, respectively.

A configuration example of the peripheral portion processing unit 18 will be described with reference to FIG. FIG. 3 is a schematic diagram of the edge processing unit 18. As shown in FIG.

As shown in FIG. 3 , the edge processing unit 18 includes a chamber 81 , a substrate holding mechanism 82 , a supply section 83 and a collection cup 84 .

Chamber 81 accommodates substrate holding mechanism 82 , supply section 83 and collection cup 84 . A ceiling portion of the chamber 81 is provided with an FFU (Fun Filter Unit) 811 that forms a down flow inside the chamber 81 .

The substrate holding mechanism 82 includes a holding portion 821 that horizontally holds the wafer W, a support member 822 that extends vertically to support the holding portion 821, and a driving portion 823 that rotates the support member 822 around the vertical axis. Prepare.

The holding part 821 is connected to an air suction device (not shown) such as a vacuum pump, and holds the wafer W horizontally by sucking the lower surface of the wafer W using the negative pressure generated by the suction of the suction device. . As the holding portion 821, for example, a porous chuck, an electrostatic chuck, or the like can be used.

The holding part 821 has a suction area with a diameter smaller than that of the wafer W. As shown in FIG. As a result, the chemical liquid discharged from the lower nozzle 832 of the supply unit 83, which will be described later, can be supplied to the peripheral portion of the lower surface of the wafer W. As shown in FIG.

The supply section 83 includes an upper nozzle 831 and a lower nozzle 832 . The upper nozzle 831 is arranged above the wafer W held by the substrate holding mechanism 82, and the lower nozzle 832 is arranged below the wafer W. As shown in FIG.

A chemical liquid supply source 73 is connected to the upper nozzle 831 and the lower nozzle 832 via a valve 71 and a flow rate regulator 72 . The upper nozzle 831 ejects a chemical solution such as hydrofluoric acid (HF) or nitric acid (HNO3) supplied from the chemical solution supply source 73 onto the peripheral edge of the upper surface of the wafer W held by the substrate holding mechanism 82 . Further, the lower nozzle 832 discharges the chemical solution supplied from the chemical solution supply source 73 to the peripheral portion of the lower surface of the wafer W held by the substrate holding mechanism 82 .

The supply unit 83 also includes a first moving mechanism 833 that moves the upper nozzle 831 and a second moving mechanism 834 that moves the lower nozzle 832 . By moving the upper nozzle 831 and the lower nozzle 832 using the first moving mechanism 833 and the second moving mechanism 834, the supply position of the chemical solution to the wafer W can be changed.

A collection cup 84 is arranged to surround the substrate holding mechanism 82 . The collection cup 84 has a bottom portion formed with a drain port 841 for discharging the chemical solution supplied from the supply portion 83 to the outside of the chamber 81 and an exhaust port 842 for exhausting the atmosphere in the chamber 81 . .

The peripheral portion processing unit 18 is configured as described above, and after holding the lower surface of the wafer W by suction with the holding portion 821 , rotates the wafer W using the driving portion 823 . The peripheral edge processing unit 18 discharges the chemical liquid from the upper nozzle 831 toward the peripheral edge of the upper surface of the rotating wafer W, and also ejects the chemical liquid from the lower nozzle 832 toward the peripheral edge of the lower surface of the rotating wafer W. . As a result, the film adhering to the bevel portion of the wafer W is removed. At this time, dirt such as particles adhering to the bevel portion of the wafer W is also removed together with the film.

After performing the peripheral edge removing process, the peripheral edge processing unit 18 discharges a rinse liquid such as pure water from the upper nozzle 831 and the lower nozzle 832 to remove the chemical solution remaining on the bevel portion of the wafer W. may be rinsed away. Further, the peripheral portion processing unit 18 may perform drying processing for drying the wafer W by rotating the wafer W after the rinsing processing.

Further, here, as an example of the peripheral processing, the peripheral processing unit 18 performs the bevel removing processing of etching away the film from the bevel portion of the wafer W. However, the peripheral processing does not necessarily involve removing the film. It does not have to be processed. For example, the peripheral portion processing unit 18 may perform peripheral portion cleaning processing for cleaning the bevel portion of the wafer W as the peripheral portion processing.

The lower surface processing unit 19 performs predetermined processing on the lower surface of the wafer W. FIG. In the present embodiment, the bottom surface processing unit 19 performs bottom surface removal processing (an example of bottom surface processing) for removing a film from the entire bottom surface of the wafer W by etching.

Here, a configuration example of the lower surface processing unit 19 will be described with reference to FIG. FIG. 4 is a schematic diagram of the lower surface processing unit 19. As shown in FIG.

As shown in FIG. 4 , the lower surface processing unit 19 includes a chamber 91 , a substrate holding mechanism 92 , a supply section 93 and a collection cup 94 .

Chamber 91 accommodates substrate holding mechanism 92 , supply portion 93 and collection cup 94 . The ceiling of the chamber 91 is provided with an FFU 911 that forms a downflow inside the chamber 91 .

The substrate holding mechanism 92 includes a holding portion 921 that horizontally holds the wafer W, a support member 922 that extends vertically to support the holding portion 921, and a driving portion 923 that rotates the support member 922 around the vertical axis. Prepare. A plurality of gripping portions 921a for gripping the peripheral portion of the wafer W are provided on the upper surface of the holding portion 921, and the wafer W is horizontally held by the gripping portions 921a while being slightly separated from the upper surface of the holding portion 921. be done.

The supply portion 93 is inserted through the hollow portions of the holding portion 921 and the support member 922 . A channel extending in the vertical direction is formed inside the supply portion 93 . A chemical supply source 76 is connected to the flow path via a valve 74 and a flow rate regulator 75 . The supply unit 93 supplies the chemical solution supplied from the chemical solution supply source 76 to the lower surface of the wafer W. As shown in FIG.

A collection cup 94 is arranged to surround the substrate holding mechanism 92 . At the bottom of the recovery cup 94, a drain port 941 for discharging the chemical solution supplied from the supply unit 93 to the outside of the chamber 91 and an exhaust port 942 for exhausting the atmosphere in the chamber 91 are formed. .

The lower surface processing unit 19 is configured as described above. Then, the lower surface processing unit 19 discharges the chemical solution from the supply unit 93 toward the center of the lower surface of the rotating wafer W. As shown in FIG. The chemical supplied to the center of the bottom surface of the wafer W spreads over the entire bottom surface of the wafer W as the wafer W rotates. Thereby, the film is removed from the entire bottom surface of the wafer W. Next, as shown in FIG. At this time, dirt such as particles adhering to the lower surface of the wafer W is also removed together with the film.

After performing the lower surface removal process, the lower surface processing unit 19 may perform a rinse process to wash away the chemical liquid remaining on the lower surface of the wafer W by discharging a rinse liquid such as pure water from the supply unit 93 . good. Further, the lower surface processing unit 19 may perform drying processing for drying the wafer W by rotating the wafer W after the rinsing processing.

Further, here, the lower surface processing unit 19 performs, as an example of the lower surface processing, the lower surface removal processing for removing the film from the entire lower surface of the wafer W, but the lower surface processing is necessarily the processing for removing the film. does not require For example, the bottom surface processing unit 19 may perform bottom surface cleaning processing for cleaning the entire bottom surface of the wafer W as the bottom surface processing.

As shown in FIG. 1 , the substrate processing system 1 includes a controller 5 . Control device 5 is, for example, a computer, and includes control section 51 and storage section 52 . The storage unit 52 stores programs for controlling various processes executed in the substrate processing system 1 . Control unit 51 is, for example, a CPU (Central Processing Unit), and controls the operation of substrate processing system 1 by reading and executing a program stored in storage unit 52 .

The program may be recorded in a computer-readable storage medium and installed in the storage unit 52 of the control device 5 from the storage medium. Examples of computer-readable storage media include hard disks (HD), flexible disks (FD), compact disks (CD), magnet optical disks (MO), and memory cards. Note that the control unit 51 may be configured only by hardware without using a program.

By the way, in the peripheral edge removing process, the film removal width (the width along the radial direction of the wafer W with the outer peripheral edge of the wafer W as one end, hereinafter referred to as "cut width") is defined. However, for example, if the positions of the upper nozzle 831 and the lower nozzle 832 are not appropriate, the actual cut width may deviate from the specified cut width. Further, if the center of the wafer W is shifted from the center of rotation of the substrate holding mechanism 82, there is a possibility that the cut width of the wafer W may be uneven in the circumferential direction. For this reason, there is a case where the wafer W after the peripheral edge removal process is imaged by a camera, and based on the obtained image, it is confirmed whether or not the peripheral edge removal process has been appropriately performed.

Conventionally, a camera for capturing images of wafers after peripheral edge removal processing has been provided in the chamber of each peripheral edge processing unit. However, providing a camera in the chamber of each peripheral processing unit may increase the size of the substrate processing system. In addition, it may become difficult to perform appropriate imaging due to the chemical liquid or the like adhering to the camera.

Conventionally, it has also been proposed to attach a measurement jig equipped with a camera to a peripheral edge processing unit after peripheral edge removal processing to take an image of the wafer after the peripheral edge removal processing. However, attaching and detaching the measuring jig is troublesome. In addition, there is a possibility that the measurement accuracy may be degraded due to individual differences between the peripheral edge processing units.

Therefore, in the substrate processing system 1 according to the present embodiment, the imaging unit 15 for imaging the bevel portion of the wafer W after the peripheral edge removal processing is provided outside the peripheral edge processing unit 18 and in a plurality of peripheral edge processing units 18. It was decided to provide one in common. Specifically, in the substrate processing system 1, one imaging unit 15 corresponding to a plurality of peripheral edge processing units 18 arranged in the first processing station 4U and a plurality of peripheral edge processing units arranged in the second processing station 4L are provided. One imaging unit 15 corresponding to the partial processing unit 18 is provided in the delivery station 3 (see FIG. 2).

<Structure of imaging unit>
The configuration of the imaging unit 15 according to this embodiment will be specifically described below with reference to FIGS. 5 to 13. FIG.

FIG. 5 is a schematic diagram of the substrate placement section 14 and the imaging unit 15 as viewed from the side. As shown in FIG. 5 , the imaging unit 15 is provided below the substrate platform 14 and adjacent to the substrate platform 14 .

By arranging the substrate platform 14 and the imaging unit 15 so as to overlap each other in the height direction in this manner, an increase in the footprint of the substrate processing system 1 can be suppressed. In addition, by arranging the imaging unit 15 below the substrate mounting portion 14, even if dust or the like falls from the imaging unit 15, the fallen dust or the like is not placed on the substrate mounting portion 14. Adhesion to the wafer W can be suppressed.

Note that the imaging unit 15 does not necessarily need to be arranged below the substrate mounting portion 14 and may be arranged above the substrate mounting portion 14 .

6 is a schematic diagram of the imaging unit 15 viewed from above, and FIG. 7 is a schematic diagram of the imaging unit 15 viewed from the side.

As shown in FIG. 6, the imaging unit 15 includes a base plate 100, a rotation holding subunit 200 (an example of a rotation holding section), a notch detection subunit 300 (an example of a detection section), and a first imaging subunit 400. , and a second imaging subunit 500 .

In the substrate processing system 1 according to this embodiment, only the second transport device 17 of the first transport device 13 and the second transport device 17 is configured to access the imaging unit 15 . Specifically, the imaging unit 15 has an opening 110 that opens toward the transport unit 16 , and the second transport device 17 carries the wafer W into and out of the imaging unit 15 through the opening 110 . . Camera 410 , lighting module 420 and mirror member 430 of first imaging subunit 400 and camera 510 and lighting module 520 of second imaging subunit 500 , which will be described later, prevent loading and unloading of wafer W by second transport device 17 . In order to avoid this, it is arranged at a position farther from the opening 110 than the holding table 201 .

Base plate 100 is, for example, a plate-like member, and subunits 200 to 500 are provided on base plate 100 .

The rotary holding subunit 200 comprises a holding base 201 and an actuator 202 . The holding table 201 is, for example, a suction chuck that horizontally holds the wafer W by suction or the like. The holding table 201 has a suction area smaller than the wafer W in diameter. Actuator 202 is, for example, an electric motor, and drives holding table 201 to rotate.

The notch detection subunit 300 has, for example, a lateral groove 310, a light emitting element 320 is provided on the lower surface of the lateral groove 310, and a light receiving element 330 is provided on the upper surface.

When the wafer W is placed on the rotation holding subunit 200, the irradiation light from the light emitting element 320 is blocked by the peripheral portion of the wafer W, and the light receiving element 330 does not receive the irradiation light. However, when the notch formed in the peripheral edge of the wafer W comes to a position facing the light emitting element 320 due to the rotation by the rotation holding subunit 200 , the irradiation light passes through the notch and is received by the light receiving element 330 . Thereby, the notch detection subunit 300 can detect the position of the notch formed in the wafer W. FIG.

8 and 9 are schematic diagrams of the first imaging subunit 400 and the second imaging subunit 500 viewed obliquely from above. 10 is a schematic diagram of the first imaging subunit 400 viewed from the side, and FIG. 11 is a schematic diagram of the illumination module 420 and the mirror member 430 viewed from the side. 12 is a schematic diagram showing how the light from the illumination module 420 is reflected by the mirror member 430, and FIG. 13 is a schematic diagram showing how the light from the wafer W is reflected by the mirror member 430. As shown in FIG. .

As shown in FIGS. 6 to 10, the first imaging subunit 400 includes a camera 410 (an example of one side imaging section), an illumination module 420, and a mirror member 430. As shown in FIGS.

The camera 410 includes a lens 411 and an imaging device 412 . The optical axis of camera 410 extends horizontally toward lighting module 420 .

As shown in FIGS. 8 to 11, the illumination module 420 is arranged above the wafer W held by the holding table 201. As shown in FIG. The lighting module 420 includes a light source 421 , a light scattering member 422 and a holding member 423 .

As shown in FIG. 11, the light source 421 includes, for example, a housing 421a and a plurality of LED point light sources 421b arranged within the housing 421a. The plurality of LED point light sources 421b are arranged in a row along the radial direction of the wafer W. As shown in FIG.

The light scattering member 422 is connected to the light source 421 so as to overlap the light source 421, as shown in FIGS. 9-11. The light scattering member 422 is formed with a through hole 422a extending in the direction in which the light source 421 and the light scattering member 422 overlap. The inner wall surface of the through-hole 422a is mirror-finished. As a result, when the light from the light source 421 enters the through hole 422a of the light scattering member 422, the incident light is irregularly reflected by the mirror surface portion 422b inside the through hole 422a to generate scattered light.

The holding member 423 is connected to the light scattering member 422 so as to overlap the light scattering member 422 . The holding member 423 is formed with a through hole 423a and a cross hole 423b crossing the through hole 423a. The through-hole 423a extends in the direction in which the light scattering member 422 and the holding member 423 overlap. The cross hole 423b communicates with the through hole 423a.

The holding member 423 holds a half mirror 424 , a cylindrical lens 425 , a light diffusing member 426 and a focusing lens 427 inside. As shown in FIG. 10, the half mirror 424 is arranged at the intersection of the through hole 423a and the cross hole 423b while being inclined at an angle of, for example, 45 degrees with respect to the horizontal direction. The half mirror 424 has a rectangular shape.

Cylindrical lens 425 is arranged between light scattering member 422 and half mirror 424 . The cylindrical lens 425 is a convex cylindrical lens protruding toward the half mirror 424 . The axis of the cylindrical lens 425 extends in the direction in which the plurality of LED point light sources 421b are arranged. When the scattered light from the light scattering member 422 enters the cylindrical lens 425 , the scattered light is expanded along the circumferential direction of the cylindrical surface of the cylindrical lens 425 .

A light diffusing member 426 is arranged between the cylindrical lens 425 and the half mirror 424 . The light diffusion member 426 is, for example, a rectangular sheet member, and diffuses the light transmitted through the cylindrical lens 425 . Thereby, diffused light is generated in the light diffusion member 426 . For example, the light diffusing member 426 may have an isotropic diffusing function of diffusing the incident light in all directions on the surface of the light diffusing member 426, or the incident light may be diffused in the axial direction of the cylindrical lens 425 (cylindrical The lens 425 may have an anisotropic diffusion function of diffusing in a direction perpendicular to the circumferential direction of the cylindrical surface of the lens 425 .

Focusing lens 427 is positioned within cross-hole 423b. The focusing lens 427 has the function of changing the combined focal length with the lens 411 .

As shown in FIGS. 10 to 13, the mirror member 430 is arranged below the illumination module 420 and reflects the reflected light from the end surface Wc of the wafer W. As shown in FIGS.

The mirror member 430 has a main body 431 and a reflective surface 432 . Main body 431 is configured by, for example, an aluminum block.

The reflecting surface 432 faces the end surface Wc of the wafer W held by the holding table 201 and the peripheral edge region We of the lower surface Wb. The reflecting surface 432 is inclined with respect to the rotation axis of the holding base 201 .

The reflecting surface 432 is a curved surface recessed toward the side away from the end surface Wc of the wafer W held by the holding table 201 . Therefore, when the end face Wc of the wafer W is reflected on the reflecting surface 432, its mirror image is magnified more than the real image. The radius of curvature of reflecting surface 432 is, for example, 10 mm or more and 30 mm or less. Also, the opening angle of the reflecting surface 432 (the angle formed by two planes circumscribing the reflecting surface 432) is, for example, 100 degrees or more and 150 degrees or less.

In the lighting module 420, the light emitted from the light source 421 is scattered by the light scattering member 422, expanded by the cylindrical lens 425, further diffused by the light diffusion member 426, and then passed through the half mirror 424 as a whole. Illuminated downward. The diffused light that has passed through the half mirror 424 is reflected by the reflecting surface 432 of the mirror member 430 located below the half mirror 424 . As shown in FIG. 12, the diffused light reflected by the reflecting surface 432 is mainly irradiated onto the end face Wc of the wafer W and the peripheral region Wd on the upper surface Wa side.

As shown in FIG. 13, the reflected light reflected by the peripheral region Wd of the upper surface Wa of the wafer W does not face the reflecting surface 432 of the mirror member 430, is reflected again by the half mirror 424, and does not pass through the focusing lens 427. The light passes through the lens 411 of the camera 410 and enters the image pickup device 412 of the camera 410 .

On the other hand, the reflected light reflected from the end surface Wc of the wafer W is sequentially reflected by the reflecting surface 432 of the mirror member 430 and the half mirror 424 , sequentially passes through the focusing lens 427 and the lens 411 of the camera 410 , and passes through the lens 411 of the camera 410 . The light enters the imaging device 412 .

In this manner, both the reflected light from the peripheral region Wd of the upper surface Wa of the wafer W and the reflected light from the end surface Wc of the wafer W and the mirror member 430 are input to the imaging element 412 of the camera 410 . Therefore, according to the first imaging subunit 400, both the edge area Wd (the area including the edge of the upper surface) of the upper surface Wa of the wafer W and the end surface Wc of the wafer W can be imaged simultaneously.

FIG. 14 is a schematic diagram showing an example of a captured image captured by the first imaging subunit 400. As shown in FIG. As shown in FIG. 14, the captured images captured by the first imaging subunit 400 include an image of the peripheral edge region Wd of the upper surface Wa of the wafer W viewed from above and an image of the end face Wc of the wafer W viewed from the side. The image is reflected.

The peripheral area Wd of the upper surface Wa of the wafer W and the end face Wc are imaged in a range of 360 degrees or more with the position of the notch Wn formed in the wafer W as a reference. Therefore, as shown in FIG. 14, the same notch Wn appears in two locations (both ends of the captured image) in the captured image.

As described above, the focusing lens 427 is provided between the reflected light reflected by the reflecting surface 432 of the mirror member 430 and the lens 411 . Therefore, between the optical path length of light reaching the imaging element 412 of the camera 410 from the end surface Wc of the wafer W and the optical path length of light reaching the imaging element 412 of the camera 410 from the peripheral region Wd of the upper surface Wa of the wafer W Even if there is an optical path difference, both the imaging position of the peripheral edge region Wd of the upper surface Wa of the wafer W and the imaging position of the end surface Wc of the wafer W can be aligned with the imaging device 412 . Therefore, both the edge area Wd of the upper surface Wa of the wafer W and the end surface Wc of the wafer W can be clearly imaged. Note that the focusing lens 427 is not arranged on the optical path of the light that reaches the imaging device 412 of the camera 410 from the peripheral region Wd of the upper surface Wa of the wafer W.

Next, the configuration of the second imaging subunit 500 will be described with further reference to FIG. FIG. 15 is a schematic diagram of the second imaging subunit 500 viewed from the side. As shown in FIG. 15 , the second imaging subunit 500 includes a camera 510 (an example of the other side imaging section) and an illumination module 520 .

A camera 510 includes a lens 511 and an imaging device 512 . The optical axis of camera 510 extends horizontally toward illumination module 520 .

The lighting module 520 is located below the lighting module 420 and below the wafer W held on the holding table 201 . The illumination module 520 has a half mirror 521 and a light source 522 . Half mirror 521 is arranged, for example, at an angle of 45 degrees with respect to the horizontal direction. Half mirror 521 has, for example, a rectangular shape.

The light emitted from the light source 522 located below the half mirror 521 passes through the half mirror 521 as a whole and is emitted upward. The light passing through the half mirror 521 passes through the lens 511 of the camera 510 and enters the imaging element 512 of the camera 510 . That is, the camera 510 can image the lower surface Wb of the wafer W existing in the irradiation area of the light source 522 via the half mirror 521 .

Note that the camera 410 of the first imaging subunit 400 takes an image, for example, in a range of 12 mm width along the radial direction of the wafer W from the outer edge of the wafer W, while the camera 510 of the second imaging subunit 500 An image is taken in a range of 50 mm width along the radial direction of the wafer W from the outer peripheral edge of the wafer W. As shown in FIG. Thus, using the captured image captured by the camera 510, not only the area processed by the edge processing unit 18 but also the state of the area processed by the bottom surface processing unit 19 can be confirmed.

<Configuration of control device>
Next, the configuration of the control device 5 will be described with reference to FIG. FIG. 16 is a block diagram showing an example of the configuration of the control device 5. As shown in FIG.

As shown in FIG. 16, the control unit 51 of the control device 5 includes, for example, a microcomputer having a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), input/output ports, etc. Including circuit. The control unit 51 includes a plurality of processing units that function when the CPU executes programs stored in the ROM using the RAM as a work area. Specifically, the control unit 51 includes a recipe execution unit 5101 , an image acquisition unit 5102 , an analysis unit 5103 , a feedback unit 5104 , a display control unit 5105 and a transfer unit 5106 . Part or all of the recipe execution unit 5101, the image acquisition unit 5102, the analysis unit 5103, the feedback unit 5104, the display control unit 5105, and the transfer unit 5106 are ASIC (Application Specific Integrated Circuit) or FPGA (Field Programmable Gate Array). ) or the like.

The storage unit 52 of the control device 5 is realized by, for example, a semiconductor memory device such as a RAM or a flash memory, or a storage device such as a hard disk or an optical disk. The storage unit 52 stores recipe data 5201 , image data 5202 and analysis data 5203 .

<Recipe execution unit>
The recipe execution unit 5101 controls the first transfer device 13, the second transfer device 17, the plurality of peripheral processing units 18, and the plurality of lower surface processing units 19 according to the recipe data 5201, thereby performing a series of substrate processing on the wafer W. Let them run.

Here, the flow of a series of substrate processing executed in the substrate processing system 1 according to this embodiment will be described with reference to FIG. FIG. 17 is a diagram showing the flow of wafers W in the substrate processing system 1 according to this embodiment.

As shown in FIG. 17, in the substrate processing system 1 according to the present embodiment, first, the first transfer device 13 takes out a plurality of wafers W from the cassette C, and places the taken out wafers W on the substrate platform 14. Place (step S01). Subsequently, the second transfer device 17 takes out one wafer W from the substrate platform 14, and transfers the taken out wafer W to the peripheral portion processing unit 18 (step S02).

Subsequently, the peripheral edge processing unit 18 performs peripheral edge removal processing on the loaded wafer W. As shown in FIG. Specifically, in the peripheral portion processing unit 18 , first, the holding portion 821 of the substrate holding mechanism 82 holds the wafer W, and the drive portion 823 rotates the holding portion 821 to rotate the wafer W held by the holding portion 821 . Rotate W. Subsequently, the first moving mechanism 833 and the second moving mechanism 834 place the upper nozzle 831 and the lower nozzle 832 at predetermined positions above and below the wafer W, respectively.

After that, the chemical solution supplied from the chemical solution supply source 73 is supplied to the upper surface peripheral portion and the lower surface peripheral portion of the rotating wafer W from the upper nozzle 831 and the lower nozzle 832, respectively. Thereby, the film is removed from the bevel portion of the wafer W. FIG. After that, the peripheral portion processing unit 18 performs rinsing processing and drying processing, and stops the rotation of the wafer W. FIG.

After that, the second transfer device 17 takes out the wafer W from the peripheral portion processing unit 18 and transfers the taken out wafer W to the imaging unit 15 (step S03).

Subsequently, the imaging unit 15 images the peripheral edge region Wd and the end surface Wc of the upper surface Wa of the wafer W and the peripheral edge region We of the lower surface Wb.

A series of processes executed in the imaging unit 15 will now be described with reference to FIG. FIG. 18 is a flow chart showing a series of processes executed in the imaging unit 15. As shown in FIG.

As shown in FIG. 18, the imaging unit 15 first performs notch alignment processing (step S101). The notch alignment process is a process of aligning the position of the notch Wn of the wafer W with a predetermined position.

Specifically, first, the rotation holding subunit 200 sucks and holds the wafer W using the holding table 201 , and rotates the holding table 201 using the actuator 202 to rotate the wafer W sucked and held on the holding table 201 . Rotate W. Subsequently, the notch detection subunit 300 detects the notch Wn formed in the wafer W by receiving the irradiation light from the light emitting element 320 with the light receiving element 330 . Then, the rotation holding subunit 200 uses the actuator 202 to rotate the wafer W by a predetermined angle, so that the position of the detected notch Wn is adjusted to a predetermined position. Thus, the rotational position of the wafer W is adjusted.

In this manner, the rotation holding subunit 200 that holds and rotates the wafer W by suction and the notch detection subunit 300 that detects the notch Wn formed in the wafer W determine the rotational position of the wafer W with respect to the imaging range of the imaging unit 15. It is an example of an adjustment mechanism for adjustment. The imaging unit 15 uses the rotation holding subunit 200 to hold and rotate the wafer W, detects the notch Wn using the notch detection subunit 300, and rotates the wafer W based on the detection result of the notch Wn. Adjust position. Note that the notch formed in the wafer W is not limited to the notch Wn, and may be, for example, an orientation flat (so-called orientation flat).

Also, here, an example in which the imaging unit 15 includes the rotation holding subunit 200 and the notch detection subunit 300 is shown as an example of the adjustment mechanism, but the configuration of the adjustment mechanism is not limited to the above example. For example, if the rotational position of the wafer W is known, the imaging unit 15 may include the rotation holding subunit 200 and an encoder for detecting the rotational position of the holding table 201 as adjustment mechanisms. In such a case, the imaging unit 15 sucks and holds the wafer W using the rotation holding subunit 200, and then rotates the holding table 201 by a predetermined angle, thereby starting the imaging process from a specific position in the circumferential direction of the wafer W. , the rotational position of the wafer W can be adjusted.

Subsequently, imaging processing is performed in the imaging unit 15 (step S102). The imaging process is a process of imaging the peripheral edge region Wd and the end face Wc of the upper surface Wa of the wafer W and the peripheral edge region We of the lower surface Wb.

Here, the flow of imaging processing will be described with reference to FIG. 19 . FIG. 19 is a timing chart showing the flow of imaging processing. Here, the rotational position of the wafer W at the start of the imaging process is defined as 0 degrees.

As shown in FIG. 19, when the imaging process is started, first, the light sources 421 and 522 of the illumination module 420 and the illumination module 520 are turned on (see t1 in FIG. 19). Subsequently, camera 410 and camera 510 are turned on, and imaging is started (see t2 in FIG. 19).

Subsequently, the actuator 202 of the rotation holding subunit 200 rotates the holding table 201, thereby starting the rotation of the wafer W held on the holding table 201 (see t3 in FIG. 19). The rotation speed of the wafer W at this time is lower than the rotation speed of the wafer W during the notch alignment process.

Subsequently, at the timing when the notch Wn of the wafer W is captured by the camera 510, the image data of the image captured by the camera 510 is started to be captured (see t4 in FIG. 19). In this example, when the rotational position of the wafer W reaches 75 degrees, the acquisition of the image data is started. The captured image data is stored in the storage unit 52 of the control device 5 .

Subsequently, at the timing when the notch Wn of the wafer W is captured by the camera 410, specifically at the timing when the rotation position of the wafer W reaches 90 degrees, the acquisition of the image data of the image captured by the camera 410 is started. (see t5 in FIG. 19). The captured image data is stored in the storage unit 52 of the control device 5 .

In the imaging unit 15 according to the present embodiment, since the installation location of the half mirror 521 is limited by the presence of the mirror member 430, the peripheral regions Wd and We at the same rotational position of the wafer W are captured by the cameras 410 and 510. Simultaneous imaging is difficult. Therefore, in order to align the imaging ranges of the cameras 410 and 510, the timings of capturing the image data are shifted (see t4 and t5 in FIG. 19). However, if the camera 410 and the camera 510 can capture images of the same rotational position, it is not necessary to shift the timing of capturing the image data between the camera 410 and the camera 510 .

Subsequently, at the timing when the wafer W rotates once and the rotational position of the wafer W reaches 75 degrees again, the capture of the image data of the camera 510 is completed (see t6 in FIG. 19). Similarly, at the timing when the rotational position of the wafer W reaches 90 degrees again, the capture of the image data of the camera 410 is completed (see t7 in FIG. 19). As a result, image data of the peripheral regions Wd and We and the end face Wc over the entire circumference of the wafer W are obtained.

Subsequently, the rotation of the wafer W is stopped at the timing when the rotation position of the wafer W reaches 0 degrees (see t8 in FIG. 19). As a result, the rotational position of the wafer W can be returned to the rotational position at the start of the imaging process, that is, the state in which the rotational position of the wafer W has been adjusted by the notch alignment process. After that, the cameras 410 and 510 are turned off (see t9 in FIG. 19), the light sources 421 and 522 of the illumination module 420 and the illumination module 520 are turned off (see t10 in FIG. 19), and the imaging process ends.

In this way, after adjusting the rotational position of the wafer W in the notch alignment process, the imaging unit 15 rotates the wafer W using the rotation holding subunit 200, and rotates the upper surface peripheral edge portion, the end surface, and the lower surface peripheral edge portion of the wafer W. are imaged over the entire circumference of the wafer W. As a result, image data covering the entire periphery of the wafer W, including the upper surface peripheral portion, the end surface, and the lower surface peripheral portion of the wafer W, can be obtained.

After the imaging process in the imaging unit 15 is finished, as shown in FIG. 17, the second transfer device 17 takes out the wafer W from the imaging unit 15 and transfers the taken out wafer W to the lower surface processing unit 19 (step SS04).

Subsequently, the bottom surface processing unit 19 performs a bottom surface removal process on the loaded wafer W. As shown in FIG. Specifically, in the lower surface processing unit 19 , first, the holding portion 921 of the substrate holding mechanism 92 holds the wafer W, and the driving portion 923 rotates the holding portion 921 to rotate the wafer W held by the holding portion 921 . to rotate.

After that, the chemical liquid supplied from the chemical liquid supply source 76 is supplied from the supply portion 93 to the central portion of the lower surface Wb of the rotating wafer W. As shown in FIG. The chemical solution supplied to the central portion of the lower surface Wb of the wafer W spreads over the entire lower surface Wb as the wafer W rotates. As a result, the film is removed from the entire lower surface Wb of the wafer W. Next, as shown in FIG. After that, the lower surface processing unit 19 performs rinsing processing and drying processing, and stops the rotation of the wafer W. FIG.

When the lower surface processing unit 19 finishes the lower surface removal processing, the second transfer device 17 takes out the wafer W from the lower surface processing unit 19 and transfers the taken out wafer W to the imaging unit 15 (step S05). In the imaging unit 15, the above-described alignment processing and imaging processing are performed again. Image data obtained by the imaging process is stored in the storage unit 52 of the control device 5 .

Subsequently, the second transfer device 17 takes out the wafer W from the imaging unit 15 and places the taken out wafer W on the substrate platform 14 (step S06). After that, the first transfer device 13 takes out the wafer W from the substrate mounting part 14, and stores the taken out wafer W in the cassette C (step S07). This completes a series of substrate processing.

<Image acquisition unit>
Returning to FIG. 16, the description of the control unit 51 is continued. The image acquisition unit 5102 acquires image data from the imaging unit 15 and stores it in the storage unit 52 as image data 5202 in association with the identification number of the wafer W, the imaging date and time, and the like.

<Analysis part>
The analysis unit 5103 performs image analysis on the image data 5202 stored in the storage unit 52 .

For example, the analysis unit 5103 determines the degree of film removal on the upper peripheral edge portion and the end face Wc of the wafer W based on the data of the image captured by the camera 410 in the image data 5202 . This determination is made, for example, based on the difference in color (difference in pixel value) between the area Wd1 supplied with the chemical and the area Wd2 not supplied with the chemical (see FIG. 14).

Similarly, the analysis unit 5103 determines the degree of removal of the film in the peripheral region We of the lower surface Wb of the wafer W based on the image data captured by the camera 510 in the image data 5202 .

Also, the analysis unit 5103 calculates the cut width based on the data of the image captured by the camera 410 in the image data 5202 . Specifically, the analysis unit 5103 calculates the cut width at each position on the entire circumference of the wafer W. FIG. Then, the analysis unit 5103 calculates an average value of the calculated maximum values Hmax and maximum values Hmin (see FIG. 14) of the plurality of cut widths as the cut width.

Note that the method of calculating the cut width is not limited to the above example. For example, the analysis unit 5103 may calculate the cut width at each position on the entire circumference of the wafer W, and calculate the average value of the calculated multiple cut widths as the cut width.

Analysis unit 5103 also calculates the amount of eccentricity of wafer W based on the image data captured by camera 410 in image data 5202 . The amount of eccentricity of the wafer W is the amount of deviation between the center of the wafer W and the center of rotation of the substrate holding mechanism 82 . For example, if the center position of the wafer W deviates from the center of rotation of the substrate holding mechanism 82, the edge region Wd of the upper surface Wa of the wafer W will have an uneven cut width. The unevenness of the cut width appears in a sinusoidal shape in the circumferential direction of the wafer W, as shown in FIG. Therefore, the analysis unit 5103 can calculate the amount of eccentricity of the wafer W based on the amplitude of the sine wave.

Further, the analysis unit 5103 detects defects in the peripheral region Wd of the upper surface Wa of the wafer W and the end face Wc based on the data of the image captured by the camera 410 in the image data 5202 . If the wafer W has a defect, the defective portion exhibits a different color than the surroundings. Therefore, the analysis unit 5103 can detect, for example, a region of pixels in which the difference in pixel value from adjacent pixels is equal to or greater than a threshold as a defective portion.

Similarly, the analysis unit 5103 detects defects in the peripheral area We of the lower surface Wb of the wafer W based on the data of the image captured by the camera 510 in the image data 5202 .

Note that the analysis unit 5103 can also identify the type of defect from the shape of the detected defect portion. Types of defects include scratches, chips, and the like.

Further, analysis unit 5103 calculates the amount of warp of wafer W based on the data of the image captured by camera 410 in image data 5202 . For example, the analysis unit 5103 can calculate the warp amount of the wafer W from the shape of the end surface Wc of the wafer W. FIG.

The analysis unit 5103 stores these analysis results in the storage unit 52 as analysis data 5203 .

<Feedback section>
The feedback unit 5104 changes the recipe data 5201 based on the analysis data 5203 stored in the storage unit 52 so that the upper surface peripheral portion and the lower surface peripheral portion of the wafer W are fed from the upper nozzle 831 and the lower nozzle 832 in the peripheral portion processing. Correct the ejection time of the chemical solution to the

For example, the feedback unit 5104 changes the recipe data 5201 based on the degree of film removal on the upper surface peripheral edge of the wafer W and the end face Wc, so that the chemical solution from the upper nozzle 831 and the lower nozzle 832 during the peripheral edge removal process. lengthen the ejection time. As a result, it is possible to optimize the discharge time of the chemical liquid to the wafer W to be processed thereafter.

Further, the feedback unit 5104 changes the recipe data 5201 based on the degree of film removal on the lower surface Wb of the wafer W, thereby lengthening the discharge time of the chemical solution from the supply unit 93 during the lower surface removal process. As a result, it is possible to optimize the discharge time of the chemical liquid to the wafer W to be processed thereafter.

Further, the feedback unit 5104 changes the recipe data 5201 based on the cut width information in the analysis data 5203, thereby adjusting the positions of the upper nozzle 831 and the lower nozzle 832 during the edge removal process. For example, if the cut width (the average of the maximum value Hmax and the minimum value Hmin) included in the analysis data 5203 is larger than the predetermined cut width, the chemical liquid discharged from the upper nozzle 831 and the lower nozzle 832 will The positions of the upper nozzle 831 and the lower nozzle 832 are corrected so that the ink is supplied to the outer peripheral side. In other words, by changing the amount of movement of the upper nozzle 831 and the lower nozzle 832 by the first moving mechanism 833 and the second moving mechanism 834, the processing positions of the upper nozzle 831 and the lower nozzle 832 in the edge processing are corrected. This makes it possible to optimize the ejection position of the chemical liquid with respect to the wafer W to be processed thereafter.

Further, the feedback unit 5104 corrects the horizontal position of the wafer W with respect to the substrate holding mechanism 82 of the peripheral processing unit 18 by changing the recipe data 5201 based on the cut width information in the analysis data 5203 .

For example, the feedback unit 5104 is configured so that the difference between the cut width at the 0-degree rotation position and the cut width at the 180-degree rotation position is small, and the cut width at the 90-degree rotation position and the cut width at the 270-degree rotation position The position of the wafer W to be attracted and held by the substrate holding mechanism 82 is corrected so that the difference from the cut width becomes small. As a result, the operation of placing the wafer W on the substrate holding mechanism 82 by the second transfer device 17 is corrected, and the eccentricity of the wafer W to be processed thereafter is suppressed.

Although the eccentricity of the wafer W is suppressed by correcting the operation of the second transfer device 17 here, the target of correction is not limited to the operation of the second transfer device 17 . For example, when the edge processing unit 18 is provided with an adjusting mechanism for adjusting the horizontal position of the wafer W, the position of the wafer W attracted and held by the substrate holding mechanism 82 is corrected by correcting the operation of the adjusting mechanism. It is possible to

<Display control part>
The display control unit 5105 retrieves the image data 5202 from the storage unit 52 and causes the display unit 7 to display the image data 5202 in response to the user's operation on the operation unit 6, for example. Thereby, the user can confirm the state of the edge regions Wd and We of the upper surface Wa and the lower surface Wb of the wafer W, as well as the end surface Wc. Further, the display control unit 5105 retrieves the analysis data 5203 from the storage unit 52 and causes the display unit 7 to display it, for example, in response to the user's operation on the operation unit 6 . Thereby, the user can confirm the analysis result by the analysis unit 5103 .

Note that the operation unit 6 is, for example, a keyboard or touch panel, and the display unit 7 is, for example, a liquid crystal display. The operation unit 6 and the display unit 7 may be attached to the substrate processing system 1 or may be installed at a location away from the substrate processing system 1 .

<Transfer part>
Transfer unit 5106 transmits image data 5202 and analysis data 5203 stored in storage unit 52 to external device 8 via a network such as a LAN (Local Area Network). The transfer unit 5106 may transmit newly stored image data 5202 or analysis data 5203 to the external device 8 each time the image data 5202 or analysis data 5203 is stored in the storage unit 52 . Further, the transfer unit 5106 may transmit the image data 5202 or the analysis data 5203 selected by the user's operation on the operation unit 6 to the external device 8, for example.

As described above, the substrate processing system 1 (an example of a substrate processing apparatus) according to this embodiment includes the loading/unloading station 2 , the transfer station 3 , the processing station 4 and the imaging unit 15 . The loading/unloading station 2 has a first transport device 13 that takes out a wafer W (an example of a substrate) from the cassette C and transports it. The transfer station 3 is arranged adjacent to the loading/unloading station 2 and has a substrate mounting section 14 on which the wafer W transferred by the first transfer device 13 is mounted. The processing station 4 is arranged adjacent to the transfer station 3, and includes a second transfer device 17 that takes out the wafer W from the substrate platform 14 and transfers it, and a plurality of processing stations that process the wafer W transferred by the second transfer device 17. edge portion processing unit 18 and bottom surface processing unit 19 (an example of a processing unit). The image pickup unit 15 is arranged in the delivery station 3 and picks up an image of the edge portion of one of the upper surface Wa and the lower surface Wb of the wafer W and the end surface Wc of the wafer W. FIG.

Further, the substrate processing system 1 (an example of a substrate processing apparatus) according to the present embodiment includes a cassette mounting section 11, a peripheral portion processing unit 18 (an example of a processing unit), a transport section 12, a delivery station 3, and a transport section. 16 (an example of a transport area) and an imaging unit. The cassette mounting portion 11 mounts a cassette C containing a plurality of wafers W (an example of substrates). The peripheral edge processing unit 18 cleans or etches the peripheral edge of the wafer W taken out from the cassette C. As shown in FIG. The transfer section 12, the delivery station 3 and the transfer section 16 are provided between the cassette mounting section 11 and the edge portion processing unit 18, and the wafer W is transferred. The image pickup unit 15 is provided in the transfer station 3 and picks up an image of the edge portion of one of the upper surface Wa and the lower surface Wb of the wafer W processed by the edge processing unit 18 and the end surface Wc of the wafer W.

Therefore, according to the substrate processing system 1 of the present embodiment, it is possible to check the state of the peripheral portion of the wafer W while suppressing an increase in size of the apparatus.

<Modification>
In the above-described embodiment, the image pickup processing is performed by the image pickup unit 15 after the edge portion removal processing by the edge portion processing unit 18 and after the bottom surface removal processing by the bottom surface processing unit 19, respectively. It is not limited to the above examples.

Modified examples of the timing for performing the imaging process will be described below with reference to FIGS. 20 to 22. FIG. 20 is a diagram showing the flow of wafers W in the substrate processing system 1 according to the first modification, and FIG. 21 is a diagram showing the flow of wafers W in the substrate processing system 1 according to the second modification. FIG. 22 is a diagram showing the flow of wafers W in the substrate processing system 1 according to the third modification.

In the following description, the same reference numerals as those already described are given to the same parts as those already described, and overlapping descriptions will be omitted.

For example, as shown in FIG. 20, the substrate processing system 1 may perform the imaging process after the bottom surface removal process by the bottom surface processing unit 19 without performing the imaging process after the edge removal process. Thereby, it is possible to confirm the state of the wafer W after the peripheral portion removing process and the lower surface removing process by one imaging process.

Further, as shown in FIG. 21 , the substrate processing system 1 performs imaging processing by the imaging unit 15 not only after the lower surface removal processing by the lower surface processing unit 19 but also before the peripheral edge portion removal processing by the peripheral edge processing unit 18 . may

In this case, the analysis unit 5103 can more accurately detect the defect of the wafer W based on the difference between the image data 5202 before and after the edge removal process. For example, when the analysis unit 5103 detects a defect based on the image data 5202 after the bottom surface removal processing, the detected defect portion and the portion where the defect is detected in the image data 5202 before the peripheral edge portion removal processing. Compare with identical parts. Then, if there is no change in both, the analysis unit 5103 detects the portion as having a defect.

Alternatively, as shown in FIG. 22 , the substrate processing system 1 may perform only the imaging process without performing the edge removal process by the edge part processing unit 18 and the bottom surface removal process by the bottom surface processing unit 19 . That is, in the substrate processing system 1, a wafer W whose peripheral portion and bottom surface have been processed in another apparatus may be loaded into the imaging unit 15, and after imaging processing is performed on the wafer W, the wafer W may be returned to the cassette C.

In the above-described embodiment, the first imaging subunit 400 is used to image the peripheral edge region Wd and the end face Wc of the upper surface Wa of the wafer W, and the second imaging subunit 500 is used to image the peripheral edge region We of the lower surface Wb of the wafer W. I decided to take a picture. However, the present invention is not limited to this, and by vertically inverting the arrangement of the first imaging subunit 400 and the second imaging subunit 500, the first imaging subunit 400 can be used to detect the peripheral edge region We and the end surface Wc of the lower surface Wb of the wafer W. may be imaged, and the peripheral area Wd of the upper surface Wa of the wafer W may be imaged using the second imaging subunit 500 .

Further, in the above-described embodiment, the imaging unit 15 is arranged in the delivery station 3, but the imaging unit 15 may be arranged in a transport area other than the delivery station 3, such as the transport section 12 or the transport section 16. .

Further effects and modifications can be easily derived by those skilled in the art. Therefore, the broader aspects of the invention are not limited to the specific details and representative embodiments so shown and described. Accordingly, various changes may be made without departing from the spirit or scope of the general inventive concept defined by the appended claims and equivalents thereof.

C Cassette W Wafer Wa Top surface of wafer Wb Bottom surface of wafer Wc Edge surface of wafer Wd Top surface of wafer peripheral edge area We Bottom peripheral edge area of wafer 14 Substrate mounting unit 15 Imaging unit 17 Second transfer device 18 Edge processing unit 19 Bottom surface Processing unit 200 rotation holding subunit 300 notch detection subunit 400 first imaging subunit 410 camera 420 illumination module 430 mirror member 500 second imaging subunit 510 camera 520 illumination module

Claims (4)

a plurality of processing units for processing substrates;
an imaging unit for imaging a peripheral portion of one of the upper surface and the lower surface of the substrate and an end surface of the substrate;
an analysis unit that analyzes the image captured by the imaging unit,
at least one of the plurality of processing units is a periphery processing unit for etching away a film from a bevel portion including a periphery and an end surface of the substrate;
The imaging unit is
a rotation holding subunit that rotatably holds the substrate;
a peripheral portion of one of an upper surface and a lower surface of the substrate and an end surface of the substrate disposed around the transfer position of the substrate with respect to the rotation holding subunit and held by the rotation holding subunit at the transfer position; and an imaging subunit for imaging,
The analysis unit is
A substrate processing apparatus that performs at least one of determining the degree of removal of the film and calculating the width of removal of the film at the edge of one of the upper surface and the lower surface of the substrate and the end surface of the substrate based on the image. The analysis unit is
2. The substrate processing apparatus according to claim 1, wherein the amount of eccentricity of said substrate is calculated based on said image. The analysis unit is
3. The substrate processing apparatus according to claim 1, wherein defects in the peripheral portion and the end surface of said substrate are detected based on said image. The analysis unit is
4. The substrate processing apparatus according to claim 1, wherein the amount of warpage of said substrate is calculated based on said image.

Images