JP7253203B2 - DC/DC converter control program - Google Patents

Description

The present invention relates to a control program for a DC/DC converter.

2. Description of the Related Art In recent years, DC/DC converters have attracted attention for switching control using a so-called peak current control method (see Patent Document 1, for example). According to the technique described in Patent Document 1, by IV converting the output current flowing through the switching element by the IV conversion means, the current of the inductor is converted into a voltage and detected, and the peak current of the inductor is used as the current command. It is feedback controlled to reach the value. It is known that the peak current mode control type is superior in transient response characteristics as compared with the so-called voltage mode and average current mode control methods.

On the other hand, a digital control system capable of coping with a wide range of input/output conditions is becoming popular. If the control method of the DC/DC converter can be fully digitalized, the hardware can be greatly simplified, and the size and cost can be reduced. However, in the digital control method, the voltage and current are sampled discretely. Therefore, even if the conventional digital control method is increased in frequency as it is, the number of samplings per control cycle is reduced. In the peak current control method described above, it is necessary to continuously detect the current in real time, so it is difficult to apply the digital control method and continue to detect the current at a high sampling frequency.

In the technique described in Patent Document 1, although the current command value in the peak current control format is generated using a digital compensator, the D/A converter converts the command value into an analog signal and then compares it with the current detection value. This avoids undersampling. However, since an extra analog circuit is required, the size of the circuit board and the cost increase.

Moreover, if the peak current control system is adopted, subharmonic oscillation may occur. Normally, this oscillation is prevented by slope compensation, but if the slope compensation value is too large, high-speed response cannot be achieved.

Japanese Patent Application Laid-Open No. 2015-33200

SUMMARY OF THE INVENTION It is an object of the present invention to provide a DC/DC converter control program capable of preventing subharmonic oscillation without slope compensation.

According to the first aspect of the present invention, the output voltage (Vo) is set to the target voltage by controlling the switching of the current flowing through the inductor (6) while changing the duty ratio every time the duty ratio change unit period N is an integral multiple of the switching period. The target is a control program for a DC/DC converter (1) that controls to

According to the first aspect of the invention, the control device (9) acquires the sampling results of the input voltage (Vi), the output voltage (Vo), and the inductor current ( _IL ) flowing through the inductor in the past switching cycle. The first procedure and the second procedure of calculating the duty ratio during the duty ratio changing period so that the peak calculated value of the inductor current reaches the current command value in the current target setting period M are executed. At this time, in the second procedure, the current target setting cycle M is set to an integer value that satisfies the condition of M≧N/2+1, which is later than half the duty change unit cycle N. Thereby, subharmonic oscillation can be prevented without slope compensation.

Electrical configuration diagram of a DC/DC converter according to one embodiment Flowchart for explaining contents of digital arithmetic processing according to one embodiment Part 1 of a timing chart showing the flow of processing according to one embodiment FIG. 4 is an explanatory diagram of an error between an ideal steady-state current flowing through an inductor and an actual current according to one embodiment; Part 2 of the timing chart showing the flow of processing according to one embodiment Part 3 of the timing chart showing the flow of processing according to one embodiment

An embodiment applied to the DC/DC converter 1 will be described below. The DC/DC converter 1 illustrated in FIG. 1 is configured by a Buck converter that converts an input voltage Vi input from a DC voltage source 2 and supplies a DC output voltage Vo to a load 3 .

- Configuration of DC/DC converter 1 The DC/DC converter 1 is configured using a switching element 4 , a diode 5 , an inductor 6 , and capacitors 7 and 8 . In this embodiment, the switching element 4 is configured by an N-channel MOSFET, but the type of switching element 4 is not limited.

DC voltage source 2 is applied to the drain of switching element 4 via capacitor 8 . A cathode and an anode of a diode 5 are connected between the source of the switching element 4 and the ground. A common connection point between the source of the switching element 4 and the cathode of the diode 5 is connected to one end of the inductor 6, and the capacitor 7 is connected between the other end of the inductor 6 and the ground. A load 3 is connected after the capacitor 7 .

The control device 9 controls the energization current of the inductor 6 by a peak current mode control method, and controls the output voltage Vo to a predetermined target voltage. The control device 9 performs PWM (Pulse Wide Modulation) control that controls the duty ratio D, the so-called duty ratio, with the same switching period Ts. The control device 9 includes a digital arithmetic circuit 10 such as a DSP capable of executing predetermined digital arithmetic processing. The control device 9 also includes a driver 11 and A/D converters 13-15.

A current sensor 12 is provided in the conducting path of the inductor 6, and the current sensor 12 detects the current flowing through the inductor 6, that is, the inductor current _IL . The A/D converter 13 A/D-converts the inductor current _IL and outputs it to the digital operation circuit 10 .

Further, the A/D converter 14 A/D converts the output voltage Vo and outputs it to the digital operation circuit 10 . The A/D converter 15 A/D converts the input voltage Vi and outputs it to the digital operation circuit 10 .

A digital arithmetic circuit 10 receives the output data of the A/D converters 13 to 15, digitally arithmetically processes the data by a peak current mode control method, and produces a digital command value indicating the duty ratio D that has been arithmetically processed. Output to driver 11 . At this time, the digital arithmetic circuit 10 calculates the duty ratio D based on the inductance value L of the inductor 6, the inductor current I _L , and the output voltage Vo, and outputs a digital command value indicating the duty ratio D to the driver 11 .

The driver 11 inputs a digital command value from the digital arithmetic circuit 10 and applies to the gate of the switching element 4 a pulse with a predetermined switching period Ts and with the input duty ratio D. FIG. The driver 11 outputs an ON drive signal to the gate of the switching element 4 during the ON period according to the given duty ratio D, and outputs an OFF drive signal to the gate of the switching element 4 during the OFF period.

- Basic Flow of Digital Operation Processing The details of the digital operation processing executed by the digital operation circuit 10 will be described below. FIG. 2 exemplifies a simplified flow of the processing procedure. In steps S1 and S2, the digital arithmetic circuit 10 acquires the output voltage Vo and the inductor current _IL in the past switching cycle Ts (corresponding to the first procedure), and calculates the slopes _mOFF and _mON of the inductor current _IL . , in step S3, the duty ratio D is calculated based on the slopes m _OFF and m _ON (corresponding to the second procedure). The control device 9 controls switching of the switching element 4 using the duty ratio D calculated by the digital arithmetic circuit 10 .

The slope m _OFF indicates the slope while the switching element 4 is switching off. The slope m _ON indicates the slope while the switching element 4 is switching on. The number of times the A/D converter 13 samples the inductor current _IL is once per cycle of the switching period Ts. The number of times the A/D converter 15 samples the output voltage Vo is also once per cycle of the switching period Ts.

Calculation method of slope m _OFF in step S1 The slope m _OFF during the OFF period can be obtained by using a general formula as shown in formula (1) when the voltage across the inductor 6 is _vL .

Here, the output voltage Vo[] sampled by the A/D converter 14 every switching period Ts is defined as shown in FIG. It is also assumed that the slopes m _OFF , m _ON of the inductor current I _L are constant during the few switching cycles involved in the computation. When the slope m _OFF [n] (=m _OFF [n-1]) during the OFF period shown in FIG. 3 is obtained from the output voltage Vo[n-1], the equation (2) is obtained.

The digital arithmetic circuit 10 calculates the slope m _OFF of the inductor current I _L using the equation (2) at step S1 in FIG. The relationship between the inductor current I _L [n-1] for n-1 cycles and the inductor current I _L [n-2] for n-2 cycles using a recurrence formula is expressed as Equation (3). be able to.

As shown in FIG. 3, the sampling time T _sample indicates the time from the timing when the switch drive signal is turned on to the timing when the A/D converter 14 samples the output voltage Vo. D[n-2] indicates the duty ratio D of the n-2th cycle. In order for the formula (3) to hold, the inductor current I _L must be sampled during the ON period of the switching element 4, so the sampling time T _sample is set to the following formula (4-1) and (4- 2) It is set so as to satisfy the formula.

Method of Calculating the Inclination m _ON in Step S2 Solving the expression (3) for the inclination m _ON [n] during the ON period yields the following expression (5).

By substituting equation (2) into equation (5) and solving, inductor currents I _L [n-2], I _L [n-1] and n- The slope m _ON [n] during the ON period of the n-th cycle can be obtained using the duty ratio D[n−2] of the second cycle. Therefore, the digital arithmetic circuit 10 uses the inductor currents I _L [n-2] and I _L [n-1] for the most recent two times in the past, and from the relational expressions of the equations (2) and (5), The slope m _ON [n] can be calculated.

・Basic calculation method for the duty ratio D[] in step S3 After this, the digital calculation circuit 10 calculates the current command value I _Lcom [n] based on the predetermined calculation logic of the peak current mode control method, and In S3, a duty ratio D[n] for reaching the current command value I _Lcom [n] is calculated.

After the digital arithmetic circuit 10 calculates the duty ratio D[n], the control device 9 drives the switching element 4 based on the calculated duty ratio D[n]. After that, the digital arithmetic circuit 10 sequentially repeats the processing in the next and subsequent switching cycles Ts from step S1. Thereby, the control device 9 can control the output voltage Vo to the target voltage by continuing the switching control of the switching element 4 .

Since this embodiment is characterized by the method of calculating the duty ratio D[ ], the technical significance of this will be described below, and then the method of calculating the duty ratio D[ ] will be described in detail by showing a specific example.
・Explanation of comparative technology In general, the digital control technology of the peak current mode control method uses sampling data of the past output voltage Vo [ ] and the past input voltage Vi [ ], and uses the P control method, PI control method, and PID control method. A current command value I _Lcom [ ] is calculated based on a predetermined control method such as . After that, when the time ratio D[ ] that reaches the current command value I _Lcom [ ] is obtained, the slope compensation value ms indicating a positive slope is used as shown in equation (6). Then, the slope m _ON [n] of the inductor current _IL during the ON period is temporarily increased, and control is performed so that the peak calculated value of the inductor current _IL reaches the next current command value I _Lcom [n]. there is

In this equation (6), the second term on the right side indicates the amount of increase in the inductor current I _L during the ON period of the (n−1) cycle. The third term on the right side indicates the amount of decrease in the inductor current _IL during the off period of the (n−1)th cycle. The fourth term on the right side indicates the amount of increase in the inductor current _IL during the ON period of the nth cycle. In the fourth term on the right side of the equation (6), by performing slope compensation using the slope compensation value ms that satisfies the following equation (7), even if the switching control is repeated periodically for a long period of time, the error is reduced per unit time. It becomes possible to compensate and prevent subharmonic oscillation.

However, if the slope compensation value ms is made too large as described in the background art section, high-speed response becomes impossible when the deviation from the slope m _ON [n] during the actual ON period becomes large. It takes a lot of man-hours to derive an appropriate slope compensation value ms.

-Technical Significance of the Present Embodiment Therefore, the inventors searched for a condition under which the error can be converged without using the slope compensation value ms even when the switching control is repeated. The inventors are considering a peak current mode control method in which the duty ratio D[ ] is changed every duty ratio change unit period N×switching period Ts. The duty change unit period N is an integer value of 1 or more. In the following description, M is the current target setting cycle.

In FIG. 4, the target current flowing through the inductor 6 in a steady state is indicated by a dashed line, and an example of the actual inductor current _IL flowing through the inductor 6 is indicated by a solid line. An ideal stationary current repeatedly fluctuates up and down between a predetermined high current value _IHI and a predetermined low current value _ILO . Assuming that the initial value of the error between the actual inductor current I _L and the ideal steady-state current of the inductor 6 is ΔI _L (0), the error after the subsequent N-th switching cycle (=N·Ts) is ΔI _L (N·Ts) can be expressed as in the following equation (8).

As shown in the expression (8), the final error ΔI _L (N·Ts) is obtained by accumulating the current error occurring in one switching period Ts N times. It is assumed that the error ΔD of the duty ratio D at this time is constant for N cycles. The reference value _ΔIL (0) of the error of the inductor current I _L corresponds to the error current integrated value until the target current value is reached for the M-th time, and can be expressed as in equation (9).

（１０）式を（８）式に代入すると（１１）式のようになる。

Solving equation (9) for ΔD·Ts yields equation (10).

Substituting equation (10) into equation (8) yields equation (11).

When an ideal steady-state current flows through the inductor 6, the duty ratio D is uniquely determined between the slope m _ON during the ON period and the slope m _OFF during the OFF period. Therefore, when the equation (11) is developed based on the steady state relationship between the duty ratio D and the slopes m _ON and m _OFF , the following equation (12) is obtained.

When the absolute value of the error current ΔI _L (N·Ts) becomes less than 1 after N cycles have passed, as shown in equation (13), by continuing the same peak current mode control method, the ideal will eventually converge to a steady-state current, and harmonic oscillation will no longer occur.

Solving this equation (13) for the duty ratio D yields equation (14).

Since the duty ratio D is less than or equal to 1, it can be expressed as in equation (15).

Slope compensation can be made unnecessary by satisfying the relationship between the current target setting period M and the duty ratio change unit period N shown in the equation (15). That is, if the duty ratio change unit period N=1, the current target setting period M should be an integer value of 2 or more, and if the duty ratio change unit period N=2, the current target setting period M=2 or more. and should be.

If the duty ratio change unit period N=3, the current target setting period M should be 3 or more, and if the duty ratio change unit period N=4, the current target setting period M should be 3 or more. . If the duty ratio change unit period N is increased, the number of calculations of the duty ratio D per unit time can be reduced, and the amount of calculation can be reduced. If the amount of calculation can be reduced, even a low-spec digital calculation circuit 10 can be used to handle a higher switching frequency. For example, by setting the duty ratio change unit period N to be greater than 1, it is possible to avoid a bottleneck in computation time.

Conversely, if emphasis is placed on the response performance in which the output voltage Vo reaches the target, it is desirable to minimize the duty ratio change unit period N and the current target setting period M. If the duty ratio change unit period N=1, good. At this time, it is desirable to set the current target setting period M=2, which satisfies the condition of the expression (15).

Concrete Example of Method of Calculating Duty Ratio D[ ] in Step S3 A specific example in the case of setting the duty ratio change unit period N=1 and the current target setting period M=2 as described above will be described. In particular, a specific example of the method of calculating the duty ratio D[ ] in step S3 of FIG. 2 will be described. The digital arithmetic circuit 10 calculates a current command value I _Lcom [] based on a predetermined control method such as a P control method, a PI control method, or a PID control method using sampling data of the past output voltage Vo []. . The digital arithmetic circuit 10 may calculate the current command value _ILcom [] using the past sampling data of the output voltage Vo[] and the past sampling data of the input voltage Vi[].

For example, the digital arithmetic circuit 10 calculates the current command value I _Lcom [n-1] using sampling data of the most recent past output voltage Vo[n-2] before timing t0 in FIG. For example, if the output voltage Vo[n-2] is high, the current command value I _Lcom [n-1] is set low, and if the output voltage Vo [n-2] is low, the current command value I _Lcom [n-1] is set It is better to set it higher.

As illustrated in FIG. 3, the output voltage Vo gradually changes with a phase lag in accordance with changes in the inductor current _IL . As described above, by setting the duty ratio change unit period N=1 and the current target setting period M=2, the digital arithmetic circuit 10 causes the peak calculated value of the inductor current _IL to be the current command value at the M=2nd period. Calculate the duty ratio D[n-1] so as to reach I _Lcom [n-1]. The control device 9 drives the switching element 4 based on the duty ratio D[n−1] calculated by the digital calculation circuit 10 .

Similarly, in the subsequent switching period Ts between timings t0 and t1, the digital arithmetic circuit 10 calculates the current command value I _Lcom [n] using sampling data of the most recent output voltage Vo[n−1].

As illustrated in FIG. 5, similarly in the switching period Ts from timing t0 to t1, the digital arithmetic circuit 10 causes the peak calculated value of the inductor current I _L to reach the current command value I _Lcom [n] in M=2 cycles. Calculate the duty ratio D[n] so as to reach The control device 9 drives the switching element 4 at timings t1 to t2 based on the duty ratio D[n−1] calculated by the digital calculation circuit 10 .

Similarly, the control device 9 repeats the switching control according to the peak current mode control method after the subsequent timing t2. Then, as illustrated in FIG. 6, the inductor current I _L reaches the current command value I _Lcom [n+1]. Thereby, the control device 9 can perform switching control so that the inductor current I _L reaches the current command value I _Lcom [ ] while preventing subharmonic oscillation of the DC/DC converter 1 .

As described above, according to the control device 9 according to the present embodiment, the sampling results of the input voltage Vi, the output voltage Vo, and the inductor current _IL flowing through the inductor 6 in the past switching cycle Ts are acquired, and the inductor current I The duty ratio D[ ] is calculated between the duty change unit cycle N×switching cycle Ts so that the peak calculated value of _L reaches the current command value I _Lcom in the current target setting cycle M. At this time, when the current target setting cycle M is set to an integer value that satisfies the condition of M≧N/2+1 later than half the duty ratio change unit cycle N, subharmonic oscillation is performed without slope compensation. can be prevented.

Further, according to this embodiment, the sampling period of the A/D converters 13 to 15 is set once in one cycle of the switching period Ts. Therefore, it is not necessary to shorten the sampling period of the A/D converters 13 to 15, and it is possible to cope with the case of operating at a higher switching frequency. The digital arithmetic circuit 10 of the control device 9 calculates the duty ratio D[] at which the inductor current _IL reaches the peak calculation value based on the past two sampling results of the inductor current _IL . It is possible to realize switching control by the peak current mode control method while sampling every Ts.
According to this embodiment, it can be fully digitalized.

(Other embodiments)
The present invention is not limited to the configuration examples of the above-described embodiments, and various modifications and extensions are possible. Further, for example, it is also possible to apply a combination of the configurations of the above-described embodiments.

As the DC/DC converter 1, a form exemplifying a Buck converter has been described, but the present invention is not limited to this. For example, a forward converter may be applied, or another type of DC/DC converter may be applied, and the types are not limited. Also, the DC/DC converter 1 can be applied to either a step-down type or a step-up type. Further, using sampling data of the input voltage Vi, the slope m _off may be calculated based on the relational expression of (output voltage Vo−input voltage Vi)/inductance value L, and the slope _mon may be calculated. .

The switching element 4 may be configured using any kind of transistor. The switching element 4 may be configured using, for example, a bipolar type NPN transistor, PNP transistor, or the like.

The digital arithmetic circuitry 10 and techniques thereof of the controller 9 described in this disclosure are provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program. It may also be implemented by a dedicated computer. Alternatively, the digital arithmetic circuitry 10 of the controller 9 and techniques described in this disclosure may be implemented by a dedicated computer provided by configuring the processor with one or more dedicated hardware logic circuits.

Alternatively, the digital arithmetic circuitry 10 and techniques of the controller 9 described in this disclosure may be configured with a processor and memory and one or more hardware logic circuits programmed to perform one or more functions. It may also be implemented by one or more dedicated computers configured in combination with processors. The computer program may also be stored as computer-executable instructions on a computer-readable non-transitional tangible recording medium.

A mode in which part of the above embodiment is omitted as long as the problem can be solved can also be regarded as an embodiment. In addition, all conceivable aspects can be regarded as embodiments as long as they do not deviate from the essence of the invention specified by the language in the claims.

Although the present invention has been described with reference to the embodiments described above, it is understood that the invention is not limited to such embodiments or constructions. The present invention includes various modifications and modifications within the equivalent range. In addition, various combinations and configurations, as well as other combinations and configurations including one, more, or less elements thereof, are within the scope and spirit of the invention.

In the drawing, 1 is a DC/DC converter, 6 is an inductor, 9 is a controller, Vi is an input voltage, Vo is an output voltage, _IL is an inductor current, M is a current target setting cycle, N is a duty ratio change unit cycle, indicates

Claims (5)

A DC/DC converter (1) that controls an output voltage (Vo) to a target voltage by controlling switching of a current flowing through an inductor (6) while changing a duty ratio each time a duty ratio change unit cycle N times a switching cycle Ts. a control program for
to the controller (9),
a first step of obtaining sampling results of the input voltage (Vi), the output voltage (Vo), and the inductor current (I _L ) flowing through the inductor in a past switching cycle;
a second step of calculating the duty ratio between the duty ratio change unit period N×switching period Ts so that the peak calculated value of the inductor current reaches the current command value in the current target setting period M;
is to execute
In the second step, the DC/DC converter control program for setting the current target setting period M to an integer value satisfying the condition of M≧N/2+1 later than 1/2 of the duty ratio change unit period N. 2. The control program for a DC/DC converter according to claim 1, wherein the sampling result acquired by said first procedure is a result sampled once for each of said past switching cycles. In the first procedure, the sampling results of the two most recent switching cycles in the past are acquired, and in the second procedure, the duty ratio of the switching cycle is calculated based on the sampling results of the two most recent switching cycles. 3. A control program for a DC/DC converter according to claim 2. 2. A control program for a DC/DC converter according to claim 1, wherein said duty ratio change unit period N=1 and said current target setting period M=2. 2. The DC/DC converter control program according to claim 1, which is configured by a Buck converter.

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