JP7250562B2 - Imaging device and its control method - Google Patents

Description

The present invention relates to an imaging apparatus capable of global electronic shutter imaging and a control method thereof.

2. Description of the Related Art An imaging device using a CMOS (Complementary Metal Oxide Semiconductor) type image sensor generally employs so-called rolling shutter photography in which signal accumulation and readout are performed for each row. For this reason, there is a possibility that an image of a fast-moving object may be distorted due to the difference in signal accumulation time between the top and bottom of the screen.

On the other hand, in the global electronic shutter photography, signals of all pixels are accumulated simultaneously by providing a signal holding unit within one pixel of the image pickup device, so that a captured image of a fast-moving subject can be obtained without distortion. The imaging apparatus disclosed in Patent Document 1 is capable of global electronic shutter photography, and can perform phase-difference focus detection while displaying a live view image. Each pixel unit that constitutes an imaging device includes two photoelectric conversion units, two signal holding units connected to the photoelectric conversion units, and one signal readout unit.

On the other hand, there is a technique of acquiring a first image captured in a short accumulation time and a second image captured in a long accumulation time to generate an image with a wide dynamic range. Patent Document 2 discloses an imaging device capable of acquiring first and second images with different accumulation times by providing one photoelectric conversion unit and two signal holding units in one pixel of an imaging element. there is

JP 2017-55359 A JP 2017-220911 A JP 2013-172210 A JP-A-2002-165126

In conventional imaging devices, the pixel structure becomes complicated in order to perform phase-difference focus detection while displaying a live view image and to acquire images with a wide dynamic range in global electronic shutter photography. was there. When each pixel portion of the image sensor has two photoelectric conversion portions, two signal holding portions connected to each photoelectric conversion portion, that is, four signal holding portions in total must be provided. element increases.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an imaging apparatus capable of obtaining an image with a wide dynamic range by performing phase-difference focus detection using an imaging element with a simpler pixel structure and by global electronic shutter imaging.

An apparatus according to an embodiment of the present invention includes a plurality of pixel units, each of which includes an image sensor having a plurality of photoelectric conversion units and a plurality of signal holding units, and a control unit for controlling the image sensor. In the device, a first pixel section among the plurality of pixel sections transfers a signal of the first photoelectric conversion section among the plurality of photoelectric conversion sections to first and second signal holding sections, respectively. a plurality of first transfer means for transferring signals from the second photoelectric conversion units among the plurality of photoelectric conversion units to the first and second signal holding units, respectively; a signal reading unit for outputting the signal held in the first signal holding unit; and a signal readout unit for transferring the signal held in the second signal holding unit to a second pixel unit among the plurality of pixel units. and a third transfer means. The control means controls the third transfer means to output the signal of the second signal holding part of the first pixel part by the signal reading means of the second pixel part. conduct.

According to the present invention, it is possible to provide an imaging apparatus capable of obtaining an image with a wide dynamic range by performing phase-difference focus detection using an imaging device with a simpler pixel structure and by global electronic shutter imaging.

It is the front view (A) and rear view (B) of an imaging device. 1 is a block diagram showing a schematic configuration of an imaging device; FIG. FIG. 3 is a circuit diagram showing a configuration example of two pixels of an imaging device; 4 is a timing chart showing the driving sequence of the image sensor during moving image shooting; 4 is a flowchart for explaining processing during still image shooting; 4 is a timing chart showing a driving sequence of the imaging element when acquiring an image for focus detection; 4 is a timing chart showing the driving sequence of the image sensor during continuous shooting; 4 is a timing chart showing a driving sequence of the image sensor during single-shot shooting;

As a preferred embodiment of the present invention, an imaging apparatus capable of performing phase-difference focus detection and acquiring an image with a wide dynamic range by global electronic shutter photography will be described in detail below. Although an example of a digital still motion camera is shown as an imaging device, the present invention is applicable to imaging devices mounted on mobile devices such as drones and automobiles, and various electronic devices having imaging functions.

FIG. 1 is an external view illustrating an imaging device according to this embodiment. FIG. 1A is a front view of the imaging device, and FIG. 1B is a rear view of the imaging device. The imaging device main unit 151 includes an imaging element, a shutter device, and the like therein.

The lens unit includes lenses and a diaphragm that constitute the imaging optical system 152, and forms an optical image of a subject on an imaging device. A movable display unit 153 is provided on the rear surface of the imaging device main unit 151, and displays shooting information and images on the screen. The display unit 153 has a display luminance range in which even an image with a wide dynamic range can be displayed without suppressing the luminance range.

An operation switch (hereinafter referred to as switch ST) 154 is mainly used by the user to shoot still images. The switch ST154 is arranged on the upper surface of the imaging apparatus main body 151. As shown in FIG. An operation switch (hereinafter referred to as switch MV) 155 is used by the user to instruct the start and stop of moving image shooting. The switch MV 155 is arranged in the upper right part of the rear surface of the imaging device main body 151 . Below the switch MV 155, a shooting mode selection lever 156, a menu button 157 for shifting to the function setting mode of the imaging device, and a playback button 161 for playing back recorded video on the screen of the display unit 153 are arranged. Up-down switches 158 and 159 and a dial 160 used for changing various setting values are arranged in the lower right portion of the rear surface of the imaging device.

FIG. 2 is a block diagram showing a schematic configuration of the imaging device. An optical axis 180 of the imaging optical system 152 is indicated by a dashed line. The diaphragm 181 is a member that adjusts the amount of light passing through the imaging optical system 152 and is controlled by the lens/aperture controller 182 . The lens/aperture control unit 182 performs drive control of movable lenses (zoom lens, focus lens, image blur correction lens, etc.) that constitute the imaging optical system 152 in addition to aperture control. The optical filter 183 is a member that limits the wavelength of light incident on the imaging element 184 and the spatial frequency transmitted to the imaging element 184 . The imaging device 184 photoelectrically converts the optical image of the subject formed via the imaging optical system 152 into an electrical video signal. The imaging element 184 has a sufficient number of pixels, signal readout speed, color gamut, and dynamic range to satisfy a predetermined standard (such as the Ultra High Definition Television standard).

The digital signal processing unit 187 acquires the digital image data output from the image pickup device 184, performs various corrections, and then executes compression processing of the image data. A timing generation unit 189 outputs various timing signals to the imaging element 184 and the digital signal processing unit 187 .

A system control CPU (Central Processing Unit) 178 executes programs to control the entire imaging system. A system control CPU (hereinafter simply referred to as CPU) 178 controls each section of the imaging apparatus in accordance with an operation instruction signal from an operation input section 179 . For example, the CPU 178 controls the image sensor 184 and the digital signal processing section 187 via the timing generating section 189 , and controls the movable lens and the diaphragm 181 via the lens/aperture control section 182 . The operation input unit 179 includes input devices such as the switch ST154 and the switch MV155 shown in FIG. 1, various switch members, and a touch panel. The video memory 190 is a storage unit that temporarily stores video data.

The display interface unit 191 is an interface (hereinafter abbreviated as I/F) unit that connects the CPU 178 and the display unit 153 . The display unit 153 includes a liquid crystal display or the like, and displays captured image data and shooting information on the screen.

A recording I/F unit 192 is connected to a recording medium 193 and can record data on or read data from the recording medium 193 . A recording medium 193 is a semiconductor memory or the like for recording video data, additional data, etc., and is detachable from the imaging apparatus.

The external I/F section 196 includes a circuit section for the CPU 178 to communicate with an external device 197 such as a computer. The print I/F unit 194 includes a circuit unit for outputting data of the photographed image to the printer 195 for printing according to control commands from the CPU 178 . The printer 195 is a small inkjet printer or the like. Wireless I/F section 198 includes a circuit section for CPU 178 to communicate via computer network 199 such as the Internet.

FIG. 3 is a circuit diagram showing part of the imaging device 184. As shown in FIG. In FIG. 3, among the many pixel elements provided in the imaging device 184, the pixel element in the first row, first column (1, 1) and the pixel element in the second row, first column (2, 1), which is the adjacent row, are showing. The configuration of the pixel element is the same between the 1st row and 1st column (1,1) and the 2nd row and 1st column (2,1), and the same reference numerals are assigned to the respective constituent elements. Other pixel elements have similar configurations.

One pixel element in the image sensor 184 includes a first photoelectric conversion unit 500_A and a second photoelectric conversion unit 500_B, a first signal holding unit 507_1 and a second signal holding unit 507_2, and a signal readout unit. Since each pixel element has two signal holding portions for two photoelectric conversion portions, it is possible to ensure the saturation capacity of the photoelectric conversion portions, and as a result, an image with a wide dynamic range can be obtained. The basic structure of the imaging device 184 having a signal holding unit is disclosed in Patent Document 3, so the description is omitted.

The first photoelectric conversion unit 500_A is composed of a photodiode (hereinafter also referred to as PD). A signal generated by light reception by the PD can be transferred to the first signal holding portion 507_1 by the first transfer transistor 501_A1, and can be transferred to the second signal holding portion 507_2 by the second transfer transistor 501_A2. Also, the third transfer transistor 503_A is connected to the power supply line 521 and the cathode of the PD, and functions as an overflow gate for resetting the first photoelectric conversion unit 500_A.

Similarly, the second photoelectric conversion unit 500_B is composed of a PD. A signal generated by light reception of the PD can be transferred to the first signal holding portion 507_1 by the fourth transfer transistor 501_B1, and can be transferred to the second signal holding portion 507_2 by the fifth transfer transistor 501_B2. Also, the sixth transfer transistor 503_B is connected to the power supply line 521 and the cathode of the PD, and functions as an overflow gate for resetting the second photoelectric conversion unit 500_B.

A charge signal transfer portion is configured by the first transfer transistor 501_A1, the second transfer transistor 501_A2, the fourth transfer transistor 501_B1, and the fifth transfer transistor 501_B2.

A signal corresponding to the charge accumulated in the first signal holding unit 507_1 is transferred to a floating diffusion (hereinafter abbreviated as FD) region 508 via the seventh transfer transistor 502_1. This signal is read out to the outside of the imaging device 184 via the amplification transistor 505 , the selection transistor 506 and the signal output line 523 . The FD region 508, amplification transistor 505, and selection transistor 506 constitute a first signal reading section. That is, the gate of the amplification transistor 505 is connected to the FD region 508 , and the selection transistor 506 connected to the amplification transistor 505 is connected to the signal output line 523 .

A signal corresponding to the charge accumulated in the second signal holding portion 507_2 is transmitted through the eighth transfer transistor 502_2 to the FD region 508 included in the pixel element of the second row, first column (2, 1) of the adjacent row. transferred to This signal is read out to the outside of the image sensor 184 via the amplification transistor 505, the selection transistor 506, and the signal output line 523 in the pixel element of the 2nd row, 1st column (2, 1).

The reset transistor 504 is connected to the power supply line 520 and the FD area 508 and resets the FD area 508 . The control signal to the gate of each transistor is as follows. In FIG. 3, the control signals on the first line are marked with (1), and the control signals on the second line are marked with (2).

The first transfer transistor 501_A1 is controlled by a transfer pulse φGS_A1, and the second transfer transistor 501_A2 is controlled by a transfer pulse φGS_A2. The fourth transfer transistor 501_B1 is controlled by the transfer pulse φGS_B1, and the fifth transfer transistor 501_B2 is controlled by the transfer pulse φGS_B2.

Also, the third transfer transistor 503_A and the sixth transfer transistor 503_B are controlled by the transfer pulse φOFG. The seventh transfer transistor 502_1 is controlled by the transfer pulse φTX1, and the eighth transfer transistor 502_2 is controlled by the transfer pulse φTX2. Furthermore, the reset transistor 504 is controlled by a reset pulse φRES, and the selection transistor 506 is controlled by a selection pulse φSEL. Each control pulse is sent to each transistor from a vertical scanning circuit (not shown) based on a control signal from the timing generator 189 .

Next, a method of acquiring a moving image with a wide dynamic range by global electronic shutter photography will be described. A first image signal with a long accumulation time in the imaging device 184 is a signal corresponding to charges accumulated in the first signal holding unit 507_1, and a second image signal with a short accumulation time is a signal corresponding to the charge accumulated in the second signal holding unit 507_1. 507_2 is a signal corresponding to the charge accumulated in 507_2. A moving image with a wide dynamic range can be obtained by synthesizing the first and second image signals. At this time, control for alternately obtaining the first image signal and the second image signal so that the deviation between the center of gravity in the time direction of the first image signal and the center of gravity in the time direction of the second image signal is small. is done. Further, in this embodiment, thinning readout is performed for each row when acquiring a moving image, and processing for acquiring image signals of different rows for each frame is also performed. For example, if a variable n representing a natural number is introduced and the imaging device 184 has a Bayer array pixel configuration, images are stored in rows 4n-3 and 4n-2 in odd-numbered frames. In even-numbered frames, image accumulation is performed on rows 4n-1 and 4n. As a result, high speed storage and readout can be achieved.

FIG. 4 is a timing chart showing the driving sequence of the imaging element 184. As shown in FIG. FIG. 4 shows the timing of the first row for storing in odd frames and reading out in even frames, and the timing in the third row for storing in even frames and reading out in odd frames. Since global electronic shutter photography is performed, the accumulation in rows 4n-3 and 4n-2 is controlled at the same timing as in the first row. Similarly, accumulation in the 4n−1 and 4n rows is controlled at the same timing as in the 3rd row.

φV shown in FIG. 4 represents a vertical synchronizing signal, and φH represents a horizontal synchronizing signal. Each control signal below it (see FIG. 3) has a number in parenthesis representing a row. The direction of passage of time is from left to right, indicating time t1 to t26.

First, at time t1, the vertical synchronizing signal φV becomes high level, and the first frame of the moving image starts. At time t1, the transfer pulses φTX1(1) and φTX2(1) of the 4n−3 row with n=1, that is, the 1st row go high, turning on the seventh transfer transistor 502_1 and the eighth transfer transistor 502_2. becomes. At this time, the reset pulses φRES(1) and φRES(2) are at high level. Therefore, since each reset transistor 504 connected to the power supply line 520 is in the ON state, the FD region 508 as well as the signal holding units 507_1 and 507_2 are reset.

Also, at time t1, the transfer pulse φOFG(1) of the first row changes from high level to low level, and the third transfer transistor 503_A and the sixth transfer transistor 503_B are turned off. The reset states of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are released, and accumulation of signal charges is started.

At the next time t2, the first signal charges of an image with a short accumulation time accumulated in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are transferred to the second signal holding unit 507_2. be. At this time, the transfer pulses φGS_A2(1) and φGS_B2(1) go high, turning on the second transfer transistor 501_A2 and the fifth transfer transistor 501_B2. Signal charges of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are transferred to the second signal holding unit 507_2. After that, when the transfer pulses φGS_A2(1) and φGS_B2(1) become low level, the second transfer transistor 501_A2 and the fifth transfer transistor 501_B2 are turned off. Accumulation of signal charges in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B is restarted.

At time t3, the first signal charge of an image with a long accumulation time accumulated in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B is transferred to the first signal holding unit 507_1. At this time, the transfer pulses φGS_A1(1) and φGS_B1(1) become high level, and the first transfer transistor 501_A1 and the fourth transfer transistor 501_B1 are turned ON. Signal charges of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are transferred to the first signal holding unit 507_1. After that, when the transfer pulses φGS_A1(1) and φGS_B1(1) become low level, the first transfer transistor 501_A1 and the fourth transfer transistor 501_B1 are turned off. Accumulation of signal charges in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B is restarted.

After this, the following signal transfer takes place. An image with a relatively long accumulation time is defined as a first image, and an image with a relatively short accumulation time is defined as a second image.
• 2nd, 3rd, 4th and 5th transfer of the second image at times t4, t6, t8 and t12.
• Second, third, and fourth transfer of the first image at times t5, t7, and t9.
The relationship is "t4<t5<t6<t7<t8<t9<t12", and the second image signal and the first image signal are transferred to the corresponding signal holding units.

As described above, by alternately accumulating and transferring the second image signal with a short accumulation time and the first image signal with a long accumulation time, the difference between the second image signal and the first image signal is can suppress the deviation of the center of gravity in the time direction.

The signal charges in rows 4n-3 and 4n-2 accumulated in the first frame are read out in the second frame. In the imaging apparatus of the present embodiment, control is performed so that the second image signal having the short accumulation time, which is susceptible to crosstalk, is read out first. In the imaging device 184, the signal charges of the second image accumulated in the second signal holding portion 507_2 are read from the signal reading portion of the pixel portion belonging to the adjacent row. Here, in addition to the components shown in FIG. 3, the imaging device 184 has a second signal reading section outside the pixel section on the last row.

Time t13 shown in FIG. 4 is the start time of the second frame, and at time t10 before time t13, the reset pulse φRES(2) of the 4n−2 row with n=1, that is, the second row goes low. Become. The reset transistor 504 in the second row shown in the partial circuit diagram of the imaging device 184 in FIG. 3 is turned off, and the reset state of the FD region 508 in the second row is released. At the next time t11, the second row selection pulse φSEL(2) becomes high level, and the noise component of the second row FD region 508 is read out through the second row amplification transistor 505. FIG. Further, at time t13, the transfer pulse φTX2(1) for the first row and the selection pulse φSEL(2) for the second row go high. The signal charges of the second image having a short accumulation time accumulated in the second signal holding section 507_2 of the first row are read out via the signal reading section of the second row. The noise component in the FD region 508 included when reading out the signal charge of the second image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

When the signal charges of the second image in the first row are read out, the reset pulse φRES(2) goes high at time t15, and the FD region 508 in the second row is reset. Subsequently, the signal charges of the second image accumulated in the second signal holding portion 507_2 in the second row are read as follows. First, at time t14, the reset pulse φRES(3) of the 4n−1 row with n=1, that is, the 3rd row goes low. Although illustration of the constituent elements of the third row is omitted in FIG. 3, the reset transistor 504 of the third row is turned off, and the reset state of the FD region 508 of the third row is released. At time t15, the 3rd row selection pulse φSEL(3) goes high, and the noise component of the 3rd row FD region 508 is read out via the 3rd row amplification transistor 505 . Further, at time t16, the transfer pulse φTX2(2) of the second row and the selection pulse φSEL(3) of the third row (not shown) become high level. The signal charges of the second image having a short accumulation time accumulated in the second signal holding unit 507_2 of the second row are read out via the signal readout unit of the third row.

After that, the signal charges of the second image with a short accumulation time accumulated in the second signal holding units 507_2 of the 4n−3 rows and 4n−2 rows with n≧2 are transferred via the signal readout units of the adjacent rows. Read out sequentially.

When the readout of the signal charges of the second image whose accumulation time is short is finished, the readout of the signal charges of the first image whose accumulation time is long starts in rows 4n−3 and 4n−2 (n≧1). At time t19 in the second frame, the reset pulse φRES(1) of the first (4n−3; n≧1) row goes low. The reset transistor 504 in the first row shown in the partial circuit diagram of the imaging device 184 in FIG. 3 is turned off, and the reset state of the FD region 508 in the first row is released. At time t20, the selection pulse φSEL(1) for the first row goes high, and the noise component of the FD area 508 on the first row is read. At time t21, the transfer pulse φTX1(1) of the first row and the selection pulse φSEL(1) of the first row become high level, and the first image stored in the first signal holding unit 507_1 of the first row is displayed. are read out via the signal read-out section in the first row. Also, the noise component of the FD region 508 included when the signal charge of the first image is read out is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

When the signal charges of the first image in the first row are read out, the reset pulse φRES(1) goes high at time t23, and the FD region 508 in the first row is reset. Subsequently, the signal charges of the first image accumulated in the first signal holding portion 507_1 in the second row are read as follows.

At time t22, the reset pulse φRES(2) of the second (4n-2; n≧1) row becomes low level. The reset transistor 504 in the second row is turned off, and the reset state of the FD region 508 in the second row is released. At time t23, the second row selection pulse φSEL(2) becomes high level, and the noise component of the second row FD region 508 is read out via the second row amplification transistor 505 . At time t24, the transfer pulse φTX1(2) of the second row and the selection pulse φSEL(2) of the second row (not shown) become high level. The signal charges of the first image accumulated in the first signal holding unit 507_1 on the second row are read out via the signal reading unit on the second row.

After that, the signal charges of the first image with the long accumulation time accumulated in the first signal holding units 507_1 of the 4n−3 rows and 4n−2 rows (n≧2) are transferred through the signal readout units of the corresponding rows. are read out sequentially.

On the other hand, in the second frame starting at time t13 when the signal charges of the 4n−3 row and 4n−2 row (n≧1) are being read out, the accumulation in the 4n−1 row and 4n row (n≧1) is done. The pixel configuration of the 4n-1 row and 4n row (n≧1) is the same as the pixel configuration of the circuit diagram of the 4n-3 row and 4n-2 row (n≧1) shown in FIG. Description will be made using the same names and symbols.

At time t13, the transfer pulses φTX1(3) and φTX2(3) of the third (4n−1; n≧1) row become high level, and the seventh transfer transistor 502_1 and the eighth transfer transistor 502_2 are turned ON. At this time, the reset pulses φRES(3) and φRES(4) are at high level, and the reset transistors 504 connected to the power supply line 520 are in the ON state. be done.

At time t13, the transfer pulse φOFG(3) of the third row changes from high level to low level. The third transfer transistor 503_A and the sixth transfer transistor 503_B are turned off, the reset states of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are released, and accumulation of signal charges is started.

At time t15, the first signal charges of the second image with a short accumulation time accumulated in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are transferred to the second signal holding unit 507_2. be done. At this time, the transfer pulses φGS_A2(3) and φGS_B2(3) go high, turning on the second transfer transistor 501_A2 and the fifth transfer transistor 501_B2. Signal charges of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are transferred to the second signal holding unit 507_2. After that, when the transfer pulses φGS_A2(3) and φGS_B2(3) become low level, the second transfer transistor 501_A2 and the fifth transfer transistor 501_B2 are turned off. Accumulation of signal charges in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B is restarted.

At time t17, the first signal charge of the first image with a long accumulation time accumulated in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B is transferred to the first signal holding unit 507_1. be done. At this time, the transfer pulses φGS_A1(3) and φGS_B1(3) go high, turning on the first transfer transistor 501_A1 and the fourth transfer transistor 501_B1. Signal charges of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are transferred to the first signal holding unit 507_1. After that, when the transfer pulses φGS_A1(3) and φGS_B1(3) become low level, the first transfer transistor 501_A1 and the fourth transfer transistor 501_B1 are turned off. Accumulation of signal charges in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B is restarted.

Thereafter, the second signal transfer for the second image, the second signal transfer for the first image, the third signal transfer for the second image, and the third signal transfer for the first image are performed. done. Further, the fourth signal transfer for the second image, the fourth signal transfer for the first image, and the fifth signal transfer for the second image follow. Signal charges of the second image and the first image are transferred to corresponding signal holding units.

As described above, the second image with a short accumulation time and the first image with a long accumulation time are alternately accumulated and transferred, so that the time interval between the second image signal and the first image signal is directional deviation of the center of gravity can be suppressed.

The signal charges in the 4n−1 rows and 4n rows (n≧1) accumulated in the second frame are read out in the third frame in the same way as the 4n−3 rows and 4n−2 rows (n≧1). Furthermore, in the third frame starting from time t26 during readout of the image in the 4n−1 row and 4n row (n≧1) row, the 4n−3 row and 4n−2 row (n≧1) are accumulated.

As described above, in the imaging device 184, one pixel portion is composed of two photoelectric conversion portions, two signal holding portions, and one signal reading portion. As a result, it is possible to acquire images with short and long accumulation times at high frame rates while avoiding the complexity of the circuit configuration, enabling the generation of moving images with a wide dynamic range using global electronic shutter photography. is.

Next, with reference to the flowchart of FIG. 5, the control during still image shooting with the image sensor 184 will be described. The imaging apparatus of the present embodiment is capable of performing phase-difference focus detection while displaying a live-view image, but FIG. 5 omits the process of acquiring and displaying a live-view image. A signal of a live view image is acquired by a driving sequence of the imaging device 184 that is substantially the same as the timing chart for moving image shooting shown in FIG.

When the user operates the shooting mode selection lever 156 to set the still image shooting mode, the shooting process starts in S100. In next S101, the CPU 178 determines the input state of the switch ST154. The user can operate the switch ST154 and issue a still image shooting preparation instruction by turning ON the first stage switch (denoted as ST1). When the CPU 178 detects that the first stage switch ST1 is turned on, the process proceeds to S102, and when the first stage switch ST1 is turned off, the CPU 178 continues the determination process of S101.

In S102, the CPU 178 controls the timing generator 189 to acquire an image signal for focus detection from the image sensor 184 in order to detect the focus state of the imaging optical system 152. FIG. One pixel element forming the imaging device 184 has a first photoelectric conversion unit 500_A and a second photoelectric conversion unit 500_B. The first and second photoelectric conversion units receive light that has passed through different pupil partial regions of the imaging optical system 152 via the microlenses forming the imaging device 184 . That is, the first photoelectric conversion unit 500_A receives and photoelectrically converts the light from the subject that has passed through the first partial pupil region in the pupil region, and the second photoelectric conversion unit 500_B receives the second partial region in the pupil region. receives the light from the subject that has passed through the pupil partial area of and photoelectrically converts the light. Phase difference detection is performed based on the image signals for focus detection respectively acquired by the first and second photoelectric conversion units. The CPU 178 calculates the defocus amount based on the correlation calculation and performs focus adjustment control of the imaging optical system 152 . A method for detecting the focus state of the imaging optical system 152 is disclosed in Patent Document 4, so the description thereof is omitted.

In the imaging element 184, the accumulation of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are performed simultaneously in all rows. Furthermore, by controlling to read out the signal charges of the second signal holding portion of the same row after reading out the signal charges of the first signal holding portion of each row, focus detection due to crosstalk due to the signal charges flowing into each signal holding portion is performed. Error can be reduced. A driving sequence of the imaging device 184 in focus detection of the imaging optical system 152 will be described later with reference to FIG.

In S102, when the focus state of the imaging optical system 152 is detected from the acquired image signal for focus detection, the CPU 178 causes the lens/aperture control unit 182 to perform focus adjustment control of the imaging optical system 152 via a drive mechanism (not shown). I do. When the focus adjustment operation by the focus lens is completed, the CPU 178 again determines the input state of the switch ST154 in S103. The user can further operate the switch ST154 and issue a still image shooting instruction (image recording instruction) by turning on the second stage switch (denoted as ST2). When the CPU 178 detects that ST2 is ON, the process proceeds to S104, and when ST2 is OFF, the process returns to S101.

In S104, the CPU 178 confirms the still image shooting mode, and determines in S105 whether or not the continuous shooting mode is set as the still image shooting mode. Continuous shooting mode is a mode in which an object is continuously shot at predetermined time intervals. If the continuous shooting mode is set, the process proceeds to S106, and if the single shooting mode instead of the continuous shooting mode is set, the process proceeds to S108.

In S106, the CPU 178 controls the image sensor 184 in continuous shooting mode. A drive sequence for continuous shooting of still images by global electronic shutter shooting will be described later with reference to FIG. On the other hand, in S108, the CPU 178 controls the image sensor 184 in single-shot mode. A drive sequence for single shooting of a still image by global electronic shutter shooting will be described later with reference to FIG.

Proceeding to S107 after S106, the CPU 178 determines whether or not the user continues to operate the switch ST154 and the switch ST2 of the second step is ON. If it is determined that ST2 is ON, the process returns to S106 to continue continuous shooting, and if it is determined that ST2 is OFF, the process proceeds to S109. When the single-shot still image shooting control shown in S108 ends, the process proceeds to S109. At S109, the series of processes shown in FIG. 5 is terminated.

Next, focus detection of the imaging optical system 152 in S102 (focus adjustment) of FIG. 5 will be described with reference to FIG. FIG. 6 is a timing chart showing the driving sequence of the imaging element 184 when focus detection of the imaging optical system 152 is performed. A method of acquiring an image for focus detection in the imaging device 184 will be described mainly by exemplifying the timings of the first and second rows of the imaging device 184 . The notation of FIG. 4 is followed for each control pulse. This is the same for FIGS. 7 and 8 as well.

At time t71, the transfer pulse φOFG of all rows changes from high level to low level, the reset state of the first photoelectric conversion section 500_A and the second photoelectric conversion section 500_B is released, and accumulation of signal charges for focus detection is stopped. be started. At this time, the reset pulse φRES and transfer pulses TX1 and TX2 of all rows are at high level, and the reset transistor 504, the seventh transfer transistor 502_1, and the eighth transfer transistor 502_2 connected to the power supply line 520 are ON. Therefore, the FD region 508, the first signal holding portion 507_1, and the second signal holding portion 507_2 of all pixels are reset.

At time t72, the reset pulse φRES(1) of the first row becomes low level to read the signal of the first row, and the reset state of the FD area 508 of the first row is released. At the same time, the transfer pulses TX1 and TX2 of all rows also become low level, and the reset states of the first signal holding units 507_1 and the second signal holding units 507_2 of all pixels are released.

At time t73, the selection pulse φSEL(1) of the first row becomes high level, and the noise component of the FD region 508 of the first row is read out through the amplifying transistor 505 of the first row. Also, at time t73, the transfer pulses φGS_A1 and φGS_B2 for all rows become high level, and the first transfer transistors 501_A1 and fifth transfer transistors 501_B2 of all pixels are turned ON. As a result, the signal charge of the first photoelectric conversion unit 500_A is transferred to the first signal holding unit 507_1, and the signal charge of the second photoelectric conversion unit 500_B is transferred to the second signal holding unit 507_2. In other words, the image signals for focus detection with the same accumulation period are accumulated.

When the image signals for focus detection are accumulated, readout of the focus detection image signals is performed. There may be a difference in the amount of crosstalk flowing into the part. If there is a difference in the amount of light between the focus detection image generated by the first signal holding unit 507_1 and the focus detection image generated by the second signal holding unit 507_2, the focus detection accuracy is degraded. It becomes a problem. Therefore, in the image pickup apparatus of the present embodiment, control is performed to read signal charges from the second signal holding unit 507_2 in the same row after reading signal charges from the first signal holding unit 507_1. That is, after the signal charges in the first and second signal holding units in the same row are read out, the signal charges in the first and second signal holding units in the adjacent row are read out. A difference in the amount of crosstalk flowing into the second signal holding unit can be suppressed.

At time t74, the transfer pulse φTX1(1) of the first row and the selection pulse φSEL(1) of the first row become high level, and the image for focus detection accumulated in the first signal holding unit 507_1 of the first row. are read out via the signal read-out section in the first row. At this time, the noise component of the FD region 508 included in the signal charge of the focus detection image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

After the accumulation of the focus detection image is completed, the transfer pulse φOFG of all rows becomes high level at time t74, and the first photoelectric conversion units 500_A and the second photoelectric conversion units 500_B of all pixels are reset.

When the signal charges of the focus detection image accumulated in the first signal holding unit 507_1 of the first row are read out, the signal charges of the focus detection image accumulated in the second signal holding unit 507_2 of the first row are read out. , is read out via the signal readout section of the second row, which is the adjacent row. At time t75, the reset pulse φRES(2) of the second row becomes low level, and the reset state of the FD area 508 of the second row is released.

At time t76, the reset pulse φRES(1) and the transfer pulse φTX1(1) of the first row go high, and the reset transistor 504 connected to the power supply line 520 and the seventh transfer transistor 502_1 are turned on. Therefore, the first signal holding portion 507_1 is reset together with the FD region 508 in the first row. At time t76, the second row selection pulse φSEL(2) becomes high level, and the noise component of the second row FD region 508 is read out through the second row amplification transistor 505 .

At time t77, the transfer pulse φTX2(1) of the first row and the selection pulse φSEL(2) of the second row become high level, and the image for focus detection accumulated in the second signal holding unit 507_2 of the first row. are read out through the signal readout section in the second row. At this time, the noise component of the FD region 508 included in the signal charge of the focus detection image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

In this embodiment, the signal charges of the focus detection image accumulated in the first signal holding unit 507_1 of the first row are read out, and the focus detection image accumulated in the second signal holding unit 507_2 of the first row are read out. There is almost no time difference in reading out the signal charges. Therefore, excellent focus detection is possible without being affected by crosstalk.

After the signal charges accumulated in the first and second photoelectric conversion units in the first row are read out, the signal charges accumulated in the first and second photoelectric conversion units in the adjacent second row are read out. be After the signal charges in the first row are read out, the reset pulse φRES(2) in the second row goes high at time t78, and the FD region 508 in the second row is reset. After that, when the reset state of the FD region 508 of the second row is released, the selection pulse φSEL(2) of the second row becomes high level at time t79, and the second row through the amplifying transistor 505 of the second row. A noise component in the FD area 508 of the row is read out.

At time t80, the transfer pulse φTX1(2) of the second row and the selection pulse φSEL(2) of the second row become high level, and the image for focus detection accumulated in the first signal holding unit 507_1 of the second row. are read out through the signal readout section in the second row. At this time, the noise component of the FD region 508 included in the signal charge of the focus detection image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

When the signal charges of the focus detection image accumulated in the first signal holding unit 507_1 of the second row are read out, the signal charges of the focus detection image accumulated in the second signal holding unit 507_2 of the second row are read out. , is read out via the signal readout section of the third row, which is the adjacent row.

At time t81, the reset pulse φRES(3) of the third row becomes low level, and the reset state of the FD area 508 of the third row is released. At time t81, the reset pulse φRES(2) and the transfer pulse φTX1(2) of the second row become high level, and the reset transistor 504 connected to the power supply line 520 and the seventh transfer transistor 502_1 are turned on. . Therefore, the first signal holding portion 507_1 is reset together with the FD region 508 in the second row. At time t82, the 3rd row selection pulse φSEL(3) goes high, and the noise component of the 3rd row FD region 508 is read out via the 3rd row amplification transistor 505 .

At time t83, the transfer pulse φTX2(2) of the second row and the selection pulse φSEL(3) of the third row become high level, and the image for focus detection accumulated in the second signal holding unit 507_2 of the second row. are read out through the signal readout section in the third row. At this time, the noise component of the FD region 508 included in the signal charge of the focus detection image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .
The signal charges in the first and second signal holding portions of subsequent rows are similarly read out.

As described above, since there is almost no time difference in reading out the signal charges of the focus detection image accumulated in the plurality of signal holding units (507_1, 507_2) in each row, good readout is possible without being affected by crosstalk. Focus detection is possible.

The CPU 178 uses the acquired image signal for focus detection to execute a process of detecting the focus state of the imaging optical system 152, and adjusts the focus of the imaging optical system 152 via the lens/aperture control unit 182 based on the calculated defocus amount. Provides regulatory control.

Next, the driving sequence of the image sensor 184 in S106 (continuous shooting control) of FIG. 5 will be described with reference to FIG. FIG. 7 is a timing chart for explaining a control method when still images are continuously shot by global electronic shutter shooting.

In continuous shooting of still images, in order to increase the continuous shooting speed, in the present embodiment, images accumulated in the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B forming one pixel of the image sensor 184 are stored. The signals are simultaneously transferred to the first signal holding unit 507_1. By outputting a signal from the first signal holding unit 507_1 to the outside of the image sensor via the first signal reading unit, it is possible to increase the reading speed.

At time t31, the transfer pulse φOFG of all rows changes from high level to low level, and the third transfer transistor 503_A and the sixth transfer transistor 503_B are turned off. The reset states of the first photoelectric conversion unit 500_A and the second photoelectric conversion unit 500_B are released, and accumulation of signal charges is started. At this time, the reset pulse φRES and transfer pulses TX1 and TX2 of all rows are at high level, and the reset transistor 504, the seventh transfer transistor 502_1, and the eighth transfer transistor 502_2 connected to the power supply line 520 are ON. Therefore, the FD regions 508 and the first and second signal holding units 507_1 and 507_2 of all pixels are in a reset state.

At time t32, the reset pulse φRES(1) of the first row becomes low level, the reset transistor 504 of the first row is turned off, and the reset state of the FD region 508 of the first row is released. Further, at time t33, the selection pulse φSEL(1) of the first row becomes high level, and the noise component of the FD region 508 of the first row is read out through the amplification transistor 505 of the first row. At time t33, the first transfer pulse φGS_A1(1) and the fourth transfer pulse φGS_B1(1) of all rows become high level. Signal charges accumulated in the first photoelectric conversion unit 500_A of all pixels and the second photoelectric conversion unit 500_B of the first row are transferred to the first signal holding unit 507_1 of each pixel.

At time t35, the transfer pulse φTX1(1) of the first row and the selection pulse φSEL(1) of the first row become high level, and the signal of the still image accumulated in the first signal holding unit 507_1 of the first row. Charges are read out via the signal readouts in the first row. The noise component of the FD region 508 contained in the read signal charge of the still image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 . Also, at time t35, the transfer pulse φOFG of all rows becomes high level, and the first photoelectric conversion units 500_A and the second photoelectric conversion units 500_B of all pixels are reset.

After the signal charges of the still image in the first row are read out, the signal charges of the still image in the second row are read out. At time t36, the reset pulse φRES(2) of the second row becomes low level, the reset transistor 504 of the second row is turned off, and the reset state of the FD region 508 of the second row is released.

At time t37, the reset pulse .phi.RES(1) and the transfer pulse .phi.TX1(1) of the first row go high. Since the reset transistor 504 connected to the power supply line 520 and the seventh transfer transistor 502_1 are turned on, the FD region 508 of the first row and the first signal holding portion 507_1 are reset. At time t37, the second row selection pulse φSEL(2) becomes high level, and the noise component of the second row FD region 508 is read out through the second row amplification transistor 505 .

At time t38, the transfer pulse φTX1(2) and the selection pulse φSEL(2) of the second row become high level, and the signal charge of the still image accumulated in the first signal holding unit 507_1 of the second row becomes the second signal charge. It is read out via the signal readout section of the row. The noise component of the FD region 508 contained in the read signal charge of the still image is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

At time t39, the reset pulse φRES(2) and the transfer pulse φTX1(2) of the second row become high level, and the reset transistor 504 connected to the power supply line 520 and the seventh transfer transistor 502_1 are turned on. Therefore, the first signal holding portion 507_1 is reset together with the FD region 508 in the second row.

After that, the signal charges of the still image accumulated in the first signal holding unit 507_1 of each row are sequentially read out by the time t40 via the signal reading unit of each row. When the signal charges of the first still image are read out, acquisition of the second still image starts at time t40, and acquisition of the third still image starts at time t41. A description of the driving sequence of the imaging device 184 for the second and subsequent images is omitted.

During continuous shooting of still images, the CPU 178 determines the input state of the switch ST154, and continues continuous shooting of still images while the switch ST2 in the second stage remains ON. In this embodiment, a processing example in which focus detection is not performed during continuous shooting of still images has been described, but focus detection is performed between continuous shooting frames in another embodiment of the present invention.

A plurality of signal holding units (507_1, 507_2) forming one pixel of the image pickup device 184 store signal charges accumulated in the plurality of photoelectric conversion units (500_A, 500_B) in moving image shooting and still image continuous shooting modes. It is a configuration that can be added and stored. Therefore, the saturation capacity of each signal holding section is more than twice the saturation capacity of each photoelectric conversion section. That is, the saturation capacity of the signal holding section is set to be equal to or greater than the sum of the saturation capacity of the first photoelectric conversion section 500_A and the saturation capacity of the second photoelectric conversion section 500_B.

Therefore, when the still image single-shot shooting mode is set, the imaging device can acquire an image with a wider dynamic range. Therefore, the signal charge of the image accumulated in the first photoelectric conversion unit 500_A forming one pixel of the image sensor 184 is controlled to be transferred to the first signal holding unit 507_1. Similarly, the signal charges of the image accumulated in the second photoelectric conversion unit 500_B are controlled to be transferred to the second signal holding unit 507_2. At this time, the signal charge amount can be increased by controlling the transfer transistor from the photoelectric conversion unit to the signal holding unit to be ON for a predetermined time.

Further, control is performed so that the signal charges accumulated in the first signal holding unit 507_1 are first read out from the signal readout unit in the same row. After the signal charges accumulated in the first signal holding units 507_1 of all rows are read out, the signal charges accumulated in the second signal holding unit 507_2 are read out from the signal reading units of adjacent rows. The image signals read out from the first and second signal holding units are combined by the digital signal processing unit 187 to generate a still image signal with a wide dynamic range.

Further, in the imaging apparatus of the present embodiment, control is performed to read out the signal charge of the second signal holding unit 507_2 from the row opposite to the readout row related to the first signal holding unit 507_1. This makes it possible to reduce the influence of crosstalk caused by the readout time of signal charges from the first signal holding portion 507_1 and the second signal holding portion 507_2 on the still image obtained by addition in the digital signal processing portion 187. be.

A driving sequence of the image sensor 184 in S108 (single-shot shooting control) of FIG. 5 will be described with reference to FIG. FIG. 8 is a timing chart for explaining a control method when still image shooting (single-shot shooting) is performed with global electronic shutter shooting.

At time t51, the transfer pulse φOFG for all rows changes from high level to low level, and the third transfer transistor 503_A and the sixth transfer transistor 503_B are turned off. The reset states of the first and second photoelectric conversion units 500_A and 500_B are released, and accumulation of signal charges is started. At this time, the reset pulse φRES and transfer pulses TX1 and TX2 of all rows are at high level, and the reset transistor 504, the seventh transfer transistor 502_1, and the eighth transfer transistor 502_2 connected to the power supply line 520 are ON. Therefore, the FD regions 508 and the first and second signal holding units 507_1 and 507_2 of all pixels are in a reset state.

At time t52, the transfer pulses TX1 and TX2 of all rows also become low level. The reset states of the first signal holding portions 507_1 and the second signal holding portions 507_2 of all pixels are released, and signal charges can be transferred to the respective signal holding portions (507_1 and 507_2).

At time t53 before signal charges are saturated in the first and second photoelectric conversion units 500_A and 500_B, the transfer pulses φGS_A1 and φGS_B2 of all rows become high level. The first transfer transistors 501_A1 and the fifth transfer transistors 501_B2 of all pixels are turned ON. As a result, the signal charges of the first photoelectric conversion units 500_A of all pixels are transferred to the first signal holding unit 507_1, and the signal charges of the second photoelectric conversion units 500_B of all pixels are transferred to the second signal holding unit 507_2. transferred. At this time, the transfer pulses φGS_A1 and φGS_B2 for all rows are kept at the high level from time t53 until time t56 after a predetermined period of time. Therefore, signal charges exceeding the saturation capacities of the first and second photoelectric conversion units are transferred to the first and second signal holding units 507_1 and 507_2, respectively.

At time t54, the reset pulse φRES(1) of the first row becomes low level, the reset transistor 504 of the first row is turned off, and the reset state of the FD region 508 of the first row is released. At time t55, the selection pulse φSEL(1) of the first row becomes high level, and the noise component of the FD region 508 of the first row is read out through the amplifying transistor 505 of the first row.

At time t57, the transfer pulse φTX1(1) of the first row and the selection pulse φSEL(1) of the first row become high level, and the signal charge accumulated in the first signal holding unit 507_1 of the first row is transferred to the first signal holding unit 507_1. It is read out via one row of signal readout units. At this time, the noise component of the FD region 508 contained in the read signal charge is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

When the signal charges of the first and second photoelectric conversion units 500_A and 500_B of all pixels are transferred to the first and second signal holding units 507_1 and 507_2, respectively, the transfer pulse φOFG of all rows is generated at time t57. become high level. The first photoelectric conversion units 500_A and the second photoelectric conversion units 500_B of all pixels are reset.

After the signal charges accumulated in the first signal holding portion 507_1 of the first row are read out, the signal charges accumulated in the first signal holding portion 507_1 of the second row are similarly read out. At time t58, the reset pulse φRES(2) of the second row becomes low level, and the reset state of the FD area 508 of the second row is released. At time t58, the second row selection pulse φSEL(2) becomes high level, and the noise component of the second row FD region 508 is read out via the second row amplification transistor 505 . At time t58, the reset pulse φRES(1) and the transfer pulse φTX1(1) of the first row go high, and the reset transistor 504 connected to the power supply line 520 and the seventh transfer transistor 502_1 are turned on. Therefore, the FD region 508 of the second row and the first signal holding portion 507_1 are reset.

At time t59, the transfer pulse φTX1(2) and the selection pulse φSEL(2) of the second row become high level, and the signal charge accumulated in the first signal holding unit 507_1 of the second row is transferred through the signal readout unit. read out. At this time, the noise component of the FD region 508 contained in the read signal charge is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

At time t60, the reset pulse φRES(2) and the transfer pulse φTX1(2) of the second row go high, and the reset transistor 504 connected to the power supply line 520 and the seventh transfer transistor 502_1 are turned on. Therefore, the FD region 508 of the second row and the first signal holding portion 507_1 are reset.

The signal charges of the first signal holding units 507_1 in subsequent rows are similarly read. At time t61, reading of signal charges from the first signal holding units 507_1 of all rows is completed. After the time t61, the signal charges accumulated in the second signal holding portion 507_2 are read out from the row in which the order is opposite to the readout row of the signal charges in the first signal holding portion 507_1. The timing chart of FIG. 8 shows readout timings of the signal charges in the second and first rows before the time t68 at which the readout of the signal charges in the second signal holding unit 507_2 ends.

From time t61, reading of signal charges from the second signal holding unit 507_2 starts in order from the last row (hereinafter, the last row is used as a reference). At time t62, signal charges are read from the second signal holding unit 507_2 in the second row. At time t62, the reset pulse φRES(3) of the third row becomes low level, and the reset state of the FD area 508 of the third row is released. become a level. A noise component of the FD region 508 in the third row is read out through the amplifying transistor 505 in the third row.

At time t64, the transfer pulse φTX2(2) of the second row and the selection pulse φSEL(3) of the third row become high level, and the signal charge accumulated in the second signal holding unit 507_2 of the second row is transferred to the second signal holding unit 507_2. It is read out via three rows of signal readout units. At this time, the noise component of the FD region 508 contained in the read signal charge is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 . Finally, signal charges are read from the second signal holding portion 507_2 in the first row. At time t65, the reset pulse φRES(2) of the second row becomes low level. Since the reset transistor 504 connected to the power supply line 520 is turned off, the reset state of the FD region 508 in the second row is released. At time t65, the transfer pulse φTX1(2) of the second row becomes low level, and the connection between the FD region 508 of the second row and the first signal holding section 507_1 of the second row is cut off.

At time t66, the reset pulse φRES(3) of the 3rd row and the transfer pulse φTX2(2) of the 2nd row become high level, and the reset transistor 504 connected to the power supply line 520 and the eighth transfer transistor 502_2 are turned ON. become a state. Therefore, the FD region 508 of the second row and the second signal holding portion 507_2 are reset. At time t66, the second row selection pulse φSEL(2) becomes high level, and the noise component of the second row FD region 508 is read out through the second row amplification transistor 505 .

At time t67, the transfer pulse φTX2(1) of the first row and the selection pulse φSEL(2) of the second row become high level, and the signal charge accumulated in the second signal holding unit 507_2 of the first row is transferred to the second signal holding unit 507_2. It is read out via two rows of signal readout sections. At this time, the noise component of the FD region 508 contained in the read signal charge is subtracted from the signal charge by a circuit (not shown), and the signal component is output to the outside of the image sensor 184 .

As described above, all the signal charges of the first and second signal holding units 507_1 and 507_2 are read. The digital signal processing unit 187 adds the image signals read out from the first and second signal holding units 507_1 and 507_2 of each pixel to generate an image signal of a still image. At this time, the amount of crosstalk included in the signal charges of the first signal holding unit 507_1 is relatively small in the first row and maximizes in the last row according to the first direction of reading from the first row to the last row. become. Conversely, the amount of crosstalk contained in the signal charges of the second signal holding portion 507_2 is relatively small in the last row in the second direction opposite to the first direction. maximum in a row. As a result, in the still image signal generated by adding the signals read from the first and second signal holding units 507_1 and 507_2, the amount of crosstalk generated in each row is averaged. Therefore, it is possible to acquire an image without unevenness due to crosstalk.

According to the present embodiment, an imaging device is provided that uses an imaging element having a simpler pixel structure to enable phase-difference focus detection and acquisition of still images with a wide dynamic range in global electronic shutter imaging. can do.

In the above embodiment, the signal of the second signal holding portion of the first pixel portion among the plurality of pixel portions is read out from the second pixel portion (adjacent pixel) different from the first pixel portion. The control output by the unit has been described. In applying the present invention, the positional relationship of the second pixel section with respect to the first pixel section is arbitrary. Also, an example in which each pixel section has a photoelectric conversion section divided into two in the pupil division direction has been described. The present invention is not limited to this, and can be applied to an imaging device having a configuration in which a pixel section has a photoelectric conversion section divided into three or more (for example, a photoelectric conversion section divided into two each in the horizontal direction and the vertical direction). Also, an example in which one capacitor (FD section) is provided in the pixel section has been shown. It can be applied to a configuration or the like in which the capacity can be switched at the same time.

156 Shooting mode selection lever 178 System control CPU
184 image sensor 189 timing generation unit 500_A and B photoelectric conversion unit 501_A1 and A2, 501_B1 and B2, 502_1, 502_2 transfer unit 507_1, 507_2 signal holding unit 508, 505, 506 signal reading unit

Claims (10)

An imaging device comprising: an imaging device comprising a plurality of pixel units, each of which has a plurality of photoelectric conversion units and a plurality of signal holding units; and a control means for controlling the imaging device,
A first pixel portion among the plurality of pixel portions includes a plurality of first pixel portions for transferring signals of a first photoelectric conversion portion among the plurality of photoelectric conversion portions to first and second signal holding portions, respectively. a plurality of second transfer means for transferring a signal of a second photoelectric conversion unit among the plurality of photoelectric conversion units to first and second signal holding units, respectively; and the first signal signal reading means for outputting the signal held in the holding portion; and third transfer means for transferring the signal held in the second signal holding portion to a second pixel portion among the plurality of pixel portions. and
The control means controls the third transfer means to output the signal of the second signal holding part of the first pixel part by the signal reading means of the second pixel part. An imaging device characterized by: The control means, in the first pixel portion,
the first transfer means for transferring the signal of the first photoelectric conversion section to the first signal holding section; and the second transfer means for transferring the signal of the second photoelectric conversion section to the first signal holding section. a first control for controlling the transfer means of and outputting the signal of the first signal holding unit by the signal reading means;
the first transfer means for transferring the signal of the first photoelectric conversion portion to the second signal holding portion; and the second transfer means for transferring the signal of the second photoelectric conversion portion to the second signal holding portion. and the third transfer means to transfer the signal of the second signal holding portion of the first pixel portion to the second signal holding portion of the row adjacent to the row to which the first pixel portion belongs. 2. The imaging apparatus according to claim 1, further comprising a second control for outputting by the signal reading means of the second pixel portion. When acquiring a moving image, the control means stores a first image signal having a long accumulation time corresponding to the charge accumulated in the first signal holding section and the charge accumulated in the second signal holding section. 2. The imaging apparatus according to claim 1, wherein control is performed to alternately output a second image signal corresponding to charge and having a short accumulation time. 4. The method according to claim 3, wherein the control means first performs accumulation and transfer of signal charges relating to the second image signal by controlling to alternately output the first and second image signals. imaging device. The control means transfers the signal charge of the first photoelectric conversion unit and the signal charge of the second photoelectric conversion unit to the first signal holding unit and the second signal holding unit, respectively, when single-shot photographing is performed. After transferring and accumulating and outputting the signal of the first signal holding portion in the first pixel portion by the signal reading means, the signal of the second signal holding portion in the first pixel portion is 2. The image pickup apparatus according to claim 1, wherein control is performed to output by the signal reading means included in the second pixel portion belonging to a row adjacent to the row to which the first pixel portion belongs. The control means sets the direction of the row from which the signal of the second signal holding section is read out in the direction opposite to the direction of the row from which the signal of the first signal holding section is read out in the single-shot photographing. 6. The imaging apparatus according to claim 5, wherein the signal reading means controls output of a signal. The control means transfers the signal charge of the first photoelectric conversion unit and the signal charge of the second photoelectric conversion unit in the first pixel unit to the first signal holding unit when continuous shooting is performed. 3. The image pickup apparatus according to claim 1, wherein the signal in the first signal holding unit is stored in the first signal holding unit and output by the signal reading unit included in the first pixel unit. When the control means acquires an image signal for focus detection of the imaging optical system,
The signal charges of the first photoelectric conversion portion and the signal charges of the second photoelectric conversion portion of the first pixel portion are transferred to and accumulated in the first signal holding portion and the second signal holding portion, respectively. and after outputting the signal of the first signal holding portion by the signal reading means of the first pixel portion, the signal of the second signal holding portion of the first pixel portion is output to the first 8. The image pickup apparatus according to claim 1, wherein control is performed to output by the signal reading means included in the second pixel portion belonging to a row adjacent to the row to which the pixel portion belongs. 9. The saturated capacity of the signal holding section is equal to or greater than the sum of the saturated capacity of the first photoelectric conversion section and the saturated capacity of the second photoelectric conversion section. 11. The image pickup device according to claim 1. A control method executed by an imaging device comprising a plurality of pixel units, each of which includes an image sensor having a plurality of photoelectric conversion units and a plurality of signal holding units, and control means for controlling the image sensor There is
A first pixel portion among the plurality of pixel portions includes a plurality of first pixel portions for transferring signals of a first photoelectric conversion portion among the plurality of photoelectric conversion portions to first and second signal holding portions, respectively. a plurality of second transfer means for transferring a signal of a second photoelectric conversion unit among the plurality of photoelectric conversion units to first and second signal holding units, respectively; and the first signal signal reading means for outputting the signal held in the holding portion; and third transfer means for transferring the signal held in the second signal holding portion to a second pixel portion among the plurality of pixel portions. and
The control method is
a step in which the control means performs control to output the signal held in the first signal holding part of the first pixel portion by the signal reading means of the first pixel portion;
The control means controls the third transfer means so that the signal of the second signal holding part of the first pixel portion is output by the signal reading means of the second pixel portion. and a step of performing.

Images