JP7222290B2 - motor controller - Google Patents

Description

The disclosed technology relates to a motor control device.

In a motor control device that controls the driving of a motor by vector control, a d-axis current command value and a q-axis current command value are generated so that the rotation speed of the motor becomes a speed command value (target speed), and the d-axis current command value A d-axis voltage command value and a q-axis voltage command value are generated from the q-axis current command value and the q-axis current command value. Furthermore, the d-axis voltage command value and the q-axis voltage command value are converted into three-phase output voltage command values, and signals for controlling switching in an IPM (Intelligent Power Module) (hereinafter referred to as "IPM control signals") ) are generated from three-phase output voltage command values by PWM (Pulse Width Modulation) and output to the IPM. In the IPM, switching is performed according to the input IPM control signal to generate a three-phase voltage, and the motor is driven by applying the generated three-phase voltage to the motor.

In PWM, an IPM control signal is generated based on a comparison result between a carrier signal, which is a carrier wave of PWM, and three-phase voltage command values (Vu ^* , Vv ^* , Vw ^* ). Here, PWM includes "synchronous PWM" and "asynchronous PWM".

In synchronous PWM, the zero-crossing points of the carrier signal and the zero-crossing points of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) always match, that is, the frequency of the carrier signal (hereinafter referred to as "carrier frequency"). ) and the frequency of the three-phase voltage command value (hereafter referred to as "electrical angular frequency") are frequency-synchronized (relationship between the carrier frequency and the electrical angular frequency are integer multiples) and phase-synchronized (zero-cross point coincidence) The carrier frequency is controlled as follows. Therefore, the phases of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) always match the phase of the IPM control signal. However, in synchronous PWM, in order to always match the phase of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) with the phase of the IPM control signal, the rotation frequency of the motor (hereinafter referred to as "rotational speed") Since it is necessary to control the carrier frequency in accordance with the frequency, the control becomes complicated and a high-performance microcomputer or processor (CPU) is required.

On the other hand, in asynchronous PWM, unlike synchronous PWM, control of the carrier frequency is not performed, so compared to synchronous PWM, processing related to PWM can be reduced. However, in asynchronous PWM, since a fixed carrier frequency is always used regardless of changes in the rotation frequency, the zero cross point of the carrier signal and the zero cross point of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) are may not match. Therefore, in the asynchronous PWM, a phase error (hereinafter referred to as "asynchronous phase error") occurs between the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) and the IPM control signal.

Also, PWM may be "over-modulated" to allow a higher voltage to be applied to the motor than the bus voltage of the IPM in order to increase the operating efficiency of the motor. The modulation factor is a value obtained by dividing the fundamental wave of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) by the amplitude value of the carrier signal, and PWM with a modulation factor exceeding "1" is performed. overmodulation.

JP 2007-143316 A

When overmodulation is performed in asynchronous PWM, the overmodulation increases the asynchronous phase error that occurs in asynchronous PWM. An increase in the asynchronous phase error causes an increase in noise generated by the motor during operation.

The disclosed technique has been made in view of the above, and aims to suppress the influence of an asynchronous phase error that occurs during overmodulation in asynchronous PWM.

A motor control device according to an aspect of the disclosure includes a PWM section and a modulation control section. The PWM section is capable of performing overmodulated PWM and performs asynchronous PWM. The modulation control unit satisfies the condition that the carrier frequency is not affected by the phase error (asynchronous phase error) between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) during overmodulation. Then, based on the result of the determination, overmodulation in the PWM section is permitted or prohibited.

According to an aspect of the disclosure, it is possible to suppress the influence of an asynchronous phase error that occurs during overmodulation in asynchronous PWM.

FIG. 1 is a diagram illustrating a configuration example of a motor control device according to a first embodiment. FIG. 2 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 3 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 4 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 5 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 6 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 7 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 8 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 9 is a diagram for explaining an operation example of the motor control device according to the first embodiment. FIG. 10 is a diagram for explaining an operation example of the motor control device according to the first embodiment; FIG. 11 is a diagram for explaining an operation example of the motor control device according to the first embodiment; FIG. 12 is a flowchart illustrating an example of processing of the motor control device according to the first embodiment; FIG. 13 is a diagram for explaining an operation example of the motor control device according to the second embodiment.

An embodiment of the motor control device disclosed in the present application will be described below with reference to the drawings. It should be noted that the motor control device disclosed in the present application is not limited to this embodiment. Also, in the embodiments, the same symbols are attached to the configurations having the same functions and the steps performing the same processing.

[Example 1]
<Configuration of motor control device>
FIG. 1 is a diagram illustrating a configuration example of a motor control device according to a first embodiment. The motor control device 100 shown in FIG. 1 performs asynchronous PWM. Also, the motor control device 100 can perform overmodulation.

In FIG. 1, the motor control device 100 includes subtraction units 11, 14, 15, 19, a speed control unit 12, an excitation current control unit 13, a d-axis current control unit 16, a q-axis current control unit 17, Non-interacting control unit 18, addition unit 20, dq/3φ conversion unit 21, PWM unit 22, IPM 23, 3φ current calculation unit 24, 3φ/dq conversion unit 25, and axis error calculation unit 26 , a PLL controller 29 , a position estimator 30 , a 1/Pn processor 31 and a modulation controller 41 . A motor control device 100 is connected to the motor M. As shown in FIG.

Subtraction units 11, 14, 15, 19, speed control unit 12, excitation current control unit 13, d-axis current control unit 16, q-axis current control unit 17, decoupling control unit 18, addition unit 20, dq/3φ conversion section 21, PWM section 22, 3φ current calculation section 24, 3φ/dq conversion section 25, axis error calculation section 26, PLL control section 29, position estimation section 30, 1/Pn processing section 31, and modulation control section 41 , implemented as hardware, for example by a microcomputer or processor. Examples of processors include CPUs (Central Processing Units), DSPs (Digital Signal Processors), and FPGAs (Field Programmable Gate Arrays).

Subtraction unit 11 calculates mechanical angular speed deviation Δω by subtracting mechanical angular speed ωm from mechanical angular speed command value ωm ^* , and outputs calculated mechanical angular speed deviation Δω to speed control unit 12 . The mechanical angular velocity command value ωm ^* is input to the subtractor 11 from outside the motor control device 100 . Also, the mechanical angular velocity ωm is input from the 1/Pn processing section 31 to the subtraction section 11 .

The speed control unit 12 generates a q-axis current command value Iq ^* that reduces the mechanical angular speed deviation Δω, and outputs the generated q-axis current command value Iq ^* to the excitation current control unit 13 and subtraction unit 15 .

The excitation current control unit 13 generates a d-axis current command value Id ^* from the q-axis current command value Iq ^* and outputs the generated d-axis current command value Id ^* to the subtraction unit 14 .

The d-axis and the q-axis represent coordinate axes of a two-phase rotating coordinate system, and Id, Iq and Vd, Vq, which will be described later, are current and voltage on these coordinate axes.

Subtraction unit 14 calculates d-axis current deviation ΔId by subtracting d-axis current Id from d-axis current command value Id ^* , and outputs calculated d-axis current deviation ΔId to d-axis current control unit 16 .

Subtraction unit 15 calculates q-axis current deviation ΔIq by subtracting q-axis current Iq from q-axis current command value Iq ^* , and outputs calculated q-axis current deviation ΔIq to q-axis current control unit 17 .

The d-axis current control unit 16 generates a d-axis voltage command value Vd ^** from the d-axis current deviation ΔId, and outputs the generated d-axis voltage command value Vd ^** to the subtraction unit 19 .

The q-axis current control unit 17 generates a q-axis voltage command value Vq ^** from the q-axis current deviation ΔIq and outputs the generated q-axis voltage command value Vq ^** to the adding unit 20 .

The non-interfering control unit 18 generates a non-interfering correction value for canceling interference that occurs between the d-axis and the q-axis and independently controlling the d-axis and the q-axis. For example, the non-interfering control unit 18 converts the d-axis voltage command value Vd ^** into a A d-axis non-interfering correction value Vda for interference is generated, and the generated d-axis non-interfering correction value Vda is output to the subtraction unit 19 . Further, for example, the non-interacting control unit 18 calculates the q-axis voltage command value Vq ^** from the q-axis current Iq input from the 3φ/dq conversion unit 25 and the electrical angular velocity ωe input from the PLL control unit 29. A q-axis non-interacting correction value Vqa for non-interacting is generated, and the generated q-axis non-interacting correction value Vqa is output to the addition unit 20 .

The subtracting unit 19 deinteracts the d-axis voltage command value Vd ^** by subtracting the d-axis decoupling correction value Vda from the d-axis voltage command value Vd ^** , and obtains the d-axis voltage command value after decoupling. Vd ^* is output to the dq/3φ converter 21 and the axis error calculator 26 .

The adder 20 deinteracts the q-axis voltage command value Vq ^** by adding the q-axis decoupling correction value Vqa to the q-axis voltage command value Vq ^** , and obtains the q-axis voltage command value after decoupling. Vq ^* is output to the dq/3φ conversion unit 21 and the axis error calculation unit 26 .

The dq/3φ converter 21 converts the two-phase d-axis voltage command value Vd ^* and the q-axis voltage command value Vq ^* into the three-phase U-phase output voltage command value using the electrical angle phase (dq-axis phase) θdq. Vu ^* , V-phase output voltage command value Vv ^* , W-phase output voltage command value Vw ^* , U-phase output voltage command value Vu ^* , V-phase output voltage command value Vv ^* , W-phase output voltage command after conversion It outputs the value Vw ^* to the PWM section 22 . Note that Vu ^* , Vv ^* , Vw ^* , and Iu, Iv, Iw, which will be described later, are voltages and currents in a three-phase fixed coordinate system.

Under the control of the modulation control unit 41, the PWM unit 22 outputs the carrier signal, the U-phase output voltage command value Vu ^* , the V-phase output voltage command value Vv*, the W-phase output voltage command value Vw ^* , and the three-phase output voltage command value Vw ^* . 6-phase IPM control signals are generated by asynchronous PWM based on the comparison result, and the generated IPM control signals are output to the IPM 23 . The carrier signal is generated by the PWM section 22 based on the input carrier frequency fc.

The IPM 23 generates AC voltages to be applied to each of the U-phase, V-phase, and W-phase of the motor M from the DC voltage Vdc applied from the outside of the motor control device 100 by switching control in the IPM 23 based on the IPM control signal. Then, the generated AC voltages are applied to the U-phase, V-phase, and W-phase of the motor M, respectively.

The 3φ current calculation unit 24 detects the bus current of the IPM 23, and based on the detected bus current and the 6-phase PWM switching information SI output from the PWM unit 22, the U-phase current Iu, the V-phase current Iv, and the W-phase current Iw is calculated. The 3φ current calculator 24 outputs the calculated U-phase current Iu, V-phase current Iv, and W-phase current Iw to the 3φ/dq converter 25 .

The 3φ/dq converter 25 converts the three-phase U-phase current Iu, V-phase current Iv, and W-phase current Iw into two-phase d-axis current Id and q-axis current Iq using the electrical angle phase θdq. , outputs the d-axis current Id to the subtraction unit 14, the decoupling control unit 18, and the axis error calculation unit 26, and outputs the q-axis current Iq to the subtraction unit 15, the decoupling control unit 18, and the axis error calculation unit 26. .

The axis error calculator 26 calculates the difference between the actual dq-axis and the control dq-axis from the d-axis voltage command value Vd ^* , the q-axis voltage command value Vq ^* , the d-axis current Id, and the q-axis current Iq. It calculates an axis error variation Δθ indicating the deviation between the two, and outputs the calculated axis error variation Δθ to the PLL control section 29 .

The PLL control unit 29 calculates an electrical angular velocity ωe, which is the angular velocity of the current rotation of the motor M, from the axis error variation Δθ, and transmits the calculated electrical angular velocity ωe to the decoupling control unit 18, the position estimation unit 30, and 1/Pn. Output to the processing unit 31 .

The 1/Pn processor 31 divides the electrical angular velocity ωe by the pole logarithm Pn of the motor M to calculate the mechanical angular velocity ωm, and outputs the calculated mechanical angular velocity ωm to the subtractor 11 .

The position estimator 30 calculates an electrical angular phase θdq indicating the current position of the rotor of the motor M from the electrical angular velocity ωe, and transfers the calculated electrical angle phase θdq to the dq/3φ converter 21 and the 3φ/dq converter 25. Output.

The carrier frequency fc and the electrical angular velocity target value ωet ^* are input to the modulation control unit 41 from the outside of the motor control device 100 . Based on the carrier frequency fc and the electrical angular velocity target value ωet ^* , the modulation control unit 41 determines whether or not the carrier frequency fc and the electrical angular velocity target value ωet ^* are affected by the asynchronous phase error. A computing unit (not shown) that computes the ratio of the target value of . Details of the modulation control unit 41 will be described later.

Note that the mechanical angular velocity command value ωm ^* input to the subtractor 11 gradually changes to the mechanical angular velocity target value obtained by dividing the electrical angular velocity target value ωet ^* input to the modulation control unit 41 by the pole logarithm Pn of the motor M. is calculated outside the motor control device 100 so as to approach .

<Operation of motor controller>
2 to 11 are diagrams for explaining an operation example of the motor control device according to the first embodiment.

2 and 3, the output voltage command value Vu ^* of the U phase is the signal wave U phase, the output voltage command value Vv ^* of the V phase is the signal wave V phase, and the output voltage command value Vw ^* of the W phase is These are called signal wave W phases.

FIG. 2 shows the relationship between the carrier signal and three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) in synchronous PWM, and FIG. 3 shows the carrier signal and three-phase output voltage command values in asynchronous PWM. (Vu ^* , Vv ^* , Vw ^* ). As shown in FIGS. 2 and 3, in both synchronous PWM and asynchronous PWM, the mutual phase difference between the signal wave U-phase, the signal wave V-phase, and the signal wave W-phase is 120 degrees. A mutual phase difference of 120 degrees between the signal wave U-phase, signal wave V-phase, and signal wave W-phase corresponds to 1/3 of 360 degrees corresponding to one cycle of each signal wave. Also, when the carrier frequency is three times the frequency of each signal wave, that is, one cycle of each signal wave corresponds to three cycles of the carrier signal.

For this reason, in synchronous PWM, when the carrier frequency is 3×n times the frequency of each signal wave (n is a positive integer), as shown in FIG. All zero crossing points of the wave W phase coincide with the zero crossing points of the carrier signal.

On the other hand, in asynchronous PWM, as shown in FIG. 3, the zero-crossing points of the U-phase signal wave, the V-phase signal wave, and the W-phase signal wave may not coincide with the zero-crossing points of the carrier signal. Therefore, in asynchronous PWM, an asynchronous phase error occurs. The asynchronous phase error will be considered below using the concept of a Phase Locked Loop (PLL).

FIG. 4 shows an example of inputs and outputs of the PLL. It is assumed that the reference signal (PLL input signal) is a square wave CLKref of period Tref, and the oscillator signal (PLL output signal) is a square wave CLKs of period Ts. The square wave of the oscillator signal in which the phases of the oscillator signal and the reference signal are out of phase is assumed to be a square wave CLKs'. FIG. 4 shows the relationship between the square wave CLKref, the square wave CLKs, and the square wave CLKs'. FIG. 4 shows the case where the phase of the square wave CLKs matches the phase of the square wave CLKref and the phase of the square wave CLKs' lags the phases of the square waves CLKref and CLKs by ΔT. The frequency has a relationship with the frequency of the square wave CLKref and an integer multiple, and the frequency of the square wave CLKs' also has a relationship with the frequency of the square wave CLKref and an integer multiple. That is, the relationship between the square wave CLKs and the square wave CLKref corresponds to the relationship between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) in synchronous PWM, and the square wave CLKs' and the square wave The relationship with CLKref corresponds to the relationship in which the carrier signal in synchronous PWM and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) are out of phase by ΔT.

In FIG. 4, between the square wave CLKref and the square wave CLKs, the period Tref includes five periods Ts. On the other hand, although the square wave CLKref and the square wave CLKs' are out of phase by ΔT, the period Tref includes five periods Ts, as in the case between the square wave CLKref and the square wave CLKs. is In other words, when counting the number of times the square waves CLKs and square waves CLKs' fall (the number of falling edges) within one period of the square wave CLKref, both of them are five.

Therefore, in FIG. 4, looking at the relationship between the square wave CLKref and the square waves CLKs and CLKs' in terms of frequency, both the square waves CLKs and CLKs' have a relationship of "the frequency is an integer multiple" with respect to the square wave CLKref. It is in. Also, looking at the relationship between the square wave CLKref and the square waves CLKs and CLKs' in terms of phase, the square wave CLKs has a phase synchronous relationship with the square wave CLKref, while the square wave CLKs' is the square wave CLKref. is phase-asynchronous with respect to

If the square waves CLKs and CLKs' have a frequency integral multiple of the square wave CLKref, even if there is a phase error of ΔT, the square waves CLKref and CLKs will be generated even in the next period Tref. , CLKs' are kept constant. That is, even in the next period Tref, a phase shift of ΔT occurs between the square waves CLKref, CLKs and the square wave CLKs'. Replacing the above with the relationship between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ), the carrier frequency and the three-phase output voltage command values (Vu ^* , Vv ^*) , Vw ^* ) is an integer multiple, even if there is a phase shift between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ), the PWM unit performs IPM control. This means that the timing of the output voltage phases of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) is constant when the signal is generated.

Therefore, even in asynchronous PWM, if the carrier frequency and the frequency of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) are in the relationship of "the frequency is an integer multiple", the asynchronous phase error is constant. can be said to be kept at Therefore, the asynchronous phase error can be regarded as a phase error without a variable element, that is, as an offset.

Next, FIG. 5 shows an example of inputs and outputs of the PLL. It is assumed that the reference signal (PLL input signal) is a square wave CLKref of period Tref, and the oscillator signal (PLL output signal) is a square wave CLKs of period Ts. A square wave of the oscillator signal in which the phases of the oscillator signal and the reference signal are out of phase is assumed to be a square wave CLKs'. FIG. 4 shows the relationship between the square wave CLKref, the square wave CLKs, and the square wave CLKs'. The frequency of the oscillator signal is nine times the frequency of the reference signal. FIG. 5 shows a case where the phase of the square wave CLKs matches the phase of the square wave CLKref and the phase of the square wave CLKs' lags the phases of the square waves CLKref and CLKs by ΔT. In FIG. 5, the number of rising edges of the square waves CLKs and CLKs' included in the period Tref/3, which is one third of the period Tref of the square wave CLKref (hereinafter referred to as "one-third period Tref/3") are three in any one-third period Tref/3.

In FIG. 5, the frequency of the oscillator signal is nine times the frequency of the reference signal. That is, "oscillator frequency/reference signal frequency=3×n times (n is a positive integer)". Here, the reason for "oscillator frequency/reference signal frequency = 3 x n (n is a positive integer)" is that the phases of the three-phase signal waves (U phase, V phase, and W phase) are shifted by 120 degrees. Therefore, when looking at one cycle 360° from the zero crossing of any one phase signal wave, the zero crossings of any of the three phase signal waves appear periodically at 60° intervals during that one cycle. In order to synchronize the carrier signal with all zero crossings that appear, the oscillator frequency, which is the basis of the carrier signal frequency, must be 3×n times (where n is a positive integer). The fact that this frequency ratio is 3×n times is one of the factors of synchronous PWM. Further, from FIG. 5, if the square waves CLKs and CLKs' are in a relationship of integral multiples of the frequency with respect to the square wave CLKref, even if there is a phase shift of ΔT, there is a 1/3 period Tref/3. , that is, the number of rising edges of the square waves CLKs and CLKs' included in the 1/3 period Tref/3 is constant. In other words, it is equivalent to a state in which phases are not synchronized in synchronous PWM, that is, a state in which only frequency is synchronized in asynchronous PWM.

Next, FIG. 6 shows an example of inputs and outputs of the PLL. It is assumed that the reference signal (PLL input signal) is a square wave CLKref of period Tref, and the oscillator signal (PLL output signal) is a square wave CLKs of period Ts. The square wave of the oscillator signal in which the phases of the oscillator signal and the reference signal are out of phase is assumed to be a square wave CLKs'. FIG. 4 shows the relationship between the square wave CLKref, the square wave CLKs, and the square wave CLKs'. The frequency of the oscillator signal is 9.4 times the frequency of the reference signal. If the frequencies are not related by 3×n (where n is a positive integer), the quotient must contain a fractional part or a remainder when the multiple is divided by 3. For example, dividing 9.3 times by 3 gives a quotient of 3.1 and includes a fractional part. When such a fractional part occurs, the frequency relationship of the output voltage command values (Vu ^* , Vv ^* , Vw ^* ) with a three-phase carrier frequency is different from 3×n times, and the fractional part and the remainder of the quotient cause asynchronous Phase error is no longer constant. Therefore, in the period Tref next to the period Tref shown in FIG. case arises.

Next, FIG. 7 shows an example of inputs and outputs of the PLL. It is assumed that the reference signal (PLL input signal) is a square wave CLKref with a period Tref, and the oscillator signal (PLL output signal) is a square wave CLKs with a period Ts. A square wave of the oscillator signal in which the phases of the oscillator signal and the reference signal are out of phase is assumed to be a square wave CLKs'. FIG. 4 shows the relationship between the square wave CLKref, the square wave CLKs, and the square wave CLKs'. The frequency of the oscillator signal is 9.7 times the frequency of the reference signal. If the frequencies are not related by 3×n (where n is a positive integer), then dividing the multiple by 3 must include a fractional part or remainder in the quotient, as with 9.4. In the case of 9.4 times, the quotient not including the decimal part is 3 and the remainder is 0.4, and in the case of 9.7 times the quotient not including the decimal part is 3 and the remainder is 0.7. Since the next period Tref contains the remainder, the phase is shifted by the remainder. Therefore, it can be seen that there is a high probability that the square wave CLKs included in the 1/3 cycle Tref/3 will have four rising edges.

4 to 7 above, as a result of verification in asynchronous PWM, the result is that "carrier frequency/electrical angular frequency", that is, the carrier frequency is the electrical angular frequency "(3 × n times - 0.5) ( It can be seen that the influence of the asynchronous phase error can be suppressed if n is a positive integer)” or more and less than “(3×n times+0.5) (n is a positive integer)”.

8 and 9 show three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) sample points. As an example, FIGS. 8 and 9 show sample points when the carrier frequency is 19 times the electrical angular frequency. FIG. 8 shows a waveform obtained by enlarging FIG. 9, and it can be seen that the waveform is sinusoidally sampled. FIG. 9 shows a waveform of 80 cycles in which sample points are taken in a sinusoidal form. It can be seen from FIG. 9 that the sampling points of the U-phase, V-phase, and W-phase are scattered (there is no correlation among the phases). That is, in the case of integer multiples other than 3×n (where n is a positive integer), the phase shifts due to the fractional part of the quotient and the remainder when the multiple is divided by 3. This causes the asynchronous phase error to become non-constant.

On the other hand, FIGS. 10 and 11 show three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) sample points. As an example, FIGS. 10 and 11 show sample points when the carrier frequency is 21 times the electrical angular frequency. FIG. 10 shows a waveform obtained by enlarging FIG. 11, and it can be seen that the waveform is sinusoidally sampled. FIG. 11 shows 80 cycles of a waveform with sampling points in a sinusoidal shape. In FIG. 11, it can be seen that the sampling points of the U-phase, V-phase, and W-phase are regular and constant (each phase has a correlation). Namely. In the case of an integer multiple of 3×n (where n is a positive integer), the phase shift is constant because there is no fractional part or remainder in the quotient when the multiple is divided by 3. This keeps the asynchronous phase error constant.

Further, as described above, in asynchronous PWM, the carrier frequency is equal to or greater than "3×n times −0.5 (n is a positive integer)" of the electrical angle frequency, and "3×n times +0.5 (n is a positive integer)". If it is less than a positive integer), even if a phase shift occurs between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ), the influence of the asynchronous phase error is suppressed.

<Processing of motor control device>
12 is a flowchart illustrating an example of processing of the motor control device according to the first embodiment; FIG. The processing according to the flowchart shown in FIG. 12 is performed before the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) are input to the PWM unit 22 and the IPM control signal is output to the IPM 23 . Therefore, it may be within the cycle in which the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) are generated.

In step S101, the modulation control unit 41 calculates the frequency ratio FR between the carrier frequency and the target value of the electrical angular frequency according to Equation (1). The target value of the electrical angular frequency is the electrical angular frequency of the electrical angular velocity target value ωet ^* .

Frequency ratio FR
=Carrier frequency fc/Target value of electrical angular frequency =Carrier frequency fc/(Target value of electrical angular velocity ωet ^* /(2×π))
…(1)

Next, in step S103, the modulation control unit 41 rounds the frequency ratio FR calculated in step S101 to the first decimal place, thereby integerizing the frequency ratio FR. The integer frequency ratio FR is hereinafter referred to as “integer frequency ratio IFR”. By using this integer frequency ratio IFR, it means that the frequency ratio FR has a frequency ratio in the range of "(IFR-0.5)≤FR<(IFR+0.5)". As a result, the remainder of the division result in the next step determines that the carrier frequency is equal to or greater than "3×n times −0.5 (n is a positive integer)" of the electrical angle frequency and "3×n times +0.5 (n is a positive integer)". 5 (n is a positive integer)” can be determined.

Next, in step S105, the modulation control unit 41 divides the integer frequency ratio IFR by three.

Next, in step S107, the modulation control unit 41 determines whether or not the division result in step S105 yields a divisible remainder R of 0 (zero).

Whether the frequency ratio FR is in the range of “(3×n times−0.5) or more and (3×n times+less than 0.5) (n is a positive integer)” by the processing of steps S103 to S107 No, that is, the carrier frequency is “(3×n times −0.5) or more and (3×n times + less than 0.5) (n is a positive integer)” of the target value of the electrical angle frequency It is determined whether or not From the above description, the condition that the frequency ratio FR is in the range of "(3 × n times - 0.5) or more and less than (3 × n times + 0.5) (n is a positive integer)" is satisfied In this case, even if a phase shift occurs between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) during overmodulation, the influence of the asynchronous phase error is suppressed.

When the remainder R is 0 (step S107: Yes), in step S109, the modulation control unit 41 permits the PWM unit 22 to perform overmodulation, and the first modulation of any value exceeding "1" A rate upper limit value MF1 (for example, “first modulation rate upper limit value MF1=1.2”) is set in the PWM section 22, and the PWM section 22 uses the first modulation rate upper limit value MF1 as the upper limit of the modulation rate to perform overmodulation. Perform PWM processing.

On the other hand, if the remainder R is not 0 (step S107: No), in step S111, the modulation control unit 41 prohibits the PWM unit 22 from performing overmodulation, A second modulation factor upper limit MF2 (for example, “second modulation factor upper limit MF2=1.0”) is set in the PWM unit 22, and the PWM unit 22 performs PWM processing with the second modulation factor upper limit MF2 as the upper limit of the modulation factor. I do. The second modulation factor upper limit MF2 here is a state in which the value obtained by dividing the fundamental wave of the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) by the amplitude value of the carrier signal does not exceed "1". becomes. That is, it becomes equal to normal motor control without overmodulation.

As described above, in the first embodiment, the motor control device 100 has the PWM section 22 and the modulation control section 41 . The PWM unit 22 is capable of performing overmodulation PWM processing and also performs asynchronous PWM. The modulation control unit 41 determines whether or not the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) are affected by the asynchronous phase error during overmodulation. Overmodulation in PWM processing is prohibited if it is affected, while overmodulation in PWM processing is permitted if it is not affected by asynchronous phase error.

For example, the modulation control unit 41 determines that the value obtained by dividing the carrier frequency by the target value of the electrical angular frequency is “(3×n times−0.5) or more and less than (3×n times+0.5) (n is positive integer)”, it is determined that the condition for not being affected by the asynchronous phase error is satisfied.

By doing so, overmodulation in PWM processing is permitted only when the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) during overmodulation are not affected by the asynchronous phase error. Therefore, it is possible to suppress the influence of an asynchronous phase error that occurs during overmodulation in asynchronous PWM.

[Example 2]
<Operation of motor controller>
The PWM unit 22 in which overmodulation is permitted based on the first electrical angular velocity target value ωet1 ^* , which is the previous electrical angular velocity target value ^{ωet *} , reaches the second electrical angular velocity target value, which is the current electrical angular velocity target value ωet*. When the overmodulation is prohibited based on the value ωet2 ^* , the upper limit of the modulation rate is rapidly decreased from the first upper limit of the modulation rate MF1 to the second upper limit of the modulation rate MF2. Noise may occur in the motor M due to a rapid decrease in rotational speed.

Further, when the PWM unit 22 in which overmodulation is prohibited based on the first target electrical angular velocity value ωet1 ^* is switched to permit overmodulation based on the second target electrical angular velocity value ωet2 ^* , When the upper limit value of the modulation rate suddenly increases from the second upper limit value MF2 of the modulation rate to the first upper limit value MF1 of the modulation rate, the rotation speed of the motor M rises sharply, and noise is generated in the motor M. There is

Further, even if the PWM unit 22 in a state in which overmodulation is permitted based on the first electrical angular velocity target value ωet1 ^* is permitted to overmodulate based on the second electrical angular velocity target value ωet2 ^* , the first electrical angular velocity target value ωet2* Between the angular velocity target value ωet1 ^* and the second electrical angular velocity target value ωet2 ^* (passing point), the frequency ratio FR is “(3×n times−0.5)≦FR<(3×n times+0.5) (n is a positive integer)] ^] may be included. Between the first electrical angular velocity target value ωet1 ^* and the second electrical angular velocity target value ωet2 ^* , the frequency ratio FR is “(3×n times−0.5)≦FR<(3×n times+0.5) ( n is a positive integer) ^” , the carrier signal during overmodulation and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ), the motor M may generate noise due to the increased influence of the asynchronous phase error.

Therefore, in the second embodiment, as shown in FIG. 13, the modulation control unit 41 compares the result of the previous determination of permission or prohibition of overmodulation with the result of the current determination of permission or prohibition of overmodulation. Based on the combination, the modulation rate is controlled. FIG. 13 is a diagram for explaining an operation example of the motor control device according to the second embodiment.

For example, the modulation control unit 41 receives the first electrical angular velocity target value ωet1 ^* , which is the previous electrical ^angular velocity target value ωet*, and the second electrical angular velocity target value ωet2 ^* , which is the current electrical angular velocity target value ωet ^* . If so, the modulation control unit 41 performs the processing of steps S101 to S111 (FIG. 12) using the first electrical angular velocity target value ωet1 ^* , and determines whether overmodulation is permitted or prohibited. ) and the second electrical angular velocity target value ωet2 ^* , the processing of steps S101 to S111 (FIG. 12) is performed to determine whether overmodulation is permitted or prohibited. (referred to as “judgment result”).

Here, the combination of overmodulation permission and prohibition determination results between the previous determination result and the current determination result, that is, the permission or prohibition of overmodulation based on the previous determination result and the overmodulation prohibition result based on the current determination result. A combination with permission or prohibition of modulation (hereinafter referred to as "determination result combination") is a combination in which the previous determination was "permitted" and the current determination is "permitted" (hereinafter referred to as "first combination"). , a combination where the previous judgment was "prohibited" and the current judgment is "prohibited" (hereafter referred to as the "second combination"), and the previous judgment result was "allowed" and the current judgment result is "prohibited (hereafter referred to as the "third combination"), and a combination in which the previous judgment result was "prohibited" and the current judgment result was "allowed" (hereafter referred to as the "fourth combination"). .

Therefore, the modulation control unit 41 determines whether the determination result combination is the first combination, the second combination, the third combination, or the fourth combination, and, as shown in FIG. The modulation rate is controlled accordingly.

That is, when the determination result combination is the first combination, the modulation control unit 41 sets the third modulation factor upper limit value MF3 (where "first modulation factor upper limit value MF2=1.0<third modulation factor upper limit value MF3< First modulation factor upper limit MF1", for example, when "first modulation factor upper limit MF1=1.2", "third modulation factor upper limit MF3=1.1") is set in the PWM unit 22, and the PWM unit 22 performs overmodulation with the third modulation factor upper limit MF3 as the upper limit of the modulation factor. By doing so, it is possible to keep the modulation rate lower than in the first embodiment while performing overmodulation at the electrical angular frequency at the passing point where the electrical angular velocity target value changes during overmodulation. Therefore, it is possible to reduce the influence of noise caused by a sudden drop in the rotation speed of the motor M due to a sudden decrease in the modulation rate. The third modulation rate upper limit value MF3 may be stored in advance as data, for example, by determining a modulation rate at which noise is kept below a predetermined value through actual machine verification.

Further, when the determination result combination is the second combination, the modulation control unit 41 sets the second modulation factor upper limit value MF2 to the PWM unit 22, and the PWM unit 22 sets the second modulation factor upper limit value MF2 to the modulation factor PWM processing is performed with the upper limit of .

Further, when the determination result combination is the third combination, the modulation control unit 41 gradually decreases the modulation rate from the first modulation rate upper limit value MF1 toward the second modulation rate upper limit value MF2, and changes the modulation rate by PWM. The PWM unit 22 performs PWM processing with the modulation rate set by the modulation control unit 41 . The sudden decrease in the modulation rate causes the rotation speed of the motor M to drop sharply, causing the motor M to generate noise. Therefore, the time during which the modulation rate is gradually decreased from the first modulation rate upper limit value MF1 to the second modulation rate upper limit value MF2 is the time during which noise does not occur. The change time may be determined in advance by verification.

When the determination result combination is the fourth combination, the modulation control unit 41 gradually increases the modulation rate from the second modulation rate upper limit value MF2 toward the first modulation rate upper limit value MF1, while the modulation rate is controlled by the PWM unit 22. , and the PWM unit 22 performs overmodulation with the modulation rate set by the modulation control unit 41 . A rapid increase in the modulation rate causes a rapid increase in the rotation speed of the motor M, and noise is generated in the motor M. FIG. Therefore, the time during which the modulation rate is gradually increased from the second modulation rate upper limit value MF2 toward the first modulation rate upper limit value MF1 is the time during which noise does not occur. The change time may be determined in advance by verification.

As described above, in the second embodiment, the modulation control unit 41 gradually increases the modulation rate of PWM when switching between permission and prohibition of overmodulation in PWM based on the previous determination result and the current determination result. change to

By gradually changing the modulation rate of the PWM in this way, it is possible to prevent a sudden change in the rotation speed of the motor M, thereby preventing the motor M from generating noise. Moreover, the influence of the asynchronous phase error between the carrier signal and the three-phase output voltage command values (Vu ^* , Vv ^* , Vw ^* ) during overmodulation can be suppressed.

100 motor controllers 11, 14, 15, 19 subtraction unit 12 speed control unit 13 excitation current control unit 16 d-axis current control unit 17 q-axis current control unit 18 decoupling control unit 20 addition unit 21 dq/3φ conversion unit 22 PWM unit 23 IPM
24 3φ current calculator 25 3φ/dq converter 26 axis error calculator 29 PLL controller 30 position estimator 31 1/Pn processor 41 modulation controller

Claims (4)

A motor control device that drives a motor by vector control,
A PWM unit capable of performing overmodulation PWM processing and performing asynchronous PWM;
The carrier frequency, which is the frequency of the carrier signal of the PWM unit during the overmodulation, is the phase error between the carrier frequency and the frequency of the voltage command value for controlling the motor to a target rotation speed. a modulation control unit that determines whether or not a condition for not receiving is satisfied, and performs control to permit or prohibit the overmodulation in the PWM unit based on the determination result;
A motor control device comprising: The modulation control unit determines that the value calculated by dividing the carrier frequency by the frequency of the voltage command value is (3×n times−0.5) or more and (3×n times+0.5 or less) ( n is a positive integer), determine that the asynchronous phase error is not affected, and allow the overmodulation in the PWM unit;
The motor control device according to claim 1. The modulation control unit outputs to the PWM unit a modulation factor upper limit value corresponding to permitting the overmodulation when permitting the overmodulation, and prohibits the overmodulation when prohibiting the overmodulation. Outputting a modulation rate upper limit value corresponding to to the PWM unit,
3. A motor control device according to claim 2. The modulation control unit allows or prohibits the overmodulation in the PWM unit according to a combination of a previous determination result of determining whether or not to permit the overmodulation and a current determination result of the determination. When switching, gradually change the modulation rate of the PWM process,
4. A motor control device according to claim 3.

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