JP7218467B2 - Display device - Google Patents

Description

Embodiments of the present invention relate to display devices.

In recent years, various types of display devices have been proposed. In one example, a display device is disclosed in which a color filter is arranged between a polymer-dispersed liquid crystal layer and a reflective layer, and color display is realized using reflected light from the reflective layer. In another example, a mirror type display device is disclosed in which a reflective layer is disposed on an upper substrate, the reflective layer provides a mirror function, and an image display function is provided in an aperture region of the reflective layer. there is In yet another example, an electro-optical device is disclosed in which a reflective layer is placed between a drive transistor and a light emitting element to prevent light from the light emitting element from illuminating the drive transistor.
On the other hand, there is a lighting device using a polymer dispersed liquid crystal (hereinafter sometimes referred to as “PDLC”) that can switch between a scattering state that scatters incident light and a transmission state that transmits incident light. Proposed.
By the way, in a display device using PDLC, it is desired to suppress deterioration in display quality.

JP 2011-95407 A JP 2016-212390 A JP 2017-146369 A Japanese Patent No. 5467389

An object of the present embodiment is to provide a display device capable of suppressing degradation of display quality.

According to one embodiment,
a first insulating substrate, scanning lines, signal lines crossing the scanning lines, switching elements electrically connected to the scanning lines and the signal lines, and pixel electrodes electrically connected to the switching elements. , a second insulating substrate, and a second substrate provided with a common electrode facing the pixel electrode; located between the first substrate and the second substrate; a liquid crystal layer containing a linear polymer and liquid crystal molecules, wherein the scanning line is formed by a conductive layer positioned between the first insulating substrate and the liquid crystal layer; a first reflective layer positioned between a layer and having a higher reflectivity than the conductive layer.
According to one embodiment,
a first substrate comprising a first insulating substrate, a conductive layer and a reflective layer; a second substrate comprising a second insulating substrate; positioned between the first substrate and the second substrate; a liquid crystal layer containing linear polymers and liquid crystal molecules, wherein the conductive layer is positioned between the first insulating substrate and the liquid crystal layer, and the reflective layer is between the first insulating substrate and the liquid crystal layer; A display is provided between the conductive layer and having a higher reflectivity than the conductive layer.
According to one embodiment,
A first substrate comprising a first insulating substrate, a switching element, and a pixel electrode electrically connected to the switching element; a second insulating substrate; and a common electrode facing the pixel electrode. and a liquid crystal layer positioned between the first substrate and the second substrate and containing a linear polymer and liquid crystal molecules, wherein the switching element comprises the first insulating substrate. and the liquid crystal layer, a semiconductor layer positioned between the gate electrode and the liquid crystal layer, and a source electrode and a drain electrode in contact with the semiconductor layer, wherein the gate electrode is , a reflective layer facing the first insulating substrate; and a conductive layer laminated on the reflective layer and facing the semiconductor layer.
According to one embodiment,
a first insulating substrate, scanning lines extending in a first direction, signal lines intersecting the scanning lines and extending in a second direction, and switching elements electrically connected to the scanning lines and the signal lines. a pixel electrode electrically connected to the switching element; and a first alignment film covering the pixel electrode and having alignment control force in the first direction; and a second insulating substrate. a third reflective layer positioned between the second insulating substrate and the first alignment film so as to face the second insulating substrate; a common electrode facing the pixel electrode; and a second alignment film having an alignment control force in the first direction; a liquid crystal layer containing streak-shaped polymers that are drawn out; liquid crystal molecules that are aligned along the first direction; and a plurality of light emitting elements that are aligned along the first direction, wherein the scanning line is a conductive layer located between the first insulating substrate and the liquid crystal layer; and a conductive layer located between the first insulating substrate and the conductive layer, facing the first insulating substrate and having a higher reflection than the conductive layer. a first reflective layer having an index, wherein said third reflective layer overlaps said scanning lines and said signal lines.

FIG. 1 is a plan view showing a configuration example of a display device DSP in this embodiment. FIG. 2 is a perspective view of the display device DSP shown in FIG. FIG. 3 is a cross-sectional view of the display device DSP shown in FIG. FIG. 4 is a cross-sectional view showing one configuration example of the display panel PNL shown in FIG. FIG. 5 is a diagram schematically showing the liquid crystal layer 30 in the OFF state. FIG. 6 is a diagram schematically showing the liquid crystal layer 30 in the ON state. FIG. 7 is a cross-sectional view showing the display panel PNL when the liquid crystal layer 30 is in the off state. FIG. 8 is a cross-sectional view showing the display panel PNL in the case where the liquid crystal layer 30 includes a region in the ON state. FIG. 9 is a plan view showing an example of the pixel PX on the first substrate SUB1. 10 is an enlarged plan view showing an example of the switching element SW shown in FIG. 9. FIG. FIG. 11 is a cross-sectional view showing the display panel PNL along line A-A' including the switching element SW shown in FIG. FIG. 12 is a cross-sectional view showing the display panel PNL along line B-B' including the scanning line G2 and the connection portion DEA shown in FIG. FIG. 13 is a cross-sectional view showing the display panel PNL along line C-C' including the signal line S1 shown in FIG. 14 is a plan view showing the signal lines S1 and S2, the scanning lines G1 and G2, and the light blocking layer 18. FIG. FIG. 15 is a diagram for explaining how light emitted from the light emitting element LS propagates through the display panel PNL. FIG. 16 is a diagram showing luminance measurement results in the display device DSP of the present embodiment and the display device of the comparative example.

Several embodiments are described below with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art will naturally include within the scope of the present invention any suitable modifications that can be easily conceived while maintaining the gist of the invention. In addition, in order to make the description clearer, the drawings may schematically show the width, thickness, shape, etc. of each part compared to the actual embodiment, but this is only an example and does not apply to the present invention. It does not limit interpretation. In addition, in this specification and each figure, the same reference numerals are given to components that exhibit the same or similar functions as those described above with respect to the previous figures, and redundant detailed description may be omitted as appropriate. .

FIG. 1 is a plan view showing a configuration example of a display device DSP in this embodiment. In the drawing, the first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but they may cross each other at an angle other than 90 degrees. In this specification, the position on the side of the tip of the arrow indicating the third direction Z may be referred to as "upper", and the position on the side opposite to the tip of the arrow may be referred to as "lower". In the case of "the second member above the first member" and "the second member below the first member", the second member may be in contact with the first member or may be separated from the first member. may Further, it is assumed that an observation position for observing the display device DSP is on the tip side of the arrow indicating the third direction Z, and from this observation position, the XY plane defined by the first direction X and the second direction Y is observed. Seeing is called flat view.

In this embodiment, as an example of the display device DSP, a display device to which a polymer-dispersed liquid crystal is applied will be described. The display device DSP includes a display panel PNL and wiring boards F1 to F3. The display device DSP also includes a light source unit (not shown).

The display panel PNL includes a first substrate SUB1 and a second substrate SUB2. The first substrate SUB1 and the second substrate SUB2 are formed in a plate shape parallel to the XY plane. The first substrate SUB1 and the second substrate SUB2 overlap each other in plan view. The display panel PNL includes a display area DA for displaying an image and a frame-shaped non-display area NDA surrounding the display area DA. The display area DA is located in an area where the first substrate SUB1 and the second substrate SUB2 overlap. The display panel PNL includes n scanning lines G (G1 to Gn) and m signal lines S (S1 to Sm) in the display area DA. Both n and m are positive integers, and n may be equal to m, or n may be different from m. The plurality of scanning lines G extend in the first direction X and are arranged in the second direction Y at intervals. The plurality of signal lines S extend in the second direction Y and are arranged in the first direction X at intervals.
The first substrate SUB1 has ends E11 and E12 extending along the first direction X and ends E13 and E14 extending along the second direction Y. As shown in FIG. The second substrate SUB2 has ends E21 and E22 extending along the first direction X and ends E23 and E24 extending along the second direction Y. As shown in FIG. In the illustrated example, the ends E11 and E21, the ends E13 and E23, and the ends E14 and E24 respectively overlap in plan view, but they do not have to overlap. The end E22 is positioned between the end E12 and the display area DA in plan view. The first substrate SUB1 has an extension Ex between the end E12 and the end E22.

The wiring boards F1 to F3 are connected to the extensions Ex and arranged in the first direction X in this order. The wiring board F1 includes a gate driver GD1. The wiring board F2 includes a source driver SD. The wiring board F3 includes a gate driver GD2. Note that the wiring boards F1 to F3 may be replaced with a single wiring board.
A plurality of signal lines S are drawn out to the non-display area NDA and connected to the source driver SD. A plurality of scanning lines G are drawn out to the non-display area NDA and connected to gate drivers GD1 and GD2. In the illustrated example, the odd-numbered scanning lines G are drawn out between the end E14 and the display area DA and connected to the gate driver GD2. Also, the even-numbered scanning lines G are led out between the end E13 and the display area DA and connected to the gate driver GD1. The connection relationship between the gate drivers GD1 and GD2 and each scanning line G is not limited to the illustrated example.

FIG. 2 is a perspective view of the display device DSP shown in FIG. Here, illustration of the wiring boards F1 to F3 is omitted. The light source unit LU is located on the first substrate SUB1 and arranged along the edge E22. The light source unit LU includes a light emitting element LS as a light source and a wiring board F4 indicated by a dotted line. The light emitting element LS is, for example, a light emitting diode. The plurality of light emitting elements LS are arranged along the first direction X at intervals. Each of the light emitting elements LS is connected to the wiring board F4. The light emitting element LS is positioned between the first substrate SUB1 and the wiring substrate F4. The light-emitting element LS has a light-emitting portion EM. The light emitting part EM faces the end E22. The light emitting part EM may be in contact with the end E22. Moreover, an air layer, an optical element, or the like may be interposed between the light emitting portion EM and the end portion E22. The end portion E22 corresponds to a light incident portion on which light emitted from the light emitting portion EM is incident.

FIG. 3 is a cross-sectional view of the display device DSP shown in FIG. Here, only the main parts of the cross section of the display device DSP on the YZ plane defined by the second direction Y and the third direction Z will be described. The display panel PNL includes a liquid crystal layer 30 held between a first substrate SUB1 and a second substrate SUB2. The first substrate SUB1 and the second substrate SUB2 are bonded with a seal 40. As shown in FIG.
In the illustrated example, the light emitting element LS is positioned between the extension Ex and the wiring board F4. Also, the light emitting elements LS are positioned between the wiring boards F1 to F3 and the second board SUB2. The light emitting element LS emits light from the light emitting portion EM toward the end portion E22. The light incident from the end E22 propagates through the display panel PNL in the direction opposite to the arrow indicating the second direction Y, as will be described later. Note that the light emitting element LS may face both ends of the first substrate SUB1 and the second substrate SUB2, and may face the ends E11 and E21, for example.

FIG. 4 is a cross-sectional view showing one configuration example of the display panel PNL shown in FIG. The first substrate SUB1 includes a transparent substrate (first insulating substrate) 10, wirings 11, an insulating layer 12, pixel electrodes 13, and an alignment film . The second substrate SUB2 includes a transparent substrate (second insulating substrate) 20, a common electrode 21, and an alignment film 22. As shown in FIG. The transparent substrates 10 and 20 are insulating substrates such as glass substrates and plastic substrates. The wiring 11 is made of opaque metal material such as molybdenum, tungsten, aluminum, titanium, and silver. The illustrated wiring 11 extends in the first direction X, but may extend in the second direction Y as well. The insulating layer 12 is made of a transparent insulating material. The pixel electrode 13 and the common electrode 21 are made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel electrode 13 is arranged for each pixel PX. The common electrode 21 is arranged over a plurality of pixels PX. The alignment films 14 and 22 may be horizontal alignment films having an alignment control force substantially parallel to the XY plane, or vertical alignment films having an alignment control force substantially parallel to the third direction Z. good.

The liquid crystal layer 30 is located between the alignment films 14 and 22 . The liquid crystal layer 30 comprises a polymer dispersed liquid crystal containing a polymer 31 and liquid crystal molecules 32 . In one example, polymer 31 is a liquid crystalline polymer. The polymer is obtained, for example, by polymerizing a liquid crystalline monomer while being aligned in a predetermined direction by the alignment control force of the alignment films 14 and 22 . In one example, the alignment processing direction of the alignment films 14 and 22 is the first direction X, and the alignment films 14 and 22 have an alignment regulating force along the first direction X. FIG. For this reason, the polymer 31 is formed in a stripe shape extending along the first direction X. As shown in FIG. The liquid crystal molecules 32 are dispersed in the interstices of the polymer 31 and oriented such that their long axes are along the first direction X. As shown in FIG.
Each of the polymer 31 and liquid crystal molecules 32 has optical anisotropy or refractive index anisotropy. The liquid crystal molecules 32 may be positive liquid crystalline molecules having positive dielectric anisotropy, or may be negative liquid crystalline molecules having negative dielectric anisotropy. The responsiveness of the polymer 31 and liquid crystal molecules 32 to an electric field is different. The responsiveness of the polymer 31 to an electric field is lower than the responsiveness of the liquid crystal molecules 32 to an electric field. In the enlarged portion of the drawing, the polymer 31 is indicated by diagonal lines rising to the right, and the liquid crystal molecules 32 are indicated by diagonal lines falling to the right.

FIG. 5 is a diagram schematically showing the liquid crystal layer 30 in the OFF state. Here, the cross section of the liquid crystal layer 30 on the XZ plane that intersects the second direction Y, which is the traveling direction of light from the light source unit LU, is shown. The off state corresponds to a state in which no voltage is applied to the liquid crystal layer 30 (for example, a state in which the potential difference between the pixel electrode 13 and the common electrode 21 is substantially zero). The optical axis Ax1 of the polymer 31 and the optical axis Ax2 of the liquid crystal molecules 32 are parallel to each other. In the illustrated example, both the optical axis Ax1 and the optical axis Ax2 are parallel to the first direction X. The polymer 31 and liquid crystal molecules 32 have substantially the same refractive index anisotropy. That is, the polymer 31 and the liquid crystal molecules 32 have substantially the same ordinary refractive index, and the polymer 31 and the liquid crystal molecule 32 have substantially the same extraordinary refractive index. Therefore, there is almost no refractive index difference between the polymer 31 and the liquid crystal molecules 32 in all directions including the first direction X, the second direction Y, and the third direction Z. FIG.

FIG. 6 is a diagram schematically showing the liquid crystal layer 30 in the ON state. The ON state corresponds to a state in which voltage is applied to the liquid crystal layer 30 (for example, a state in which the potential difference between the pixel electrode 13 and the common electrode 21 is equal to or greater than a threshold). As described above, the responsiveness of the polymer 31 to an electric field is lower than the responsiveness of the liquid crystal molecules 32 to an electric field. In one example, the orientation direction of the polymer 31 hardly changes with or without an electric field. On the other hand, the alignment direction of the liquid crystal molecules 32 changes according to the electric field when a voltage higher than the threshold value is applied to the liquid crystal layer 30 . That is, the optical axis Ax1 is almost parallel to the first direction X, while the optical axis Ax2 is inclined with respect to the first direction X, as shown in the figure. When the liquid crystal molecules 32 are positive type liquid crystal molecules, the liquid crystal molecules 32 are aligned so that their long axes are aligned with the electric field. An electric field is formed along the third direction Z between the pixel electrode 13 and the common electrode 21 . Therefore, the liquid crystal molecules 32 are oriented so that their long axes or optical axes Ax2 are along the third direction Z. As shown in FIG. That is, the optical axes Ax1 and Ax2 cross each other. Therefore, a large refractive index difference occurs between the polymer 31 and the liquid crystal molecules 32 in all directions including the first direction X, the second direction Y, and the third direction Z. FIG.

FIG. 7 is a cross-sectional view showing the display panel PNL when the liquid crystal layer 30 is in the off state. Light L11 emitted from the light emitting element LS enters the display panel PNL from the end E22 and propagates through the transparent substrate 20, the first liquid crystal layer 30, the transparent substrate 10, and the like. When the liquid crystal layer 30 is in the off state, the light L11 is transmitted through the liquid crystal layer 30 with little scattering. The light L11 propagates through the display panel PNL almost without leaking from the lower surface 10B of the transparent substrate 10 and the upper surface 20T of the transparent substrate 20. FIG. That is, the liquid crystal layer 30 is in a transparent state.
External natural light L12 incident on the display panel PNL passes through the liquid crystal layer 30 with little scattering. That is, natural light incident on the display panel PNL from the bottom surface 10B is transmitted through the top surface 20T, and natural light incident on the display panel PNL from the top surface 20T is transmitted through the bottom surface 10B. Therefore, when the user observes the display panel PNL from the upper surface 20T side, the user can see the background on the lower surface 10B side through the display panel PNL. Similarly, when the user observes the display panel PNL from the lower surface 10B side, the user can see the background on the upper surface 20T side through the display panel PNL.

FIG. 8 is a cross-sectional view showing the display panel PNL in the case where the liquid crystal layer 30 includes a region in the ON state. Light L21 emitted from the light emitting element LS enters the display panel PNL from the end E22 and propagates through the transparent substrate 20, the first liquid crystal layer 30, the transparent substrate 10, and the like. In the illustrated example, the liquid crystal layer 30 overlapping the pixel electrode 13A is in the OFF state, and the liquid crystal layer 30 overlapping the pixel electrode 13B is in the ON state. Therefore, the light L21 is transmitted through the region overlapping the pixel electrode 13A in the liquid crystal layer 30 with little scattering, and is scattered in the region overlapping the pixel electrode 13B. A part of the scattered light L211 of the light L21 is transmitted through the upper surface 20T, a part of the scattered light L212 is transmitted through the lower surface 10B, and the other scattered light propagates through the display panel PNL.
In the region overlapping the pixel electrode 13A, the natural light L22 incident on the display panel PNL is transmitted through the liquid crystal layer 30 with little scattering, like the natural light L12 shown in FIG. In the region overlapping the pixel electrode 13B, part of the natural light L23 incident from the bottom surface 10B is scattered by the liquid crystal layer 30, and part of the light L231 is transmitted through the top surface 20T. Part of the natural light L24 incident from the upper surface 20T is scattered by the liquid crystal layer 30, and part of the light L241 is transmitted through the lower surface 10B. Therefore, when the user observes the display panel PNL from the top surface 20T side, the user can visually recognize the color of the light L21 in the region overlapping the pixel electrode 13B. In addition, since part of the natural light L231 passes through the display panel PNL, the user can see the background on the lower surface 10B side through the display panel PNL. Similarly, when the user observes the display panel PNL from the lower surface 10B side, the user can visually recognize the color of the light L21 in the region overlapping the pixel electrode 13B. In addition, since part of the natural light L241 passes through the display panel PNL, the user can see the background on the upper surface 20T side through the display panel PNL. Since the liquid crystal layer 30 is transparent in the region overlapping the pixel electrode 13A, the color of the light L21 is hardly visible, and the user can see the background through the display panel PNL.

Next, a more specific configuration example will be described.

FIG. 9 is a plan view showing an example of the pixel PX on the first substrate SUB1. In the illustrated example, the pixel PX is partitioned by two signal lines S1 and S2 arranged in the first direction X and two scanning lines G1 and G2 arranged in the second direction Y. As shown in FIG. The pixel PX has a switching element SW and a pixel electrode 13 . The switching element SW is a thin film transistor, for example, and is electrically connected to the scanning line G2 and the signal line S1. A specific configuration of the switching element SW will be described later, but the switching element SW may be of a bottom-gate type in which a gate electrode is positioned below a semiconductor layer, or may be of a bottom-gate type in which a gate electrode is positioned above a semiconductor layer. It may be of the top gate type. The semiconductor layer is made of amorphous silicon, for example, but may be made of polycrystalline silicon or an oxide semiconductor. The pixel electrode 13 is electrically connected to the switching element SW. Also, the pixel electrode 13 overlaps with the capacitor electrode 15 . The capacitive electrode 15 is arranged over a plurality of pixels PX, and is further arranged over substantially the entire area of the first substrate SUB1. The capacitor electrode 15 overlaps with the switching element SW, the scanning lines G1 and G2, and the signal lines S1 and S2, respectively. In the illustrated example, the spacer SP overlaps the switching element SW and forms a predetermined cell gap between the first substrate SUB1 and the second substrate SUB2.

10 is an enlarged plan view showing an example of the switching element SW shown in FIG. 9. FIG. The switching element SW has a gate electrode GE, a source electrode SE, and a drain electrode DE. The gate electrode GE is formed integrally with the scanning line G2. The semiconductor layer SC overlaps with the gate electrode GE. The two source electrodes SE are formed integrally with the signal line S1 and are in contact with the semiconductor layer SC. The drain electrode DE is located between the two source electrodes SE and is in contact with the semiconductor layer SC. The drain electrode DE has a connection portion DEA connected to the pixel electrode 13 shown in FIG. The connection portion DEA overlaps with the opening 15A formed in the capacitor electrode 15 and the contact hole CH. The light shielding layer 17 overlaps the scanning line G2 and the signal line S1. Also, the light shielding layer 17 overlaps the switching element SW, particularly the source electrode SE, the drain electrode DE, and the semiconductor layer SC. Similarly to the light shielding layer 17, the light shielding layer 23 provided on the second substrate SUB2, which will be described later, also overlaps the scanning lines G2, the signal lines S1, and the switching elements SW.

FIG. 11 is a cross-sectional view showing the display panel PNL along line A-A' including the switching element SW shown in FIG.

In the first substrate SUB1, the gate electrode GE integrated with the scanning line G2 is located on the transparent substrate 10 and corresponds to the wiring 11 shown in FIG. 4, for example. The insulating layer 121 covers the gate electrodes GE and the scanning lines G2 and is in contact with the upper surface 10T of the transparent substrate 10. As shown in FIG. The semiconductor layer SC is located on the insulating layer 121 directly above the gate electrode GE. Two source electrodes SE integrated with the signal line S1 are in contact with the semiconductor layer SC, and part of them are located on the insulating layer 121 . The drain electrode DE is in contact with the semiconductor layer SC. The insulating layer 122 covers the semiconductor layer SC, the source electrode SE, the drain electrode DE, and the insulating layer 121 . The insulating layer 123 covers the insulating layer 122 . The light shielding layer 17 is located on the insulating layer 123 directly above the semiconductor layer SC, the source electrode SE, and the drain electrode DE. The capacitive electrode 15 covers the insulating layer 123 and the light shielding layer 17 . The light shielding layer 17 is in contact with the capacitor electrode 15 and electrically connected to each other. The insulating layer 124 covers the capacitive electrode 15 . The pixel electrode 13 is located on the insulating layer 124 . The pixel electrode 13 and the capacitor electrode 15 face each other with the insulating layer 124 interposed therebetween to form a storage capacitor necessary for image display in the pixel PX. The alignment film 14 covers the pixel electrodes 13 and the insulating layer 124 .

The insulating layers 121 to 124 correspond to the insulating layer 12 shown in FIG. 4, for example. The insulating layers 121, 122 and 124 are made of a transparent inorganic insulating material such as silicon nitride or silicon oxide. The insulating layer 123 is made of a transparent organic insulating material such as acrylic resin.

The gate electrode GE and scanning line G2 include a reflective layer (first reflective layer) 41 facing the transparent substrate 10 and a conductive layer 42 positioned between the transparent substrate 10 and the liquid crystal layer 30 . The reflective layer 41 is located between the transparent substrate 10 and the conductive layer 42 and is in contact with the top surface 10T of the transparent substrate 10 in the illustrated example. A transparent insulating layer may be interposed between the transparent substrate 10 and the reflective layer 41 . However, no thin film having a higher light absorption rate than the reflective layer 41 is interposed between the transparent substrate 10 and the reflective layer 41 . The conductive layer 42 is located between the reflective layer 41 and the liquid crystal layer 30, and in the illustrated example, is laminated on the upper surface 41T of the reflective layer 41 and faces the semiconductor layer SC with the insulating layer 121 interposed therebetween.
Both the reflective layer 41 and the conductive layer 42 are made of metal materials, but are made of different metal materials. The reflective layer 41 is made of a metal material having a higher reflectance than the conductive layer 42 . In one example, the reflective layer 41 is made of aluminum and the conductive layer 42 is made of molybdenum. Note that the reflective layer 41 is not limited to aluminum, and may be formed of a metal material having a relatively high reflectance, such as titanium or silver.
The reflective layer 41 and the conductive layer 42 have thicknesses T41 and T42 along the third direction Z, respectively. Thickness T41 is thicker than thickness T42. In one example, the thickness T41 is ten times or more the thickness T42.

The source electrode SE, the drain electrode DE, and the light shielding layer 17 are, for example, a laminated body in which a plurality of conductive layers are laminated. In one example, the source electrode SE or the like is a laminate in which a conductive layer containing molybdenum (Mo), a conductive layer containing aluminum (Al), and a conductive layer containing molybdenum (Mo) are stacked in this order. Alternatively, a laminate in which a conductive layer containing titanium (Ti), a conductive layer containing aluminum (Al), and a conductive layer containing titanium (Ti) are laminated in this order may be used.
The capacitor electrode 15 is made of a transparent conductive material such as ITO or IZO.

In the second substrate SUB2, the light shielding layer 23 is located under the transparent substrate 20 and directly above the switching elements SW or directly above the gate electrodes GE and the scanning lines G2. The common electrode 21 covers the light shielding layer 23 and is in contact with the bottom surface 20B of the transparent substrate 20 . The common electrode 21 is electrically connected to the capacitor electrode 15 and has the same potential as the capacitor electrode 15 . The common electrode 21 faces the pixel electrode 13 with the liquid crystal layer 30 interposed therebetween. An overcoat layer 24 covers the common electrode 21 . The alignment film 22 covers the overcoat layer 24 . The liquid crystal layer 30 is in contact with the alignment films 14 and 22 .

The light shielding layer 23 includes a reflective layer (third reflective layer) 51 facing the transparent substrate 20 and a conductive layer 52 positioned between the transparent substrate 20 and the liquid crystal layer 30 . The reflective layer 51 is located between the transparent substrate 20 and the conductive layer 52 and is in contact with the lower surface 20B of the transparent substrate 20 in the illustrated example. A thin film having a higher light absorption rate than the reflective layer 51 is not interposed between the transparent substrate 20 and the reflective layer 51 . The conductive layer 52 is located between the reflective layer 51 and the liquid crystal layer 30 , and in the illustrated example, is laminated on the lower surface 51 B of the reflective layer 51 and is in contact with the common electrode 21 .
The reflective layer 51 and the conductive layer 52 are made of metal materials different from each other. The reflective layer 51 is made of a metal material having a higher reflectance than the conductive layer 52 . In one example, the reflective layer 51 is made of aluminum and the conductive layer 52 is made of molybdenum. Note that the reflective layer 51 may be made of a metal material having a relatively high reflectance, such as titanium or silver.
The thickness T51 of the reflective layer 51 is thicker than the thickness T52 of the conductive layer 52, and in one example, the thickness T51 is ten times or more the thickness T52.

FIG. 12 is a cross-sectional view showing the display panel PNL along line BB' including the scanning line G2 and the connection portion DEA shown in FIG.
In the first substrate SUB1, the scanning line G2 includes a reflective layer 41 in contact with the transparent substrate 10 and a conductive layer 42 stacked on the reflective layer 41, like the gate electrode GE shown in FIG. The connection part DEA is located on the insulating layer 121 and covered with the insulating layer 122 . The pixel electrode 13 is in contact with the connection portion DEA at the contact holes CH passing through the insulating layers 122 to 124 and the opening portion 15A of the capacitor electrode 15 . The light shielding layer 17 is positioned directly above the scanning line G2. A width 17Wy of the light shielding layer 17 along the second direction Y is equivalent to a width GWy of the scanning line G2 along the second direction Y.
In the second substrate SUB2, the light shielding layer 23 is located directly above the scanning line G2 and the connection portion DEA.

FIG. 13 is a cross-sectional view showing the display panel PNL along line CC' including the signal line S1 shown in FIG.
In the first substrate SUB1, the light shielding layer 18 is positioned between the transparent substrate 10 and the signal line S1. In the illustrated example, the light shielding layer 18 is positioned between the transparent substrate 10 and the insulating layer 121 . That is, the light shielding layer 18 is positioned in the same layer as the scanning line G2 and the gate electrode GE described in FIG. 11 and the like. However, the light shielding layer 18 is electrically insulated from the scanning line G2 and the gate electrode GE. The light shielding layer 18 includes at least a reflective layer (second reflective layer) 61, like the scanning lines G2 and the like. In the illustrated example, the light blocking layer 18 includes a conductive layer 62 laminated on the reflective layer 61, but the conductive layer 62 may be omitted. The reflective layer 61 is in contact with the transparent substrate 10 , is located in the same layer as the reflective layer 41 , and is made of the same material as the reflective layer 41 . The conductive layer 62 is located in the same layer as the conductive layer 42 and is made of the same material as the conductive layer 42 .
The signal line S1 is positioned directly above the light shielding layer 18 with the insulating layer 121 interposed therebetween. The light shielding layer 17 is positioned directly above the signal line S1. The width 17Wx along the first direction X of the light shielding layer 17 is equivalent to the width SWx along the first direction X of the signal line S1. Further, the width 18Wx of the light shielding layer 18 along the first direction X is equivalent to the width SWx of the signal line S1. Note that the light shielding layer 18 may be omitted and the signal line S1 may be provided with a reflective layer in contact with the insulating layer 121 .
In the second substrate SUB2, the light shielding layer 23 is located directly above the signal line S1.

14 is a plan view showing the signal lines S1 and S2, the scanning lines G1 and G2, and the light blocking layer 18. FIG.
The light shielding layer 18 is located in the same layer as the scanning line G2, as described with reference to FIGS. The scanning lines G1 and G2 extend along the first direction X, the light blocking layer 18 extends along the second direction Y, and overlaps the signal lines S1 and S2, respectively. The light blocking layer 18 is separated from the scanning lines G1 and G2 in the vicinity of the intersections of the signal lines S1 and S2 and the scanning lines G1 and G2. Therefore, the light shielding layer 18 is not connected to any wiring and is in an electrically floating state.

FIG. 15 is a diagram for explaining how light emitted from the light emitting element LS propagates through the display panel PNL.
The emitted light from the light emitting element LS is attenuated as the distance from the end E22, which is the light incident portion, increases, as indicated by the arrow in the drawing. Since the light absorptivity of the transparent substrates 10 and 20 is less than 0.1%, the main cause of attenuation of the emitted light is light absorption in various thin films between the transparent substrates 10 and 20. .
In particular, the wiring portions (scanning lines, signal lines, switching elements, etc.) and the light-shielding layer located near the transparent substrates 10 and 20 may contain a thin film having a relatively high light absorption rate. In one example, a thin film formed by molybdenum has an optical absorption rate of over 40%. Therefore, when the molybdenum layer faces the transparent substrates 10 and 20, the light transmitted through the transparent substrates 10 and 20 is absorbed by the molybdenum layer, resulting in attenuation of the light.

According to this embodiment, the gate electrode GE of the switching element SW and the scanning line are provided with the reflective layer 41 facing the transparent substrate 10 , and the light shielding layer 18 positioned between the signal line S and the transparent substrate 10 is the transparent substrate 10 . It has a reflective layer 61 facing the Therefore, almost no light absorbing layer facing the transparent substrate 10 exists in the first substrate SUB1. Therefore, the light transmitted through the transparent substrate 10 and reaching the wiring portion is reflected by the reflective layer 41 or 61 with little absorption.
The light shielding layer 23 also has a reflective layer 51 facing the transparent substrate 20 . Therefore, secondly, almost no light absorbing layer facing the transparent substrate 20 exists in the substrate SUB2. Therefore, the light transmitted through the transparent substrate 20 and reaching the light shielding layer 23 is reflected by the reflective layer 51 with little absorption.
Therefore, absorption of light propagating through the display panel PNL by various thin films can be suppressed, and attenuation of light can be suppressed. As a result, the light from the light emitting element LS reaches even the pixel PX located away from the light incident portion in the display area DA, and deterioration of the display quality can be suppressed.

FIG. 16 is a diagram showing luminance measurement results in the display device DSP of the present embodiment and the display device of the comparative example.
The display device of the comparative example has a molybdenum layer facing the transparent substrate 10 in the wiring portion of the first substrate SUB1. On the other hand, the display device DSP of the present embodiment is different from the display device of the comparative example in that the wiring section includes an aluminum reflective layer facing the transparent substrate 10 as described above. The brightness of each display device was measured by changing the distance from the light entrance portion. The horizontal axis of FIG. 16 is the distance from the light entrance portion, and the vertical axis is the relative value of luminance. As shown in the figure, it was confirmed that the display device DSP according to the present embodiment exhibited less decrease in brightness even when the display device was far away from the light entrance portion, and could suppress the decrease in light compared to the display device of the comparative example.

As described above, according to this embodiment, it is possible to provide a display device capable of suppressing degradation in display quality.

It should be noted that the present invention is not limited to the above-described embodiments themselves, and can be embodied by modifying the constituent elements without departing from the gist of the invention at the stage of its implementation. Also, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in each embodiment. For example, some components may be deleted from all the components shown in each embodiment. Furthermore, constituent elements of different embodiments may be combined as appropriate.

DSP... display device PNL... display panel LU... light source unit LS... light emitting element SUB1... first substrate 10... transparent substrate (first insulating substrate)
G... Scanning line 41... Reflective layer (first reflective layer) 42... Conductive layer S... Signal line SW... Switching element GE... Gate electrode 13... Pixel electrode 17... Light shielding layer 18... Light shielding layer 61... Reflective layer (second reflection layer) Layer) 62 Conductive layer SUB2 Second substrate 20 Transparent substrate (second insulating substrate) 21 Common electrode 23 Light blocking layer 51 Reflective layer (third reflective layer) 52 Conductive layer 30 Liquid crystal layer 31 Polymer 32 Liquid crystal molecules

Claims (8)

a first insulating substrate, scanning lines extending in a first direction, signal lines intersecting the scanning lines and extending in a second direction, and switching elements electrically connected to the scanning lines and the signal lines. a first substrate comprising: a pixel electrode electrically connected to the switching element; and a first alignment film covering the pixel electrode and having alignment control force in the first direction;
a second insulating substrate; a third reflective layer positioned between the second insulating substrate and the first alignment film so as to face the second insulating substrate; and a common electrode facing the pixel electrodes. and a second alignment film covering the common electrode and having alignment control force in the first direction;
a liquid crystal layer located between the first substrate and the second substrate, the liquid crystal layer including a linear polymer extending along the first direction and liquid crystal molecules aligned along the first direction; ,
a plurality of light emitting elements arranged along the first direction,
The scanning line is
a conductive layer positioned between the first insulating substrate and the liquid crystal layer;
a first reflective layer located between the first insulating substrate and the conductive layer, facing the first insulating substrate and having a higher reflectance than the conductive layer;
The display device, wherein the third reflective layer overlaps the scanning lines and the signal lines. the first substrate further comprising a second reflective layer located between the first insulating substrate and the signal line;
2. The display device according to claim 1, wherein said second reflective layer is electrically insulated from said scanning lines. 3. The display device according to claim 2, wherein said second reflective layer is located in the same layer as said first reflective layer and is made of the same material as said first reflective layer. 4. The display device according to claim 2, wherein said first reflective layer and said second reflective layer are in contact with said first insulating substrate. The switching element includes a gate electrode integrated with the scanning line,
5. The display device according to any one of claims 1 to 4, wherein said first reflective layer extends to said gate electrode. Between the first insulating substrate and the first reflective layer, there is no thin film having a higher light absorption rate than the first reflective layer,
6. The display device according to claim 1, wherein no thin film having a higher light absorption rate than said third reflective layer exists between said second insulating substrate and said third reflective layer. 7. The display device according to claim 6, wherein said third reflective layer is in contact with said common electrode. 8. The display device according to claim 6, wherein said third reflective layer is in contact with said second insulating substrate.

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