JP7187564B2 - Image processing device - Google Patents

Description

The present invention relates to an image processing apparatus.

An in-vehicle camera image processing device mounted on a vehicle is known.

In the well-known technology, as described in Patent Document 1, failure diagnosis of an in-vehicle camera image processing device outputs a test image from an imaging device to the image processing device, and expects a failure diagnosis section in the image processing device. I was comparing values. Then, an abnormality is detected when some kind of failure occurs in the path from the imaging device to the image processing device.

WO2015/104915

In the conventional technology described above, since a test image output from an imaging device is used for failure diagnosis of an in-vehicle camera image processing device, it is difficult to perform failure diagnosis while the vehicle is actually capturing images. For this reason, the vehicle is stopped and the configuration is such that it is performed only when the ignition is ON.

However, if some kind of failure occurs in the image data transmission line from the imaging element of the on-vehicle camera image processing device to the image processing circuit after the ignition of the vehicle is turned on, failure detection cannot be performed, and prompt and appropriate detection is possible in the event of failure. It was difficult to take appropriate measures.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to realize an image processing apparatus capable of failure diagnosis even when the image processing apparatus is actually used.

In order to achieve the above object, the present invention is configured as follows.

an image processing apparatus comprising: an imaging unit having a plurality of output ports; an image processing unit having a plurality of input/output ports; a plurality of data transmission paths that connect the plurality of output ports of the imaging unit and the plurality of input/output ports of the image processing unit and transmit the image data from the imaging unit to the image processing unit; and a damping resistor connected to the data transmission line of the image processing unit, the image processing unit including an output buffer for switching the voltage of the input/output port, a power supply unit, and a pull-up resistor connected to the input/output port. , a control switch connected between the power supply unit and the pull-up resistor for connecting and disconnecting the power supply unit and the pull-up resistor; and the image data being transmitted to the plurality of data transmission paths. during a vertical blanking period not being performed, a constant voltage is applied from the output buffer to the input/output port of one of the two data transmission paths to be diagnosed among the plurality of data transmission paths, thereby Based on the voltage value of the input/output port of the other of the two data transmission lines, it is diagnosed whether or not a short-circuit fault has occurred in the two data transmission lines to be diagnosed. a failure diagnosis unit that diagnoses whether or not a disconnection failure has occurred in the data transmission line based on the voltage value of the input/output port when the power supply unit and the pull-up resistor are connected. .

According to the present invention, it is possible to realize an image processing apparatus capable of failure diagnosis even when the image processing apparatus is actually used.

It is a figure for demonstrating the structure and operation|movement of Example 1 of this invention. FIG. 2 is a diagram for explaining the configuration of a data transmission part between an imaging element and image processing in the internal configuration of the vehicle-mounted camera image processing device according to the first embodiment; 4 is a diagram for explaining an interface portion of a data communication path between a right camera imaging element and an image processing IC in Embodiment 1; FIG. FIG. 3 is a diagram showing how an interface circuit between an image sensor and an image processing IC is actually composed of a plurality of lines; 4 is a timing chart showing how image data is repeatedly transmitted in Example 1. FIG. FIG. 9 is a timing chart showing how an image data transmission line is diagnosed during a period (c) in which no image data is transmitted; FIG. 10 is a schematic diagram showing two data transmission lines to be diagnosed from the image data transmission lines when detecting a short-circuit failure mode in period (d). FIG. 4 is a diagram showing signal levels or voltages of each part in short failure mode diagnosis; FIG. 4 is a diagram showing signal levels or voltages of respective parts during short failure mode diagnosis; FIG. 11 is a schematic diagram showing one path to be diagnosed among the image data transmission paths when detecting a disconnection failure mode in period (e); FIG. 4 is a diagram showing signal levels or voltages of respective parts in diagnosis of disconnection failure mode; 3 is a functional block diagram of a microcomputer (failure diagnosis control section) arranged in an image processing IC; FIG. FIG. 10 is a diagram for explaining an interface portion of a data communication path between a right camera imaging element and an image processing IC in Embodiment 2 of the present invention; FIG. 10 is a diagram for explaining an interface portion of a data communication path between a right camera imaging element and an image processing IC in Embodiment 2 of the present invention; FIG. 10 is a diagram for explaining an interface portion of a data communication path between the right camera imaging element and the image processing IC in Example 3 of the present invention; FIG. 12 is a diagram for explaining an interface portion of a data communication path between the right camera imaging element and the image processing IC in Example 4 of the present invention; FIG. 11 is a diagram for explaining an interface portion of a data communication path between a right camera imaging element and an image processing IC in Example 5 of the present invention;

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Example 1)
FIG. 1 is a diagram for explaining the configuration and operation of a first embodiment when the present invention is applied to an in-vehicle camera image processing device.

In FIG. 1, an in-vehicle camera image processing device 12 of the first embodiment processes an image of the exterior taken from a vehicle. It has a right camera imaging module (right image imaging section) 1 and a left camera imaging module (left image imaging section) 2 that are attached to the vehicle and capture an image of the outside such as the front of the vehicle. A right camera imaging module (right image imaging section) 1 and a left camera imaging module (left image imaging section) 2 form an imaging section.

The right camera imaging module 1 and the left camera imaging module section 2 are composed of an imaging device such as a CCD image sensor or a CMOS image sensor and a circuit section that handles electronic signals. is output as a digital signal after

The in-vehicle camera image processing device 12 monitors the front in a normal running state of the vehicle, and processes the captured image 3 from the right camera imaging module 1 and the captured image 4 from the left camera imaging module 2 into an image processing module (image processing unit). 11 is output. In the image processing module 11, the captured images 3 and 4 are processed in the data processing unit 5 for the purpose of noise removal and image sharpening. Specific examples of processing include adjusting the brightness of the entire image, adjusting the brightness for each pixel, and adjusting the gain for each brightness.

The right camera image 6 and left camera image 7 after processing by the data processing unit 5 are used as inputs to the parallax image generation unit 8 . A parallax image generator 8 generates a parallax image 9 by combining two pieces of image data, the right camera image 6 and the processed left camera image 7 .

The parallax image 9 indicates distance information to an object in front of the vehicle using the difference between the right camera image 6 and the left camera image 7 .

Based on the information of the parallax image 9, the recognition processing unit 10 judges the information in front of the vehicle, judges the risk of collision and whether the vehicle needs to be accelerated or decelerated. A controller (not shown) is notified of the determination result. The vehicle communication unit 18 causes the display unit 19 to display the determination result.

The image processing module 11 is a module that executes digital signal processing, and the data processing unit 5, the parallax image generating unit 8, and the recognition processing unit 10 are implemented by a combination of software and hardware such as a microcomputer, memory, FPGA, and ASIC. Configured.

In particular, the data processing unit 5, the parallax image generating unit 8, and the like, which process a large number of captured images at high speed, are often configured by hardware.

The vehicle communication unit 18 can be a CAN bus, a LIN bus, FLEX-RAY, or the like.

In FIG. 1, a transmission path 13 of the right camera image 3 from the right camera imaging module 1 to the data processing unit 5, a transmission path 15 of the left camera image 4 from the left camera imaging module 2 to the data processing unit 5, and data processing. Transmission path 14 of the processed right camera image 6 from the unit 5 to the parallax image generation unit 8 , transmission path 16 of the left camera image 7 from the data processing unit 5 to the parallax image generation unit 8 , and recognition from the parallax image generation unit 8 . If any one or more of the transmission paths 17 of the parallax images 9 to the processing unit 10 have a failure, there is a risk that the normal parallax images 9 will not be output.

In this case, an erroneous determination of an object in front of the vehicle or a distance determination is erroneously transmitted to a vehicle control unit (not shown) due to the deviation of the parallax image 9, which may reduce the accuracy of vehicle operation control.

FIG. 2 is a diagram for explaining the configuration of the data transmission part between the imaging device and the image processing in the internal configuration of the vehicle-mounted camera image processing apparatus according to the first embodiment.

The image transmission paths 13 and 15 from the right camera imaging module 1 and left camera imaging module 2 shown in FIG. 1 to the data processing unit 5 can be further divided into details.

FIG. 2 is a diagram for explaining the details of the image transmission path 13 from the right camera imaging module 1 to the data processing section 5. As shown in FIG. The details of the image transmission path 15 from the left camera imaging module 2 to the data processing unit 5 have the same configuration as the details of the image transmission path 13 shown in FIG. are omitted.

In FIG. 2, the image transmission path 13 includes a data transmission path 23 between the right camera imaging element 20 (CMOSIC) of the right camera imaging module 1 (CMOS module) and a connector 25 of the right camera imaging module 1, and the connector 25. It is divided into a data transmission line 26 between the connector 27 of the image processing module 11 and a data transmission line 24 between the connector 27 and the image processing IC 29 of the image processing module 11 .

Note that the image processing IC 29 is shown as a representative of the data processing unit 5 .

FIG. 3 is a diagram for explaining the interface portion (interface circuit) of the right camera imaging device 20 and the image processing IC 29 shown in FIG. 2, especially the data communication path in the first embodiment. Note that the connectors 25 and 27 are omitted in FIG.

In FIG. 3, the right camera imaging device 20 has an output buffer 30 for digital data and an output port 31 for sending the data to the data transmission line 23 . The image processing IC 29 also has an input/output port 33 for receiving data from the data transmission line 24 . Between the output port 31 and the input/output port 33 correspond to the data transmission lines 23, 24 and 26, and the damping resistor 32 is arranged in one of the data transmission lines 23, 24 and 26. FIG.

In the first embodiment, it is assumed to be arranged in the data transmission line 23 .

The inside of the image processing IC 29 is connected to an input/output port 33 and has a pull-up resistor 36 for pulling up to an IO level power supply (power supply section) 35 of the image processing IC 29 . By controlling connection and disconnection of a pull-up control switch (control switch) 34 with a pull-up enable signal 37, the input/output port 33 can be pulled up.

A pull-down resistor 38 is connected to the input/output port 33 , and the input/output port 33 can be pulled down by controlling a pull-down control switch 39 with a pull-down enable signal 40 .

When fetching data from the input/output port 33, the voltage of the input/output port 33 is converted by the input buffer 42 into a voltage signal within the image processing IC 29, and the data is stored in the input port register 43 in synchronization with a digital clock or the like. . The output buffer 45 connected to the input/output port 33 can switch the output between high impedance and voltage according to the value of the output port register 44 according to the output enable signal 41 .

When the output enable signal 41 is off and the output of the output buffer 45 is at high impedance, the voltage of the input/output port 33 is the output of the image sensor 20 if both the pull-up enable signal 37 and the pull-down enable signal 40 are off. It is determined by the value of the buffer 30 , and the digital data output from the right camera imaging element 20 is transmitted to the input port register 43 .

FIG. 4 is a diagram showing how the interface circuit between the image sensor 20 and the image processing IC 29 shown in FIG. 3 is actually composed of a plurality of lines. In Example 1, the interface circuit has 12 data lines.

4, the right camera imaging device 20 has an output port 51 and an output port 61 in addition to the output port 31. Although not shown, there are nine output ports between the output port 51 and the output port 61. , for a total of 12 output ports. Output buffers similar to the digital data output buffer 30 are connected to the 12 output ports.

In addition to the input/output port 33, the image processing IC 29 has an input/output port 53 and an input/output port 63. Although not shown, there are nine inputs between the input/output port 53 and the input/output port 63. There are output ports and a total of 12 input/output ports (data inputs).

Then, as shown in FIG. 3, the output port 31 is connected to the input/output port 33 by the data line to which the damping resistor 32 is connected. The output port 51 is connected to the input/output port 53 by a data line to which a damping resistor 52 is connected, and the output port 61 is connected to the input/output port 63 by a data line to which the damping resistor 62 is connected.

Similarly, an output port between output ports 51 and 61 and an input/output port between input/output ports 53 and 63 are connected by data lines to which damping resistors are respectively connected.

FIG. 5 is a timing chart showing how image data is repeatedly transmitted in the first embodiment, and FIG. 5 shows data transmission for four cycles.

In FIG. 5, period (b) is one cycle of image data transmission, which is 24.26 msec in the first embodiment. The CMOS data output (image data) shown in FIG. 5(C) is output from the right camera imaging element 20 in synchronization with the vertical synchronization signal Vsync shown in FIG. 5(A).
The period (a) at this time is the image data transmission period, which is 21.3 msec in the first embodiment.

The light energy that is the source of the image data in the period (a) is actually the CMOS exposure timing ((B) in FIG. 5) before the timing at which the CMOS data output (image data) is output, and the right camera image sensor It is captured between the shutter apertures set at 20.

In this way, the image data based on the light energy captured by the right camera imaging element 20 is periodically transmitted. The output (CMOS data output) of the right camera imaging element 20 is not output as image data and is at low level. In the vertical blanking period (c), 0V is output as the voltage of the output port 31 . Therefore, the period (c) can be used as the diagnosis period.

FIG. 6 is a timing chart showing how the image data transmission lines 23, 26, and 24 including the connectors 25 and 27 are diagnosed during the period (c) shown in FIG. 5 in which no image data is transmitted. is.

In FIG. 6, during the image data transmission period of period (a), the signal expected value of the input/output port 33 of the image processing IC 29 ((D) in FIG. 6) is the image data output from the right camera imaging element 20 (FIG. 5 (C)) of

In the diagnosis period of period (c), if no failure occurs, the expected value (data input signal state). Therefore, the failure can be diagnosed by confirming the data in the diagnosis period (c) based on the expected value.

During the period (d) of the diagnosis period (c), short-circuit failures (short-circuit failure mode) of the image data transmission lines 23, 26, and 24 are detected, and disconnection failures (disconnection failure mode) are detected during the period (e). .

To detect the short failure mode, the diagnostic process is repeated for the number of data. In Example 1, which has 12 data lines, diagnostic processing is performed 12 times during the period (d). Therefore, in period (d), the expected values are “100000000000”, “010000000000”, “001000000000”, . be).

Also, in period (e), the expected value is "000000000000".

The detection of the disconnection failure mode is completed by one diagnostic process during the period (e). The specific diagnostic method will be described below.

FIG. 7 is a schematic diagram of two data transmission lines to be diagnosed among the image data transmission lines 23, 26, and 24 when the short failure mode is detected in the period (d) shown in FIG. .

In FIG. 7, a diagnostic method for detecting that a short has occurred between two transmission lines of interest will be described. In the period (d) (FIG. 6) after the transmission of the image data is completed, the input/output buffer 45 connected to the input/output port 33 of the image processing IC 29 and the other input/output port 63 and the output enable signal 41 of the output buffer 85 , 81 are off, and the low level output (0 V) of the output buffers 30 and 60 of the right imaging device 20 is reflected in the output port 33 and input/output port 63 as they are.

Therefore, the input port register 43 and the input port register 83 of the input buffer 82 are fetched with low level signals. An output port register 84 is connected to the output buffer 85 .

Here, a high level signal is output from the output buffer 45 by setting the output port register 44 side on the input/output port 33 side to a high level for diagnosis and turning on the output enable signal 41 . If the IO level power supply (power supply unit) 35 (FIG. 3) of the image processing IC 29 is 2V, the voltage level of the input/output port 33 is 2V. In this manner, the failure diagnosis unit, which will be described later, controls the operation of the pull-up control switch 34 during a period in which image data is not transmitted to the data transmission line 23 or the like, thereby controlling the signal state of the input/output port 33 (data input unit). set.

At this time, since the voltage levels of the signals of the input/output port 33 and the output port 31 are different, it is necessary to select the value of the damping resistor 32 so that the current value flowing through the damping resistor 32 does not matter. Assuming that the IO level power supply 35 is 2V, if a resistance value of 100Ω is selected as the damping resistor 32, 2V÷100Ω, that is, a current of 20mA flows into the damping resistor 32, and the power consumption is 2V×20mA=20mW (= 1/25 W). In this case, there is no problem if the damping resistor 32 has a resistance of (1/16) W.

At this time, when a signal level is taken in from the input buffer 42, a high level signal is taken in the input port register 43 because the input/output port 33 is set to 2V.

When diagnosing the short-circuit failure mode, the input port register 43 should have a high level and the input port register 83 should have a low level, and diagnosis is performed using these as expected values. 6 is "100000000000", the input port register 83 also outputs a low level " 0” should have been taken in as detection data.

FIG. 8 is a diagram showing the signal level or voltage of each part in diagnosis of the short failure mode.

If the input/output ports 33 and 63 are shorted to each other, the voltage of the input/output port 63 will also be 2V due to the output buffer 45 .

Therefore, unlike the expected value, the input port register 83 receives a high-level signal, which makes it possible to detect a short-circuit failure. For example, the expected value is "100000000000" and the detected value is "100000000001", which are mutually different values.

FIG. 9 is a diagram showing the signal level or voltage of each part during short failure mode diagnosis. Here, if the short-circuit fault location 90 occurs at the output ports 31 and 61 on the right camera imaging element 20 side, it cannot be detected by the same algorithm. , 62 on the side of the transmission line on the image processing IC 29 side.

7, 8, and 9 schematically show only two data transmission lines, but if there are 12 data transmission lines as in the first embodiment, each transmission line is called 100000000000" (1 is high level, 0 is low level) is set to be the expected value, the data transmission line that enables the output and makes 1 the expected value and the remaining 11 data transmission lines. short fault can be detected.

By setting "010000000000" as the next data setting, "0010000000000" as the next data setting, and repeating the diagnostic process 12 times, it is possible to detect mutual short failures in 12 data transmission lines. becomes.

In the first embodiment, diagnosis processing is performed 12 times in order to consider failure modes of all pairs of data transmission lines. 101010101010" and "010101010101", the diagnostic process may be completed twice. In this case, the data transmission line whose expected value is 1 is switched to high-level output, and the output enable signal of the data transmission line whose expected value is 0 remains off.

FIG. 10 is a schematic diagram of one path to be diagnosed from among the image data transmission paths when the disconnection failure mode is detected in the period (e) shown in FIG.

With reference to FIG. 10, a diagnosis method for detecting when a disconnection failure occurs somewhere in the data transmission line will be described.

After the above short mode failure diagnosis is completed, in period (e), the output enable signal 41 of the output buffer 45 connected to the input/output port 33 of the image processing IC 29 is turned off, and the output buffer of the right camera imaging element 20 is turned off. The low level output (0V) of 30 is reflected to the input/output port 33 as it is.

Thereafter, the pull-up resistor 36 connected to the input/output port 33 is connected to the IO level power supply 35 of the image processing IC 29 by the pull-up enable signal 37 . As the value of the pull-up resistor 36, a value sufficiently lower than the resistance value of the damping resistor 32, such as 1 kΩ, is selected.

When this is done, the voltage of the input/output port 33 is obtained by dividing the voltage of the IO level power supply 35 by the pull-up resistor 36 and the damping resistor 32 . That is, 2V×{100Ω/(1kΩ+100Ω)}=approximately 0.18V.

Here, if there is a disconnection mode failure at any of the output port 31, the damping resistor 32, and the input/output port 33 in the middle of the data transmission path, the input/output port 33 is fixed at the pulled-up voltage, that is, 2V. be done. Therefore, when the input buffer 42 takes in the voltage of the input/output port 33 at this time, the value of the input port register 43 becomes high level.

Since this is different from the low-level expected value, it is possible to detect that a disconnection failure has occurred. FIG. 11 is a diagram showing the signal level or voltage of each part in the diagnosis of disconnection failure mode.

In FIG. 11, a disconnection mode failure occurs in the transmission line between the damping resistor 32 and the input/output port 33 (location 91 of disconnection failure). At this time, the value of the input port register 43 connected to the input buffer 42 is at high level.

10 and 11 schematically show only one data path, but if there are 12 data transmission paths as in the first embodiment, each data is set to "000000000000" (1 is high). If the pull-down resistor is set so that the expected value is 0 (0 is low level), the expected value of the part where the disconnection fault occurs is 1, so which of the 12 data paths has the disconnection fault. You can detect what is happening.

FIG. 12 is a functional block diagram of a microcomputer (failure diagnosis control section) 50 arranged in the image processing IC 29 (representative example of the data enabling section 5). However, the microcomputer 50 is omitted in FIG. 3 and the like.

12, the microcomputer 50 includes a diagnostic data setting section 501, a detection data input section 502, a comparison section 503, and a failure determination section 504. As shown in FIG.

The diagnostic data setting unit 501 sets the failure diagnostic data (failure diagnostic data) so that the output enable signals such as the output enable signals 42 and 81 and the output port register 44 and the like become data for failure diagnosis as described above. output and set the data transmission paths 23 , 26 , 24 .

A detection data input unit 502 inputs failure diagnosis data stored in a register such as the input port register 83 at the time of diagnosis as a failure diagnosis signal.

Comparing section 503 compares the failure diagnosis data set by diagnostic data setting section 501 with the failure diagnosis data (detection data) input by detection data input section 502 , and outputs the comparison result to failure determination section 504 .

Based on the result output from the comparison unit 503, the failure determination unit 504 determines whether or not a failure has occurred in the image data transmission lines 23, 26, and 24. It determines whether there is a failure and in which data transmission line the failure has occurred, and outputs the determination result to the vehicle communication unit 18 .

Vehicle communication unit 18 performs appropriate processing based on the output result from failure determination unit 504 . When a failure occurs in the image data transmission lines 23, 26, and 24, the vehicle communication unit 18 can cause the display unit 19 to display the part where the failure occurred and the type of failure (short-circuit failure or disconnection failure). can.

A pull-up connection switch 34, an IO level power supply 35, a pull-up resistor 36, a pull-down resistor 38, a pull-down control switch 39, an input buffer 42, an input port register 43, an output port register 44, an output buffer 45, and a microcomputer (failure diagnosis A fault diagnosis section is formed by the control section 50 .

Here, when the port level of the input/output port 33 is manipulated by the output port register 44 and the pull-up resistor 35 as in the first embodiment, the voltage of the terminal is maintained until the voltage of the terminal actually changes to the voltage after the change. It takes time to charge the stray capacitance.

Normally, the terminal capacitance of an IC such as the image processing IC 29 is about 10 pF, and if 1 kΩ is selected as the pull-up resistor, it is sufficient to wait about 100 nsec as the switching time.

That is, even if a wait time of about 100 nsec is inserted between each diagnosis and each diagnosis takes about 10 use, the time required for period (d) and period (e) is less than 1 msec.

In Example 1, the period (c) during which the vertical synchronizing signal (A) is at low level without image data transmission is 2.96 msec, which is sufficient for diagnosis. In the first embodiment, the disconnection failure diagnosis is performed after the short failure diagnosis, but this order may be reversed. At this time, it should be noted that the time until each terminal is switched differs between the short-circuit failure diagnosis and the disconnection failure diagnosis.

Port level switching and wait time insertion can be implemented by software installed in the image processing IC 29 as in the first embodiment. In the case of a configuration in which sufficient speed cannot be obtained, the above diagnostic contents may be implemented in hardware.

As described above, according to the first embodiment of the present invention, during the vertical blanking period (c) in which no image data is output from the image sensor, certain data is set as an expected value, and the data transmission path is Since it is configured to detect whether a short-circuit failure or a disconnection failure has occurred, it is possible to realize an image processing device capable of failure diagnosis even during imaging operation of the image processing device. .

Further, according to the first embodiment, even if there are a plurality of data transmission lines, by setting the expected value to a predetermined value, it is possible to detect which transmission line has a short-circuit failure or disconnection failure. be able to.

In the first embodiment, the right camera imaging element 20 has been described as an example, but the same diagnostic operation as described above can also be performed for the left camera imaging element.

(Example 2)
Next, Example 2 of the present invention will be described.

13 and 14 are diagrams for explaining an interface portion (interface circuit) of a data communication path between the right camera imaging device 20 and the image processing IC 29 in Embodiment 2 of the present invention.

In the second embodiment, unlike the first embodiment, the data output level of the right camera imaging device 20 during the low level of the vertical synchronization signal (vertical blanking period (c)) is high. In Example 1, as shown in FIG. 5C, the data output level of the right camera imaging element 20 is low level.

13A and 13B are diagrams showing signal levels or voltages of respective parts when diagnosing a short-circuit failure mode in the second embodiment. FIG.

In the example shown in FIG. 13, compared with the first embodiment, the output of the input/output port 33 switched to the output is set to low level, and accordingly the expected values of the input port registers 43 and 83 are inverted from the first embodiment. (input port register 43 is inverted from high to low and input port register 83 is inverted from low to high).

FIG. 14 is a diagram showing signal levels or voltages of respective parts when diagnosing a disconnection failure mode in the second embodiment.

In the second embodiment, the low level is connected to the input/output port 33 during disconnection fault diagnosis. That is, the pull-down enable signal 40 is turned on, the pull-down control switch 39 is turned on, and grounded. The expected value of the input register 43 at this time is at a high level, which is reversed from the expected value of the input register 43 in the case of the first embodiment.

Other configurations and operations are the same as those of the first embodiment, and the same reference numerals are assigned to the same configurations as those of the first embodiment, and detailed description thereof will be omitted.

Even in a configuration in which the data output level of the right camera imaging element 20 is high during the vertical synchronization signal low level (vertical blanking period (c)), based on the same concept as the first embodiment, It is possible to realize a camera image processing device capable of failure diagnosis even while the image processing device is in use.

In other words, in the second embodiment in which the specification of the right camera imaging device 20 is different from that of the first embodiment, it is possible to realize a camera image processing device capable of fault diagnosis even while the image processing device is in use.

Although the second embodiment has been described using the right camera imaging element 20 as an example, as in the first embodiment, the same diagnostic operation as described above can be performed on the left camera imaging element.

(Example 3)
Next, Example 3 of the present invention will be described.

FIG. 15 is a diagram for explaining an interface portion (interface circuit) of a data communication path between the right camera imaging device 20 and the image processing IC 29 in Embodiment 3 of the present invention.

In FIG. 15, the pull-up resistor 356 is placed outside the image processing IC 29 and always connected to the IO power supply 355 .

In the first embodiment, the pull-up resistor 36 is turned on and off by turning the pull-up control switch 34 on and off. If the resistance value is large enough not to interfere with the signal level of the pull-up resistor 356 (for example, 3.3 kΩ or more), it is not necessary to control the on/off of the pull-up resistor 356 .

Therefore, in the third embodiment, no pull-up resistor is arranged inside the image IC 29, and the external pull-up resistor 356 of the image IC 29 is arranged.

Other configurations and operations are the same as those of the first embodiment, and the same reference numerals are assigned to the same configurations as those of the first embodiment, and detailed description thereof will be omitted.

According to the third embodiment, it is not necessary to perform on/off control of the pull-up resistor, so the control operation can be simplified.

However, when adopting the configuration of the third embodiment, it should be noted that if a disconnection failure occurs in the input/output port 33, it may not be detected because the value of the input register 43 cannot be determined.

Other than that, Example 3 has the same effects as Example 1.

In the third embodiment, as in the first embodiment, the right camera imaging element 20 is used as an example, but the same diagnostic operation as described above can also be performed for the left camera imaging element.

(Example 4)
Next, Example 4 of the present invention will be described.

FIG. 16 is a diagram for explaining an interface portion (interface circuit) of a data communication path between the right camera imaging element 20 and the image processing IC 29 in Embodiment 4 of the present invention.

The fourth embodiment is an example applied when the image processing IC 29 has a configuration in which the image data input port cannot be switched to the output port.

In the fourth embodiment, an input-only port 433 and an output-only port (failure signal output unit) 457 that can be switched to high impedance are arranged in the image processing IC 29, and the voltage of the input port 433 is reduced by using the output-only port 457. Control to perform short fault diagnosis.

Other configurations and operations are the same as those of the first embodiment, and the same reference numerals are assigned to the same configurations as those of the first embodiment, and detailed description thereof will be omitted.

The fourth embodiment can obtain the same effect as the third embodiment, and the present invention can also be applied to an image processing IC having a configuration in which the image data input port cannot be switched to the output port.

Although the fourth embodiment has been described with the right camera imaging element 20 as an example, as in the first embodiment, the same diagnostic operation as described above can be performed on the left camera imaging element.

(Example 5)
Next, Example 5 of the present invention will be described.

FIG. 17 is a diagram for explaining an interface portion (interface circuit) of a data communication path between the right camera imaging element 620 and the image processing IC 29 in Embodiment 5 of the present invention.

The fifth embodiment assumes a transmission path for transmitting high-speed signals as a data transmission path. In this case, since a signal with a small voltage level that cannot be handled at the general IO port level is used for high-speed transmission purposes, for example, the input of an AD converter is used in addition to the data transmission port in fault diagnosis.

The right camera imaging device 620 transmits image data from the transmitter 600 to the receiver 603 of the image processing IC 29 via the output port 601 , damping resistor 602 and high speed data transmission line 633 . The image data transmitted to the receiver 603 is processed by the high speed transmission signal processing circuit 606 .

Since the high-speed transmission signal processing circuit 606 is specialized for high-speed data transmission, it is difficult to acquire data in timing with individual voltage changes each time the voltage of the high-speed data transmission line 633 is switched during diagnosis. In the fifth embodiment, the high-speed image data input port (diagnostic data input unit) 610, which is easy to match the diagnosis timing, is used to take in the voltage of the high-speed data transmission path 633 during diagnosis, so there is no problem.

Other configurations and operations are the same as those of the first embodiment, and configurations similar to those of the first and fourth embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted.

The fifth embodiment can obtain the same effect as the fourth embodiment, and the present invention can also be applied to an image processing IC that performs high-speed signal transmission.

Although the fifth embodiment has been described with the right camera imaging element 20 as an example, as in the first embodiment, the same diagnostic operation as described above can be performed on the left camera imaging element.

Further, according to the present invention, failure diagnosis can be performed even when the image processing apparatus is not performing an image capturing operation.

The present invention is not limited to Examples 1 to 5 described above, and includes various modifications. For example, the above-described Examples 1 to 5 have been described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the described configurations. In addition, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Moreover, it is possible to add, delete, or replace a part of the configuration of each of the first and second embodiments with another configuration.

Further, the control lines and information lines indicate those considered necessary for explanation, and not all control lines and information lines are necessarily indicated on the product.

Moreover, the present invention can be applied not only to image processing apparatuses for vehicles, but also to image processing apparatuses for other moving bodies such as robots.

1 Right camera imaging module unit 2 Left camera imaging module unit 3 Image captured by right camera 4 Image captured by left camera 5 Data processing unit 6 Right camera image after processing 7 Left camera image after processing 8 Parallax image generator 9 Parallax image 10 Recognition processor 11 Image processing module 12... In-vehicle camera image processing device, 13... Transmission path of right camera image, 14... Transmission path of processed right camera image, 15... Transmission path of left camera image, 16... Left camera image transmission path after processing 17 Parallax image transmission path 18 Vehicle communication unit 19 Display unit 20, 620 Right camera imaging device 23, 24 26 Data transmission path 25, 27 Connector 29 Image processing IC 30, 60 Digital data output buffer 31, 51, 61, 601 Output port 32 , 52, 62, 602... Damping resistors 33, 53, 63... Input/output ports 34... Pull-up connection switches 35... IO level power supplies 36, 356... Pull-up resistors , 37 pull-up enable signal 38 pull-down resistor 39 pull-down control switch 40 pull-down enable signal 41, 81 output enable signal 42, 82 input Buffers 43, 83 Input port registers 44, 84 Output port registers 45, 85 Output buffers 50 Microcomputer (failure diagnosis control unit) 90 Short circuit failure Parts 91... Disconnection detection part 355... IO power supply 433... Input-only port 457... Output-only port (failure signal output unit) 501... Diagnosis data setting unit 502 Detected data input section 503 Comparison section 504 Failure determination section 600 Transmitter 606 High-speed transmission signal processing circuit 610 High-speed image data input port ( diagnostic data input section), 633 ... high-speed data transmission line

Claims (6)

an imaging unit having a plurality of output ports;
an image processing unit having a plurality of input/output ports and performing digital signal processing on image data transmitted from the imaging unit for image processing;
a plurality of data transmission paths connecting the plurality of output ports of the imaging unit and the plurality of input/output ports of the image processing unit and transmitting the image data from the imaging unit to the image processing unit;
a damping resistor connected to the plurality of data transmission lines;
with
The image processing unit
an output buffer that switches the voltage of the input/output port;
a power supply;
a pull-up resistor connected to the input/output port;
a control switch connected between the power supply unit and the pull-up resistor for connecting and disconnecting the power supply unit and the pull-up resistor;
said output to said input/output port of one of said two data transmission paths to be diagnosed among said plurality of data transmission paths during a vertical blanking period in which said image data is not transmitted to said plurality of data transmission paths; A constant voltage is applied by a buffer, and a short circuit fault occurs in the two data transmission lines to be diagnosed based on the voltage value of the other input/output port of the two data transmission lines to be diagnosed. and based on the voltage value of the input/output port when the power supply unit and the pull-up resistor are connected by the control switch, it is determined whether disconnection failure has occurred in the data transmission line. a failure diagnosis unit for diagnosing whether or not there is
An image processing device comprising: The image processing device according to claim 1 ,
The failure diagnosis unit includes a diagnosis data setting unit that sets and outputs failure diagnosis data, a detection data input unit that inputs detection data for detecting the signal state of the input/output port, and the diagnosis data setting unit. a comparison unit for comparing the set failure diagnosis data with the detection data input by the detection data input unit; and a failure determination unit for determining a failure in the data transmission line based on the comparison by the comparison unit. An image processing apparatus comprising a failure diagnosis control section. The image processing device according to claim 1 ,
The image processing apparatus, wherein the fault diagnosis section has a fault signal output section that outputs a fault diagnosis signal to the data transmission path. The image processing device according to claim 1 ,
The image processing unit has a diagnostic data input unit for detecting signal states of the plurality of data transmission paths,
The image processing apparatus, wherein the fault diagnosis section has a fault signal output section that outputs a fault diagnosis signal to the plurality of data transmission paths. The image processing device according to any one of claims 1 to 4 ,
The image capturing unit has a right image capturing unit and a left image capturing unit, and the image processing unit performs processing based on the difference between the image data captured by the right image capturing unit and the left image capturing unit. 1. An image processing apparatus comprising: a parallax image generation unit for generating a parallax image. In the image processing device according to claim 5 ,
An image processing device, wherein the image processing device is mounted on a vehicle.

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