JP7180706B2 - Solid-state imaging device and electronic equipment - Google Patents

Description

The present technology relates to a solid-state imaging device and an electronic device, and more particularly to a solid-state imaging device having trench element isolation and an electronic device having the solid-state imaging device.

A solid-state imaging device has a plurality of pixels arranged along the light receiving surface side of a semiconductor substrate. Each pixel includes a photoelectric conversion section provided in a semiconductor substrate, and a color filter and an on-chip lens provided above the semiconductor substrate.

In a solid-state imaging device having such a configuration, when light incident on the light-receiving surface in an oblique direction leaks into the photoelectric conversion portions of adjacent pixels, this light leakage causes color mixture and color shading.

Therefore, a structure is proposed in which light leakage between adjacent pixels is prevented by forming a trench element isolation that separates the photoelectric conversion portion of each pixel on the light receiving surface side in the semiconductor substrate and providing a light shielding film inside the trench isolation. It is In such a configuration, the opening width of the trench is widened at a shallow position on the light-receiving surface side, and the light-shielding film is embedded only in the trench at the shallow position. It is supposed that the light can be effectively shielded between pixels (for example, see Patent Document 1 below).

JP 2012-178457 A

However, even in a solid-state imaging device having a structure in which trench element isolation is provided in a semiconductor substrate, color balance collapses depending on the wavelength to be received and the incident angle of the received light, and this is a factor that causes coloring. It's becoming

Accordingly, an object of the present technology is to provide a solid-state imaging device with good color balance and no coloring, and to provide an electronic device using this solid-state imaging device.

A solid-state imaging device according to the present technology for achieving such an object includes: a semiconductor layer having a light receiving surface on one main surface side, a plurality of pixels set along the light receiving surface; and a photoelectric conversion unit provided therein. Further, a groove type element isolation which is configured by providing an insulating layer in a groove pattern formed on the light receiving surface side of the semiconductor layer and which is provided at a position shifted with respect to a pixel boundary between the pixels. It has

In the solid-state imaging device having such a configuration, the groove type element isolation is shifted with respect to the pixel boundary. Therefore, by setting the direction in which the groove-type isolation is shifted to a direction that depends on the wavelength of the light to be received in each pixel, the volume and position of the photoelectric conversion portion on the light-receiving surface side where the groove-type isolation is provided can be adjusted. , can be configured to depend on the wavelength of the light to be received. As a result, the color balance between the short-wavelength light photoelectrically converted in the region on the light-receiving surface side provided with the groove-type element isolation and the long-wavelength light photoelectrically converted in the deeper region is improved. .

As a result, according to the present technology, it is possible to perform imaging with good color balance and no coloring, and it is possible to improve imaging characteristics.

1 is a schematic configuration diagram showing an example of a solid-state imaging device to which the present technology is applied; FIG. FIG. 2 is a plan view of essential parts in the solid-state imaging device of the first embodiment; FIG. 3 is a cross-sectional view of the main part of the solid-state imaging device of the first embodiment, and is a cross-sectional view corresponding to the AA cross section of FIG. 2; 4 is a graph showing relative output for each color light received by each photoelectric conversion unit; 4 is a graph showing the absorption amount of blue light with respect to the depth from the light receiving surface of the semiconductor layer (Si). 4A to 4C are manufacturing process diagrams of the solid-state imaging device according to the first embodiment; 4 is a graph of normalized sensitivity versus angle of incidence; 4 is a graph of absolute sensitivity versus angle of incidence; FIG. 11 is a cross-sectional view showing the configuration of the essential parts of a solid-state imaging device according to a second embodiment; FIG. 11 is a cross-sectional view showing the configuration of the main part of a solid-state imaging device according to a third embodiment; FIG. 12 is a cross-sectional view showing the configuration of the essential parts of a solid-state imaging device according to a fourth embodiment; FIG. 14 is a plan view of the essential parts of a solid-state imaging device according to a fifth embodiment; FIG. 13 is a cross-sectional view of the main part of the solid-state imaging device of the fifth embodiment, and is a cross-sectional view corresponding to the AA cross section of FIG. 12; 4 is a graph showing the amount of color mixture to adjacent pixels with respect to the incident angle; FIG. 12 is a configuration diagram of an electronic device according to a sixth embodiment having a solid-state imaging device to which the present technology is applied;

Hereinafter, embodiments of the present technology will be described in the following order based on the drawings.
1. Schematic configuration example of solid-state imaging device of embodiment 2. First embodiment (first example in which groove-type element isolation is shifted to the long-wavelength pixel side)
3. Second Embodiment (Second example in which groove-type element isolation is shifted to the long-wavelength pixel side)
4. Third Embodiment (Third Example in which Groove Element Isolation is Shifted to the Long-Wavelength Pixel Side)
5. Fourth Embodiment (Fourth example in which groove-type element isolation is shifted to the long-wavelength pixel side)
6. Fifth Embodiment (Example in which the groove type element isolation is shifted to the short wavelength pixel side)
7. Sixth Embodiment (Electronic Device Using Solid-State Imaging Device)

≪1. Schematic Configuration Example of Solid-State Imaging Device According to Embodiment>>
FIG. 1 shows a schematic configuration of a solid-state imaging device using a MOS-type solid-state imaging device as an example of the solid-state imaging device of the present technology.

The solid-state imaging device 1 shown in this figure has a pixel region 4 in which a plurality of pixels 3 including photoelectric conversion regions are two-dimensionally arranged on one surface of a support substrate 2 . Each pixel 3 arranged in the pixel region 4 is provided with a photoelectric conversion region, a floating diffusion, a readout gate, and a pixel circuit composed of a plurality of other transistors (so-called MOS transistors), capacitive elements, and the like. ing. In some cases, a plurality of pixels 3 share part of the pixel circuit.

Peripheral circuits such as a vertical drive circuit 5, a column signal processing circuit 6, a horizontal drive circuit 7, and a system control circuit 8 are provided in the peripheral portion of the pixel region 4 as described above.

The vertical drive circuit 5 is composed of, for example, a shift register, selects a pixel drive line 9, supplies the selected pixel drive line 9 with a pulse for driving the pixels 3, and drives the pixels 3 arranged in the pixel region 4. is driven row by row. That is, the vertical driving circuit 5 sequentially selectively scans the pixels 3 arranged in the pixel region 4 row by row in the vertical direction. Then, pixel signals based on signal charges generated in each pixel 3 according to the amount of light received are supplied to the column signal processing circuit 6 through vertical drive lines 10 arranged perpendicularly to the pixel drive lines 9 .

The column signal processing circuit 6 is arranged, for example, for each column of the pixels 3, and performs signal processing such as noise removal on the signals output from the pixels 3 of one row for each pixel column. That is, the column signal processing circuit 6 performs signals such as correlated double sampling (CDS) for removing pixel-specific fixed pattern noise, signal amplification, and analog/digital conversion (AD). process.

The horizontal driving circuit 7 is composed of, for example, a shift register, and sequentially outputs horizontal scanning pulses to sequentially select each of the column signal processing circuits 6 and cause each of the column signal processing circuits 6 to output a pixel signal.

A system control circuit 8 receives an input clock and data instructing an operation mode and the like, and outputs data such as internal information of the solid-state imaging device 1 . That is, in the system control circuit 8, based on the vertical synchronizing signal, the horizontal synchronizing signal, and the master clock, a clock signal and a control signal that serve as a reference for the operation of the vertical driving circuit 5, the column signal processing circuit 6, the horizontal driving circuit 7, etc. to generate These signals are input to the vertical driving circuit 5, the column signal processing circuit 6, the horizontal driving circuit 7, and the like.

Each of the peripheral circuits 5 to 8 as described above and the pixel circuit provided in the pixel region 4 constitute a drive circuit for driving each pixel 3 . Incidentally, the peripheral circuits 5 to 8 may be arranged at positions stacked on the pixel region 4 .

≪2. First embodiment>>
(First example in which the groove type element isolation is shifted to the long wavelength pixel side)
In the first embodiment, the configuration of the solid-state imaging device 1-1 of the first embodiment, the manufacturing method of the solid-state imaging device 1-1, and the effects of the first embodiment will be described in this order.

<Configuration of solid-state imaging device 1-1>
FIG. 2 is a plan view of the main part of the solid-state imaging device 1-1 of the first embodiment, showing the semiconductor layer 20 portion of the pixel region 4 for 12 pixels when viewed in plan from the light receiving surface side. It is a top view. 3 is a cross-sectional view of the main part of the solid-state imaging device 1-1 of the first embodiment, which corresponds to the AA cross section of FIG. The configuration of the solid-state imaging device 1-1 of the first embodiment will be described below based on these drawings.

The solid-state imaging device 1-1 of the first embodiment has a semiconductor layer 20 bonded on a support substrate (not shown). This is a back-illuminated imaging device provided with transistors and wiring layers (not shown) on the side opposite to S. FIG.

A separation region 21 is provided inside the semiconductor layer 20 by diffusion of impurities, and a photoelectric conversion unit 23 is provided in each pixel 3 separated by the separation region 21 . Further, on the side of the light receiving surface S of the semiconductor layer 20, a groove type element isolation 25 arranged characteristically in this embodiment is provided. A protective insulating layer 31, an insulating layer 33, and a light shielding film 35 are provided in this order on the light receiving surface S of the semiconductor layer 20, and a color filter 39 and an on-chip lens 41 are laminated via a planarizing insulating film 37. It is

Hereinafter, configurations of the semiconductor layer 20, the trench isolation 25 provided in the semiconductor layer 20, and each layer laminated on the light receiving surface S of the semiconductor layer 20 will be described in order.

[Semiconductor layer 20]
The semiconductor layer 20 is a layer made of, for example, n-type single crystal or polycrystalline silicon, and is made by, for example, thinning a semiconductor substrate made of n-type single crystal silicon. The semiconductor layer 20 has a light receiving surface S on one main surface side, and a plurality of pixels 3 are set along the light receiving surface S. As shown in FIG. Each pixel 3 is arranged as a red pixel 3R for receiving red light, a green pixel 3G for receiving green light, and a blue pixel 3B for receiving blue light. Here, as an example, the case where the pixels 3 of each color are two-dimensionally arranged in a Bayer array is illustrated.

The Bayer arrayed pixels 3R, 3G, and 3B of each color are arranged in the same shape on the light receiving surface S regardless of the wavelength of light to be received. For example, when the boundary between the pixels 3 is a pixel boundary 3a, each pixel 3 surrounded by the pixel boundary 3a on the light receiving surface S has a substantially square planar shape of uniform size. It is assumed that there is

An isolation region 21 configured as a p-type impurity diffusion region is provided inside the semiconductor layer 20 . In the semiconductor layer 20, the isolation region 21 is centered on the pixel boundary 3a and extends from the surface opposite to the light receiving surface S along the pixel boundary 3a toward the light receiving surface S side.

An n-type photoelectric conversion unit 23 is provided for each pixel 3 inside the semiconductor layer 20 . The n-type photoelectric conversion section 23 is composed of an n-type region separated in the semiconductor layer 20 by the isolation region 21 and a trench isolation 25 which will be described later. These photoelectric conversion portions 23 constitute a photodiode together with the p-type separation region 21 and serve as an accumulation region for charges photoelectrically converted in each pixel 3 .

In the semiconductor layer 20, in addition to the isolation region 21 and the photoelectric conversion section 23, there are various impurity regions such as the source/drain of a transistor and a surface diffusion layer arranged in a normal back-illuminated solid-state imaging device. is provided, but illustration and description here are omitted.

[Groove isolation 25]
The groove type element isolation 25 is configured by providing a protective insulating layer 31 and an insulating layer 33 in a groove pattern 20a provided on the light receiving surface S side of the semiconductor layer 20, and further providing a light shielding film 35 therebetween. there is The groove type element isolation 25 having such a configuration is characterized in that it is provided on the light receiving surface S at a position shifted from the center of the pixel boundary 3a. The displacement direction of the groove-type isolation 25 with respect to the pixel boundary 3a depends on the wavelength of the light intended to be received in the two pixels 3-pixel 3 separated by the groove-type isolation 25. FIG.

In particular, in the first embodiment, the trench isolation 25 is shifted in the direction of the pixel having the longer wavelength of the light to be received among the two adjacent pixels 3 . That is, if the color pixels 3R, 3G, and 3B are Bayer-arranged, the groove-type element isolation 25 between the green pixel 3G and the blue pixel 3B is provided at a position shifted toward the green pixel 3G. . Further, the groove type isolation 25 between the green pixel 3G and the red pixel 3R is provided at a position shifted toward the red pixel 3R.

Here, "the trench isolation 25 is provided at a position shifted from the center of the pixel boundary 3a" means that the trench isolation 25 is located at the center of the width direction when viewed from the light receiving surface S side, that is, the trench pattern 20a. indicates that the center of the aperture width of is displaced from the pixel boundary 3a. Therefore, the trench isolation 25 may be arranged on the pixel boundary 3a.

In such a configuration, the width of the trench isolation 25 when viewed from the light receiving surface S side, that is, the opening width of the trench pattern 20a may be constant within the light receiving surface S.

As a result, in the depth region where the groove-type element isolation 25 is provided in the semiconductor layer 20, the width of the photoelectric conversion section 23 in the arrangement direction of the respective color pixels 3R, 3G, and 3B corresponds to the wavelength of the light to be received. A pixel having a longer value has a larger value. For example, in the direction in which the green pixel 3G and the blue pixel 3B are adjacent to each other, the width wG of the photoelectric conversion portion 23 in the green pixel 3G and the width wG of the photoelectric conversion portion 23 in the blue pixel 3B are is wG<wB. In the direction in which the green pixel 3G and the red pixel 3R are adjacent to each other, the width wG of the photoelectric conversion portion 23 in the green pixel 3G and the width wG of the photoelectric conversion portion 23 in the red pixel 3R are The width wR is wR<wG.

Therefore, in the region where the groove-type element isolation 25 is provided, that is, the surface region near the light-receiving surface S, in which the short-wavelength light is photoelectrically converted, the photoelectric conversion portions of the respective color pixels 3R, 3G, and 3B are The volume of 23 increases as the wavelength of the light to be received is shorter.

On the other hand, in the semiconductor layer 20, in a depth region in which the trench isolation 25 is not provided, that is, in a region far from the light receiving surface S and in which long wavelength light is photoelectrically converted, each color pixel 3R, The widths of the 3G and 3B photoelectric conversion units 23 are substantially the same in the pixel arrangement direction. Therefore, the volume of the photoelectric conversion portion 23 in each color pixel 3R, 3G, 3B is uniform.

The depth d of the trench isolation 25 from the light-receiving surface S may be a depth at which almost 100% of the light with the shortest wavelength among the light with the wavelengths to be received in each pixel 3 is absorbed. For example, FIG. 4 is a graph showing the relative output with respect to the wavelength of light received by each photoelectric conversion unit after passing through color filters of each color, which will be described later. As shown in this graph, the wavelength range in which 80% of the light of each wavelength received by the photoelectric conversion unit is converted by the photoelectric conversion unit and output is set as each color light to be received. This defines the wavelength range of the blue light hB. Then, as shown in FIG. 5, the depth D (here D=2300 nm) from the light receiving surface S at which almost 100% of the blue light hB in the specified wavelength range is absorbed is the maximum value, and the groove type element separation is set within the range of this depth D.

For example, FIG. 5 shows the absorption of blue light hB when the semiconductor layer 20 is single crystal silicon. In this case, at a depth of about 2300 nm from the light receiving surface S, almost 100% of the blue light hB is absorbed. Therefore, the depth d of the trench isolation 25 is set to d≦D=2300 nm.

In the trench isolation 25 arranged as described above, the inner wall of the trench pattern 20 a is covered with the protective insulating layer 31 and the insulating layer 33 provided on the light receiving surface S of the semiconductor layer 20 . Furthermore, in the center of the groove pattern 20a, a light shielding film 35 is embedded via the protective insulating layer 31 and the insulating layer 33. As shown in FIG.

Among them, the protective insulating layer 31 is a layer made of a metal oxide that accumulates negative charges, and forms a hole accumulation layer at the interface of the semiconductor layer 20 . Such a protective insulating layer 31 is a layer made of oxide such as hafnium (Hf), aluminum (Al), tantalum (Ta), titanium (Ti), or the like. The insulating layer 33 is a layer made of silicon oxide (SiO ₂ ) or silicon nitride (SiN).

[Light shielding film 35]
The light shielding film 35 is a layer patterned on the light receiving surface S with the protective insulating layer 31 and the insulating layer 33 interposed therebetween. The light-shielding film 35 is embedded in the groove pattern 20a of the groove-type element isolation 25 to constitute a part of the groove-type element isolation 25. As shown in FIG. Further, the light shielding film 35 is patterned so as to have openings 35 a above the photoelectric conversion sections 23 above the light receiving surface S. As shown in FIG. The openings 35a may have the same shape in each of the color pixels 3R, 3G, and 3B, and the center of each opening 35a coincides with the pixel center φ.

Further, the light shielding film 35 is patterned in a line width above the light receiving surface S with the pixel boundary 3a as the center. The line width may be constant, and the center of the line width may coincide with the pixel boundary 3a. For example, it has a line width that covers the trench isolation 25 when viewed from the light receiving surface S side in a plan view.

The light-shielding film 35 as described above is made of a metal material having light-shielding properties such as tungsten (W), aluminum (Al), titanium nitride (TiN), and titanium (Ti).

The light shielding film 35 patterned as described above is covered with a planarization insulating film 37 .

[Color filter 39]
The color filter 39 is a layer provided on the planarizing insulating film 37 and is composed of color filters of respective colors patterned for each pixel 3 . Each of the patterned color filters 39 is configured to pass light in a wavelength range intended to be received by each of the color pixels 3R, 3G, and 3B. These color filters 39 may have the same shape in each color pixel 3R, 3G, 3B, and the center of each color filter 39 may coincide with the pixel center φ.

[On-chip lens 41]
The on-chip lens 41 is arranged for each pixel 3 on the color filter 39, and is assumed here to be a convex lens that is convex with respect to the light incident direction. Such an on-chip lens 41 preferably has the same shape in each color pixel 3R, 3G, and 3B, and the center of each on-chip lens 41 coincides with the pixel center φ.

<Manufacturing Method of Solid-State Imaging Device 1-1>
6A to 6D are cross-sectional process diagrams showing the manufacturing procedure of the solid-state imaging device of the first embodiment. A method for manufacturing the solid-state imaging device according to the first embodiment shown in FIGS. 2 and 3 will be described below with reference to FIG.

[Fig. 6A]
First, as shown in FIG. 6A, in a semiconductor layer 20 made of, for example, n-type single crystal silicon, a p-type isolation region 21 is formed by diffusion of impurities from the surface opposite to the light receiving surface S. As shown in FIG. The isolation region 21 is formed with a constant width centering on the boundary (pixel boundary 3a) between the pixels 3 that are evenly arranged two-dimensionally with respect to the light receiving surface S of the semiconductor layer 20 .

Although not shown here, an impurity diffusion layer is formed in the semiconductor layer 20 as necessary, and then a wiring layer is formed on the surface of the semiconductor layer 20 opposite to the light receiving surface S. is covered with an insulating film, and a support substrate is bonded. After that, the semiconductor layer 20 is polished from the light receiving surface S side to have the required film thickness.

Next, a groove pattern 20 a is formed on the light receiving surface S side of the semiconductor layer 20 . The groove pattern 20a is formed with a depth d reaching the separation region 21 from the light receiving surface S along the pixel boundary 3a at a position whose center in the width direction is shifted with respect to the pixel boundary 3a. The shift and depth d of the trench pattern 20a with respect to the pixel boundary 3a are the same as the shift and depth d of the trench isolation described above with reference to FIG. The formation of such a groove pattern 20a is performed by forming a mask pattern on the light-receiving surface S by applying the lithography method and etching the semiconductor layer 20 from above the mask pattern.

As a result, the semiconductor layer 20 made of n-type single-crystal silicon is separated by the p-type separation region 21 and the groove pattern 20a, and each separated portion serves as an n-type photoelectric conversion portion 23 . In the depth region where the groove pattern 20a is provided, that is, in the surface region near the light receiving surface S, the photoelectric conversion unit 23 of each pixel 3 has a width and a volume in the arrangement direction of the color pixels 3R, 3G, and 3B. A pixel having a shorter wavelength of light has a larger size. On the other hand, in the depth region where the groove pattern 20a is not provided, that is, the region far from the light receiving surface S, the width and volume of the photoelectric conversion section 23 of each color pixel 3R, 3G, 3B are uniform.

[Fig. 6B]
Next, as shown in FIG. 6B, a protective insulating layer 31 and an insulating layer 33 are sequentially formed on the light receiving surface S of the semiconductor layer 20 while covering the inner walls of the groove pattern 20a. At this time, a protective insulating layer 31 made of a metal oxide is formed by, for example, an atomic layer deposition (ALD) method. Then, an insulating layer 33 made of silicon oxide or silicon nitride is deposited by plasma CVD. Also, here, the protective insulating layer 31 and the insulating layer 33 are formed with a film thickness that does not bury the groove pattern 20a.

After that, a light-shielding film 35 is formed on the insulating layer 33 so as to fill the inside of the groove pattern 20a and have a film thickness sufficient for light-shielding. At this time, the light shielding film 35 made of a metal material is formed by, for example, a sputtering method.

As described above, the trench isolation 25 is obtained, which is formed by embedding the protective insulating layer 31, the insulating layer 33, and the light shielding film 35 in the trench pattern 20a formed in the semiconductor layer 20. FIG.

[Fig. 6C]
Next, as shown in FIG. 6C, the light shielding film 35 is patterned on the insulating layer 33 to form an opening 35a on the photoelectric conversion section 23. Next, as shown in FIG. At this time, each opening 35a may have the same shape in each of the color pixels 3R, 3G, and 3B, and the center of each opening 35a is aligned with the pixel center φ. The center of the line width of the light shielding film 35 in the state where the opening 35a is formed is aligned with the center of the pixel boundary 3a, and when viewed from the light receiving surface S side in a plan view, the light shielding film 35 forms a groove element. Patterning is performed so that the isolation 25 is covered.

[Figure 3]
After that, as shown in FIG. 3, a planarizing insulating film 37 is formed on the insulating layer 33 so as to cover the patterned light shielding film 35 . Next, a color filter 39 of each color is patterned in each pixel 3 on the planarizing insulating film 37 , and an on-chip lens 41 is patterned on the color filter 39 . The color filter 39 and the on-chip lens 41 may have the same shape in each of the color pixels 3R, 3G, and 3B as described above, and their centers are aligned with the pixel center φ.

As described above, the solid-state imaging device 1-1 is completed.

<Effects of the first embodiment>
In the solid-state imaging device 1-1 described above, the groove-type element isolation 25 formed on the light receiving surface S side of the semiconductor layer 20 is shifted in the direction depending on the wavelength to be received. As a result, in the region where short-wavelength light is photoelectrically converted, pixels with shorter wavelengths of light to be received have larger volumes, while in regions where long-wavelength light is photoelectrically converted, each color pixel 3R, 3G, and 3B have a uniform volume.

Therefore, it is possible to prevent the reduction in the light receiving sensitivity of the blue light hB due to the volume reduction on the light receiving surface S side due to the groove type element isolation 25, and improve the sensitivity shading in the blue pixel 3B. As a result, as shown in FIG. 7A, it is possible to match the normalized sensitivity to the incident angle of light on the light receiving surface S for the red light hR, the green light hG, and the blue light hB. As a result, the color balance depending on the incident angle of sensitivity is improved, and coloring can be prevented.

Incidentally, in the conventional configuration in which the arrangement of the groove-type element isolation 25 is not shifted with respect to the pixel boundary 3a, as shown in FIG. rice field. As a result, the color balance dependent on the incident angle of sensitivity is lost, resulting in coloring.

In addition, in the configuration of the first embodiment, the light shielding film 35 is common among the color pixels 3R, 3G, and 3B, and the position of the light shielding film 35 coincides with the pixel boundary 3a. Therefore, the incident light on the light shielding film 35 is common to the color pixels 3R, 3G, and 3B. Therefore, as shown in FIG. 8A, uniform sensitivity shading can be achieved without causing a decrease in absolute sensitivity at an incident angle of 0°.

On the other hand, in the conventional configuration in which the arrangement of the trench isolation 25 is not shifted with respect to the pixel boundary 3a, as shown in FIG. and green light hG. Further, in order to prevent sensitivity shading for blue light hB, in a configuration in which the light shielding film 35 is shifted to the long wavelength pixel side, as shown in FIG. This causes a drop in absolute sensitivity in the blue pixel 3B.

However, in the configuration of the first embodiment, it is possible to prevent coloring by improving the color balance depending on the incident angle of sensitivity without lowering the absolute sensitivity, thereby improving the imaging characteristics. can be achieved.

Further, in the structure of the first embodiment, the groove type element isolation 25 has a structure in which the light shielding film 35 is arranged inside the groove pattern 20a. Therefore, leakage of light from the adjacent pixels 3 through the insulating layer 33 between the light receiving surface S and the light shielding film 35 is prevented. This also makes it possible to prevent color mixture.

In the above first embodiment, the configuration in which the respective color pixels 3R, 3G, and 3B are arranged in a Bayer arrangement has been exemplified and explained. However, the application of the solid-state imaging device of the present technology is not limited to such a configuration. For example, in a configuration using complementary colors of cyan and yellow as a color filter, the groove-type element isolation is provided so as to be shifted to the cyan pixel side with respect to the pixel boundary 3a between the cyan pixel and the yellow pixel. In addition, in the case of a configuration using white pixels, the groove-type element isolation is provided so as to be shifted to the white pixel side with respect to the pixel boundary 3a between each color pixel and the white pixel. This makes it possible to obtain similar effects.

≪3. Second embodiment>>
(Second example in which the groove type element isolation is shifted to the long wavelength pixel side)
<Configuration of solid-state imaging device 1-2>
FIG. 9 is a cross-sectional view showing the configuration of the essential parts of the solid-state imaging device 1-2 of the second embodiment. The solid-state imaging device 1-2 of the second embodiment shown in this figure differs from the solid-state imaging device of the first embodiment in that the light shielding film 35 is not embedded in the trench isolation 45. The configuration shall be the same. Therefore, duplicate descriptions of the same components as in the first embodiment will be omitted.

That is, the groove type element isolation 45 has a configuration in which the insulating layer 33 is embedded in the groove pattern 20a formed on the light receiving surface S side of the semiconductor layer 20 with the protective insulating layer 31 interposed therebetween. The arrangement state of the groove pattern 20a with respect to the pixel boundary 3a is the same as in the first embodiment. The structures of the protective insulating layer 31 and the insulating layer 33 are the same as those of the first embodiment, and differ from the first embodiment in that only these film thicknesses are the film thicknesses that fill the groove pattern 20a. Also, the light shielding film 35 is patterned on the insulating layer 33 in the same manner as in the first embodiment, and is different from the first embodiment in that the thickness of the light shielding film 35 should be sufficient for light shielding.

<Manufacturing Method of Solid-State Imaging Device 1-2>
Manufacture of the solid-state imaging device 1-2 having the configuration as described above is performed when forming the protective insulating layer 31 and the insulating layer 33 described with reference to FIG. The groove pattern 20a may be completely embedded with the protective insulating layer 31 and the insulating layer 33 of the .
Other steps may be the same as in the first embodiment.

<Effects of Second Embodiment>
Even in the solid-state imaging device 1-2 of the second embodiment having the configuration as described above, the groove-type element isolation 45, the light shielding film 35, and the on-chip lens 41 for each of the color pixels 3R, 3G, and 3B are The arrangement state is the same as that of the first embodiment. For this reason, as in the first embodiment, it is possible to prevent coloring by improving the color balance dependent on the sensitivity incident angle without causing a decrease in absolute sensitivity, thereby improving the imaging characteristics. be able to.

≪4. Third embodiment>>
(Third example in which groove-type element isolation is shifted to the long-wavelength pixel side)
<Configuration of solid-state imaging device 1-3>
FIG. 10 is a cross-sectional view showing the configuration of the essential parts of the solid-state imaging device 1-3 of the third embodiment. The solid-state imaging device 1-3 of the third embodiment shown in this figure differs from the solid-state imaging device of the first embodiment in that the pattern width of the trench isolation 47 is formed stepwise in the depth direction. However, other configurations are assumed to be the same. For this reason, redundant description of the same components as in the first embodiment will be omitted.

That is, the pattern width of the groove type isolation 47 has a two-step size that is wider on the light receiving surface S side and narrower at a deeper position in the semiconductor layer 20 . Such groove type element isolation 47 is displaced from the pixel boundary 3a in the portion where the pattern width is wide on the light receiving surface S side. On the other hand, in the narrow pattern width portion away from the light receiving surface S in the trench isolation 47, the center of the pattern width may coincide with the pixel boundary 3a.

It is assumed that the depth of the wide pattern width portion of such trench isolation 47 is set to the depth d described in the first embodiment.

Further, in the groove type element isolation 47, the light shielding film 35 may be embedded only in the wide pattern width portion, thereby making it possible to embed the light shielding film 35 without generating voids.

<Manufacturing Method of Solid-State Imaging Device 1-3>
The manufacturing of the solid-state imaging device 1-3 having the above-described configuration uses every two masks when forming the groove pattern 20a described with reference to FIG. 6A in the manufacturing of the solid-state imaging device of the first embodiment. The groove pattern 20a may be formed with two stages of opening widths by etching twice. Other steps may be the same as in the first embodiment.

<Effects of the third embodiment>
Even in the solid-state imaging device 1-3 of the third embodiment having the configuration as described above, the groove-type element isolation 47, the light shielding film 35, and the on-chip lens 41 for each of the color pixels 3R, 3G, and 3B are The arrangement state is the same as that of the first embodiment. For this reason, as in the first embodiment, it is possible to prevent coloring by improving the color balance dependent on the sensitivity incident angle without causing a decrease in absolute sensitivity, thereby improving the imaging characteristics. be able to. Further, the groove type element isolation 47 has a structure in which the light shielding film 35 is arranged inside the groove pattern 20a. For this reason, similarly to the first embodiment, leakage of light between adjacent pixels 3 is prevented, and it is also possible to prevent color mixture.

≪5. Fourth embodiment>>
(Fourth example in which the groove type element isolation is shifted to the long wavelength pixel side)
<Structure of solid-state imaging device 1-4>
FIG. 11 is a cross-sectional view showing the configuration of the essential parts of the solid-state imaging device 1-4 of the fourth embodiment. The fourth embodiment shown in this figure is a modification of the third embodiment. This solid-state imaging device 1-4 differs from the solid-state imaging device of the first embodiment in that the pattern width of the trench isolation 49 is formed stepwise in the depth direction. shall be the same. For this reason, redundant description of the same components as in the first embodiment will be omitted.

That is, the pattern width of the groove type isolation 49 has a two-step size that is wide on the side of the light receiving surface S and narrow at a deep position in the semiconductor layer 20 . Such groove type element isolation 49 is displaced from the pixel boundary 3a in the wide and narrow pattern width portions on the light receiving surface S side. That is, the trench pattern 20a forming the trench isolation 49 has a shape in which a narrow opening is dug from the center of the bottom of the wide opening formed on the light receiving surface S side.

It is assumed that the depth of the entire trench isolation 49 including the wide and narrow portions of the pattern is set to the depth d described in the first embodiment.

Further, in the groove type element isolation 49, the light shielding film 35 may be embedded only in the wide pattern width portion, so that the structure is such that the light shielding film 35 can be embedded without generating voids.

<Manufacturing Method of Solid-State Imaging Device 1-4>
The manufacturing of the solid-state imaging device 1-4 configured as described above is performed by etching using a mask when forming the groove pattern 20a described with reference to FIG. 6A in the manufacturing of the solid-state imaging device of the first embodiment. to form a wide opening width portion on the light receiving surface S side in the groove pattern 20a. Next, sidewalls are formed on the side walls of the groove pattern 20a, and the center of the bottom of the groove pattern 20a is further etched to form the groove pattern 20a with the opening width gradually narrowed. Other steps may be the same as in the first embodiment.

<Effects of Fourth Embodiment> Even in the solid-state imaging device 1-4 of the fourth embodiment having the configuration as described above, the groove-type element isolation 49 and the light shielding film for each of the color pixels 3R, 3G, and 3B are 35 and the on-chip lens 41 are the same as in the first embodiment. For this reason, as in the first embodiment, it is possible to prevent coloring by improving the color balance dependent on the sensitivity incident angle without causing a decrease in absolute sensitivity, thereby improving the imaging characteristics. be able to. Further, the groove type element isolation 49 has a structure in which the light shielding film 35 is arranged inside the groove pattern 20a. For this reason, similarly to the first embodiment, leakage of light between adjacent pixels 3 is prevented, and it is also possible to prevent color mixture.

≪6. Fifth embodiment>>
(Example of shifting the groove type isolation to the short wavelength pixel side)
<Configuration of solid-state imaging device 1-5>
FIG. 12 is a plan view of the essential part of the solid-state imaging device 1-5 of the fifth embodiment, showing a plan view of 12 pixels when the semiconductor layer portion of the pixel region 4 is viewed from the light receiving surface side. It is a diagram. FIG. 13 is a cross-sectional view of the main part of the solid-state imaging device 1-5 of the fifth embodiment, which corresponds to the AA cross section of FIG. The configuration of the solid-state imaging device 1-5 of the fifth embodiment will be described below based on these drawings.

The solid-state imaging device 1-5 of the fifth embodiment shown in these figures differs from the solid-state imaging device of the first embodiment in the shifting direction of the trench isolation 51 with respect to the pixel boundary 3a and the direction in which the trench isolation 51 is shifted. , where the light shielding film 35 is not embedded. Other configurations are the same as those of the first embodiment. Therefore, duplicate descriptions of the same components as in the first embodiment will be omitted.

That is, the trench isolation 51 has a configuration in which the protective insulating layer 31 and the insulating layer 33 are embedded in the trench pattern 20a. The trench isolation 51 having such a configuration is provided at a position deviated from the center of the pixel boundary 3a on the light receiving surface S, and the two pixels 3- In the pixel 3, it depends on the wavelength of the light to be received.

In particular, in the fifth embodiment, the trench isolation 51 is shifted in the direction of the pixel having the shorter wavelength of the light to be received among the two adjacent pixels 3 . That is, if the pixels 3R, 3G, and 3B of each color are Bayer-arranged, the trench isolation 51 between the green pixel 3G and the red pixel 3R is provided at a position shifted toward the green pixel 3G. there is Further, the groove type element isolation 51 between the green pixel 3G and the blue pixel 3B is provided at a position shifted toward the blue pixel 3B.

Here, "the trench isolation 51 is provided at a position shifted from the center of the pixel boundary 3a" means that the trench isolation 51 is located at the center of the width direction when viewed from the light receiving surface S side, that is, at the trench pattern 20a. indicates that the center of the aperture width of is displaced from the pixel boundary 3a. Therefore, the trench isolation 51 may be arranged on the pixel boundary 3a.

In such a configuration, the width of the trench isolation 51 when viewed from the light receiving surface S side, that is, the opening width of the trench pattern 20a may be constant within the light receiving surface S.

As a result, in the depth region where the trench isolation 51 is provided in the semiconductor layer 20, that is, in the surface region close to the light-receiving surface S, pixels with shorter wavelengths of light intended to be received are located closer to adjacent pixels. is far away from the opening 35a of the light shielding film 35. For example, in the direction in which the green pixel 3G and the red pixel 3R are adjacent to each other, the groove-type element isolation 51 is displaced toward the green pixel 3G, so that the green light is emitted from the opening 35a of the light shielding film 35 in the red pixel 3R. The light receiving surfaces S of the pixels 3G are arranged apart.

On the other hand, in the semiconductor layer 20, in the depth region where the trench isolation 51 is not provided, the widths of the photoelectric conversion portions 23 of the respective color pixels 3R, 3G, and 3B are substantially the same in the two arrangement directions. The volume of the photoelectric conversion portion 23 in the pixels 3R, 3G, and 3B is uniform.

<Manufacturing Method of Solid-State Imaging Device 1-5>
The manufacturing of the solid-state imaging device 1-5 having the above configuration is performed by changing the formation position of the groove pattern 20a described using FIG. 6A in the manufacturing of the solid-state imaging device of the first embodiment. , is shifted to the pixel side where the wavelength range for which light is intended to be received is short. Moreover, when forming the protective insulating layer 31 and the insulating layer 33 described with reference to FIG. Other steps may be the same as in the first embodiment.

<Effects of the Fifth Embodiment>
In the solid-state imaging device 1-5 of the fifth embodiment described above, the groove type element isolation 51 formed on the light receiving surface S side of the semiconductor layer 20 is arranged with respect to the pixel boundary 3a depending on the wavelength to be received. set in the opposite direction. As a result, in the region on the light receiving surface S side where the groove type element isolation 51 is provided, the pixels for which the wavelength of the light to be received is short are arranged far away from the opening 35a of the light shielding film 35 in the adjacent pixels. In regions deeper than this, the volume of each color pixel 3R, 3G, 3B is made uniform.

Therefore, it is possible to prevent the occurrence of light leakage due to diffraction of the red light hR and color mixture due to the fact that the photoelectric conversion unit 23 of the adjacent green pixel 3G is moved away from the opening 35a of the light shielding film 35 of the red pixel 3R. can be done. As a result, as shown in FIG. 14A, it is possible to match the amount of color mixture to adjacent pixels with respect to the incident angle for red light hR, green light hG, and blue light hB. As a result, the color balance depending on the incident angle of sensitivity is improved, and coloring can be prevented.

Note that in the conventional configuration in which the arrangement of the groove-type element isolation is not shifted with respect to the pixel boundary, as shown in FIG. and grow. As a result, the color balance depending on the incident angle of sensitivity is lost, and coloring tends to occur.

In addition, in the configuration of the fifth embodiment, the light shielding film 35 is common among the color pixels 3R, 3G, and 3B, and the position of the light shielding film 35 coincides with the pixel boundary 3a. Therefore, the incident light on the light shielding film 35 is common to the color pixels 3R, 3G, and 3B, and the absolute sensitivity does not decrease at an incident angle of 0°.

As a result, according to the solid-state imaging device of the fifth embodiment, it is possible to prevent color mixture depending on the incident angle and to prevent coloring, so that imaging characteristics can be improved.

≪7. Sixth embodiment>>
(Electronic equipment using a solid-state imaging device)
The solid-state imaging device having each configuration according to the present technology described in the above-described first to fifth embodiments includes, for example, a camera system such as a digital camera and a video camera, a mobile phone having an imaging function, or a mobile phone having an imaging function. It can be provided in a solid-state imaging device for an electronic device such as another device equipped with the device.

FIG. 15 shows a configuration diagram of a camera using a solid-state imaging device as an example of an electronic device according to the present technology. The camera according to this embodiment is an example of a video camera capable of capturing still images or moving images. This camera 91 includes a solid-state imaging device 1, an optical system 93 that guides incident light to a light receiving sensor section of the solid-state imaging device 1, a shutter device 94, a driving circuit 95 that drives the solid-state imaging device 1, and a solid-state imaging device 1. and a signal processing circuit 96 for processing the output signal of.

The solid-state imaging device 1 is a solid-state imaging device having the configuration described in the above first to fifth embodiments. An optical system (optical lens) 93 forms an image of image light (incident light) from a subject on the imaging surface of the solid-state imaging device 1 . A plurality of pixels are arranged on the imaging surface, and incident light from the optical system 93 is guided to photoelectric conversion regions of the solid-state imaging device that constitute the pixels. As a result, signal charges are accumulated in the photoelectric conversion area of the solid-state imaging device 1 for a certain period of time. Such an optical system 93 may be an optical lens system composed of a plurality of optical lenses. The shutter device 94 controls a light irradiation period and a light shielding period for the solid-state imaging device 1 . The drive circuit 95 supplies drive signals to the solid-state imaging device 1 and the shutter device 94, and controls the signal output operation to the signal processing circuit 96 of the solid-state imaging device 1 and the shutter device according to the supplied drive signals (timing signals). 94 shutter operation. That is, the drive circuit 95 performs signal transfer operation from the solid-state imaging device 1 to the signal processing circuit 96 by supplying a drive signal (timing signal). The signal processing circuit 96 performs various signal processing on the signal transferred from the solid-state imaging device 1 . The video signal that has undergone signal processing is stored in a storage medium such as a memory, or is output to a monitor.

According to the electronic device according to the present embodiment described above, by including the solid-state imaging device with excellent imaging characteristics described in each of the embodiments described above, high-definition imaging can be achieved in the electronic device having the imaging function. becomes possible.

Note that the present technology can also take the following configuration.

(1)
a semiconductor layer having a light-receiving surface on one main surface side and a plurality of pixels set along the light-receiving surface;
a photoelectric conversion unit provided in the semiconductor layer for each pixel;
an insulating layer provided in a groove pattern formed on the light-receiving surface side of the semiconductor layer, and a groove-type element isolation provided at a position shifted from a pixel boundary between the pixels. A solid-state imaging device.

(2)
The solid-state imaging device according to (1) above, wherein a direction in which the trench isolation is shifted from the pixel boundary depends on a wavelength of light intended to be received in each pixel.

(3)
Above the light-receiving surface of the semiconductor layer, a light-shielding film having an opening opening above the photoelectric conversion unit and patterned to have a line width centering on the pixel boundary is provided. Or the solid-state imaging device according to (2).

(4)
The solid-state imaging device according to (3), wherein the groove-type element isolation is covered with the light shielding film.

(5)
The solid state according to any one of the above (1) to (4), wherein color filters of each color are provided above the light-receiving surface of the semiconductor layer and patterned so that the center thereof coincides with the center of the pixel. Imaging device.

(6)
The solid-state imaging device according to any one of (1) to (5), wherein an on-chip lens is provided above the light-receiving surface of the semiconductor layer and is patterned so that the center of the pixel coincides with the center of the pixel. Device.

(7)
The groove type element isolation according to any one of the above (1) to (6), wherein, among the pixels arranged adjacent to each other, the groove type element isolation is displaced in the direction of a pixel having a longer wavelength of light to be received. Solid-state imaging device.

(8)
The solid-state imaging device according to (7) above, wherein the groove type element isolation includes a light shielding film embedded in the center of the groove pattern.

(9)
The solid-state imaging device according to any one of (1) to (8) above, wherein the trench isolation is formed in multiple stages so that the pattern width increases on the light receiving surface side.

(10)
The solid-state imaging device according to (9), wherein at least a portion of the groove-type element isolation on the light-receiving surface side is shifted with respect to the pixel boundary.

(11)
The groove type isolation according to any one of the above (1) to (6), wherein, among the pixels arranged adjacent to each other, the groove type element isolation is provided shifted in the direction of the pixel for which the wavelength of the light to be received is short. Solid-state imaging device.

(12)
In the above (1) to (11), the semiconductor layer includes an isolation region formed of an impurity region on the pixel boundary extending from the surface opposite to the light receiving surface to the trench isolation. The solid-state imaging device according to any one of the above.

(13)
a semiconductor layer having a light-receiving surface on one main surface side and a plurality of pixels set along the light-receiving surface;
a photoelectric conversion unit provided in the semiconductor layer for each pixel;
a groove-type element isolation configured by providing an insulating layer in a groove pattern formed on the light-receiving surface side of the semiconductor layer and provided at a position shifted with respect to a pixel boundary between the pixels;
and an optical system for guiding incident light to the photoelectric conversion unit.

Reference Signs List 1-1, 1-2, 1-3, 1-4, 1-5 Solid-state imaging device 3 Pixel 3a Pixel boundary 20 Semiconductor layer 20a Groove pattern 21 Separation region 23 Photoelectric conversion unit 25, 45, 47, 49, 51 Groove element isolation 31 Protective insulating layer 33 Insulating layer 35 Light shielding film 35a Opening 39 Color filter 41 On-chip lens , 91... camera (electronic device), 93... optical system, S... light receiving surface, φ... pixel center

Claims (17)

a semiconductor substrate having a first surface serving as a light incident surface;
a first photoelectric conversion part that photoelectrically converts light in a first wavelength band provided inside the semiconductor substrate and located between the first groove part and the second groove part in a cross-sectional view;
Photoelectrically emits light in a second wavelength band located between the second groove portion and the third groove portion in the cross-sectional view, adjacent to the first photoelectric conversion portion, and having a center wavelength longer than the center wavelength of the first wavelength band. a second photoelectric conversion unit that converts;
a first light shielding portion, a second light shielding portion, and a third light shielding portion provided on the first surface of the semiconductor substrate in the cross-sectional view;
The second light shielding part is provided between the first light shielding part and the third light shielding part,
a first distance from the center of the first light shielding portion to the center of the second light shielding portion is shorter than a second distance from the center of the first groove portion to the center of the second groove portion;
a third distance from the center of the second light shielding portion to the center of the third light shielding portion is longer than a fourth distance from the center of the second groove portion to the center of the third groove portion;
the second distance is longer than the fourth distance,
a fifth distance from the center of the first groove portion to the center of the first light shielding portion is shorter than the fourth distance;
The first distance and the third distance are the same length
Solid-state imaging device. The solid-state imaging device according to claim 1, wherein the first distance, the second distance, the third distance, the fourth distance, and the fifth distance extend in a direction parallel to the first surface. 3. The solid-state imaging device according to claim 1, wherein the first photoelectric conversion section is provided between the first light shielding section and the second light shielding section. 4. The solid-state imaging device according to any one of claims 1 to 3 , wherein the second photoelectric conversion section is provided between the second light shielding section and the third light shielding section. The center of the first light shielding portion and the center of the first groove portion according to any one of claims 1 to 4, wherein the center of the first light shielding portion and the center of the first groove portion are displaced in a first direction parallel to the semiconductor substrate in the cross-sectional view. Solid-state imaging device. 6. The solid-state imaging device according to claim 5 , wherein the center of the third light shielding portion and the center of the third groove are shifted in the first direction. The solid-state imaging device according to claim 1, wherein the centers of the first light shielding portion, the second light shielding portion, and the third light shielding portion are the centers in the horizontal direction of the semiconductor substrate in the cross-sectional view. The solid-state imaging device according to claim 1, wherein the centers of the first groove, the second groove, and the third groove are the centers in the horizontal direction of the semiconductor substrate in the cross-sectional view. The first light shielding portion, the second light shielding portion, and the third light shielding portion each include at least one metal selected from tungsten, aluminum, titanium nitride, and titanium, according to any one of claims 1 to 8 . solid-state imaging device. The solid-state imaging device according to any one of claims 1 to 9 , further comprising a first insulating layer provided on the first surface of the semiconductor substrate. 11. The solid-state imaging device according to claim 10 , wherein said first insulating layer contains at least one oxide of hafnium, aluminum, tantalum and titanium. 12. The solid-state imaging device according to claim 10, wherein the first insulating layer is provided inside the first groove, the second groove, and the third groove. 13. The solid-state imaging device according to any one of claims 1 to 12 , wherein a wiring layer is provided on the side of the semiconductor substrate opposite to the first surface. 14. The solid-state imaging device according to any one of claims 1 to 13 , wherein a plurality of transistors are provided on the side of the semiconductor substrate opposite to the first surface. The solid-state imaging device according to any one of Claims 1 to 14 , wherein the first groove, the second groove, and the third groove are provided on the first surface side. 16. Of any of claims 1 to 15 , further comprising an isolation region provided between the first photoelectric conversion section and the second photoelectric conversion section and provided at least on a surface side of the semiconductor substrate opposite to the first surface of the semiconductor substrate. The solid-state imaging device according to any one of items 1 to 3. A solid-state imaging device according to any one of claims 1 to 16 ;
an optical system that guides incident light to the first photoelectric conversion unit and the second photoelectric conversion unit in the solid-state imaging device;
and a signal processing circuit that processes an output signal of the solid-state imaging device.

Images