JP7163778B2 - semiconductor equipment - Google Patents

Description

The present specification relates to a semiconductor device in which a plurality of semiconductor modules and a plurality of coolers in which coolant flows are stacked.

A semiconductor device is known in which a plurality of semiconductor modules and a plurality of coolers in which coolant flows are stacked. Patent Documents 1 and 2 disclose an example of such a semiconductor device. In the semiconductor devices disclosed in Patent Documents 1 and 2, a plurality of dummy semiconductor modules that do not generate heat are stacked in addition to a plurality of semiconductor modules and a plurality of coolers. In the semiconductor device of Patent Document 1, semiconductor modules and dummy semiconductor modules are alternately stacked. A cooler is arranged between each semiconductor module and the dummy semiconductor module.

JP-A-2005-332863 JP 2011-125083 A

If the flow rate of the refrigerant flowing through the cooler is large, the cooling performance is maintained. However, the cooling performance is degraded due to the increase in the viscosity of the coolant and the decrease in the flow rate of the coolant due to the influence of low temperatures and the like. Also, during the motor lock, the amount of heat generated by one specific semiconductor module may become larger than usual. In that case, the heat must be exhausted only by the cooler that is in contact with the specific semiconductor module, and there is a risk that the cooling efficiency for the semiconductor module that generates a large amount of heat will decrease due to the local temperature rise of the coolant. . The present specification provides a technique capable of ensuring sufficient cooling performance even when the coolant flow rate is reduced or the motor is locked.

A semiconductor device disclosed in this specification is a device in which a plurality of semiconductor modules and a plurality of coolers in which coolant flows are stacked. Coolers are arranged on both sides of each semiconductor module in the stacking direction of the plurality of semiconductor modules and the plurality of coolers. Grease is filled between the coolers that are adjacent without sandwiching the semiconductor module.

Since the space between the coolers is filled with grease, the heat generated from the semiconductor module is exhausted not only to the coolers arranged on both sides of the semiconductor module but also to the adjacent coolers through the grease. As a result, sufficient cooling performance can be ensured even when the flow rate of the refrigerant is reduced or when the motor is locked.

In addition, since the semiconductor device disclosed in this specification is compressed by filling grease between coolers that are in contact with each other, it can be made smaller than a semiconductor device configured by arranging a semiconductor module and a dummy semiconductor module at intervals. .

Details and further improvements of the technique disclosed in this specification are described in the following "Mode for Carrying Out the Invention".

1 is a block diagram of a power system of an electric vehicle including the semiconductor device of the first embodiment; FIG. 1 is a perspective view of a semiconductor module; FIG. 1A and 1B are a plan view and a front view of a semiconductor device (laminated unit) according to a first embodiment; FIG. FIG. 3 is a cross-sectional view of the lamination unit of the first embodiment cut along a plane parallel to the XY plane; FIG. 10 is a cross-sectional view of the lamination unit of the second embodiment cut along a plane parallel to the XY plane;

(First Embodiment) A semiconductor device according to a first embodiment will be described with reference to FIGS. 1 to 4. FIG. The semiconductor device of the first embodiment is a laminated unit used in the power converter of the electric vehicle 100. FIG. Before explaining the laminated unit, the overall circuit configuration of the power converter 2 in which the laminated unit is used will be explained. FIG. 1 shows a block diagram of a power system of an electric vehicle 100 including a power converter 2. As shown in FIG. The electric vehicle 100 includes motors 93a and 93b for running. The power converter 2 is a device that converts the DC power of the battery 91 into drive power for the motors 93a and 93b for running. The outputs of the two traveling motors 93a and 93b are combined in a gearbox 95 and transmitted to an axle 96 (that is, driving wheels).

Power converter 2 is connected to battery 91 via system main relay 92 . The power converter 2 includes a voltage converter circuit 12 that boosts the voltage of the battery 91, and two sets of inverter circuits 13a and 13b that convert the boosted DC power into AC power. The first inverter circuit 13a generates driving power for the motor 93a, and the second inverter circuit 13b generates driving power for the motor 93b.

The voltage converter circuit 12 boosts the voltage applied to the battery side terminal and outputs it to the inverter side terminal, and steps down the voltage applied to the inverter side terminal and outputs it to the battery side terminal. It is a bidirectional DC-DC converter capable of both step-down operations. For convenience of explanation, the terminal on the battery side (low voltage side) is hereinafter referred to as input terminal 18 , and the terminal on the inverter side (high voltage side) is referred to as output terminal 19 . Also, the positive and negative terminals of the input terminal 18 are referred to as an input positive terminal 18a and an input negative terminal 18b, respectively. The positive and negative terminals of the output terminal 19 are referred to as an output positive terminal 19a and an output negative terminal 19b, respectively. The notations “input terminal 18” and “output terminal 19” are for convenience of explanation. Power may flow from 19 to input 18 .

The voltage converter circuit 12 includes a series circuit of two switching elements 9a and 9b, a reactor 7, a filter capacitor 5, and diodes connected in anti-parallel to each switching element. One end of the reactor 7 is connected to the input positive terminal 18a, and the other end is connected to the midpoint of the series circuit. Filter capacitor 5 is connected between input positive terminal 18a and input negative terminal 18b. The input negative terminal 18b is directly connected to the output negative terminal 19b. The switching element 9b is mainly involved in the step-up operation, and the switching element 9a is mainly involved in the step-down operation. Since the voltage converter circuit 12 of FIG. 1 is well known, detailed description thereof will be omitted. It should be noted that a circuit within a dashed rectangle indicated by reference numeral 8a corresponds to a semiconductor module 8a, which will be described later. Reference numerals 11a, 11b, and 11c indicate terminals extending from the semiconductor module 8a. Reference numeral 11a indicates a terminal (positive terminal 11a) electrically connected to the positive side of the series circuit of the switching elements 9a and 9b. Reference numeral 11b denotes a terminal (negative terminal 11b) electrically connected to the negative side of the series circuit of the switching elements 9a and 9b. Reference numeral 11c indicates a terminal (midpoint terminal 11c) electrically connected to the midpoint of the series circuit of the switching elements 9a and 9b.

The first inverter circuit 13a has a configuration in which three sets of series circuits of two switching elements are connected in parallel. The switching elements 9c and 9d, the switching elements 9e and 9f, and the switching elements 9g and 9h form series circuits, respectively. A diode is connected in anti-parallel to each switching element. The dashed rectangular range indicated by reference numerals 8b to 8d is a semiconductor module having the same structure as the semiconductor module 8a. That is, each of the three sets of series circuits is implemented by a semiconductor module having the same structure as semiconductor module 8a. The positive terminal (positive terminal 11a) of the three series circuits is connected to the output positive terminal 19a of the voltage converter circuit 12, and the negative terminal (negative terminal 11b) of the three series circuits is connected to the voltage converter circuit. 12 is connected to the output negative terminal 19b. A three-phase alternating current (U-phase, V-phase, W-phase) is output from the midpoint terminals of the three sets of series circuits.

Since the configuration of the second inverter circuit 13b is the same as that of the first inverter circuit 13a, illustration of a specific circuit is omitted in FIG. Like the first inverter circuit 13a, the second inverter circuit 13b also has a configuration in which three sets of series circuits of two switching elements are connected in parallel. The positive terminals of the three sets of series circuits are connected to the output positive terminal 19 a of the voltage converter circuit 12 , and the negative terminals of the three series circuits are connected to the output negative terminal 19 b of the voltage converter circuit 12 . there is Hardware corresponding to each series circuit is called semiconductor modules 8e, 8f, and 8g.

A smoothing capacitor 6 is connected in parallel to the input terminals of the inverter circuits 13a and 13b. In other words, the smoothing capacitor 6 is connected in parallel with the output end 19 of the voltage converter circuit 12 . Smoothing capacitor 6 removes pulsation of the current flowing between voltage converter circuit 12 and inverter circuits 13a and 13b.

The switching elements 9a-9h are transistors, typically IGBTs (Insulated Gate Bipolar Transistors), but may be other transistors such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Moreover, the switching element here is used for power conversion, and is sometimes called a power semiconductor element. The same applies to the switching elements included in the semiconductor modules 8e-8g.

In FIG. 1, dashed lines 8a to 8g correspond to semiconductor modules. The power converter 2 has seven sets of series circuits of two switching elements. As hardware, two switching elements forming a series circuit and diodes connected in anti-parallel to each switching element are accommodated in one package (semiconductor module).

The positive terminal (positive terminal 11a) of the seven semiconductor modules (seven sets of series circuits) is connected to the positive electrode of the smoothing capacitor 6, and the negative terminal (negative terminal 11b) is connected to the negative electrode of the smoothing capacitor 6. Connected.

The midpoint terminals of the semiconductor modules 8b-8d are connected to the motor 93a, and the midpoint terminals of the semiconductor modules 8e-8g are connected to the motor 93b. Midpoint terminals of the six semiconductor modules 8b-8g are connected to a power cable 97 extending from the motors 93a, 93b.

The power converter 2 has a control circuit 3 . The control circuit 3 receives commands from a host controller (not shown) and controls the switching elements of the semiconductor modules 8a to 8g.

FIG. 2 shows a perspective view of the semiconductor module 8a. The semiconductor module 8a is a device in which two semiconductor chips 82a and 82b are embedded inside a package 81 made of resin. The package 81 is flat and has a wide side 811 and a narrow side 812 . The narrow surface 812 is a surface that intersects with the wide surface 811 . The semiconductor chip 82a implements the switching element 9a of FIG. 1 and a diode connected in antiparallel thereto. The semiconductor chip 82b implements the switching element 9b of FIG. 1 and a diode connected in antiparallel thereto. The semiconductor chips 82a and 82b are connected in series inside the package 81, and the positive and negative sides of the series connection are electrically connected to the positive terminal 11a and the negative terminal 11b, respectively. The midpoint of the series connection of the two semiconductor chips 82a and 82b is electrically connected to the midpoint terminal 11c. In other words, the semiconductor module 8a accommodates a series connection of two switching elements 9a and 9b inside a package 81, and a positive electrode terminal 11a electrically connected to the positive electrode side of the series connection and a negative electrode side. It has a negative electrode terminal 11b that is conducting, and a middle point terminal 11c that is conducting with the middle point of the series connection. Three terminals 11 a - 11 c extend from narrow side 812 . Control terminals 84a, 84b extend from the narrow side opposite to narrow side 812 on which terminals 11a-11c are provided. The control terminals 84a are a group of terminals connected to the gate of the switching element 9a of the semiconductor chip 82a and the temperature sensor, and the control terminals 84b are a group of terminals connected to the gate of the switching element 9b of the semiconductor chip 82b and the temperature sensor. Other semiconductor modules 8b-8g have similar structures.

A switching element for power conversion generates a large amount of heat. That is, the semiconductor modules 8a-8g generate a large amount of heat. In order to efficiently cool the seven semiconductor modules 8a to 8g, the power converter 2 includes a stacked unit 20 in which the semiconductor modules 8a to 8g are integrated. The lamination unit 20 corresponds to the semiconductor device of the first embodiment. Hereinafter, any one of the semiconductor modules 8a to 8g will be referred to as a semiconductor module 8 when indicated without distinction.

The laminated unit 20 is a device in which a plurality of semiconductor modules 8 and a plurality of coolers 23 are laminated. 3A shows a plan view of the lamination unit 20, and FIG. 3B shows a front view of the lamination unit 20. As shown in FIG. A plurality of semiconductor modules 8 and a plurality of coolers 23 are stacked in the X direction of the coordinate system in the figure. Below, the X direction of the coordinate system in the drawing may be referred to as the stacking direction.

In the stacked unit 20, the coolers 23 are in contact with the wide surfaces on both sides of each of the plurality of semiconductor modules 8, and a plurality of sets of two coolers 23 and one semiconductor module 8 are configured. It has a structure in which sets are stacked. In FIG. 3A, the middle portion of the stacked unit 20 is omitted, and the illustration of the semiconductor modules 8b, 8c, and 8d and the cooler 23 adjacent to them is omitted.

The lamination unit 20 has a coolant supply pipe 21 and a coolant discharge pipe 22 . The coolant supply pipe 21 penetrates the plurality of coolers 23 in the stacking direction and communicates with each cooler 23 . The refrigerant discharge pipe 22 also penetrates the plurality of coolers 23 in the stacking direction and communicates with each cooler 23 . The coolant supply pipe 21 and the coolant discharge pipe 22 are positioned on both sides of the semiconductor module 8 when viewed from the stacking direction.

A coolant is supplied to each cooler 23 through a coolant supply pipe 21 , passes through the inside of each cooler 23 , and is discharged from a coolant discharge pipe 22 . The coolers 23 are flat, and are arranged so that the wide faces of the two coolers 23 face one wide face 811 (see FIG. 2) of the semiconductor module 8 and the opposite wide face. That is, two coolers 23 are arranged so as to be in contact with both sides of the semiconductor module 8 . Hereinafter, the semiconductor module 8 and the two coolers 23 arranged on both sides thereof will be referred to as a cooler set. The plurality of semiconductor modules 8 and the plurality of coolers 23 are arranged such that the cooler sets are aligned in the X direction (that is, stacking direction) of the coordinate system in the drawing. The part where the two cooler sets are in contact, that is, the wide side of the cooler of one cooler set that is not in contact with the semiconductor module 8 and the wide side of the cooler of the other cooler set that contacts the semiconductor module 8 Grease 24 is filled between the non-contact surfaces.

FIG. 4 shows a cross-sectional view of the lamination unit 20 cut along a plane parallel to the XY plane of the coordinate system in the figure. Reference numeral 25 in FIG. 4 indicates a cooler set. In FIG. 4, thick arrows indicate the flow of the refrigerant. Furthermore, in FIG. 4, reference numerals such as "8b" are omitted for semiconductor modules other than the semiconductor modules 8a, 8c, and 8g. Only in the semiconductor module 8g, reference numerals 82a and 88b are attached to the internal semiconductor chips, and the reference numerals to the semiconductor chips are omitted in the other semiconductor modules. Furthermore, reference numerals 23a to 23d are attached to the coolers in the vicinity of the semiconductor module 8c to distinguish them from other coolers.

A coolant is supplied from the coolant supply pipe 21 . The supplied coolant flows into each cooler 23 . The coolant absorbs heat generated in the semiconductor module 8 through the cooler 23 and is discharged to the coolant discharge pipe 22 .

If the flow rate of the refrigerant flowing through the cooler 23 is large, the cooling performance is maintained. However, there is a possibility that the cooling performance may deteriorate due to the increase in the viscosity of the refrigerant and the decrease in the flow rate of the refrigerant due to the influence of low temperature or the like.

In FIG. 4, the heat exhaust path of the heat generated in the semiconductor module 8c is indicated by a dashed arrow. The heat generated in the semiconductor module 8c is exhausted to the wide surface 811 and the two coolers 23a and 23b arranged to face the opposite wide surface. Grease 24 is filled between the cooler 23a and the cooler 23c in contact therewith, and between the cooler 23b and the cooler 23d in contact therewith. The heat of the semiconductor module 8c is exhausted to the coolers 23c and 23d through the grease 24 as well. In this way, more coolers 23 play the role of absorbing the heat generated in the semiconductor modules 8c, so that the temperature rise of the coolant becomes moderate. That is, even when the viscosity of the coolant increases and the flow rate of the coolant decreases due to the influence of low temperatures, the lamination unit 20 can ensure sufficient cooling performance.

The lamination unit 20 of the first embodiment can ensure sufficient cooling performance even when the motor is locked. Motor lock means a situation in which the wheels do not rotate even though the motor is outputting torque. Motor lockup occurs, for example, in a situation where the wheel is about to run over the wheel chock. The inverter circuits 13a and 13b output three-phase AC power while the vehicle is running. However, during motor lock, the motor does not rotate, so each of the three phases has a constant current. Therefore, during motor lock, any of the three phases can have a high constant current. That is, when the motor is locked, the amount of heat generated by any one of the stacked semiconductor modules 8 may become larger than usual. The temperature of the refrigerant flowing through the cooler 23 rises significantly, and the temperature of the refrigerant flowing through the other coolers 23 hardly changes. In other words, there is a risk that the cooling efficiency will decrease due to the local temperature rise of the coolant.

For example, when the amount of heat generated by the semiconductor module 8c is locally increased, as described above, the heat of the semiconductor module 8c is transferred not only to the adjacent coolers 23a and 23b, but also to the adjacent cooling units through the grease 24. The heat is also exhausted to the vessels 23c and 23d. In this way, more coolers 23 can absorb the heat generated by the semiconductor modules 8c, so the lamination unit 20 can ensure sufficient cooling performance even when the motor is locked.

(Second Embodiment) A laminated unit 20a of a second embodiment will be described with reference to FIG. FIG. 5 shows a cross-sectional view of the lamination unit 20a. FIG. 5 is a cross-sectional view of the laminated unit 20a cut along a plane parallel to the XY plane of the coordinate system in the figure, as in FIG. The laminated unit 20a in the second embodiment is also used as part of the power converter 2 of the electric vehicle 100. FIG. However, in the case of the second embodiment, in the power converter 2, the motor 93a connected to the inverter circuit 13a has a smaller output than the motor 93b. In the power converter 2, the semiconductor modules 8e to 8g used in the inverter circuit 13b have the largest output, and the semiconductor module 8a used in the voltage converter circuit 12 has the second largest output. The output of 8b-8d is the smallest. That is, the amount of heat generated by the semiconductor modules 8e-8g is greater than that of the other semiconductor modules 8a-8d. Also, the amount of heat generated by the semiconductor modules 8b-8d is smaller than that of the other semiconductor modules 8a, 8e-8g.

In FIG. 5, reference numerals 23a to 23l are attached to each of the plurality of coolers 23 in order to distinguish them individually. In the stacked unit 20, the semiconductor modules 8e to 8g used for the second inverter circuit 13b, which generates the largest amount of heat, are arranged at one end in the stacking direction (the X direction of the coordinate system in the figure). In the stacked unit 20a, the semiconductor module 8a used for the voltage converter circuit 12, which generates the next largest amount of heat, is arranged at the other end in the stacking direction. In the stacked unit 20a, the semiconductor modules 8b to 8d used for the first inverter circuit 13a, which generates the least amount of heat, are arranged in the central portion in the stacking direction.

As for the semiconductor modules 8a, 8e-8g used in the voltage converter circuit 12 and the second inverter circuit 13b, the wide surface 811 of each semiconductor module 8 and the opposite wide surface are formed in the same manner as in the stacked unit 20 of the first embodiment. , is arranged to face the wide surface of the cooler 23. Also here, the semiconductor module 8 and the two coolers 23 arranged on both sides thereof are referred to as a cooler set 25 . In the stacked unit 20a, cooler sets 25a, 25b, 25c and 25d are configured for the four semiconductor modules 8a, 8e, 8f and 8g, respectively. Grease 24 is filled between adjacent cooler sets.

Between the cooler set 25a and the cooler set 25b, the semiconductor modules 8b-8d and the coolers 23c-23f are alternately stacked one by one. For the semiconductor modules 8b to 8d that generate a small amount of heat, the semiconductor modules 8 are adjacent to both sides of the cooler without forming a cooler set. However, since the cooler set 25a is adjacent to the cooler 23c, the grease 24 is filled between them. Similarly, since the cooler set 25b is adjacent to the cooler 23f, the grease 24 is filled between them.

In the stacked unit 20a, the cooler set 25 is configured for the semiconductor modules 8a and 8e-8g with large heat generation to ensure a large cooling capacity, and the semiconductor modules 8b-8d with small heat generation are provided with coolers. Alternate 23.

When there is a difference in the amount of heat generated among a plurality of semiconductor modules 8, by devising the arrangement of the semiconductor modules 8 and the arrangement of the cooler 23, sufficient cooling performance can be obtained for the semiconductor modules that generate a large amount of heat. is ensured, the number of coolers 23 can be reduced. That is, miniaturization and cost reduction of the laminated unit can be realized.

Although specific examples of the technology disclosed in this specification have been described above in detail, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or in the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques exemplified in this specification or drawings can simultaneously achieve a plurality of purposes, and achieving one of them has technical utility in itself.

2: Power converter 3: Control circuit 5, 6: Capacitor 7: Reactor 8, 8a-8g: Semiconductor module 9a-9h: Switching element 12: Voltage converter circuit 13a, 13b: Inverter circuit 20, 20a: Laminated unit (semiconductor Device)
21: Coolant supply pipe 22: Coolant discharge pipe 23: Cooler 24: Grease 25: Cooler set 81: Packages 82a, 82b: Semiconductor chips 84a, 84b: Control terminal 100: Electric vehicle

Claims (1)

A semiconductor device in which a plurality of semiconductor modules and a plurality of coolers in which a coolant flows are stacked,
The coolers are arranged on both sides of each of the semiconductor modules in a stacking direction of the plurality of semiconductor modules and the plurality of coolers,
A coolant supply pipe and a coolant discharge pipe positioned so as to sandwich the semiconductor module when viewed from the stacking direction, pass through the plurality of coolers in the stacking direction, and communicate with the respective coolers. The refrigerant supply pipe and the refrigerant discharge pipe are provided,
Grease is filled between the adjacent coolers,
semiconductor device.

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