JP7154872B2 - Digital oscilloscope and its control method - Google Patents

Description

The present disclosure relates to a digital oscilloscope and its control method.

2. Description of the Related Art Conventionally, a digital trigger type digital oscilloscope is known.

The digital trigger method binarizes digital data obtained by A/D converting an input signal with a predetermined sampling clock, and generates a trigger based on a change in the binarized data. Therefore, the time resolution of trigger determination is the cycle of the sampling clock.

However, since the input signal is asynchronous to the sampling clock, the true trigger point can be the time between sample points. Here, the "true trigger point" is the time at which the input signal exceeds the trigger threshold.

When the waveform of the input signal is drawn on the digital oscilloscope display, the time difference between the trigger occurrence point and the true trigger point is calculated, and the display is shifted by the amount of the time difference. A waveform can be drawn at a position.

For example, Patent Literature 1 discloses a method of calculating a true trigger point by generating further sample points by interpolation between sample points.

Further, Patent Literature 2 discloses a method of applying data near a trigger generation point to an equation and solving the equation to calculate a true trigger point.

Japanese Patent No. 5607301 Japanese Patent No. 4723030

The method of calculating the true trigger point described in Patent Document 1 and Patent Document 2 has a problem that the calculated true trigger point is biased toward a specific value when the slew rate of the input signal is slow. .

Therefore, an object of the present disclosure is to provide a digital oscilloscope and a control method thereof that can prevent a calculated true trigger point from biasing toward a specific value when the slew rate of an input signal is slow. do.

A digital oscilloscope according to some embodiments includes an AD converter that converts an analog input signal into digital data, a threshold generation circuit that generates a variable threshold by varying a trigger threshold set by a user, the digital data and the a digital comparator that compares a variation threshold and outputs a binary signal; a trigger output circuit that outputs a trigger signal based on the binary signal; the digital data at timings before and after the trigger signal is output; and a time measurement circuit for calculating a true trigger point based on the variation threshold. According to such a digital oscilloscope, when the slew rate of the input signal is slow, it is possible to prevent the calculated true trigger point from biasing toward a specific value. More specifically, the threshold generation circuit varies a trigger threshold set by a user to generate a variation threshold, and the time measurement circuit generates digital data before and after the trigger signal is output, and the variation threshold. to calculate the true trigger point. Therefore, even if the slew rate of the input signal is slow near the trigger threshold and the digital data before and after the trigger signal is output has the same value, the calculated true trigger point may be biased toward a specific value. There is no

In the digital oscilloscope according to one embodiment, the threshold generation circuit includes a random number generation circuit that generates a random number, and uses the random number to randomly vary the trigger threshold to generate a random threshold as the variation threshold. You may By using random numbers in this way, the threshold generating circuit can randomly vary the trigger threshold.

In one embodiment, the threshold generating circuit further includes a first adder, and the first adder adds the random number to the value based on the trigger threshold to randomly set the trigger threshold. can be changed to In this manner, the first adder adds a random number to the value based on the trigger threshold, so that the threshold generation circuit can easily vary the trigger threshold at random.

In the digital oscilloscope according to one embodiment, the first adder adds the random number smaller than the LSB (Least Significant Bit) of the digital data to the trigger threshold to randomly vary the trigger threshold. may By adding a random number smaller than the LSB of the digital data in this way, the binary signal output by the digital comparator can be prevented from being affected by the random number.

In a digital oscilloscope according to one embodiment, the first adder adds the random number smaller than the LSB of the digital data to a value obtained by truncating a value smaller than the LSB of the digital data from the trigger threshold. , the trigger threshold may be varied randomly. Thus, by adding a random number smaller than the LSB of the digital data to a value obtained by truncating the value smaller than the LSB of the digital data, the binary signal output by the digital comparator is not affected by the random number. be able to.

In a digital oscilloscope according to one embodiment, the first adder truncates lower bits from the trigger threshold, adds the random number corresponding to the truncated lower bits, and randomly varies the trigger threshold. You may let This allows the threshold generation circuit to easily vary the trigger threshold randomly.

In the digital oscilloscope according to one embodiment, the first adder may add the random number corresponding to the lower bits of the trigger threshold to randomly vary the trigger threshold. This allows the threshold generation circuit to easily vary the trigger threshold randomly.

The digital oscilloscope according to one embodiment may further include a second adder, wherein the second adder randomly varies the true trigger point calculated by the time measurement circuit. By randomly varying the true trigger point in this way, the trigger point can be varied with fine time resolution.

In the digital oscilloscope according to one embodiment, the second adder may randomly vary the true trigger point using a random number. This makes it possible to easily vary the true trigger point randomly.

The digital oscilloscope according to one embodiment may further include a latch circuit that latches and holds the fluctuation threshold at that time when the trigger signal is received from the trigger output circuit. As a result, immediately after the trigger is generated, preparations can be made for generating the fluctuation threshold for the next data acquisition.

The digital oscilloscope according to one embodiment may further include a display that displays a waveform based on the digital data. As a result, a user-friendly display waveform can be displayed on the display.

In the digital oscilloscope according to one embodiment, the digital oscilloscope may be a digital oscilloscope that performs equivalent sampling by a random sampling method.

In the digital oscilloscope according to one embodiment, the digital oscilloscope may be a digital oscilloscope that enlarges and displays so that the display resolution of the time axis is finer than the sampling resolution.

A method of controlling a digital oscilloscope according to some embodiments includes the steps of converting an analog input signal into digital data, varying a trigger threshold set by a user to generate a varying threshold, the digital data and the outputting a binary signal by comparing with a fluctuation threshold; outputting a trigger signal based on the binary signal; said digital data at timings before and after said trigger signal is outputted; and said fluctuation threshold. and calculating a true trigger point based on and. According to such a digital oscilloscope control method, when the slew rate of the input signal is slow, it is possible to prevent the calculated true trigger point from biasing toward a specific value. More specifically, a step of randomly varying a trigger threshold set by a user to generate a random threshold; digital data before and after the trigger signal is output; and calculating the trigger point, even if the slew rate of the input signal is slow near the trigger threshold and the digital data before and after the trigger signal is output has the same value, the calculated true value can be obtained. can be prevented from biasing the trigger point to a particular value.

According to the present disclosure, it is possible to provide a digital oscilloscope and its control method that can prevent the calculated true trigger point from biasing toward a specific value when the slew rate of the input signal is slow.

FIG. 5 is a block diagram showing a schematic configuration of a digital trigger circuit according to a comparative example; FIG. 8 is a diagram showing an example of how the time measurement circuit according to the comparative example calculates a true trigger point; FIG. 10 is a diagram showing how sample data is stored in a memory in a comparative example; FIG. 10 is a diagram showing how sample data is displayed with reference to a true trigger point in a comparative example; FIG. 10 is a diagram showing how sample data is stored in a memory for equivalent samples in a comparative example; FIG. 10 is a diagram showing an example of waveforms when the slew rate of an input signal is extremely slow in a comparative example; FIG. 10 is a diagram showing how sample data is stored in a memory in a comparative example; FIG. 10 is a diagram showing how sample data is displayed with reference to a true trigger point when the slew rate of the input signal is extremely slow in the comparative example. FIG. 10 is a diagram showing how sample data is stored in a memory for equivalent sampling when the slew rate of an input signal is extremely slow in a comparative example; FIG. 10 is a diagram showing how sample data is displayed with reference to a true trigger point when the slew rate of the input signal is extremely slow in the comparative example. 1 is a diagram showing a schematic configuration of a digital oscilloscope according to one embodiment; FIG. 1 is a diagram showing a schematic configuration of a digital trigger circuit according to one embodiment; FIG. It is a figure which shows a mode that a random threshold is produced|generated by adding a random number to a trigger threshold. FIG. 3 is a diagram showing an example of waveforms when the slew rate of an input signal is extremely slow; FIG. 4 is a diagram showing how sample data is stored in a primary memory; FIG. 10 is a diagram showing how sample data is displayed with reference to a true trigger point; FIG. 4 is a diagram showing how sample data is stored in a memory for equivalent samples; FIG. 10 is a diagram showing how sample data is displayed with reference to a true trigger point; FIG. 4 is a diagram showing an example of waveforms when the slew rate of an input signal is relatively high; 4 is a flow chart showing an example of the operation of the digital oscilloscope according to one embodiment; FIG. 10 illustrates another method of adding a random number to the trigger threshold to generate a random threshold; FIG. 10 illustrates another method of adding a random number to the trigger threshold to generate a random threshold; FIG. 10 illustrates another method of adding a random number to the trigger threshold to generate a random threshold; FIG. 10 illustrates another method of adding a random number to the trigger threshold to generate a random threshold; It is a figure which shows schematic structure of the digital trigger circuit based on a 1st modification. 9 is a flow chart showing an example of the operation of the digital trigger circuit according to the first modified example; FIG. 11 is a diagram showing a schematic configuration of a digital trigger circuit according to a second modified example; FIG. 11 is a diagram showing a schematic configuration of a digital trigger circuit according to a third modified example;

(Comparative example)
First, a digital trigger circuit according to a comparative example will be described, and problems thereof will be described.

FIG. 1 is a diagram showing a schematic configuration of a digital trigger circuit 600 according to a comparative example. Digital trigger circuit 600 comprises digital comparator 610 , trigger output circuit 620 , trigger memory 630 and time measurement circuit 640 .

A digital trigger circuit 600 acquires sample data from an AD converter (ADC) 20 . Here, the sample data means data obtained by converting an analog input signal into digital data with a predetermined sampling clock by the AD converter 20 .

The AD converter 20 also outputs the sample data to the data acquisition processing circuit. The data acquisition processing circuit is a circuit that acquires sample data into memory. A circuit subsequent to the data fetch processing circuit performs secondary processing such as drawing based on the data fetched into the memory.

The digital trigger circuit 600 outputs the trigger generation point to a data acquisition processing circuit or the like. The data acquisition processing circuit acquires sample data in a predetermined time range based on the trigger generation point so as to be stored in the memory. The data acquisition processing circuit also controls the sample data stored in the memory based on the trigger generation point.

After calculating the true trigger point, the digital trigger circuit 600 outputs the true trigger point to the data processing circuit. The data processing circuit shifts the display data by the time difference between the trigger generation point and the true trigger point.

The digital comparator 610 compares sample data received from the AD converter 20 with a trigger threshold value, binarizes the data according to the comparison result, and outputs a binary signal. A trigger threshold is a value set by a user's operation.

The digital comparator 610 outputs, for example, "1" when the sample data is greater than the trigger threshold, and outputs "0" when the sample data is less than or equal to the trigger threshold.

Trigger output circuit 620 outputs a trigger signal based on the binary signal received from digital comparator 610 . The trigger output circuit 620 outputs a trigger signal, for example, at a rising edge when the signal received from the digital comparator 610 changes from "0" to "1". Trigger output circuit 620 outputs a trigger signal to trigger memory 630, time measurement circuit 640, data acquisition processing circuit, and the like. The time at which the trigger signal is output corresponds to the trigger generation point.

The trigger memory 630 stores a predetermined number of sample data received from the AD converter 20 . The trigger memory 630 is, for example, a ring buffer memory. Upon receiving the trigger signal from the trigger output circuit 620 , the trigger memory 630 outputs sample data of several points before and after the trigger generation point to the time measurement circuit 640 .

The time measurement circuit 640 calculates the true trigger point based on the sample data of several points before and after the trigger generation point received from the trigger memory 630 and the trigger threshold. The time measurement circuit 640 outputs the calculated true trigger point to the data processing circuit.

An example of how the time measurement circuit 640 calculates the true trigger point will be described with reference to FIG. In the example shown in FIG. 2, the trigger memory 630 outputs four sample data before and after the trigger generation point to the time measurement circuit 640. In the example shown in FIG. In the example shown in FIG. 2, the four sample data are sample N-2, sample N-1, sample N and sample N+1. Sample N is sample data at the trigger generation point. Sample N-2 and sample N-1 are sample data before the trigger generation point. Sample N+1 is the sample data after the trigger occurrence point.

In the example shown in FIG. 2, the time measurement circuit 640 calculates the true trigger point by calculating the intersection of the cubic equation F passing through the four sample data and the trigger threshold. In FIG. 2, Ts indicates the sampling clock interval, and Tt indicates the time from the trigger generation point to the true trigger point.

Since the true trigger point is between sample N−1 and sample N, Tt has a value in the range 0<TtTs. When the sampling clock and the input signal are asynchronous, Tt takes any value in the range of 0<TtTs.

FIG. 3 shows an example of how the sample data output from the AD converter 20 to the data fetch processing circuit is stored in the data fetch memory. FIG. 3 shows sample data stored during the Mth to M+3rd data fetching.

In the example shown in FIG. 3, the sample data immediately after the trigger is generated is sample N. As shown in FIG. Also, Tt of the M-th time to the M+3rd time is Ts, 0.5×Ts, 0.75×Ts, and 0.25×Ts, respectively.

FIG. 4 shows an example in which the data in FIG. 3 are displayed on the display with reference to the true trigger point. That is, in the example shown in FIG. 4, the data in FIG. 3 are shifted based on Tt, which indicates the time from the trigger occurrence point to the true trigger point. In FIG. 4, the circle, square, triangle, and star symbols correspond to the M-th, M+1-th, M+2-th, and M+3-th captured data shown in FIG. 3, respectively.

When the display is in the mode of displaying one waveform at a time, only the acquired data for each time is displayed. That is, only one data of circle, square, triangle and star is displayed. When the display is in overwrite mode, all acquired data is displayed. FIG. 4 shows an example displayed in overwriting mode.

When equivalent sampling is performed by the random sampling method, as shown in FIG. 5, the fetched sample data is stored in the slot corresponding to the time Tt of the memory for equivalent sampling.

Here, the random sampling method is a method in which the sampling clock and the input signal are asynchronous, so the time from the trigger generation point to the true trigger point fluctuates, and the sample data is stored in different slots for each waveform. . Equivalent sampling means that sample data is stored in slots provided at a period shorter than the sampling period, thereby making it appear that data is obtained at an equivalently high sampling frequency. For example, if the time interval between slots for storing sample data is set to 1/4 of the sampling period, it seems that the sampling frequency is equivalently quadrupled.

FIG. 5 shows a case where the slot time interval is 1/4 of the sampling period. In FIG. 5, the circle, square, triangle, and star symbols correspond to the M-th, M+1-th, M+2-th, and M+3-th captured data shown in FIG. 3, respectively.

When the values stored in the memory shown in FIG. 5 are displayed on the display, they are displayed as shown in FIG.

Next, problems of the digital trigger circuit 600 according to the comparative example will be described with reference to FIGS. 6 to 10. FIG.

FIG. 6 shows an example of waveforms when the slew rate of the input signal is extremely slow near the trigger threshold. In the example shown in FIG. 6, the input signal changes only by 1 LSB (Least Significant Bit) per sample near the trigger threshold. In this case, the sample data near the trigger generation point, that is, the values of sample N−2 to sample N+1 are the same data each time the trigger is applied. As a result, Tt also becomes Tt=Ts each time, and Tt becomes a fixed value.

In this case, the data stored in the memory for data acquisition is as shown in FIG. That is, Tt at the M-th to M+3rd data fetching is all Ts.

FIG. 8 shows an example in which the data in FIG. 7 are displayed on the display with reference to the true trigger point. FIG. 8 shows the Mth to M+3rd data in the overwrite mode, but since Tt=Ts for the captured data at any time, the data for all times are superimposed on the same point and displayed. there is

FIG. 9 shows a state in which the data shown in FIG. 7 are equivalently sampled and stored with a period of 1/4 of the sampling period. In this case, since only the slot of Tt=Ts is sequentially overwritten, only the last fetched data remains. Specifically, in the example shown in FIG. 9, only the M+3 times captured data remains in the slot of Tt=Ts.

FIG. 10 shows an example of displaying the data of FIG. 9 on the display with reference to the true trigger point. In this case, only the last captured data is displayed. In the example shown in FIG. 9, since the M+3th captured data is the last captured data, FIG. 10 only shows the data indicated by the star symbol.

The example described with reference to FIGS. 6 to 10 is an extreme example. can happen. In this case, the value of Tt is limited to several types. This is the same even if a method of interpolating between samples and calculating a true trigger point is adopted instead of a method of using a cubic expression passing through four sample data.

In a situation where the slew rate of the input signal is slow near the trigger threshold, if only the sample points are displayed in dots, even if the overwrite mode (persistence mode) is used, the samples are limited to only a limited number of positions. No dots appear. In addition, when equivalent sampling is performed by the random sampling method, data can be stored only in limited slots, so the slots will not be filled.

Therefore, when the slew rate of the input signal is slow near the trigger threshold, the true trigger point is biased toward a specific value, making it difficult to see the waveform displayed on the digital oscilloscope. Also, if the true trigger point is biased toward a specific value and the slots are not filled with equivalent samples, automatic measurement of the time axis system (for example, automatic measurement of frequency or period) may not be possible. Calculations for automatic measurement of the time axis system are performed by the CPU by reading out the captured data. A secondary data processing circuit (not shown) may perform the calculation of the automatic measurement of the time axis system.

Basically, when generating a trigger with an input signal asynchronous to the sampling clock, the value of Tt mentioned above should take any value between 0 and Ts. However, in the configuration shown in the comparative example, when the slew rate of the input signal is slow near the trigger threshold, there is a problem that Tt can only take several fixed values between 0 and Ts. .

(Digital oscilloscope of the present disclosure)
In view of the above problem, the present disclosure provides a digital oscilloscope and a control method thereof that can prevent the calculated true trigger point from biasing toward a specific value when the slew rate of the input signal is slow. for the purpose. An embodiment of the present disclosure will be mainly described below with reference to the accompanying drawings.

FIG. 11 is a diagram showing a schematic configuration of a digital oscilloscope 1 according to one embodiment. The digital oscilloscope 1 includes an input circuit 10, an AD converter (ADC) 20, a data acquisition processing circuit 30, a primary memory 40, a secondary data processing circuit 50, a secondary memory 60, and display data processing. It comprises a circuit 70 , a display memory 80 , a display 90 and a digital trigger circuit 100 .

The digital oscilloscope 1 is a digital oscilloscope that performs equivalent sampling at least by a random sampling method, or enlarges display so that the display resolution of the time axis is finer than the sampling resolution.

The input circuit 10 includes an attenuation circuit, a preamplifier, and the like. The input circuit 10 adjusts the amplitude of the analog input signal so that it falls within an appropriate range for the input specifications of the AD converter 20 , and outputs the amplitude-adjusted analog input signal to the AD converter 20 .

The AD converter 20 converts the analog input signal received from the input circuit 10 into digital data and outputs the digital data to the data acquisition processing circuit 30 and the digital trigger circuit 100 . Hereinafter, the digital data converted by the AD converter 20 will also be referred to as "sample data" as appropriate.

The data acquisition processing circuit 30 writes the sample data received from the AD converter 20 into the primary memory 40 at a predetermined sample rate. The predetermined sample rate is the sample rate that conforms to the user-configured time base settings.

After the data acquisition processing circuit 30 starts acquiring the sample data and finishes writing the pre-trigger sample data to the primary memory 40, the data acquisition processing circuit 30 outputs a trigger enable signal to the trigger output circuit 130 of the digital trigger circuit 100. . Upon receiving the trigger enable signal, the trigger output circuit 130 is enabled to output the trigger signal.

When receiving the trigger signal from the digital trigger circuit 100, the data fetching processing circuit 30 writes the post-trigger sample data to the primary memory 40, and ends the data fetching processing for that round.

The primary memory 40 is memory that functions as a buffer memory.

The secondary data processing circuit 50 reads the sample data written in the primary memory 40 via the data acquisition processing circuit 30 . The secondary data processing circuit 50 writes the sample data read from the primary memory 40 to the secondary memory 60 . The secondary data processing circuit 50 also performs arithmetic processing such as averaging and addition, subtraction, and multiplication between a plurality of waveforms on the sample data read from the secondary memory 60 .

Secondary data processing circuitry 50 reorders the sample data for storage, eg, as equivalent samples, based on the true trigger point received from time measurement circuitry 150 .

The secondary memory 60 is memory that functions as a buffer memory. Secondary memory 60 may store sample data in equivalent samples.

Note that the digital oscilloscope 1 does not have to include the secondary data processing circuit 50 and the secondary memory 60 . In that case, the data acquisition processing circuit 30 or the display data processing circuit 70 may have the function of the secondary data processing circuit 50 . Also, the primary memory 40 or the display memory 80 may have the function of the secondary memory 60 . Further, the processing performed by the secondary data processing circuit 50 may be performed by the CPU.

The display data processing circuit 70 reads the sample data written in the secondary memory 60 via the secondary data processing circuit 50 . The display data processing circuit 70 performs processing such as display interpolation to create display data, and writes the display data into the display memory 80 . The display data processing circuit 70 outputs the display data written in the display memory 80 to the display device 90 .

The display memory 80 is a memory that functions as a buffer memory.

The display 90 displays waveforms based on the display data received from the display data processing circuit 70 . The display 90 may include, for example, a display device such as a liquid crystal display or an organic EL display.

The digital trigger circuit 100 includes a threshold generation circuit 110 , a digital comparator 120 , a trigger output circuit 130 , a trigger memory 140 and a time measurement circuit 150 . The digital trigger circuit 100 will be described with reference also to FIG. 12 which mainly shows the digital trigger circuit 100 .

Threshold generating circuit 110 randomly varies the trigger threshold to generate a random threshold. Here, the trigger threshold is a value set by a user's operation. The trigger threshold may be set by the user, for example, via firmware, not shown. The threshold generation circuit 110 outputs the generated random threshold to the digital comparator 120 and the time measurement circuit 150 . In this embodiment, the threshold generation circuit 110 randomly changes the trigger threshold to generate a random threshold, but the present invention is not limited to this. The threshold generation circuit 110 may generate a variable threshold by varying the trigger threshold. Here, the variable threshold means a threshold generated by varying the trigger threshold. For example, the threshold generation circuit 110 may generate the variable threshold by sequentially adding fixed values to the trigger threshold.

The threshold generation circuit 110 includes an adder (first adder in the claims) 111 and a random number generation circuit 112, as shown in FIG.

The adder 111 adds the random number generated by the random number generating circuit 112 to the value based on the trigger threshold to randomly vary the trigger threshold to generate a random threshold.

The random number generation circuit 112 generates random numbers. The random number generating circuit 112 updates the random number each time acquisition of the waveform is started or completed. In other words, the value of the random number generated by the random number generation circuit 112 does not change during the acquisition of one waveform.

The digital comparator 120 compares the sample data received from the AD converter 20 with the random threshold generated by the threshold generation circuit 110 and outputs a binary signal according to the comparison result to the trigger output circuit 130 .

In the example shown in FIG. 11, the digital comparator 120 receives from the AD converter 20 the sample data itself that the AD converter 20 outputs to the data acquisition processing circuit 30, but is not limited to this. For example, the digital comparator 120 may receive the sample data output by the AD converter 20 after being processed by a digital filter.

Trigger output circuit 130 outputs a trigger signal based on the binary signal received from digital comparator 120 . The trigger output circuit 130 outputs a trigger signal at, for example, a rising edge at which the signal received from the digital comparator 120 changes from "0" to "1". Trigger output circuit 130 outputs a trigger signal to trigger memory 140 , time measurement circuit 150 and data acquisition processing circuit 30 . The time at which the trigger signal is output corresponds to the trigger generation point.

The trigger memory 140 stores sample data received from the AD converter 20 . The trigger memory 140 may be, for example, a ring buffer memory. The trigger memory 140 holds sample data at least for the amount corresponding to the latency until the trigger output circuit 130 outputs the trigger signal.

The storage of sample data in the trigger memory 140 is stopped when the sample data necessary for calculating the true trigger point are stored after receiving the trigger signal from the trigger output circuit 130 . The trigger memory 140 has such a capacity that it is not necessary to overwrite previously captured sample data as data necessary for calculating a true trigger point when stopping storing sample data.

Upon receiving the trigger signal from the trigger output circuit 130 , the trigger memory 140 outputs sample data before and after the trigger generation point to the time measurement circuit 150 .

For example, when the time measurement circuit 150 calculates the true trigger point using a cubic expression passing through a total of four sample data points, two points before and after the trigger occurrence point, the trigger memory 140 stores these four sample points. The data is output to time measurement circuit 150 .

The time measurement circuit 150 calculates the true trigger point based on the sample data before and after the trigger generation point received from the trigger memory 140 and the random threshold received from the threshold generation circuit 110 . The time measurement circuit 150 outputs the true trigger point information to the secondary data processing circuit 50 .

When receiving the trigger signal from the trigger output circuit 130 , the time measurement circuit 150 waits for output of sample data before and after the trigger generation point from the trigger memory 140 . In the following description, it is assumed that the time measurement circuit 150 receives four sample data points before and after the trigger generation point from the trigger memory 140 .

When the time measurement circuit 150 receives the four sample data before and after the trigger generation point from the trigger memory 140, the time of the intersection of the cubic expression passing through the four sample data and the random threshold received from the threshold generation circuit 110 is calculated. Calculate The time of this intersection point corresponds to the true trigger point calculated by the time measurement circuit 150 . As a result, the time measurement circuit 150 can calculate the true trigger point time with a finer time precision than the sampling period.

Alternatively, the time measurement circuit 150 may generate additional sample points between the sample data by interpolation and compare them to a random threshold to calculate the true trigger point.

FIG. 13 shows an example of how the threshold generation circuit 110 adds a random number to the trigger threshold to generate a random threshold. In the example shown in FIG. 13, the sample data is 8 bits and the trigger threshold is also 8 bits with the same weight as the sample data.

In the example shown in FIG. 13, the random number generation circuit 112 generates a 2-bit random number. The adder 111 adds the 2-bit random number generated by the random number generation circuit 112 to the fractional part of the trigger threshold to generate a random threshold. In the example shown in FIG. 13, the random number is described as being 2 bits, but the number of bits of the random number is not limited to this. A random number may be any number of bits.

If the digital comparator 120 operates by outputting 1 with sample data > random threshold and outputting 0 with sample data random threshold, the fractional part of the random threshold does not affect the comparison result of digital comparator 120. . The fractional portion of the random threshold affects only the calculation of the true trigger point by the time measurement circuit 150.

FIG. 14 shows an example of waveforms when the slew rate of the input signal is extremely slow near the random threshold. In the example shown in FIG. 14, the input signal changes by only 1 LSB per sample near the random threshold.

As shown in FIG. 14, the random threshold may exist in 4 levels within 1 LSB. Therefore, even if the four sample data before and after the trigger generation point are the same combination of data, the calculated values of Tt are Ts, 0.75×Ts, 0.5×Ts, and 0.25×Ts. can take That is, the time measurement circuit 150 may calculate four different values for the true trigger point.

FIG. 15 shows an example of how sample data output from the AD converter 20 to the data acquisition processing circuit 30 is stored in the primary memory 40 . FIG. 15 shows sample data stored during the Mth to M+3rd data fetching.

In the example shown in FIG. 15, as a result of the time measurement circuit 150 calculating the true trigger point using the random threshold value, Tt for the M-th to M+3 times are Ts, 0.5×Ts, and 0.75× Ts and 0.25×Ts are shown.

FIG. 16 shows an example of displaying the data of FIG. 15 on the display 90 based on the true trigger point. That is, in the example shown in FIG. 16, the data in FIG. 15 are shifted based on Tt, which indicates the time from the trigger generation point to the true trigger point. In FIG. 16, the circle, square, triangle, and star symbols correspond to the M-th, M+1-th, M+2-th, and M+3-th captured data shown in FIG. 15, respectively.

When the display 90 is in the mode of displaying waveforms one by one, only the captured data for each time is displayed. That is, only one data of circle, square, triangle and star is displayed. When the display 90 is in overwrite mode, all captured data is displayed. FIG. 16 shows an example displayed in overwrite mode.

In this way, the time measurement circuit 150 uses a random threshold value to calculate the true trigger point, so that a maximum jitter of Ts is observed, but Tt is only a fixed value between 0 and Ts. I will never stop taking it.

FIG. 17 shows how the data fetched as shown in FIG. 15 is stored in the slot corresponding to the time Tt of the memory for equivalent samples. Here, the memory for equivalent samples may be the secondary memory 60, for example. FIG. 17 shows a case where the slot time interval is 1/4 of the sampling period. In FIG. 17, the circle, square, triangle, and star symbols correspond to the M-th, M+1-th, M+2-th, and M+3-th captured data shown in FIG. 15, respectively.

When the values stored as shown in FIG. 17 are displayed on the display 90, they are displayed as shown in FIG. In FIG. 18, the waveform looks a little smoother, but it doesn't mean that only the data for a particular slot is displayed.

In fact, even if the slew rate of the input signal is extremely slow, it is rare that the combination of four sample data near the trigger generation point is exactly the same combination due to factors such as noise. Therefore, even if the slew rate of the input signal is extremely slow, there are usually several types of combinations of the four sample data near the trigger generation point. Therefore, by taking four random threshold values for combinations of several kinds of sample data, the possible values of Tt increase, and Tt can take a wide range of values between 0 and Ts.

As described above, when the time measurement circuit 150 uses random thresholds to calculate true trigger points, Tt can take multiple values for the same combination of sample data. Therefore, if the waveform is drawn on the display 90 with reference to the true trigger point, the waveform is drawn at a shifted time position, which may result in trigger jitter. However, if the slew rate of the input signal is very slow, trigger jitter is of little concern.

FIG. 19 shows an example of waveforms when the slew rate of the input signal is relatively high near the random threshold. In the example shown in FIG. 19 as well, the random threshold has four values as in the example shown in FIG. However, when the slew rate of the input signal is relatively high as shown in FIG. 19, even if the random threshold takes four values, Tt hardly changes. That is, the value of the true trigger point calculated by the time measuring circuit 150 is hardly affected by different values of the random threshold. Therefore, when the slew rate of the input signal is relatively high, as shown in FIG. 19, when the waveform is drawn based on the true trigger point, the shift in the time axis direction appearing as trigger jitter is extremely small.

An example of the operation of the digital oscilloscope 1 according to one embodiment will be described with reference to the flowchart of FIG.

When the digital oscilloscope 1 starts measurement, the data acquisition processing circuit 30 starts the first data acquisition (step S101). At this time, the random number generation circuit 112 updates the random number.

The data acquisition processing circuit 30 determines whether or not the acquisition of data for the pre-trigger is completed (step S102).

If the pre-trigger data acquisition has not been completed (No in step S102), the data acquisition processing circuit 30 continues the processing of step S102.

If pre-trigger data acquisition has been completed (Yes in step S102), the data acquisition processing circuit 30 outputs a trigger enable signal to the digital trigger circuit 100 (step S103).

The data acquisition processing circuit 30 determines whether or not a trigger has occurred, that is, whether or not a trigger signal has been received from the trigger output circuit 130 (step S104).

If no trigger has occurred (No in step S104), the data acquisition processing circuit 30 continues the processing in step S104.

If a trigger has occurred (Yes in step S104), it is determined whether the acquisition of data for the post-trigger has been completed (step S105).

If the post-trigger data acquisition has not been completed (No in step S105), the data acquisition processing circuit 30 continues the processing in step S105.

On the other hand, the time measurement circuit 150 performs calculation processing of the true trigger point in parallel with step S105 (step S106).

When the acquisition of data for the post-trigger is completed (Yes in step S105) and the calculation process of the true trigger point (step S106) is completed, the data acquisition processing circuit 30 ends the acquisition of data (step S107).

The digital oscilloscope 1 determines whether the number of data acquisition times has expired (step S108). If the number of data acquisition times has not expired (No in step S108), the data acquisition processing circuit 30 returns to step S101 and starts the next data acquisition. If the number of data acquisition times has expired (Yes in step S108), the digital oscilloscope 1 ends the measurement.

The random number generating circuit 112 has been described as updating the random number at the start of data acquisition in step S101, but may update the random number at the end of data acquisition in step S107. In this way, the random number generating circuit 112 updates the random number at the start of data acquisition or at the end of data acquisition, so that the random number does not change during data acquisition and true trigger calculation. That is, the random threshold does not change during data acquisition and true trigger calculation.

Although the process of calculating the true trigger point in step S106 has been described as being performed in parallel with the acquisition of the post-trigger data in step S105, the process of step S106 is executed after the process of step S105 is completed. good too.

According to the digital oscilloscope 1 according to one embodiment as described above, when the slew rate of the input signal is slow, it is possible to prevent the calculated true trigger point from biasing toward a specific value. More specifically, in the digital oscilloscope 1, the threshold generation circuit 110 randomly fluctuates the trigger threshold set by the user to generate a random threshold, and the time measurement circuit 150 generates a random threshold before and after the trigger signal is output. A true trigger point is calculated based on the timing sample data and the random threshold. Therefore, even if the slew rate of the input signal is slow near the trigger threshold and the sample data before and after the trigger signal is output has the same value, the calculated true trigger point may be biased toward a specific value. There is no Therefore, even if the display 90 displays waveforms in an overwrite mode in such a manner that only sample points are displayed by dots, the sample points will not exist only at limited positions. As a result, according to the digital oscilloscope 1 according to one embodiment, the waveforms appear to be connected, so that the user can easily see the displayed waveforms. Further, according to the digital oscilloscope 1 according to one embodiment, automatic measurement of the time axis system (for example, automatic measurement of frequency or period) can be performed. In addition, according to the digital oscilloscope 1 according to one embodiment, it becomes possible to store data only in limited slots in equivalent samples of the random sampling method, and it is possible to prevent the slots from becoming full.

(Another example of random threshold generation)
The threshold generation circuit 110 may generate random thresholds in a different manner than the method shown in FIG. Another random threshold generation method by the threshold generation circuit 110 will be described with reference to FIGS. 21 to 24. FIG.

In the example shown in FIG. 21, the sample data is 8 bits and the trigger threshold is 10 bits, which is finer resolution than the sample data. The adder 111 adds the 2-bit random number generated by the random number generation circuit 112 after truncating the digits below 1 LSB of the sample data, that is, the lower two bits of the trigger threshold, to generate a random threshold.

When the random threshold is generated by the method shown in FIG. 21, the binary signal output by the digital comparator 120 is not affected by random numbers.

In the example shown in FIG. 22, the sample data is 8 bits and the trigger threshold is 10 bits, which is finer resolution than the sample data. The adder 111 adds the 2-bit random number generated by the random number generation circuit 112 to the digits below 1 LSB of the sample data, ie, the lower 2 bits of the trigger threshold, to generate a random threshold.

When a random threshold value is generated by the method shown in FIG. 22, the binary signal output by the digital comparator 120 fluctuates under the influence of random numbers.

In the example shown in FIG. 23, the sample data is 10 bits and the trigger threshold is 10 bits, which is the same resolution as the sample data. The adder 111 adds the 2-bit random number generated by the random number generation circuit 112 after truncating the lower 2 bits of the sample data to generate a random threshold value.

When a random threshold value is generated by the method shown in FIG. 23, the binary signal output by the digital comparator 120 fluctuates under the influence of random numbers.

In the example shown in FIG. 24, the sample data is 10 bits and the trigger threshold is 10 bits, which is the same resolution as the sample data. The adder 111 adds the 2-bit random number generated by the random number generating circuit 112 to the lower 2 bits of the sample data to generate a random threshold.

When a random threshold value is generated by the method shown in FIG. 24, the binary signal output by the digital comparator 120 fluctuates under the influence of random numbers.

In the examples shown in FIGS. 21 to 24, the random number is 2 bits, but the number of bits of the random number is not limited to this. A random number may be any number of bits.

(First modification)
FIG. 25 shows a schematic configuration of a digital trigger circuit 200 according to the first modified example. Regarding the digital trigger circuit 200 according to the first modification, differences from the digital trigger circuit 100 described with reference to FIGS. 11 and 12 will be mainly described, and descriptions of similar contents will be omitted.

The digital trigger circuit 200 includes a threshold generation circuit 210 , a digital comparator 220 , a trigger output circuit 230 , a trigger memory 240 , a time measurement circuit 250 and a latch circuit 260 . Threshold generating circuit 210 includes adder 211 and random number generating circuit 212 .

Upon receiving a trigger signal from the trigger output circuit 230, the random number generation circuit 212 updates the random number at an arbitrary timing until the next data acquisition starts.

When the latch circuit 260 receives the trigger signal from the trigger output circuit 230, the latch circuit 260 latches and holds the random threshold input from the threshold generation circuit 210 at that time. The latch circuit 260 outputs the latched and held random threshold to the time measurement circuit 250 .

In the digital trigger circuit 200 according to the first modified example, the time measurement circuit 250 calculates the true trigger point using the random threshold at the time the trigger signal is output by the trigger output circuit 230 . Therefore, even if the random number is updated after the trigger signal is output by the trigger output circuit 230, the calculation result of the true trigger point is not affected.

An example of the operation of the digital trigger circuit 200 according to the first modification will be described with reference to the flowchart of FIG. In the description of the flowchart of FIG. 26, the description of the parts common to the flowchart of FIG. 20 will be omitted, and the differences will be mainly described.

If a trigger is generated (Yes in step S204), the latch circuit 260 latches and holds the random threshold input from the threshold generation circuit 210 at that time. Also, upon receiving the trigger signal from the trigger output circuit 230, the random number generation circuit 212 updates the random number at an arbitrary timing until the next data acquisition is started (step S205). As described above, according to the digital trigger circuit 200 according to the first modification, the random number generation circuit 212 may generate a random number to be used for the next data acquisition immediately after the trigger is generated. As a result, even if the random number generation circuit 212 takes a long time to generate random numbers, the dead time between data acquisitions can be reduced.

In parallel with step S206, the time measurement circuit 250 performs calculation processing of the true trigger point (step S207). At this time, the time measurement circuit 250 calculates the true trigger point using the random threshold latched by the latch circuit 260 in step S205.

In the flowchart shown in FIG. 26, the random number generation circuit 212 does not update the random number when data acquisition is started in step S201 and when data acquisition is completed in step S208.

(Second modification)
FIG. 27 shows a schematic configuration of a digital trigger circuit 300 according to the second modification. Regarding the digital trigger circuit 300 according to the second modification, differences from the digital trigger circuit 100 described with reference to FIGS. 11 and 12 will be mainly described, and descriptions of similar contents will be omitted.

The digital trigger circuit 300 includes a threshold generation circuit 310, a digital comparator 320, a trigger output circuit 330, a trigger memory 340, a time measurement circuit 350, an adder (second adder in the claims) 361, and a random number generation circuit 362 . Threshold generating circuit 310 includes adder 311 and random number generating circuit 312 .

The digital trigger circuit 300 according to the second modification adds random numbers to the true trigger point calculated by the time measurement circuit 350 .

The adder 361 adds the random number generated by the random number generation circuit 362 to the value of the true trigger point received from the time measurement circuit 350 to randomly fluctuate the value of the true trigger point.

The random number generation circuit 362 generates random numbers. The random numbers generated by the random number generating circuit 362 are desirably minute random numbers. Jitter can be reduced by using minute random numbers as the random numbers generated by the random number generation circuit 362 .

For example, when the waveform displayed on the display 90 has a high enlargement ratio, or when the number of slots is large during equivalent sampling, the time resolution required for Tt becomes finer. In this case, by adding a random number to the true trigger point calculated by the time measurement circuit 350, the true trigger point can be further varied. As a result, even when the magnification is high, the user can easily see the displayed waveform.

(Third modification)
FIG. 28 shows a schematic configuration of a digital trigger circuit 400 according to the third modification. Regarding the digital trigger circuit 400 according to the third modified example, differences from the digital trigger circuit 300 according to the second modified example will be mainly described, and descriptions of similar contents will be omitted.

The digital trigger circuit 400 comprises a threshold generation circuit 410 , a digital comparator 420 , a trigger output circuit 430 , a trigger memory 440 , a time measurement circuit 450 and an adder 461 . Threshold generating circuit 410 includes adder 411 and random number generating circuit 412 .

In the digital trigger circuit 400 according to the third modification, an adder 461 for adding a random number to the true trigger point value received from the time measurement circuit 450 receives a random number from the random number generation circuit 412 included in the threshold generation circuit 410. This point is different from the digital trigger circuit 300 according to the second modification.

By sharing the random number generation circuit 412 with the adder 411 and the adder 461 in this manner, the circuit scale of the digital trigger circuit 400 can be reduced.

It will be apparent to those skilled in the art that the present disclosure can be embodied in certain other forms than those described above without departing from the spirit or essential characteristics thereof. Accordingly, the preceding description is illustrative and not limiting. The scope of the disclosure is defined by the appended claims rather than by the foregoing description. Any changes that come within the range of equivalence are included therein.

For example, the arrangement, number, and the like of each component described above are not limited to the contents shown in the above description and drawings. Arrangement, number, etc. of each component may be configured arbitrarily as long as the function can be realized.

1 digital oscilloscope 10 input circuit 20 AD converter (ADC)
30 data acquisition processing circuit 40 primary memory 50 secondary data processing circuit 60 secondary memory 70 display data processing circuit 80 display memory 90 display 100, 200, 300, 400 digital trigger circuit 110, 210, 310, 410 Threshold generating circuit 111, 211, 311, 411 adder (first adder)
112, 212, 312, 412 random number generation circuit 120, 220, 320, 420 digital comparator 130, 230, 330, 430 trigger output circuit 140, 240, 340, 440 trigger memory 150, 250, 350, 450 time measurement circuit 260 latch Circuit 361, 461 adder (second adder)
362 random number generation circuit 600 digital trigger circuit 610 digital comparator 620 trigger output circuit 630 trigger memory 640 time measurement circuit

Claims (8)

an AD converter that converts an analog input signal into digital data;
a threshold generation circuit for generating a variable threshold by varying a trigger threshold set by a user;
a digital comparator that compares the digital data with the fluctuation threshold value and outputs a binary signal;
a trigger output circuit that outputs a trigger signal based on the binary signal;
A time measurement circuit that calculates a true trigger point based on several points of the digital data including the timing at which the trigger signal is output and the timing before and after the trigger signal, and the fluctuation threshold ,
The threshold generation circuit is
a random number generation circuit that generates a random number smaller than the LSB (Least Significant Bit) of the digital data;
a first adder that adds the random number to the trigger threshold to randomly vary the trigger threshold to generate the variation threshold;
The digital oscilloscope , wherein the time measurement circuit calculates a function passing through the digital data of the several points, and calculates a time of intersection of the function and the fluctuation threshold as the true trigger point . The digital oscilloscope according to claim 1 ,
The first adder adds the random number smaller than the LSB of the digital data to a value obtained by truncating the value smaller than the LSB of the digital data from the trigger threshold, thereby randomly varying the trigger threshold. Digital oscilloscope. The digital oscilloscope according to claim 1 or 2 ,
another random number generation circuit different from the random number generation circuit;
and a second adder,
The digital oscilloscope, wherein the second adder adds a random number generated by the other random number generation circuit to the true trigger point calculated by the time measurement circuit to randomly vary the true trigger point. The digital oscilloscope according to any one of claims 1 to 3 ,
A digital oscilloscope further comprising a latch circuit that latches and retains the fluctuation threshold at that time when the trigger signal is received from the trigger output circuit. The digital oscilloscope according to any one of claims 1 to 4 ,
A digital oscilloscope, further comprising a display that displays a waveform based on the digital data. The digital oscilloscope according to any one of claims 1 to 5 ,
The digital oscilloscope is a digital oscilloscope that performs equivalent sampling using a random sampling method. The digital oscilloscope according to any one of claims 1 to 6 ,
The digital oscilloscope is a digital oscilloscope that enlarges and displays so that the display resolution of the time axis is finer than the sampling resolution. converting an analog input signal to digital data;
varying a user-set trigger threshold to generate a varying threshold;
comparing the digital data with the variation threshold to output a binary signal;
outputting a trigger signal based on the binary signal;
calculating a true trigger point based on several points of the digital data including the timing at which the trigger signal was output and the timing before and after the trigger signal, and the fluctuation threshold ;
The step of generating the variation threshold comprises:
generating a random number smaller than the LSB (Least Significant Bit) of the digital data;
adding the random number to the trigger threshold to randomly vary the trigger threshold to generate the variation threshold;
The step of calculating the true trigger point includes calculating a function passing through the digital data of the several points, and calculating the time of intersection of the function and the fluctuation threshold as the true trigger point. How to control an oscilloscope.

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