JP2020027025A - Digital oscilloscope, and control method of the same - Google Patents

Abstract

To provide a digital oscilloscope that can perform so that a calculated true trigger point is not biased toward a specific value when a through rate of an input signal is slow, and to provide a digital oscilloscope control method.SOLUTION: A digital oscilloscope 1 according to the present disclosure, comprises: an AD converter 20 that converts an analog input signal into digital data; a threshold generation circuit 110 that fluctuates a trigger threshold set by a user, and generates a fluctuation threshold; a digital comparator 120 that compares the digital data with the fluctuation threshold, and outputs a binary signal; a trigger output circuit 130 that outputs a trigger signal on the basis of the binary signal; and a time measurement circuit 150 that calculates a true trigger point on the basis of digital data on timing before and after the trigger signal is output, and the fluctuation threshold.SELECTED DRAWING: Figure 11

Description

  The present disclosure relates to a digital oscilloscope and a control method thereof.

  Conventionally, a digital trigger type digital oscilloscope is known.

  In the digital trigger method, digital data obtained by A / D conversion of an input signal with a predetermined sampling clock is binarized, and a trigger is generated based on a change in the binarized data. Therefore, the time resolution of the trigger determination is the cycle of the sampling clock.

  However, since the input signal is asynchronous with the sampling clock, the true trigger point can be the time between sample points. Here, the “true trigger point” is a time when the input signal exceeds the trigger threshold.

  When drawing the waveform of the input signal on the display of the digital oscilloscope, the time difference between the trigger point, which is the time at which the trigger occurred, and the true trigger point is calculated, and displayed by shifting by the time difference. Waveforms can be drawn at positions.

  For example, Patent Literature 1 discloses a method of calculating a true trigger point by generating additional sample points by interpolation between sample points.

  Patent Document 2 discloses a method in which data near a trigger generation point is applied to an equation, and a true trigger point is calculated by solving the equation.

Japanese Patent No. 5607301 Japanese Patent No. 4723030

  The method of calculating a true trigger point described in Patent Literature 1 and Patent Literature 2 has a problem that when the slew rate of an input signal is slow, the calculated true trigger point is biased to a specific value. .

  Therefore, an object of the present disclosure is to provide a digital oscilloscope capable of preventing a calculated true trigger point from being biased to a specific value when a slew rate of an input signal is slow, and to provide a control method thereof. I do.

  A digital oscilloscope according to some embodiments includes an AD converter that converts an analog input signal into digital data, a threshold generation circuit that varies a trigger threshold set by a user to generate a variation threshold, the digital data and the digital data. A digital comparator that outputs a binary signal by comparing with a variation threshold, a trigger output circuit that outputs a trigger signal based on the binary signal, and the digital data before and after the trigger signal is output, A time measurement circuit for calculating a true trigger point based on the variation threshold. According to such a digital oscilloscope, it is possible to prevent the calculated true trigger point from being biased to a specific value when the slew rate of the input signal is low. More specifically, the threshold generation circuit generates a fluctuation threshold by changing a trigger threshold set by a user, and the time measurement circuit generates digital data at timings before and after the trigger signal is output, and a fluctuation threshold. , A true trigger point is calculated. Therefore, even if the slew rate of the input signal is slow near the trigger threshold and the digital data before and after the output of the trigger signal has the same value, the calculated true trigger point is biased to a specific value. There is no.

  In the digital oscilloscope according to one embodiment, the threshold generation circuit includes a random number generation circuit that generates a random number, and uses the random number to randomly vary the trigger threshold to generate a random threshold as the variation threshold. May be. As described above, by using the random numbers, the threshold value generation circuit can randomly change the trigger threshold value.

  In the digital oscilloscope according to one embodiment, the threshold generation circuit further includes a first adder, and the first adder adds the random number to a value based on the trigger threshold, and sets the trigger threshold at random. May be varied. As described above, the first adder adds the random number to the value based on the trigger threshold, so that the threshold generation circuit can easily change the trigger threshold at random.

  In the digital oscilloscope according to one embodiment, the first adder adds the random number smaller than an LSB (Least Significant Bit) of the digital data to the trigger threshold, and randomly varies the trigger threshold. You may. Thus, by adding a random number smaller than the LSB of the digital data, the binary signal output by the digital comparator can be prevented from being affected by the random number.

  In the digital oscilloscope according to one embodiment, the first adder adds the random number smaller than the LSB of the digital data to a value obtained by truncating a value smaller than the LSB of the digital data from the trigger threshold. , The trigger threshold may be varied randomly. As described above, by adding a random number smaller than the LSB of the digital data to a value obtained by truncating the value smaller than the LSB of the digital data, the binary signal output by the digital comparator is not affected by the random number. be able to.

  In the digital oscilloscope according to one embodiment, the first adder truncates lower-order bits from the trigger threshold, adds the random number corresponding to the truncated lower-order bits, and randomly varies the trigger threshold. May be. Thus, the threshold generation circuit can easily and randomly change the trigger threshold.

  In the digital oscilloscope according to one embodiment, the first adder may add the random number corresponding to lower-order bits of the trigger threshold and vary the trigger threshold randomly. Thus, the threshold generation circuit can easily and randomly change the trigger threshold.

  The digital oscilloscope according to one embodiment may further include a second adder, and the second adder may randomly change the true trigger point calculated by the time measurement circuit. As described above, by randomly varying the true trigger point, the trigger point can be varied with fine time resolution.

  In the digital oscilloscope according to one embodiment, the second adder may randomly vary the true trigger point using a random number. This makes it possible to easily change the true trigger point randomly.

  The digital oscilloscope according to one embodiment may further include a latch circuit that, upon receiving the trigger signal from the trigger output circuit, latches and holds the fluctuation threshold at that time. Thus, immediately after the trigger is generated, it is possible to prepare for generating a fluctuation threshold value at the time of the next data capture.

  The digital oscilloscope according to an embodiment may further include a display for displaying a waveform based on the digital data. Thus, a display waveform that is easy for the user to see can be displayed on the display.

  In the digital oscilloscope according to one embodiment, the digital oscilloscope may be a digital oscilloscope that performs equivalent sampling by a random sampling method.

  In the digital oscilloscope according to one embodiment, the digital oscilloscope may be a digital oscilloscope that enlarges and displays the display so that the display resolution on the time axis is smaller than the sampling resolution.

  A method for controlling a digital oscilloscope according to some embodiments includes: converting an analog input signal into digital data; generating a variation threshold by varying a trigger threshold set by a user; Outputting a binary signal by comparing with a variation threshold; outputting a trigger signal based on the binary signal; the digital data before and after the output of the trigger signal; Calculating a true trigger point based on According to such a control method of the digital oscilloscope, it is possible to prevent the calculated true trigger point from being biased to a specific value when the slew rate of the input signal is low. More specifically, a step of generating a random threshold by randomly varying a trigger threshold set by the user, digital data before and after the trigger signal is output, and a true threshold based on the random threshold Calculating the trigger point, the slew rate of the input signal is low near the trigger threshold, and even if the digital data before and after the output of the trigger signal has the same value, the calculated true value is obtained. Can be prevented from being biased to a specific value.

  According to the present disclosure, it is possible to provide a digital oscilloscope capable of preventing a calculated true trigger point from being biased to a specific value when a slew rate of an input signal is slow, and a control method thereof.

FIG. 9 is a block diagram illustrating a schematic configuration of a digital trigger circuit according to a comparative example. FIG. 11 is a diagram illustrating an example of a state in which a time measurement circuit according to a comparative example calculates a true trigger point. FIG. 9 is a diagram showing a state where sample data is stored in a memory in a comparative example. FIG. 13 is a diagram illustrating a state in which sample data is displayed based on a true trigger point in a comparative example. FIG. 9 is a diagram illustrating a state in which sample data is stored in an equivalent sample memory in a comparative example. FIG. 9 is a diagram illustrating an example of a waveform when a slew rate of an input signal is extremely slow in a comparative example. FIG. 9 is a diagram showing a state where sample data is stored in a memory in a comparative example. FIG. 11 is a diagram illustrating a state where sample data is displayed based on a true trigger point when a slew rate of an input signal is extremely slow in a comparative example. FIG. 9 is a diagram illustrating a state where sample data is stored in an equivalent sample memory when a slew rate of an input signal is extremely slow in a comparative example. FIG. 11 is a diagram illustrating a state where sample data is displayed based on a true trigger point when a slew rate of an input signal is extremely slow in a comparative example. FIG. 1 is a diagram illustrating a schematic configuration of a digital oscilloscope according to an embodiment. FIG. 2 is a diagram illustrating a schematic configuration of a digital trigger circuit according to one embodiment. It is a figure showing signs that a random number is added to a trigger threshold and a random threshold is generated. FIG. 4 is a diagram illustrating an example of a waveform when a slew rate of an input signal is extremely slow. FIG. 4 is a diagram illustrating a state in which sample data is stored in a primary memory. FIG. 11 is a diagram illustrating a state in which sample data is displayed based on a true trigger point. FIG. 4 is a diagram illustrating a state in which sample data is stored in an equivalent sample memory. FIG. 11 is a diagram illustrating a state in which sample data is displayed based on a true trigger point. FIG. 4 is a diagram illustrating an example of a waveform when a slew rate of an input signal is relatively high. 6 is a flowchart illustrating an example of an operation of the digital oscilloscope according to the embodiment. FIG. 10 is a diagram illustrating another method of generating a random threshold by adding a random number to a trigger threshold. FIG. 10 is a diagram illustrating another method of generating a random threshold by adding a random number to a trigger threshold. FIG. 10 is a diagram illustrating another method of generating a random threshold by adding a random number to a trigger threshold. FIG. 10 is a diagram illustrating another method of generating a random threshold by adding a random number to a trigger threshold. FIG. 9 is a diagram illustrating a schematic configuration of a digital trigger circuit according to a first modification. 9 is a flowchart illustrating an example of an operation of the digital trigger circuit according to the first modification. FIG. 11 is a diagram illustrating a schematic configuration of a digital trigger circuit according to a second modification. FIG. 11 is a diagram illustrating a schematic configuration of a digital trigger circuit according to a third modification.

(Comparative example)
First, a digital trigger circuit according to a comparative example will be described, and its problems will be described.

  FIG. 1 is a diagram illustrating a schematic configuration of a digital trigger circuit 600 according to a comparative example. The digital trigger circuit 600 includes a digital comparator 610, a trigger output circuit 620, a trigger memory 630, and a time measurement circuit 640.

  The digital trigger circuit 600 acquires sample data from the AD converter (ADC) 20. Here, the sample data means a data obtained by the AD converter 20 converting an analog input signal into digital data using a predetermined sampling clock.

  The AD converter 20 also outputs the sample data to the data acquisition processing circuit. The data capture processing circuit is a circuit that captures sample data into a memory. A circuit subsequent to the data fetch processing circuit performs secondary processing such as drawing based on the data fetched into the memory.

  The digital trigger circuit 600 outputs a trigger generation point to a data acquisition processing circuit or the like. The data capture processing circuit captures sample data in a predetermined time range so as to be stored in the memory based on the trigger generation point. Further, the data acquisition processing circuit controls the sample data stored in the memory based on the trigger generation point.

  After calculating the true trigger point, the digital trigger circuit 600 outputs the true trigger point to the data processing circuit. The data processing circuit shifts the display data by the time difference between the trigger generation point and the true trigger point.

  The digital comparator 610 compares the sample data received from the AD converter 20 with a trigger threshold, binarizes the data according to the comparison result, and outputs a binary signal. The trigger threshold is a value set by a user operation.

  For example, the digital comparator 610 outputs “1” when the sample data is larger than the trigger threshold, and outputs “0” when the sample data is smaller than the trigger threshold.

  The trigger output circuit 620 outputs a trigger signal based on the binary signal received from the digital comparator 610. For example, the trigger output circuit 620 outputs a trigger signal at a rising edge at which a signal received from the digital comparator 610 changes from “0” to “1”. The trigger output circuit 620 outputs a trigger signal to the trigger memory 630, the time measurement circuit 640, the data acquisition processing circuit, and the like. The time at which the trigger signal is output corresponds to the trigger generation point.

  The trigger memory 630 stores a predetermined number of pieces of sample data received from the AD converter 20. The trigger memory 630 is, for example, a ring buffer memory. Upon receiving the trigger signal from the trigger output circuit 620, the trigger memory 630 outputs sample data at several points before and after the trigger generation point to the time measurement circuit 640.

  The time measurement circuit 640 calculates the true trigger point based on the sample data of several points before and after the trigger occurrence point received from the trigger memory 630 and the trigger threshold. The time measurement circuit 640 outputs the calculated true trigger point to the data processing circuit.

  An example of how the time measurement circuit 640 calculates a true trigger point will be described with reference to FIG. In the example shown in FIG. 2, the trigger memory 630 outputs four sample data before and after the trigger occurrence point to the time measurement circuit 640. In the example shown in FIG. 2, the four sample data are sample N-2, sample N-1, sample N, and sample N + 1. Sample N is sample data at the trigger generation point. Sample N-2 and sample N-1 are sample data before the trigger generation point. Sample N + 1 is sample data after the trigger generation point.

  In the example shown in FIG. 2, the time measurement circuit 640 calculates the true trigger point by calculating the intersection of the tertiary equation F passing through the four sample data and the trigger threshold. In FIG. 2, Ts indicates a sampling clock interval, and Tt indicates a time from a trigger generation point to a true trigger point.

  Since the true trigger point is between sample N-1 and sample N, Tt takes a value in the range of 0 <TtTs. When the sampling clock and the input signal are asynchronous, Tt takes an arbitrary value in the range of 0 <TtTs.

  FIG. 3 shows an example in which the sample data output from the AD converter 20 to the data fetch processing circuit is stored in a data fetch memory. FIG. 3 shows the state of the sample data stored at the time of the M-th to (M + 3) -th data fetches.

  In the example shown in FIG. 3, the sample data immediately after the occurrence of the trigger is defined as sample N. Further, Tt of the M-th to M + 3 times is set to Ts, 0.5 × Ts, 0.75 × Ts, and 0.25 × Ts, respectively.

  FIG. 4 shows an example in which the data of FIG. 3 is displayed on a display with reference to a true trigger point. That is, in the example shown in FIG. 4, the data of FIG. 3 is shifted based on Tt indicating the time from the trigger generation point to the true trigger point. In FIG. 4, symbols of circle, square, triangle, and star correspond to the M-th, M + 1-th, M + 2-th, and M + 3-th acquisition data shown in FIG. 3, respectively.

  When the display is in the mode of displaying one waveform at a time, only the captured data of each time is displayed. That is, only data of any one of a circle, a square, a triangle, and a star is displayed. When the display is in the overwriting mode, all the captured data is displayed. FIG. 4 shows an example of the display in the overwriting mode.

  When equivalent sampling is performed by the random sampling method, as shown in FIG. 5, the taken sample data is stored in a slot corresponding to the time Tt in the memory for equivalent sampling.

  Here, the random sampling method is a method in which the time from the trigger generation point to the true trigger point fluctuates because the sampling clock and the input signal are asynchronous, and the sample data is stored in different slots for each waveform. . The equivalent sample means that the sample data is stored in a slot provided at a cycle shorter than the sampling cycle, so that it looks as if data is acquired at an equivalently higher sampling frequency. For example, if the time interval of the slot storing the sample data is set to ４ of the sampling period, it appears that the sampling frequency is equivalently quadrupled.

  FIG. 5 shows a case where the time interval between the slots is one quarter of the sampling period. In FIG. 5, symbols of a circle, a square, a triangle, and a star respectively correspond to the M-th, M + 1-th, M + 2-th, and M + 3-th acquisition data shown in FIG.

  When the value stored in the memory shown in FIG. 5 is displayed on the display, it is displayed as shown in FIG.

  Subsequently, a problem of the digital trigger circuit 600 according to the comparative example will be described with reference to FIGS.

  FIG. 6 shows an example of a waveform when the slew rate of the input signal is extremely low near the trigger threshold. In the example shown in FIG. 6, near the trigger threshold, the input signal changes only by 1 LSB (Least Significant Bit) per sample. In this case, the sample data near the trigger generation point, that is, the values of sample N−2 to sample N + 1 become the same data every time the trigger is applied. As a result, Tt also becomes Tt = Ts every time, and Tt becomes a fixed value.

  In this case, the data stored in the data capturing memory is as shown in FIG. That is, Tt at the time of the M-th to (M + 3) -th data fetches is all Ts.

  FIG. 8 shows an example in which the data of FIG. 7 is displayed on a display with reference to a true trigger point. FIG. 8 shows the data of the Mth to M + 3 times in the overwriting mode. However, since the captured data of all the times is Tt = Ts, the data of all the times are displayed overlapping on the same point. I have.

  FIG. 9 shows a state in which the data as shown in FIG. 7 is equivalently sampled and stored at a quarter of the sampling period. In this case, since only the slots of Tt = Ts are sequentially overwritten, only the last captured data remains. Specifically, in the example shown in FIG. 9, only the M + 3th captured data remains in the slot of Tt = Ts.

  FIG. 10 shows an example in which the data of FIG. 9 is displayed on a display with reference to a true trigger point. In this case, only the last captured data is displayed. In the example shown in FIG. 9, since the M + 3 times captured data is the last captured data, only the data indicated by the star symbol is displayed in FIG.

  The example described with reference to FIGS. 6 to 10 is an extreme example. However, when the slew rate of the input signal is low near the trigger threshold, there are only a few combinations of the four sample data near the trigger generation point. It can happen. In this case, the value of Tt is limited to several types. This is the same even if a method of calculating a true trigger point by interpolating between samples is used instead of a method using a cubic equation passing through four sample data.

  In the situation where the slew rate of the input signal is slow near the trigger threshold, if only the sample points are displayed in a dot-displayed manner, even if the overwriting mode (afterglow mode) is used, the No points are displayed. In addition, when equivalent sampling is performed by the random sampling method, data can be stored only in a limited number of slots, so that slots cannot be filled.

  Therefore, when the slew rate of the input signal is low near the trigger threshold, the waveform displayed on the digital oscilloscope becomes difficult to see because the true trigger point is biased to a specific value. In addition, when the true trigger point is biased to a specific value and the slot is not filled in the equivalent sample, automatic measurement of the time axis system (for example, automatic measurement of frequency or cycle) may not be performed. The calculation of the automatic measurement of the time axis system is performed by the CPU by reading the acquired data. The calculation of the automatic measurement of the time axis system may be performed by a secondary data processing circuit (not shown).

  Basically, when a trigger is generated by an input signal that is asynchronous with the sampling clock, the value of Tt described above should take an arbitrary value between 0 and Ts. However, in the configuration shown in the comparative example, when the slew rate of the input signal is low near the trigger threshold, there is a problem that Tt can take only several fixed values between 0 and Ts. .

(Digital oscilloscope of the present disclosure)
The present disclosure has been made in view of the above-described problem, and provides a digital oscilloscope capable of preventing a calculated true trigger point from being biased to a specific value when a slew rate of an input signal is slow, and a control method thereof. The purpose is to: Hereinafter, an embodiment of the present disclosure will be mainly described with reference to the accompanying drawings.

  FIG. 11 is a diagram illustrating a schematic configuration of the digital oscilloscope 1 according to one embodiment. The digital oscilloscope 1 includes an input circuit 10, an AD converter (ADC) 20, a data acquisition processing circuit 30, a primary memory 40, a secondary data processing circuit 50, a secondary memory 60, and a display data processing. The circuit includes a circuit 70, a display memory 80, a display 90, and a digital trigger circuit 100.

  The digital oscilloscope 1 is a digital oscilloscope that performs at least equivalent sampling by a random sampling method or enlarges and displays a display resolution on a time axis to be finer than the sampling resolution.

  The input circuit 10 includes an attenuation circuit, a preamplifier, and the like. The input circuit 10 adjusts the amplitude of the analog input signal so as to be in an appropriate range with respect to the input specifications of the AD converter 20, and outputs the analog input signal after the amplitude adjustment to the AD converter 20.

  The AD converter 20 converts the analog input signal received from the input circuit 10 into digital data, and outputs the digital data to the data acquisition processing circuit 30 and the digital trigger circuit 100. Hereinafter, the digital data converted by the AD converter 20 is also appropriately referred to as “sample data”.

  The data acquisition processing circuit 30 writes the sample data received from the AD converter 20 to the primary memory 40 at a predetermined sample rate. The predetermined sample rate is a sample rate that matches the time axis setting set by the user.

  The data acquisition processing circuit 30 outputs a trigger enable signal to the trigger output circuit 130 of the digital trigger circuit 100 when the acquisition of the sample data is started and the writing of the pretrigger sample data to the primary memory 40 is completed. . Upon receiving the trigger enable signal, the trigger output circuit 130 can output a trigger signal.

  When receiving the trigger signal from the digital trigger circuit 100, the data acquisition processing circuit 30 writes the sample data for the post-trigger into the primary memory 40, and ends the current data acquisition processing.

  The primary memory 40 is a memory that functions as a buffer memory.

  The secondary data processing circuit 50 reads out the sample data written in the primary memory 40 via the data acquisition processing circuit 30. The secondary data processing circuit 50 writes the sample data read from the primary memory 40 to the secondary memory 60. The secondary data processing circuit 50 performs averaging processing and arithmetic processing such as addition, subtraction, and multiplication between a plurality of waveforms on the sample data read from the secondary memory 60.

  The secondary data processing circuit 50 rearranges the sample data based on the true trigger point received from the time measurement circuit 150 so as to store the sample data as, for example, an equivalent sample.

  The secondary memory 60 is a memory that functions as a buffer memory. Secondary memory 60 may store sample data in equivalent samples.

  Note that the digital oscilloscope 1 may not include the secondary data processing circuit 50 and the secondary memory 60. In that case, the data capture processing circuit 30 or the display data processing circuit 70 may have the function of the secondary data processing circuit 50. Further, the primary memory 40 or the display memory 80 may have the function of the secondary memory 60. The processing performed by the secondary data processing circuit 50 may be performed by the CPU.

  The display data processing circuit 70 reads the sample data written in the secondary memory 60 via the secondary data processing circuit 50. The display data processing circuit 70 creates display data by performing processing such as display interpolation and writes the display data into the display memory 80. The display data processing circuit 70 outputs the display data written in the display memory 80 to the display 90.

  The display memory 80 is a memory that functions as a buffer memory.

  The display 90 displays a waveform based on the display data received from the display data processing circuit 70. The display 90 may include, for example, a display device such as a liquid crystal display or an organic EL display.

  The digital trigger circuit 100 includes a threshold generation circuit 110, a digital comparator 120, a trigger output circuit 130, a trigger memory 140, and a time measurement circuit 150. The digital trigger circuit 100 will be described with reference to FIG. 12 mainly showing the digital trigger circuit 100.

  The threshold generation circuit 110 generates a random threshold by randomly varying the trigger threshold. Here, the trigger threshold is a value set by a user operation. The trigger threshold may be set by the user, for example, via firmware not shown. The threshold generation circuit 110 outputs the generated random threshold to the digital comparator 120 and the time measurement circuit 150. In the present embodiment, the threshold generation circuit 110 is described as generating a random threshold by randomly varying the trigger threshold, but the present invention is not limited to this. The threshold generation circuit 110 may change the trigger threshold to generate a change threshold. Here, the fluctuation threshold means a threshold generated by changing the trigger threshold. For example, the threshold generation circuit 110 may generate a fluctuation threshold by sequentially adding a fixed value to the trigger threshold.

  As shown in FIG. 12, the threshold value generation circuit 110 includes an adder (first adder in the claims) 111 and a random number generation circuit 112.

  The adder 111 adds a random number generated by the random number generation circuit 112 to a value based on the trigger threshold, randomly varies the trigger threshold, and generates a random threshold.

  The random number generation circuit 112 generates a random number. The random number generation circuit 112 updates the random number each time the waveform capture is started or completed. That is, the value of the random number generated by the random number generation circuit 112 does not change during one waveform capture.

  The digital comparator 120 compares the sample data received from the AD converter 20 with the random threshold value generated by the threshold value generation circuit 110, and outputs a binary signal corresponding to the comparison result to the trigger output circuit 130.

  In the example shown in FIG. 11, the digital comparator 120 receives the sample data itself output from the AD converter 20 to the data acquisition processing circuit 30 from the AD converter 20, but is not limited thereto. For example, the digital comparator 120 may receive the sample data output from the AD converter 20 after the sample data is processed by a digital filter.

  The trigger output circuit 130 outputs a trigger signal based on a binary signal received from the digital comparator 120. For example, the trigger output circuit 130 outputs a trigger signal at a rising edge at which a signal received from the digital comparator 120 changes from “0” to “1”. The trigger output circuit 130 outputs a trigger signal to the trigger memory 140, the time measurement circuit 150, and the data acquisition processing circuit 30. The time at which the trigger signal is output corresponds to the trigger generation point.

  The trigger memory 140 stores sample data received from the AD converter 20. The trigger memory 140 may be, for example, a ring buffer memory. The trigger memory 140 holds the sample data at least as much as the latency until the trigger output circuit 130 outputs the trigger signal.

  The storage of the sample data in the trigger memory 140 is stopped when the necessary amount of sample data for calculating the true trigger point is stored after receiving the trigger signal from the trigger output circuit 130. The trigger memory 140 has such a capacity that when storing the sample data is stopped, it is not necessary to overwrite previously acquired sample data as data necessary for calculating a true trigger point.

  Upon receiving the trigger signal from the trigger output circuit 130, the trigger memory 140 outputs the sample data before and after the trigger occurrence point to the time measurement circuit 150.

  For example, when the time measurement circuit 150 calculates a true trigger point using a cubic expression passing through a total of four sample data of two points before and after the trigger generation point, the trigger memory 140 stores the four samples. The data is output to the time measurement circuit 150.

  The time measurement circuit 150 calculates a true trigger point based on the sample data before and after the trigger generation point received from the trigger memory 140 and the random threshold value received from the threshold value generation circuit 110. The time measurement circuit 150 outputs information on the true trigger point to the secondary data processing circuit 50.

  Upon receiving the trigger signal from the trigger output circuit 130, the time measurement circuit 150 waits for the trigger memory 140 to output sample data before and after the trigger generation point. Hereinafter, the description will be given on the assumption that the time measurement circuit 150 receives, from the trigger memory 140, sample data of four points before and after the trigger occurrence point.

  When the time measurement circuit 150 receives the sample data at four points before and after the trigger occurrence point from the trigger memory 140, the time measurement circuit 150 determines the time of the intersection of the cubic equation passing through the four sample data and the random threshold value received from the threshold value generation circuit 110. Is calculated. The time of this intersection corresponds to a true trigger point calculated by the time measurement circuit 150. Thereby, the time measurement circuit 150 can calculate the time of the true trigger point with a time accuracy finer than the sampling period.

  Alternatively, the time measurement circuit 150 may calculate a true trigger point by generating an additional sample point between the sample data by interpolation and comparing it with a random threshold value.

  FIG. 13 shows an example of how the threshold generation circuit 110 adds a random number to the trigger threshold to generate a random threshold. In the example shown in FIG. 13, the sample data is 8 bits, and the trigger threshold is also 8 bits having the same weight as the sample data.

  In the example shown in FIG. 13, the random number generation circuit 112 generates a 2-bit random number. The adder 111 generates a random threshold by adding the 2-bit random number generated by the random number generation circuit 112 to the decimal part of the trigger threshold. In the example illustrated in FIG. 13, the random number is described as having two bits, but the number of bits of the random number is not limited to this. The random number may be any number of bits.

  When the digital comparator 120 operates to output 1 when the sample data> random threshold and output 0 when the sample data random threshold, the decimal part of the random threshold does not affect the comparison result of the digital comparator 120. . The fractional part of the random threshold only affects the calculation of the true trigger point by the time measurement circuit 150.

  FIG. 14 shows an example of a waveform when the slew rate of the input signal is extremely low near the random threshold. In the example shown in FIG. 14, near the random threshold, the input signal changes by only 1 LSB for each sample.

  As shown in FIG. 14, four levels of random threshold values may exist during one LSB. Therefore, even if the four sample data before and after the trigger point are exactly the same data combination, the calculated value of Tt is the value of Ts, 0.75 × Ts, 0.5 × Ts, and 0.25 × Ts. Can be taken. That is, the time measurement circuit 150 can calculate four different values as true trigger points.

  FIG. 15 shows an example in which sample data output from the AD converter 20 to the data acquisition processing circuit 30 is stored in the primary memory 40. FIG. 15 shows the state of the stored sample data at the time of the M-th to (M + 3) -th data fetches.

  In the example illustrated in FIG. 15, as a result of the time measurement circuit 150 calculating the true trigger point using the random threshold value, the Tt of the Mth to M + 3th times is Ts, 0.5 × Ts, and 0.75 ×, respectively. Ts and 0.25 × Ts are shown.

  FIG. 16 shows an example in which the data in FIG. 15 is displayed on the display 90 with reference to the true trigger point. That is, in the example shown in FIG. 16, the data in FIG. 15 is shifted based on Tt indicating the time from the trigger generation point to the true trigger point. In FIG. 16, symbols of circle, square, triangle, and star respectively correspond to the M-th, M + 1-th, M + 2-th, and M + 3-th acquisition data shown in FIG.

  When the display 90 is in the mode of displaying one waveform at a time, only the captured data of each time is displayed. That is, only data of any one of a circle, a square, a triangle, and a star is displayed. When the display 90 is in the overwriting mode, all the captured data are displayed. FIG. 16 shows an example displayed in the overwriting mode.

  As described above, when the time measurement circuit 150 calculates the true trigger point using the random threshold value, the jitter for the maximum Ts is observed, but the Tt is only a value determined between 0 and Ts. You won't get stuck.

  FIG. 17 shows a state in which the fetched data as shown in FIG. 15 is stored in the slot corresponding to the time Tt in the memory for the equivalent sample. Here, the memory for the equivalent sample may be, for example, the secondary memory 60. FIG. 17 shows a case where the time interval between the slots is one quarter of the sampling period. In FIG. 17, symbols of a circle, a square, a triangle, and a star correspond to the M-th, M + 1-th, M + 2-th, and M + 3-th acquisition data shown in FIG. 15, respectively.

  When the stored values are displayed on the display unit 90 as shown in FIG. 17, they are displayed as shown in FIG. In FIG. 18, the waveform does not look a little smooth, but this does not mean that only data of a specific slot is displayed.

  Actually, even when the slew rate of the input signal is extremely low, the combination of the four sample data near the trigger generation point rarely becomes exactly the same due to factors such as noise. Therefore, even when the slew rate of the input signal is extremely low, there are usually several types of combinations of four sample data near the trigger generation point. Therefore, by taking four types of random threshold values for combinations of the several types of sample data, the possible values of Tt also increase, and Tt can take a wide range of values between 0 and Ts.

  As described above, when the time measurement circuit 150 calculates a true trigger point using a random threshold, Tt can take a plurality of values for the same combination of sample data. Therefore, when a waveform is drawn on the display 90 based on the true trigger point, the waveform is drawn at a shifted time position, and as a result, trigger jitter may be generated. However, when the slew rate of the input signal is extremely slow, the trigger jitter is hardly a problem.

  FIG. 19 shows an example of a waveform when the slew rate of the input signal is relatively high near the random threshold. In the example shown in FIG. 19, as in the example shown in FIG. 14, the random threshold has four values. However, when the slew rate of the input signal is relatively high as shown in FIG. 19, Tt hardly changes even if the random threshold value takes four values. That is, the value of the true trigger point calculated by the time measurement circuit 150 is hardly affected even if the random threshold value is different. Therefore, when the slew rate of the input signal is relatively high as shown in FIG. 19, when a waveform is drawn based on the true trigger point, the deviation in the time axis direction that appears as trigger jitter is extremely small.

  An example of the operation of the digital oscilloscope 1 according to one embodiment will be described with reference to the flowchart in FIG.

  When the digital oscilloscope 1 starts measurement, the data acquisition processing circuit 30 starts first data acquisition (step S101). At this time, the random number generation circuit 112 updates the random number.

  The data acquisition processing circuit 30 determines whether the acquisition of data for the pre-trigger has been completed (step S102).

  When the data for the pretrigger has not been completely acquired (No in step S102), the data acquisition processing circuit 30 continues the processing in step S102.

  When the data for the pre-trigger has been completely captured (Yes in step S102), the data capture processing circuit 30 outputs a trigger enable signal to the digital trigger circuit 100 (step S103).

  The data acquisition processing circuit 30 determines whether a trigger has occurred, that is, whether a trigger signal has been received from the trigger output circuit 130 (step S104).

  If no trigger has occurred (No in step S104), the data acquisition processing circuit 30 continues the processing in step S104.

  If a trigger has occurred (Yes in step S104), it is determined whether or not the capture of data for the post-trigger has been completed (step S105).

  If the post-trigger data has not been completely acquired (No in step S105), the data acquisition processing circuit 30 continues the processing in step S105.

  On the other hand, the time measurement circuit 150 performs a process of calculating a true trigger point in parallel with step S105 (step S106).

  When the data capture for the post-trigger is completed (Yes in step S105) and the calculation processing of the true trigger point (step S106) is completed, the data capture processing circuit 30 ends the data capture (step S106). S107).

  The digital oscilloscope 1 determines whether the number of times of capturing data has expired (step S108). If the number of times of data acquisition has not expired (No in step S108), the data acquisition processing circuit 30 returns to step S101 and starts the next data acquisition. If the number of times of capturing data has expired (Yes in step S108), the digital oscilloscope 1 ends the measurement.

  Although the random number generation circuit 112 has been described as updating the random number at the start of the data acquisition in step S101, the random number may be updated at the end of the data acquisition in step S107. In this way, the random number generation circuit 112 updates the random number at the start of data capture or at the end of data capture, so that the random number does not change during data capture and during calculation of a true trigger. That is, the random threshold does not change during data acquisition and calculation of a true trigger.

  Although the calculation of the true trigger point in step S106 has been described as being performed in parallel with the post-trigger data acquisition in step S105, the processing in step S106 is performed after the processing in step S105 is completed. Is also good.

  According to the digital oscilloscope 1 according to one embodiment as described above, it is possible to prevent the calculated true trigger point from being biased to a specific value when the slew rate of the input signal is slow. More specifically, in the digital oscilloscope 1, the threshold generation circuit 110 generates a random threshold by randomly varying the trigger threshold set by the user, and the time measurement circuit 150 generates a random threshold before and after the trigger signal is output. A true trigger point is calculated based on the timing sample data and the random threshold. Therefore, even if the slew rate of the input signal is slow near the trigger threshold and the sample data before and after the trigger signal is output have the same value, the calculated true trigger point is biased to a specific value. There is no. Therefore, even if the display device 90 displays the waveform in the overwriting mode in a display method in which only the sample points are displayed by dots, the sample points do not exist only at limited positions. As a result, according to the digital oscilloscope 1 according to the embodiment, since the waveforms appear to be connected, the user can easily view the displayed waveform. Further, according to the digital oscilloscope 1 according to the embodiment, it is possible to perform automatic measurement of the time axis system (for example, automatic measurement of frequency or cycle). Further, according to the digital oscilloscope 1 according to one embodiment, in an equivalent sample of the random sampling method, data can be stored only in a limited slot, and it is possible to prevent the slot from being filled up.

(Another example of generating a random threshold)
The threshold generation circuit 110 may generate a random threshold by a method different from the method shown in FIG. With reference to FIGS. 21 to 24, another method of generating a random threshold by the threshold generation circuit 110 will be described.

  In the example shown in FIG. 21, the sample data is 8 bits, and the trigger threshold is 10 bits, which is a finer resolution than the sample data. The adder 111 discards digits lower than 1 LSB of the sample data, that is, the lower 2 bits of the trigger threshold, and adds the 2-bit random number generated by the random number generation circuit 112 to generate a random threshold.

  When the random threshold is generated by the method shown in FIG. 21, the binary signal output from the digital comparator 120 is not affected by the random number.

  In the example shown in FIG. 22, the sample data is 8 bits, and the trigger threshold is 10 bits, which is a finer resolution than the sample data. The adder 111 generates a random threshold by adding a 2-bit random number generated by the random number generation circuit 112 to a digit lower than 1 LSB of the sample data, that is, lower 2 bits of the trigger threshold.

  When the random threshold is generated by the method shown in FIG. 22, the binary signal output from the digital comparator 120 fluctuates under the influence of the random number.

  In the example shown in FIG. 23, the sample data is 10 bits, and the trigger threshold is 10 bits having the same resolution as the sample data. The adder 111 rounds down the lower 2 bits of the sample data and adds the 2-bit random number generated by the random number generation circuit 112 to generate a random threshold.

  When the random threshold is generated by the method shown in FIG. 23, the binary signal output by the digital comparator 120 fluctuates under the influence of the random number.

  In the example shown in FIG. 24, the sample data is 10 bits, and the trigger threshold is 10 bits having the same resolution as the sample data. The adder 111 generates a random threshold value by adding the 2-bit random number generated by the random number generation circuit 112 to the lower 2 bits of the sample data.

  When the random threshold value is generated by the method shown in FIG. 24, the binary signal output from the digital comparator 120 fluctuates under the influence of the random number.

  In the examples shown in FIGS. 21 to 24, the random number is described as having two bits, but the number of bits of the random number is not limited to this. The random number may be any number of bits.

(First Modification)
FIG. 25 shows a schematic configuration of a digital trigger circuit 200 according to a first modification. Regarding the digital trigger circuit 200 according to the first modification, differences from the digital trigger circuit 100 described with reference to FIGS. 11 and 12 will be mainly described, and description of similar contents will be omitted.

  The digital trigger circuit 200 includes a threshold generation circuit 210, a digital comparator 220, a trigger output circuit 230, a trigger memory 240, a time measurement circuit 250, and a latch circuit 260. The threshold generation circuit 210 includes an adder 211 and a random number generation circuit 212.

  Upon receiving the trigger signal from the trigger output circuit 230, the random number generation circuit 212 updates the random number at an arbitrary timing until the start of the next data acquisition.

  Upon receiving the trigger signal from the trigger output circuit 230, the latch circuit 260 latches and holds the random threshold value input from the threshold value generation circuit 210 at that time. The latch circuit 260 outputs the latched random threshold value to the time measurement circuit 250.

  In the digital trigger circuit 200 according to the first modification, the time measurement circuit 250 calculates a true trigger point using a random threshold value at the time when the trigger signal is output by the trigger output circuit 230. Therefore, even if the random number is updated after the trigger signal is output by the trigger output circuit 230, the calculation result of the true trigger point is not affected.

  An example of the operation of the digital trigger circuit 200 according to the first modification will be described with reference to the flowchart in FIG. In the description of the flowchart of FIG. 26, the description of the same parts as those of the flowchart of FIG. 20 will be omitted, and differences will be mainly described.

  If a trigger has occurred (Yes in step S204), the latch circuit 260 latches and holds the random threshold value input from the threshold value generation circuit 210 at that time. Further, upon receiving the trigger signal from the trigger output circuit 230, the random number generation circuit 212 updates the random number at an arbitrary timing until the start of the next data capture (step S205). As described above, according to the digital trigger circuit 200 according to the first modification, the random number generation circuit 212 may generate a random number to be used at the time of capturing the next data immediately after the trigger is generated. As a result, even when it takes time to generate a random number by the random number generation circuit 212, the dead time between data capture can be reduced.

  The time measurement circuit 250 performs a process of calculating a true trigger point in parallel with step S206 (step S207). At this time, the time measuring circuit 250 calculates a true trigger point using the random threshold value latched by the latch circuit 260 in step S205.

  In the flowchart shown in FIG. 26, the random number generation circuit 212 does not update the random number at the time of starting data capture in step S201 and at the end of data capture in step S208.

(Second Modification)
FIG. 27 shows a schematic configuration of a digital trigger circuit 300 according to the second modification. Regarding the digital trigger circuit 300 according to the second modification, differences from the digital trigger circuit 100 described with reference to FIGS. 11 and 12 will be mainly described, and description of similar contents will be omitted.

  The digital trigger circuit 300 includes a threshold generation circuit 310, a digital comparator 320, a trigger output circuit 330, a trigger memory 340, a time measurement circuit 350, an adder (second adder in the claims) 361, A random number generation circuit 362. The threshold generation circuit 310 includes an adder 311 and a random number generation circuit 312.

  The digital trigger circuit 300 according to the second modification adds a random number to the true trigger point calculated by the time measurement circuit 350.

  The adder 361 adds the random number generated by the random number generation circuit 362 to the value of the true trigger point received from the time measurement circuit 350, and changes the value of the true trigger point randomly.

  The random number generation circuit 362 generates a random number. It is desirable that the random number generated by the random number generation circuit 362 is a minute random number. Jitter can be reduced by making the random number generated by the random number generation circuit 362 a very small random number.

  For example, when the enlargement ratio of the waveform displayed on the display 90 is high, or when the number of slots is large at the time of equivalent sampling, the time resolution required for Tt is small. In this case, by adding a random number to the true trigger point calculated by the time measurement circuit 350, the true trigger point can be further dispersed. As a result, even if the enlargement ratio is high, the display waveform becomes easy for the user to see.

(Third Modification)
FIG. 28 shows a schematic configuration of a digital trigger circuit 400 according to the third modification. Regarding the digital trigger circuit 400 according to the third modified example, differences from the digital trigger circuit 300 according to the second modified example will be mainly described, and description of similar contents will be omitted.

  The digital trigger circuit 400 includes a threshold generation circuit 410, a digital comparator 420, a trigger output circuit 430, a trigger memory 440, a time measurement circuit 450, and an adder 461. The threshold generation circuit 410 includes an adder 411 and a random number generation circuit 412.

  In the digital trigger circuit 400 according to the third modification, the adder 461 that adds a random number to the value of the true trigger point received from the time measurement circuit 450 receives the random number from the random number generation circuit 412 included in the threshold value generation circuit 410 This is different from the digital trigger circuit 300 according to the second modification in the point.

  As described above, by sharing the random number generation circuit 412 with the adder 411 and the adder 461, the circuit size of the digital trigger circuit 400 can be reduced.

  It will be apparent to one skilled in the art that the present disclosure may be embodied in other predetermined forms than those described above without departing from its spirit or essential characteristics. Accordingly, the foregoing description is by way of example and not limitation. The scope of the disclosure is defined by the appended claims, not by the foregoing description. Some of the changes that come within their equivalents are embraced therein.

  For example, the arrangement, the number, and the like of the respective components described above are not limited to the above description and the contents illustrated in the drawings. The arrangement and number of the components may be arbitrarily configured as long as the function can be realized.

1 digital oscilloscope 10 input circuit 20 AD converter (ADC)
Reference Signs List 30 data acquisition processing circuit 40 primary memory 50 secondary data processing circuit 60 secondary memory 70 display data processing circuit 80 display memory 90 display 100, 200, 300, 400 digital trigger circuit 110, 210, 310, 410 Threshold generation circuit 111, 211, 311, 411 Adder (first adder)
112, 212, 312, 412 Random number generation circuit 120, 220, 320, 420 Digital comparator 130, 230, 330, 430 Trigger output circuit 140, 240, 340, 440 Trigger memory 150, 250, 350, 450 Time measurement circuit 260 Latch Circuits 361, 461 Adder (second adder)
362 Random number generation circuit 600 Digital trigger circuit 610 Digital comparator 620 Trigger output circuit 630 Trigger memory 640 Time measurement circuit

Claims (14)

An AD converter that converts an analog input signal into digital data;
A threshold generation circuit that generates a variation threshold by varying a trigger threshold set by a user;
A digital comparator that compares the digital data with the variation threshold and outputs a binary signal;
A trigger output circuit that outputs a trigger signal based on the binary signal;
A digital oscilloscope comprising: a time measurement circuit that calculates a true trigger point based on the digital data before and after the output of the trigger signal and the variation threshold. The digital oscilloscope according to claim 1,
The threshold generation circuit,
Including a random number generation circuit for generating a random number,
A digital oscilloscope that generates a random threshold value as the variation threshold value by randomly varying the trigger threshold value using the random number. The digital oscilloscope according to claim 2,
The threshold generation circuit,
A first adder,
The digital oscilloscope, wherein the first adder adds the random number to a value based on the trigger threshold and changes the trigger threshold randomly. The digital oscilloscope according to claim 3,
The digital oscilloscope, wherein the first adder adds the random number smaller than an LSB (Least Significant Bit) of the digital data to the trigger threshold, and varies the trigger threshold randomly. The digital oscilloscope according to claim 3,
The first adder adds the random number smaller than the LSB of the digital data to a value obtained by cutting off a value smaller than the LSB of the digital data from the trigger threshold, and randomly changes the trigger threshold. Digital oscilloscope. The digital oscilloscope according to claim 3,
The digital oscilloscope, wherein the first adder truncates lower-order bits from the trigger threshold, adds the random number corresponding to the truncated lower-order bits, and randomly varies the trigger threshold. The digital oscilloscope according to claim 3,
The digital oscilloscope, wherein the first adder adds the random number corresponding to lower several bits of the trigger threshold and changes the trigger threshold randomly. The digital oscilloscope according to any one of claims 3 to 7,
Further comprising a second adder,
The digital oscilloscope, wherein the second adder randomly varies the true trigger point calculated by the time measurement circuit. The digital oscilloscope according to claim 8,
The digital oscilloscope, wherein the second adder randomly varies the true trigger point using a random number. The digital oscilloscope according to any one of claims 1 to 9,
The digital oscilloscope further comprising: a latch circuit that, when receiving the trigger signal from the trigger output circuit, latches and holds the variation threshold at that time. The digital oscilloscope according to any one of claims 1 to 10,
A digital oscilloscope further comprising a display for displaying a waveform based on the digital data. The digital oscilloscope according to any one of claims 1 to 11,
The digital oscilloscope, wherein the digital oscilloscope performs equivalent sampling by a random sampling method. The digital oscilloscope according to any one of claims 1 to 11,
The digital oscilloscope, wherein the digital oscilloscope enlarges the display so that the display resolution on the time axis is smaller than the sampling resolution. Converting an analog input signal to digital data;
Fluctuating a trigger threshold set by the user to generate a fluctuation threshold,
Comparing the digital data with the variation threshold to output a binary signal;
Outputting a trigger signal based on the binary signal;
Calculating a true trigger point based on the digital data before and after the output of the trigger signal and the variation threshold.

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