JP7138001B2 - How to select processing conditions - Google Patents

Description

The present invention relates to a processing condition selection method for selecting processing conditions for removing a functional layer.

A semiconductor wafer on which a functional layer such as a Low-k film is laminated is irradiated with a laser to form two laser-processed grooves in which the functional layer is removed on the dividing line, and the space between the two laser-processed grooves is cut. A processing method of cutting with a blade and dividing into individual devices is adopted (see Patent Document 1, for example).

JP 2003-320466 A

In the processing method disclosed in Patent Document 1, when selecting processing conditions for dividing a semiconductor wafer on which new devices are formed, the output of the laser, the feed speed of the chuck table that holds the semiconductor wafer, the repetition frequency of the laser, The ablation process is carried out by changing various parameters of the processing conditions such as, etc., and the processing results are observed to adopt appropriate processing conditions as the processing conditions when actually processing the semiconductor wafer.

After performing ablation processing by changing various parameters of the processing conditions described above, the operator observes the laser-processed groove with a microscope to check whether the functional layer remains at the bottom of the laser-processed groove. However, observation using a microscope is inaccurate because it is difficult to identify the functional layer when silicon or the like that forms the substrate under the functional layer melts and adheres as debris.

In addition, in the processing method disclosed in Patent Document 1, when the laser oscillator of the laser processing apparatus for forming the laser processing groove is changed, even if processing is performed under the same processing conditions as before the replacement, there is an individual difference in the laser oscillator itself. Therefore, it was necessary to check whether the functional layer remained, but it could not be confirmed accurately. In addition, the processing method disclosed in Patent Document 1 is not limited to the Low-k film, and has the same problem when a metal component called a TEG (Test Element Group) is formed on the dividing line. rice field.

The present invention has been made in view of such problems, and an object of the present invention is to make it possible to easily confirm whether or not a functional layer remains at the groove bottom of a processed groove, and to set appropriate processing conditions. It is an object of the present invention to provide a method for selecting machining conditions that enables easy selection.

In order to solve the above-described problems and achieve the object, a processing condition selection method of the present invention provides a processing condition for selecting processing conditions for removing a functional layer of a semiconductor wafer having a functional layer laminated on the surface of a substrate. A condition selection method comprising: a processing groove forming step of setting arbitrary processing conditions and irradiating the functional layer with a laser beam having a wavelength at which the functional layer absorbs to form a processing groove; and the processing groove forming step. a plasma etching step of etching the processing groove with a plasma that reacts with the substrate but does not react with the functional layer after being performed; and observing the processing groove after performing the plasma etching step to determine whether the functional layer has been removed. and a selection step of selecting an arbitrary processing condition as an appropriate processing condition.

In the processing condition selection method, two or more arbitrary processing conditions may be set, and an appropriate processing condition may be selected.

In the processing condition selection method, the functional layer may be a low dielectric constant insulating film or TEG.

In the method for selecting processing conditions, the substrate may be silicon.

The method for selecting processing conditions of the present invention makes it possible to easily confirm whether or not the functional layer remains at the bottom of the laser-processed groove, and has the effect of being able to easily select appropriate processing conditions. .

FIG. 1 is a perspective view showing an example of a semiconductor wafer to be processed which is processed under processing conditions selected by the processing condition selection method according to the first embodiment. FIG. 2 is a flow chart showing the flow of the processing condition selection method according to the first embodiment. FIG. 3 is a perspective view showing a configuration example of a laser processing apparatus used in the processing groove forming step of the processing condition selection method shown in FIG. 4 is a cross-sectional view schematically showing a state in which the laser processing apparatus is performing alignment in the processing groove forming step of the processing condition selection method shown in FIG. 2. FIG. FIG. 5 is a cross-sectional view schematically showing a state in which a laser processing apparatus forms a processed groove in the processed groove forming step of the processing condition selection method shown in FIG. FIG. 6 is a plan view of a semiconductor wafer in which grooves are formed under arbitrary processing conditions in the groove forming step of the method for selecting processing conditions shown in FIG. FIG. 7 is a plan view of a semiconductor wafer in which processed grooves are formed under processing conditions different from those of FIG. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIGS. 6 and 7. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 7. FIG. FIG. 10 is a cross-sectional view showing the configuration of an etching apparatus used in the plasma etching step of the method for selecting processing conditions shown in FIG. FIG. 11 is a cross-sectional view showing a state in which the semiconductor wafer shown in FIG. 8 is etched in the plasma etching step of the method for selecting processing conditions shown in FIG. FIG. 12 is a cross-sectional view showing a state in which the semiconductor wafer shown in FIG. 9 is etched in the plasma etching step of the method for selecting processing conditions shown in FIG. FIG. 13 is a plan view of the semiconductor wafer having the grooves formed therein shown in FIG. 6 after the plasma etching step. FIG. 14 is a plan view of the semiconductor wafer having the grooves formed therein shown in FIG. 7 after the plasma etching step. FIG. 15 is a cross-sectional view taken along line XV-XV in FIGS. 13 and 14. FIG. 16 is a cross-sectional view taken along line XVI--XVI in FIG. 14. FIG. FIG. 17 is a diagram showing a binary image obtained by imaging a semiconductor wafer having processed grooves formed under arbitrary processing conditions in the selection step of the processing condition selection method according to the second embodiment. FIG. 18 is a diagram showing a binary image obtained by imaging a semiconductor wafer having processed grooves formed under processing conditions different from those of FIG. 17 in the selection step of the processing condition selection method according to the second embodiment. FIG. 19 is a perspective view showing an example of a semiconductor wafer to be processed to be processed under processing conditions selected by the processing condition selection method according to the modification of the first and second embodiments.

A form (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the following embodiments. In addition, the components described below include those that can be easily assumed by those skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. In addition, various omissions, substitutions, or changes in configuration can be made without departing from the gist of the present invention.

[Embodiment 1]
A method for selecting machining conditions according to Embodiment 1 of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing an example of a semiconductor wafer to be processed which is processed under processing conditions selected by the processing condition selection method according to the first embodiment. FIG. 2 is a flow chart showing the flow of the processing condition selection method according to the first embodiment.

The processing condition selection method according to the first embodiment is a method of selecting processing conditions for processing the semiconductor wafer 1 shown in FIG. In Embodiment 1, the semiconductor wafer 1 is a disk-shaped semiconductor wafer having a substrate 2 made of silicon. It may consist of As shown in FIG. 1, the semiconductor wafer 1 has a functional layer 4 laminated on a surface 3 of a substrate 2 and a plurality of devices 5 formed thereon. The functional layer 4 is a low dielectric constant insulating film (Low-k film) made of an inorganic film such as SiO ₂ , SiOF, BSG (SiOB), or an organic film such as a polymer film such as polyimide or parylene. It is composed of A functional layer 4 is laminated on the surface 3 of the substrate 2 .

The devices 5 are formed in respective regions partitioned by a plurality of intersecting dividing lines 6 on the surface 3 . That is, the planned division line 6 divides the plurality of devices 5 . The device is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration). The circuits that make up device 5 are supported by functional layer 4 .

In the first embodiment, after the functional layer 4 at both ends of each dividing line 6 in the width direction is removed to expose the substrate 2, the portion between the substrates 2 exposed at both ends in the width direction is cut (not shown). It is cut by an apparatus or the like and divided into individual devices 5 .

The processing condition selection method according to the first embodiment is a method of selecting processing conditions for removing the functional layer 4 of the semiconductor wafer 1 shown in FIG. 1 from the surface 3 of the substrate 2 . The processing condition selection method includes, as shown in FIG. 2, a processing groove forming step ST1, a plasma etching step ST2, and a selection step ST3.

(Processing groove forming step)
FIG. 3 is a perspective view showing a configuration example of a laser processing apparatus used in the processing groove forming step of the processing condition selection method shown in FIG. 4 is a cross-sectional view schematically showing a state in which the laser processing apparatus is performing alignment in the processing groove forming step of the processing condition selection method shown in FIG. 2. FIG. FIG. 5 is a cross-sectional view schematically showing a state in which a laser processing apparatus forms a processed groove in the processed groove forming step of the processing condition selection method shown in FIG.

The processing groove forming step ST1 is performed using the laser processing apparatus 10 shown in FIG. In the first embodiment, the laser processing apparatus 10 attaches the back surface 7 of the semiconductor wafer 1 having the adhesive tape 8 attached to the back surface 7 of the substrate 2 and the annular frame 9 attached to the outer peripheral edge of the adhesive tape 8 to the chuck table. 11 is a device for sucking and holding on a holding surface 12 of 11 . The laser processing apparatus 10 moves the chuck table 11 along the dividing line 6 relative to the laser beam irradiation unit 13 based on the set processing conditions, while the functional layer 4 is removed from the laser beam irradiation unit 13. It is also an apparatus for irradiating the functional layer 4 on the planned dividing line 6 with a pulsed laser beam 14 having an absorbing wavelength to form a processed groove 100 on the planned dividing line 6 . In Embodiment 1, the semiconductor wafer 1 has the adhesive tape 8 attached to the back surface 7 of the substrate 2 and the annular frame 9 attached to the outer peripheral edge of the adhesive tape 8, but the present invention is not limited to this. .

In Embodiment 1, the processing conditions are the wavelength of the laser beam 14, the average output of the laser beam 14, the repetition frequency of the laser beam 14, the spot diameter of the focal point of the laser beam 14 on the functional layer 4, and the moving speed of the chuck table 11. at least one of them.

In the processing groove forming step ST1, arbitrary processing conditions are set, and the laser processing device 10 irradiates the functional layer 4 with a laser beam 14 from the front surface 3 side of the substrate 2 of the semiconductor wafer 1 along the dividing lines 6, This is the step of forming a machined groove 100 on the planned division line 6 . In the processing groove forming step ST1, the operator places the back surface 7 side of the semiconductor wafer 1 on the holding surface 12 of the chuck table 11 via the adhesive tape 8 at the outer edge, and operates the input unit 15 to operate the control unit, which is a computer. 16, and the control unit 16 stores the set machining conditions. In Embodiment 1, in the machined groove forming step ST1, the control unit 16 sets two or more machining conditions different from each other.

In the processing groove forming step ST1, the operator operates the input unit 15 to input an instruction to start forming the processing groove 100, and when the control unit 16 receives the instruction to start forming the processing groove 100, the laser processing device 10 The back surface 7 side of the semiconductor wafer 1 is held by suction on the holding surface 12 of the chuck table 11 via the adhesive tape 8 , and the annular frame 9 is clamped by the clamping portion 17 . In the processing groove forming step ST1, the laser processing apparatus 10 positions the chuck table 11 below the imaging unit 20 using the X-axis moving unit 18, the Y-axis moving unit 19, etc. As shown in FIG. An image of the surface 3 of the wafer 1 is picked up to detect the line 6 to be divided, and alignment for aligning the semiconductor wafer 1 and the laser beam irradiation unit 13 is performed.

As shown in FIG. 4, the imaging unit 20 includes a CCD (Charge Coupled Device) imaging element 21 for imaging the surface of the semiconductor wafer 1 held on the chuck table 11, and epi-illumination (also referred to as coaxial illumination) 22. , oblique lighting 23 . The CCD imaging element 21 images the surface 3 of the semiconductor wafer 1 held on the chuck table 11 through the condenser lens 24 .

The epi-illumination 22 irradiates illumination light 25 onto the surface of the semiconductor wafer 1 held on the chuck table 11 through a condenser lens 24 . The optical axis of the illumination light 25 is coaxial with the optical axis of the CCD imaging device 21 . The oblique illumination 23 irradiates the surface of the semiconductor wafer 1 held on the chuck table 11 with illumination light 26 without passing through the condenser lens 24 . The optical axis of the illumination light 26 intersects the optical axis of the CCD imaging device 21 . The epi-illumination 22 and oblique illumination 23 include, for example, halogen light sources and LEDs (Light Emitting Diodes), and the amount of light is adjusted by the control unit 16 . The amount of light of the epi-illumination 22 and the oblique illumination 23 is set by the control unit 16 to the amount of light that can detect the line to be divided 6 when alignment is performed.

In the processing groove forming step ST1, as shown in FIG. 5, the laser processing apparatus 10 relatively moves the chuck table 11 along the planned dividing line 6 with respect to the laser beam irradiation unit 13 according to the set processing conditions. Meanwhile, the functional layer 4 is irradiated with the laser beam 14 from the laser beam irradiation unit 13 by setting the focal point of the laser beam 14 having a wavelength that is absorptive to the functional layer 4 on the dividing line 6 . In the processed groove forming step ST<b>1 , the laser processing device 10 performs ablation processing on the functional layer 4 on the dividing line 6 to form a concave processed groove 100 from the functional layer 4 .

Further, in the first embodiment, in the processing groove forming step ST1, the laser processing device 10 forms the processing groove 100 having a predetermined length at different positions for each set processing condition.

FIG. 6 is a plan view of a semiconductor wafer on which grooves are formed under arbitrary processing conditions in the groove forming step of the method for selecting processing conditions shown in FIG. FIG. 7 is a plan view of a semiconductor wafer in which processed grooves are formed under processing conditions different from those of FIG. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIGS. 6 and 7. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 7. FIG.

In the processed groove forming step ST1, the processed groove 100 formed under arbitrary processing conditions has the functional layer 4 removed from the groove bottom 101 over the entire length of the processed groove 100, as shown in FIGS. , the substrate 2 is exposed. 7, 8 and 9, in the machined groove forming step ST1, the machined groove 100 formed under machining conditions different from the arbitrary machining conditions functions from the groove bottom 101 in a part of the machined groove 100, as shown in FIGS. The layer 4 is removed to expose the substrate 2 , and the functional layer 4 remains on the groove bottom 101 in the remaining portion, leaving the substrate 2 covered with the functional layer 4 . Although this specification only shows the machined grooves 100 shown in FIGS. 6 and 7, the machined grooves 100 formed in the present invention are not limited to those shown in FIGS.

In the processing condition setting method, when all the processed grooves 100 are formed according to all the processing conditions set by the laser processing apparatus 10, the process proceeds to the plasma etching step ST2.

(plasma etching step)
FIG. 10 is a cross-sectional view showing the configuration of an etching apparatus used in the plasma etching step of the method for selecting processing conditions shown in FIG. FIG. 11 is a cross-sectional view showing a state in which the semiconductor wafer shown in FIG. 8 is etched in the plasma etching step of the method for selecting processing conditions shown in FIG. FIG. 12 is a cross-sectional view showing a state in which the semiconductor wafer shown in FIG. 9 is etched in the plasma etching step of the method for selecting processing conditions shown in FIG.

In the plasma etching step ST2, plasma 31 (shown in FIGS. 11 and 12) which reacts with the substrate 2 but does not react with the functional layer 4 is performed using the etching apparatus 30 shown in FIG. ) to etch the processed grooves 100 . The etching apparatus 30 shown in FIG. 10 used in the plasma etching step ST2 does not generate plasma from an etching gas or the like in a sealed space containing a semiconductor wafer 1 in a vacuum chamber by applying high-frequency power to electrodes. This is a remote plasma type plasma etching apparatus in which plasma 31 generated outside the vacuum chamber 32 is introduced into a closed space 33 within the vacuum chamber 32 . In the first embodiment, the remote plasma type etching apparatus 30 is used in the plasma etching step ST2. good.

In Embodiment 1, a fluorine-based gas such as SF ₆ , C ₄ F ₈ or CF ₄ is used as an etching gas in which the plasma 31 reacts with the silicon forming the substrate 2 but does not react with the functional layer 4 . In the invention, the etching gas is not limited to these.

In the plasma etching step ST2, the etching device 30 conveys the semiconductor wafer 1 to the closed space 33 in the vacuum chamber 32, and places the semiconductor wafer 1 on the chuck table 34 (electrostatic chuck, ESC) via the adhesive tape 8. The rear surface 7 side of 1 is held by suction. In the plasma etching step ST2, the control unit 36, which is a computer of the etching apparatus 30, activates the gas discharge unit 35 to evacuate the closed space 33 in the vacuum chamber 32, and activates the inert gas supply unit (not shown) to connect the pipes. 37 to supply an inert gas into the sealed space 33 to maintain the pressure in the sealed space 33 at a predetermined pressure, and operate the coolant supply unit 38 to provide a Helium gas, which is a coolant, is circulated in the passage 40 .

In the plasma etching step ST2, the etching apparatus 30 operates the etching gas supply unit 41 to supply the etching gas into the supply pipeline 42, and supplies the etching gas from the high frequency power supply 44 to the electrode 43 attached to the supply pipeline 42. A high-frequency power for generating plasma 31 is applied from a high-frequency power source 44 and a high-frequency power for attracting ions to the lower electrode 28 is applied from a high-frequency power supply 44 . Then, the plasma 31 is generated from the etching flowing through the supply pipeline 42 , and this plasma 31 is supplied to the sealed space 33 through the supply pipeline 42 .

In the plasma etching step ST2, since high-frequency power is applied to the electrodes 39 and 43, the plasma 31 is likely to be drawn to the surface of the semiconductor wafer 1, as shown in FIGS. However, in Embodiment 1, the etching gas is a fluorine-based gas and the substrate 2 is made of silicon. It is not attracted to and does not react with the functional layer 4 (or reacts very little compared to the silicon that constitutes the substrate 2).

In the plasma etching step ST2, the plasma 31 etches the substrate 2 exposed at the groove bottom 101 of the processing groove 100, and advances the processing groove 100 toward the back surface 7 at the position where the substrate 2 is exposed at the groove bottom 101. , deeply forming. Further, in the plasma etching step ST2, the plasma 31 does not advance the processed groove 100 toward the back surface 7 at the position where the functional layer 4 remains on the groove bottom 101, so that the functional layer 4 remains on the groove bottom 101. maintain.

In the plasma etching step ST2, the etching device 30 plasma-etches the semiconductor wafer 1 held on the chuck table 11 for a predetermined time, and then proceeds to the selection step ST3.

13 is a plan view after the plasma etching step of the semiconductor wafer in which the processing grooves shown in FIG. 6 are formed. FIG. 14 is a plan view of the semiconductor wafer having the grooves formed therein shown in FIG. 7 after the plasma etching step. FIG. 15 is a cross-sectional view taken along line XV-XV in FIGS. 13 and 14. FIG. 16 is a cross-sectional view taken along line XVI--XVI in FIG. 14. FIG.

In the plasma etching step ST2, the processed grooves 100 shown in FIGS. 13 and 14 of the semiconductor wafer 1 which have been plasma-etched for a predetermined time are different from those shown in FIG. As shown in 15, it is formed much deeper than before the plasma etching step ST2. In the plasma etching step ST2, the processed grooves 100 shown in FIGS. 13 and 14 of the semiconductor wafer 1 plasma-etched for a predetermined time are located at positions where the functional layer 4 remained on the groove bottom 101 before the plasma etching step ST2. 16, the state in which the functional layer 4 remains on the groove bottom 101 is maintained.

(Selection step)
The selection step ST3 is a step of observing the processed groove 100 after performing the plasma etching step ST2 and selecting arbitrary processing conditions under which the functional layer 4 is removed as appropriate processing conditions. In the first embodiment, in the selection step ST3, the semiconductor wafer 1 after the plasma etching step ST2 is suction-held on the holding surface 12 of the chuck table 11 of the laser processing apparatus 10 shown in FIG.

In the selection step ST3, the operator operates the input unit 15 to cause the imaging unit 20 to sequentially image the machined grooves 100 formed at different positions for each machining condition, and display them on the display unit 27 connected to the control unit 16. Then, the machined grooves 100 are observed one by one. The processed groove 100 displayed on the display unit 27 is formed much deeper than after the processed groove forming step ST1 at the position where the substrate 2 was exposed at the groove bottom 101 in the plasma etching step ST2, and the groove bottom 101 functions. Since the state where the functional layer 4 remained on the groove bottom 101 was maintained at the position where the layer 4 remained, the position where the functional layer 4 remained on the groove bottom 101 and the substrate 2 were exposed. The contrast with the position (difference in image color and density) is made larger than before the plasma etching step ST2. In the first embodiment, the machined grooves 100 are imaged by the imaging unit 20 in the selection step ST3, but in the present invention, the operator may observe each machined groove 100 with a microscope.

In the selection step ST3, if there is a processed groove 100 in which the substrate 2 is exposed on the groove bottom 101 over the entire length of the processed grooves 100 sequentially displayed on the display unit 27, the operator The processing conditions under which the processing groove 100 with the substrate 2 exposed at the groove bottom 101 is formed are selected as appropriate processing conditions for actual processing of the semiconductor wafer 1 . Further, in the selection step ST3, if there are a plurality of processed grooves 100 in which the substrate 2 is exposed on the groove bottom 101 over the entire length of the processed grooves 100 sequentially displayed on the display unit 27, the operator An arbitrary processing condition is selected as an appropriate processing condition used for actual processing of the semiconductor wafer 1 from among a plurality of processing conditions under which the processing groove 100 in which the substrate 2 is exposed at the groove bottom 101 is formed.

Further, in the selection step ST3, if there is no machined groove 100 in which the substrate 2 is exposed on the groove bottom 101 over the entire length among the machined grooves 100 sequentially displayed on the display unit 27, the operator selects the groove bottom. The processing conditions that form the processing groove 100 with the least remaining functional layer 4 in the 101 may be selected as appropriate processing conditions used for actual processing of the semiconductor wafer 1, and at least one or more processing conditions are set again. Therefore, the process groove forming step ST1 may be performed in order. The machining condition selection method according to the first embodiment ends when the selection step ST3 is performed.

In the semiconductor wafer 1, after the processed grooves 100 are formed at both ends in the width direction of each line to be divided 6 by ablation processing in which a laser beam is irradiated according to the processing conditions selected in the selection step ST3, the processed grooves 100 are separated from each other. It is cut by a cutting machine or the like (not shown) and divided into individual devices 5 .

In the processing condition selection method according to the first embodiment, the plasma etching step ST2 is performed after the processing groove forming step ST1, and the plasma 31 that does not react with the functional layer 4 is used in the plasma etching step ST2. This increases the difference in depth between the position where the functional layer 4 remains on the groove bottom 101 of 100 and the position where the substrate 2 is exposed. For this reason, in the processing condition selection method, when observing the processed groove 100 in the selection step ST3, the contrast between the position where the functional layer 4 remains on the groove bottom 101 and the position where the substrate 2 is exposed is determined by the plasma. It can be made larger than before the etching step ST2, and the height difference between the position where the substrate 2 is exposed on the groove bottom 101 and the position where the functional layer 4 remains on the groove bottom 101 becomes clear. As a result, the processing condition selection method makes it possible to easily confirm whether or not the functional layer 4 remains on the groove bottom 101 of the processing groove 100, and to easily select appropriate processing conditions. It works.

[Embodiment 2]
A method for selecting machining conditions according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 17 is a diagram showing a binary image obtained by imaging a semiconductor wafer having processed grooves formed under arbitrary processing conditions in the selection step of the processing condition selection method according to the second embodiment. FIG. 18 is a diagram showing a binary image obtained by imaging a semiconductor wafer having processed grooves formed under processing conditions different from those of FIG. 17 in the selection step of the processing condition selection method according to the second embodiment. In addition, FIG.17 and FIG.18 attach|subjects the same code|symbol to the same part as Embodiment 1, and abbreviate|omits description.

The machining condition selection method according to the second embodiment is the same as that of the first embodiment except for the selection step ST3. In the selection step ST3 of the processing condition selection method according to the second embodiment, when the imaging unit 20 images each processing groove 100, the amount of light received when the CCD imaging element 21 images the functional layer 4 is predetermined. Illumination lights 25 and 26 of epi-illumination 22 and oblique illumination 23 exceed the threshold so that the amount of light received when the CCD imaging element 21 captures an image of the substrate 2 exposed at the groove bottom 101 of the processed groove 100 is equal to or less than the threshold. is set.

In the second embodiment, in the selection step ST3, the control unit 16, which is the computer of the laser processing apparatus 10, binarizes the image obtained by the imaging unit 20 capturing each processed groove 100 with the threshold value described above. 17 and 18 to generate the binary images 201 and 202 shown in FIGS. Specifically, in the second embodiment, in the selection step ST3, the control unit 16 causes the area of the image captured by the CCD imaging device 21 in which the amount of received light exceeds a predetermined threshold value to be white (also referred to as 1 in binarization). 17 and 18), and the region below the threshold is black (also called binarization zero, shown by dense parallel lines in FIGS. 17 and 18). 17 is a binary image of the semiconductor wafer shown in FIG. 13, and FIG. 18 is a binary image of the semiconductor wafer shown in FIG.

In the second embodiment, in the selection step ST3, the control unit 16 extracts the processed groove 100 from the generated binary images 201 and 202, and calculates the area of the functional layer 4 within the processed groove 100. FIG. In the second embodiment, in the selection step ST3, the control unit 16 displays the area of the functional layer 4 in each processed groove 100 on the display unit 27. FIG. In the second embodiment, in the selection step ST3, the operator then selects appropriate processing conditions based on the area of the functional layer 4 in each processed groove 100 displayed on the display unit 27, as in the first embodiment. . Further, in the present invention, in the selection step ST3, the display unit 27 may display the binary images 201 and 202, and the control unit 16 selects the machining condition with the largest area of the machined groove 100 as the appropriate machining condition. may be selected as

In this case, the laser processing device 10 is a processing condition selection device that selects processing conditions for removing the functional layer 4 of the semiconductor wafer 1 from the surface 3 of the substrate 2, and the laser beam irradiation unit 13 processes the functional layer 4. The imaging unit 20 is an imaging means for imaging the processed grooves 100 formed in the semiconductor wafer 1, and the control unit 16 selects an appropriate image from the image captured by the imaging unit 20. This is a selection means for selecting machining conditions.

In the method for selecting processing conditions according to the second embodiment, as in the first embodiment, the plasma etching step ST2 is performed after the processing groove forming step ST1, and the plasma 31 that does not react with the functional layer 4 is used in the plasma etching step ST2. This increases the difference in depth between the position where the functional layer 4 remains on the groove bottom 101 of the processed groove 100 after the etching step ST2 and the position where the substrate 2 is exposed. Further, in the processing condition selection method according to the second embodiment, the control unit 16 calculates the area of the functional layer 4 on the groove bottom 101 of each processing groove 100 . As a result, the processing condition selection method makes it possible to easily confirm whether or not the functional layer 4 remains on the groove bottom 101 of the processing groove 100, and to easily select appropriate processing conditions. It works.

[Modification]
A method for selecting processing conditions according to modifications of the first and second embodiments of the present invention will be described with reference to the drawings. FIG. 19 is a perspective view showing an example of a semiconductor wafer to be processed to be processed under processing conditions selected by the processing condition selection method according to the modification of the first and second embodiments. In addition, FIG. 19 attaches|subjects the same code|symbol to the same part as Embodiment 1 and Embodiment 2, and abbreviate|omits description.

The semiconductor wafer 1 to be processed under the processing conditions selected by the processing condition selection method according to the modified example has the functional layer 4 in addition to the low dielectric constant insulating film (Low-k film), TEG (Test Element Group ) and a dummy pattern for CMP (Chemical Mechanical Polishing). The TEG is a test pattern made of metal or the like and used to find problems in the design and manufacture of the device 5 . The dummy pattern for CMP is intended to uniformly grind the semiconductor wafer 1 during CMP polishing and to suppress variations in the thickness of the semiconductor wafer 1 .

In the method of selecting processing conditions according to the modification, as in the first and second embodiments, the plasma etching step ST2 is performed after the processing groove forming step ST1, and the plasma 31 that does not react with the functional layer 4 is used in the plasma etching step ST2. Therefore, the difference in depth between the position where the functional layer 4 remains on the groove bottom 101 of the processed groove 100 after the plasma etching step ST2 and the position where the substrate 2 is exposed is increased. As a result, the processing condition selection method according to the modification makes it possible to easily confirm whether or not the functional layer 4 remains on the groove bottom 101 of the processing groove 100, as in the first and second embodiments. As a result, it is possible to easily select appropriate processing conditions.

It should be noted that the present invention is not limited to the above-described embodiments and the like. That is, various modifications can be made without departing from the gist of the present invention. For example, in the present invention, the functional layer 4 of the semiconductor wafer 1 may be an oxide film or nitride film formed on the surface of the semiconductor wafer 1 . In short, according to the present invention, the functional layer 4 may be provided with at least one of a low dielectric constant insulating film (Low-k film), a metal part 4-1, an oxide film and a nitride film. Further, in Embodiments 1 and 2, the selection step ST3 was performed using the laser processing apparatus 10, but in the present invention, in the selection step ST3, a unit that requires the same functions as the imaging unit 20 and the control unit 16 You may use the apparatus different from the laser processing apparatus 10 provided with.

1 semiconductor wafer 2 substrate 3 surface 4 functional layer 4-1 metal part (TEG)
14 Laser beam 31 Plasma 100 Processed groove ST1 Processed groove forming step ST2 Plasma etching step ST3 Selection step

Claims (4)

A processing condition selection method for selecting processing conditions for removing a functional layer of a semiconductor wafer having a functional layer laminated on the surface of a substrate, comprising:
a processing groove forming step of setting arbitrary processing conditions and irradiating the functional layer with a laser beam having a wavelength at which the functional layer absorbs to form processing grooves;
a plasma etching step of etching the working groove with a plasma that reacts with the substrate but not with the functional layer after performing the working groove forming step;
a selection step of observing the processed groove after performing the plasma etching step and selecting arbitrary processing conditions under which the functional layer is removed as appropriate processing conditions;
A processing condition selection method, comprising: Set two or more arbitrary processing conditions,
2. The method of selecting machining conditions according to claim 1, wherein suitable machining conditions are selected. 3. The method of selecting processing conditions according to claim 1, wherein said functional layer is a low dielectric constant insulating film or TEG. 4. The method of selecting processing conditions according to claim 1, wherein said substrate is silicon.

Images