JP7099675B1 - Etching method, semiconductor device manufacturing method, program and plasma processing device - Google Patents

Abstract

An etching method, a semiconductor device manufacturing method, and a plasma processing apparatus capable of improving the selectivity of a metal-containing mask are provided. Kind Code: A1 An etching method includes providing a substrate for a logic device comprising a silicon oxide layer and a tungsten-containing mask having an opening defined by sidewalls over the silicon oxide layer; and forming a plasma from the process gas to etch the silicon oxide layer through the opening while forming a tungsten-containing protective layer on the top and sidewalls of the tungsten-containing mask; The thickness of the protective layer formed on top of the tungsten-containing mask is greater than the thickness of the protective layer formed on the sidewalls of the tungsten-containing mask. [Selection drawing] Fig. 4

Description

The present disclosure relates to an etching method, a method for manufacturing a semiconductor device, and a plasma processing device.

When an insulating film such as an oxide film is etched using plasma such as a gas containing carbon and fluorine, WF6 gas is added to the etching gas in order to suppress shape abnormalities caused by local charging during etching. It has been proposed to form a conductive layer in.

Japanese Unexamined Patent Publication No. 9-50984

The present disclosure provides an etching method, a method for manufacturing a semiconductor device, and a plasma processing device capable of improving the selection ratio of a metal-containing mask.

The etching method according to one aspect of the present disclosure includes a step of providing a substrate for a logic device provided with a silicon oxide layer and a tungsten-containing mask having an opening defined by a side wall on the silicon oxide layer, and a treatment including a tungsten-containing gas. It has a step of supplying a gas and a step of etching a silicon oxide layer through an opening while generating plasma from the processing gas and forming a protective layer containing tungsten on the upper portion and the side wall of the tungsten-containing mask. The thickness of the protective layer formed on the upper part of the tungsten-containing mask is larger than the thickness of the protective layer formed on the side wall of the tungsten-containing mask.

According to the present disclosure, the selection ratio of the metal-containing mask can be improved.

FIG. 1 is a schematic cross-sectional view showing an example of a plasma processing apparatus according to an embodiment of the present disclosure. FIG. 2 is a diagram schematically showing an example of the structure of the substrate etched by the plasma processing apparatus according to the present embodiment. FIG. 3 is a diagram schematically showing an example of the progress of etching of the substrate in this embodiment. FIG. 4 is a flowchart showing an example of the etching process in the present embodiment. FIG. 5 is a diagram showing an example of experimental results between the present embodiment and the reference example. FIG. 6 is a diagram showing an example of the relationship between the flow rate of tungsten hexafluoride gas and the mask selection ratio. FIG. 7 is a diagram showing an example of the relationship between the bias voltage and the mask selection ratio.

Hereinafter, the disclosed etching method, the method for manufacturing a semiconductor device, and the embodiment of the plasma processing device will be described in detail with reference to the drawings. The disclosed techniques are not limited by the following embodiments.

When a metal-containing mask such as tungsten carbide (WC) is used in etching the dielectric film, the metal-containing mask may be etched and the selectivity (etch rate of the dielectric film / etch rate of the metal-containing mask) may decrease. be. As the miniaturization of semiconductor processes progresses, a decrease in the selection ratio of metal-containing masks may become a problem. Therefore, it is expected to improve the selection ratio of the metal-containing mask.

[Structure of Plasma Processing Device 10]
FIG. 1 is a schematic cross-sectional view showing an example of a plasma processing apparatus according to an embodiment of the present disclosure. The plasma processing device 10 shown in FIG. 1 is a capacitively coupled plasma processing device. The plasma processing device 10 includes a chamber 12. The chamber 12 has a substantially cylindrical shape. The chamber 12 provides its internal space as a processing space 12c. The chamber 12 is made of, for example, aluminum. The inner wall surface of the chamber 12 is treated to have plasma resistance. For example, the inner wall surface of the chamber 12 is anodized. The chamber 12 is electrically grounded.

Further, a passage 12p is formed on the side wall of the chamber 12. The wafer (board) W, which is an example of the object to be processed, passes through the passage 12p when it is carried into the processing space 12c and when it is carried out from the processing space 12c. This passage 12p can be opened and closed by a gate valve 12g.

A support portion 13 is provided on the bottom portion of the chamber 12. The support portion 13 is formed of an insulating material. The support portion 13 has a substantially cylindrical shape. The support portion 13 extends vertically from the bottom of the chamber 12 in the processing space 12c. The support portion 13 supports the stage 14. The stage 14 is provided in the processing space 12c. The stage 14 is an example of a mounting table and a substrate support.

The stage 14 has a lower electrode 18 and an electrostatic chuck 20. The stage 14 may further include an electrode plate 16. The electrode plate 16 is formed of a conductor such as aluminum and has a substantially disk shape. The lower electrode 18 is provided on the electrode plate 16. The lower electrode 18 is formed of a conductor such as aluminum and has a substantially disk shape. The lower electrode 18 is electrically connected to the electrode plate 16.

The electrostatic chuck 20 is provided on the lower electrode 18. The wafer W is placed on the upper surface of the electrostatic chuck 20. The electrostatic chuck 20 has a body formed of a dielectric. A film-shaped electrode is provided in the main body of the electrostatic chuck 20. The electrode of the electrostatic chuck 20 is connected to the DC power supply 22 via a switch. When a voltage from the DC power supply 22 is applied to the electrodes of the electrostatic chuck 20, an electrostatic attractive force is generated between the electrostatic chuck 20 and the wafer W. The generated electrostatic attraction attracts the wafer W to the electrostatic chuck 20 and holds it by the electrostatic chuck 20.

A focus ring FR is arranged on the peripheral edge of the lower electrode 18 so as to surround the edge of the wafer W. The focus ring FR is an example of an edge ring, and is provided to improve the uniformity of etching. The focus ring FR can be, but is not limited to, made of silicon, silicon carbide, or quartz.

A flow path 18f is provided inside the lower electrode 18. A heat exchange medium (for example, a refrigerant) is supplied to the flow path 18f from a chiller unit 26 provided outside the chamber 12 via a pipe 26a. The heat exchange medium supplied to the flow path 18f is returned to the chiller unit 26 via the pipe 26b. In the plasma processing apparatus 10, the temperature of the wafer W placed on the electrostatic chuck 20 is adjusted by heat exchange between the heat exchange medium and the lower electrode 18.

The plasma processing apparatus 10 is provided with a gas supply line 28. The gas supply line 28 supplies heat transfer gas from the heat transfer gas supply mechanism, for example, He gas, between the upper surface of the electrostatic chuck 20 and the back surface of the wafer W.

The plasma processing apparatus 10 further includes an upper electrode 30. The upper electrode 30 is provided above the stage 14. The upper electrode 30 is supported on the upper part of the chamber 12 via the member 32. The member 32 is made of an insulating material. The upper electrode 30 may include a top plate 34 and a support 36. The lower surface of the top plate 34 is the lower surface on the processing space 12c side, and defines the processing space 12c. The top plate 34 may be formed of a low resistance conductor or semiconductor with low Joule heat. A plurality of gas discharge holes 34a are formed on the top plate 34. The plurality of gas discharge holes 34a penetrate the top plate 34 in the plate thickness direction.

The support 36 is for detachably supporting the top plate 34, and can be formed of a conductive material such as aluminum. A gas diffusion chamber 36a is provided inside the support 36. From the gas diffusion chamber 36a, a plurality of gas flow holes 36b communicating with the plurality of gas discharge holes 34a each extend downward. The support 36 is formed with a gas introduction port 36c that guides the processing gas to the gas diffusion chamber 36a. A gas supply pipe 38 is connected to the gas introduction port 36c.

A gas source group 40 is connected to the gas supply pipe 38 via a valve group 42 and a flow rate controller group 44. The gas source group 40 includes a plurality of gas sources. The plurality of gas sources include a plurality of gas sources constituting the processing gas used in the etching process or the like. The valve group 42 includes a plurality of open / close valves. The flow rate controller group 44 includes a plurality of flow rate controllers. Each of the plurality of flow controllers is a mass flow controller or a pressure controlled flow controller. The plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 via the corresponding valve of the valve group 42 and the corresponding flow rate controller of the flow rate controller group 44.

In the plasma processing apparatus 10, a shield 46 is detachably provided along the inner wall of the chamber 12. The shield 46 is also provided on the outer periphery of the support portion 13. The shield 46 prevents etching by-products from adhering to the chamber 12. The shield 46 may be configured, for example, by coating an aluminum material with ceramics such as Y2O3.

A baffle plate 48 is provided between the support portion 13 and the side wall of the chamber 12. The baffle plate 48 is configured by, for example, coating an aluminum base material with ceramics such as Y2O3. A plurality of through holes are formed in the baffle plate 48. An exhaust port 12e is provided below the baffle plate 48 and at the bottom of the chamber 12. An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52. The exhaust device 50 includes a pressure control valve and a vacuum pump such as a turbo molecular pump.

The plasma processing apparatus 10 further includes a first high frequency power supply 62 and a second high frequency power supply 64. The first high frequency power supply 62 is a power supply that generates a first high frequency for plasma generation. The first high frequency frequency is, for example, a frequency in the range of 27 MHz to 100 MHz. The first high frequency power supply 62 is connected to the lower electrode 18 via the matching unit 66 and the electrode plate 16. The matching device 66 has a circuit for matching the output impedance of the first high frequency power supply 62 with the input impedance on the load side (lower electrode 18 side). The first high frequency power supply 62 may be connected to the upper electrode 30 via the matching device 66. Further, the first high frequency power supply 62 is an example of a plasma generation unit.

The second high frequency power supply 64 is a power supply that generates a second high frequency for drawing ions into the wafer W. The frequency of the second high frequency is lower than the frequency of the first high frequency. The second high frequency frequency is, for example, a frequency in the range of 400 kHz to 13.56 MHz. The second high frequency power supply 64 is connected to the lower electrode 18 via the matching unit 68 and the electrode plate 16. The matching device 68 has a circuit for matching the output impedance of the second high frequency power supply 64 with the input impedance on the load side (lower electrode 18 side).

The plasma processing device 10 may further include a DC power supply unit 70. The DC power supply unit 70 is connected to the upper electrode 30. The DC power supply unit 70 can generate a negative DC voltage and apply the DC voltage to the upper electrode 30.

The plasma processing device 10 may further include a control unit 80. The control unit 80 may be a computer including a processor, a storage unit, an input device, a display device, and the like. The control unit 80 controls each unit of the plasma processing device 10. In the control unit 80, the operator can perform a command input operation or the like in order to manage the plasma processing device 10 by using the input device. Further, the control unit 80 can visualize and display the operating status of the plasma processing device 10 by the display device. Further, the storage unit of the control unit 80 stores a control program for controlling various processes executed by the plasma processing device 10 by the processor, and recipe data. The processor of the control unit 80 executes the control program and controls each unit of the plasma processing device 10 according to the recipe data, so that the desired processing is executed by the plasma processing device 10.

For example, the control unit 80 controls each unit of the plasma processing apparatus 10 so as to perform the etching method described later. To give a detailed example, the control unit 80 executes a step of providing a wafer (board) W for a logic device including a silicon oxide layer and a tungsten-containing mask having an opening defined by a side wall on the silicon oxide layer. do. Further, the control unit 80 executes a step of supplying a processing gas containing a tungsten-containing gas. Further, the control unit 80 performs a step of generating plasma from the processing gas, forming a protective layer containing tungsten on the upper portion and the side wall of the tungsten-containing mask, and etching the silicon oxide layer through the opening. Further, in the etching step, the thickness of the protective layer formed on the upper portion of the tungsten-containing mask is made larger than the thickness of the protective layer formed on the side wall of the tungsten-containing mask.

[Substrate to be processed]
Next, the substrate to be etched will be described with reference to FIGS. 2 and 3. FIG. 2 is a diagram schematically showing an example of the structure of the substrate etched by the plasma processing apparatus according to the present embodiment. The wafer W shown in FIG. 2 has a silicon-containing layer 102 and a mask 103 on a silicon substrate 101. Examples of the silicon-containing layer (containing film) 102 include a silicon oxide layer (SiO2), a silicon nitride layer (SiN), and a Low-k layer. The silicon-containing layer 102 is an example of a silicon-containing dielectric layer. Examples of the Low-k layer include a SiOC layer. The silicon-containing layer 102 may have a laminated structure including a silicon oxide layer and a Low-k layer, a silicon oxide layer and a silicon nitride layer, or a silicon nitride layer and a Low-k layer.

The mask 103 is a layer on which a mask pattern having a predetermined pattern of openings, for example, a comb-shaped opening defined by a side wall, is formed. The mask 103 is, for example, a metal-containing mask. Examples of metal-containing masks include tungsten, tungsten carbide (WC), molybdenum or titanium nitride (TiN). The pitch between the openings of the mask 103 is, for example, about 30 nm, and the line CD (Critical Dimension) is, for example, about 10 nm. The thickness of the mask 103 is, for example, about 20 nm, and the thickness of the silicon-containing layer 102 is, for example, about 200 nm. In this embodiment, a substrate for a logic device is assumed as the wafer W to be processed. Further, the wafer W to be processed may be used for applications other than those for logic devices, and can be applied to, for example, a substrate for a memory in which a high aspect ratio of 30 or more is formed.

FIG. 3 is a diagram schematically showing an example of the progress of etching of the substrate in this embodiment. In this embodiment, as shown in the states 104 to 106 of FIG. 3, the etching of the silicon-containing layer 102 of the wafer W proceeds. The state 104 is a state before the start of etching. The state 105 indicates a state in which etching is in progress, and a groove 108 is formed through the opening of the mask 103 while forming a protective layer 107 containing tungsten on the upper portion (upper surface) and the side wall of the mask 103. At this time, the protective layer 107 is thinly deposited on the side wall of the mask 103 and thickly deposited on the upper portion of the mask 103. That is, the thickness of the protective layer 107 formed on the upper part of the mask 103 is larger than the thickness of the protective layer formed on the side wall of the mask 103. For example, the thickness of the protective layer 107 on the side wall of the mask 103 may be about 1 nm, and the film thickness ratio of the upper part to the side wall (film thickness of the upper part / film thickness of the side wall) may be 2 or more and less than 5. In another example, the film thickness ratio of the upper part to the side wall (the film thickness of the upper part / the film thickness of the side wall) may be 5 or more. Further, in another example, the film thickness ratio of the upper part to the side wall (the film thickness of the upper part / the film thickness of the side wall) may be less than 2. Further, the thickness of the protective layer 107 formed on the side wall of the mask 103 may be formed so as to become thinner in the depth direction from the upper part of the opening of the mask 103. Depending on the etching process, the thickness of the protective layer 107 formed on the upper part of the mask 103 may be less than or equal to the thickness of the protective layer formed on the side wall of the mask 103. The state 106 is a state in which etching further progresses from the state 105 and the groove 108 reaches the silicon substrate 101. When the etching proceeds to the state 106, it is determined that a predetermined shape (in one example, a predetermined aspect ratio) has been obtained, and the etching is completed. In FIG. 3, the etching situation other than the two grooves 108 is omitted.

[Etching method]
Next, the etching method according to this embodiment will be described. FIG. 4 is a flowchart showing an example of the etching process in the present embodiment.

In the etching method according to the present embodiment, the control unit 80 controls to open the gate valve 12g. Then, the wafer W in which the mask 103 is formed on the upper portion of the silicon-containing layer 102 is carried into the chamber 12 and placed on the electrostatic chuck 20 of the stage 14. The wafer W is held on the electrostatic chuck 20 by applying a DC voltage to an adsorption electrode (not shown) in the electrostatic chuck 20. After that, the control unit 80 controls to close the gate valve 12g and controls the exhaust device 50 to exhaust the gas from the processing space 12c so that the atmosphere of the processing space 12c becomes a predetermined vacuum degree. Further, the control unit 80 controls the temperature of the wafer W so that the temperature of the wafer W becomes a predetermined temperature by controlling a temperature control module (not shown) (step S1).

Next, the control unit 80 controls to start the supply of the processing gas (step S2). The control unit 80 controls to supply a mixed gas of WF6, C4F6, O2 and Ar (hereinafter referred to as WF6 / C4F6 / O2 / Ar gas) to the gas introduction port 36c as a processing gas containing a tungsten-containing gas. The gas containing carbon and fluorine, for example C4F6, may be a gas containing one or more of the fluorocarbon gas and the hydrofluorocarbon gas. That is, the gas containing carbon and fluorine is a gas containing CxHyFz (x, z are integers of 1 or more, y is an integer of 0 or more). CxHyFz is a compound having a carbon-fluorine bond such as C2F4, CF4, C3F4, C3F8, C4F8, C4F6, C5F8, CH2F2, CH2F3, CHF3, CH3F. Further, the oxygen-containing gas may be CO gas, CO2 gas or the like. The processing gas may not contain oxygen-containing gas such as O2. Further, the Ar gas may be another noble gas, for example, Xe gas, and may be an inert gas such as N2 gas instead of the noble gas.

The processing gas is supplied to the gas introduction port 36c and then supplied to the gas diffusion chamber 36a and diffused. After being diffused in the gas diffusion chamber 36a, the processing gas is supplied in a shower manner to the processing space 12c of the chamber 12 through the plurality of gas discharge holes 34a and introduced into the processing space 12c.

The control unit 80 supplies high frequency power for plasma generation (first high frequency power) to the lower electrode 18 by controlling the first high frequency power supply 62. That is, in the processing space 12c, plasma is generated from the processing gas by the high frequency power for plasma generation. Here, the high frequency power for plasma generation is preferably less than 5 kW and preferably 5.6 W / cm ² or less. The wafer W is plasma-processed by the generated plasma. That is, the control unit 80 supplies high-frequency power for plasma generation into the chamber 12, generates plasma from the processing gas, and controls to etch the silicon-containing layer 102 via the mask 103 (step S3). In this embodiment, the voltage of the electric bias (second high frequency power) from the second high frequency power supply 64 is not supplied, but the ions and the like in the plasma are supplied to the lower electrode 18 for plasma generation. Due to the high frequency power of the above, it is drawn to the wafer W side and the etching process proceeds.

The control unit 80 determines whether or not a predetermined shape is obtained by step S3 based on information acquired from a sensor (not shown) of the plasma processing device 10, processing time according to a recipe, and the like (step S4). When the control unit 80 determines that the predetermined shape has not been obtained (step S4: No), the process returns to step S3. On the other hand, when it is determined that the predetermined shape is obtained (step S4: Yes), the control unit 80 ends the process.

When the processing is completed, the control unit 80 controls to stop the supply of the processing gas. Further, the control unit 80 controls the electrostatic chuck 20 to apply a DC voltage having opposite positive and negative DC voltages to eliminate static electricity, and the wafer W is peeled off from the electrostatic chuck 20. The control unit 80 controls to open the gate valve 12g. The wafer W is carried out from the processing space 12c of the chamber 12 via the passage 12p.

The wafer W that has been carried out is subjected to removal of the mask 103, formation of a conductive material that functions as a contact pad, and the like by another substrate processing device or the like. That is, a semiconductor device using the wafer W to which the above-mentioned etching method is applied is manufactured.

[Experimental result]
Subsequently, the experimental results will be described with reference to FIGS. 5 to 7. FIG. 5 is a diagram showing an example of experimental results between the present embodiment and the reference example. FIG. 5 shows experimental results in a reference example in which WF6 is not added to the processing gas and an example corresponding to the present embodiment in which WF6 is added to the processing gas. The following processing conditions were used as the processing conditions. Further, in the wafer W, a silicon oxide layer (SiO2) was used as the silicon-containing layer 102. Further, as the mask 103, tungsten carbide (WC) was used.

<Processing conditions>
First high frequency power (40MHz): 300W
Second high frequency power (400 kHz): 0 W
Treatment gas Reference example: C4F6 / O2 / Ar gas
Example: WF6 / C4F6 / O2 / Ar gas
(The flow rate ratio of WF6 is 1% or less)
Processing time: 30 seconds

As shown in FIG. 5, the remaining amount of the mask 103 was 12.5 nm in the reference example, whereas it was 14.8 nm in the example. The loss (consumable amount) of the mask 103 was 3.9 nm in the reference example, but decreased to 1.6 nm in the example. The etching amounts were arranged so as to have substantially the same depth, and the reference example was 15.9 nm and the example was 15.7 nm. The mask selection ratio was 4.1 in the reference example, whereas it was 9.8 in the example, which was more than doubled.

FIG. 6 is a diagram showing an example of the relationship between the flow rate of tungsten hexafluoride gas and the mask selection ratio. Graph 110 in FIG. 6 shows the relationship between the flow rate of WF6 gas and the mask selection ratio in the experimental results of FIG. As shown in Graph 110, in the reference example in which the addition flow rate of the WF6 gas is 0 sccm, the WC mask selection ratio is 4.1, and in the example in which the addition flow rate of the WF6 gas is 5 sccm, the WC mask selection ratio is 9. It is 8. That is, by adding the WF6 gas to the processing gas, the selectivity between the mask 103 of tungsten carbide (WC), which is a metal-containing mask, and the silicon-containing layer 102, which is a silicon oxide layer, can be improved (improved). .. The ratio (flow rate ratio) of the flow rate of the WF6 gas to the total flow rate of the treated gas is preferably 10% or less, more preferably 5% or less, and further preferably 1% or less.

Next, the influence of the electric bias voltage on the mask selection ratio will be described. FIG. 7 is a diagram showing an example of the relationship between the bias voltage and the mask selection ratio. In the graph 111 shown in FIG. 7, when the WF6 gas is added to the processing gas, the electric bias voltage (referred to as the bias voltage in FIG. 7) is not supplied (0V) and is supplied (−500V). The WC mask selection ratio in and is shown. Further, in Graph 111, as a reference, the WC mask selection ratio in the case where the WF6 gas is not added to the processing gas and the bias voltage is not supplied (0V) is shown. As shown in Graph 111, when the bias voltage is not supplied (0 W), it can be seen that the addition of WF6 gas improves the WC mask selection ratio. On the other hand, when a bias voltage is supplied (-500 V), it can be seen that the WC mask selectivity does not improve even if WF6 gas is added. That is, it can be seen that the smaller the bias voltage, the greater the effect of improving the WC mask selection ratio.

In the etching process, in order to improve the etching rate or the like, the voltage of the electric bias for drawing ions from the second high frequency power supply 64 may be supplied to the lower electrode 18. In this case, the voltage of the electric bias is preferably −500 V or more and 0 V or less.

As shown in the present embodiment described above, when a predetermined amount of WF6 is added to the processing gas and no bias voltage is supplied or a low bias voltage is supplied, the mask selection ratio is improved. Since WF6 has a high affinity between metal elements, it is more likely to be deposited on the metal-containing mask than the layer to be etched, which is a silicon-containing layer (silicon oxide layer, silicon nitride layer, Low-k layer, etc.). On the other hand, when the bias voltage is not supplied or the low bias voltage is supplied, the ion energy incident on the substrate is 0 or low, so that the etching of the deposit is suppressed. The interaction of the addition of WF6 and the control of the bias voltage has the effect of depositing WF6 on the metal-containing mask, thus improving the mask selectivity. It should be noted that a mask containing tungsten, which is a metal of the same type as tungsten contained in WF6, strengthens the bond between the metal elements, but even different metals have the effect. In another example, the layer to be etched may be etched through a mask containing a metal other than tungsten using a processing gas containing a gas containing tungsten as an additive gas, and the metal other than tungsten may be contained as an additive gas. The layer to be etched may be etched through a mask containing tungsten using a processing gas containing a gas to be etched. Further, the layer to be etched may be etched through a mask containing a metal other than tungsten using a processing gas containing a gas containing a metal other than tungsten as an additive gas. In these cases as well, the mask selection ratio can be improved.

Further, in the above-described embodiment, the plasma processing device 10 which is a capacitively coupled plasma processing device of a type that supplies high frequency power for plasma generation and a bias voltage to the lower electrode 18 is used, but the present invention is not limited to this. For example, a capacitively coupled plasma processing apparatus of a type in which high frequency power for plasma generation is supplied to the upper electrode 30 and a bias voltage is supplied to the lower electrode 18 may be used.

As described above, according to the present embodiment, the control unit 80 controls each unit of the apparatus to have a silicon oxide layer (silicon-containing layer 102) and a tungsten-containing mask having an opening defined by a side wall on the silicon oxide layer (a tungsten-containing mask (). A step of providing a substrate (wafer W) for a logic device provided with a mask 103) is executed. The control unit 80 controls each unit of the device to execute a step of supplying a processing gas containing a tungsten-containing gas. The control unit 80 controls each unit of the device to generate plasma from the processing gas, and etches the silicon oxide layer through the openings while forming a protective layer containing tungsten on the upper portion and the side wall of the tungsten-containing mask. To execute. Further, in the etching step, the thickness of the protective layer formed on the upper portion of the tungsten-containing mask is made larger than the thickness of the protective layer formed on the side wall of the tungsten-containing mask. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the processing gas includes CxHyFz (x, z are integers of 1 or more, y is an integer of 0 or more) gas. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the processing gas further contains an oxygen-containing gas. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the tungsten-containing mask is a mask containing tungsten or tungsten carbide. As a result, the selectivity between the tungsten-containing mask, which is tungsten or tungsten carbide, and the silicon-containing layer 102 can be improved (improved).

Further, according to the present embodiment, the tungsten-containing gas may contain a halogenated tungsten gas. The tungsten halide gas may contain at least one of tungsten hexafluoride (WF ₆ ) gas, tungsten hexabromide (WBr ₆ ) gas, tungsten hexachloride (WCl ₆ ) gas and WF ₅ Cl gas. The tungsten-containing gas may include hexacarbonyl tungsten (W (CO) ₆ ) gas. The flow rate of the tungsten-containing gas may be 10 sccm or less. As a result of using the tungsten-containing gas, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the control unit 80 supplies an electric bias for drawing in ions in the etching step, and the voltage of the electric bias is −500 V or more and 0 V or less. As a result, the selection ratio of the tungsten-containing mask can be improved even in a capacitively coupled plasma processing apparatus of a type that supplies high-frequency power for plasma generation to the upper electrode 30.

Further, according to the present embodiment, no electric bias is supplied in the etching process. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the CxHyFz gas contains at least one gas selected from the group consisting of C2F4, CF4, C3F4, C3F8, C4F8, C4F6, C5F8, CH2F2, CHF3, CH2F3 and CH3F. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the generated plasma is a capacitively coupled plasma or an inductively coupled plasma. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the generated plasma is a capacitively coupled plasma, the substrate is held on the mounting table (stage 14), and the high frequency power for plasma generation is supplied to the mounting table. As a result, the etching can be advanced by drawing ions or the like into the wafer W by the high frequency power for plasma generation supplied to the lower electrode 18 of the stage 14.

Further, according to the present embodiment, the control unit 80 controls each unit of the apparatus to provide a substrate including a silicon-containing dielectric layer and a mask containing a metal having an opening defined by a side wall on the silicon-containing dielectric layer. Perform the steps provided. The control unit 80 controls each unit of the device to execute a step of supplying a processing gas containing a tungsten-containing gas. The control unit 80 controls each unit of the device to generate plasma from the processing gas, and etches the silicon-containing dielectric layer through the openings while forming a protective layer containing tungsten on the upper portion of the mask and the side wall of the mask. Perform the process. Further, in the etching step, the thickness of the protective layer formed on the upper part of the mask is made larger than the thickness of the protective layer formed on the side wall of the mask. As a result, the selection ratio of the metal-containing mask can be improved.

Further, according to the present embodiment, the thickness of the protective layer formed on the side wall of the mask is reduced from the upper part of the opening toward the depth direction. As a result, the selection ratio of the metal-containing mask can be improved.

Further, according to the present embodiment, the control unit 80 controls each unit of the apparatus to execute a step of providing a silicon oxide layer and a substrate provided with a tungsten-containing mask on the silicon oxide layer. The control unit 80 controls each unit of the device to execute a step of supplying a processing gas containing a tungsten-containing gas. The control unit 80 controls each unit to generate plasma from the processing gas and execute a step of etching the silicon oxide layer via the tungsten-containing mask. As a result, the selection ratio of the tungsten-containing mask can be improved.

Further, according to the present embodiment, the etching step forms a protective layer containing tungsten on the upper portion and the side wall of the tungsten-containing mask. As a result, the upper part and the side wall of the tungsten-containing mask can be protected.

Further, according to the present embodiment, the thickness of the protective layer formed on the upper part of the tungsten-containing mask is made larger than the thickness of the protective layer formed on the side wall of the tungsten-containing mask. As a result, the upper part of the tungsten-containing mask can be protected.

Further, according to the present embodiment, the thickness of the protective layer formed on the side wall of the tungsten-containing mask is reduced from the upper part of the opening defined by the side wall toward the depth direction. As a result, the selection ratio of the metal-containing mask can be improved.

Further, according to the present embodiment, the substrate is a substrate for a logic device. As a result, etching suitable for the logic device can be performed.

Further, according to the present embodiment, a method for manufacturing a semiconductor device to which the above-mentioned etching method is applied is provided. As a result, a semiconductor device can be manufactured.

The embodiments disclosed this time should be considered to be exemplary in all respects and not restrictive. The above embodiments may be omitted, replaced or modified in various forms without departing from the scope of the appended claims and their gist.

Further, in the above-described embodiment, the plasma processing apparatus 10 that performs processing such as etching on the wafer W by using the capacitive coupling type plasma has been described as an example, but the disclosed technique is not limited to this. The plasma source is not limited to capacitively coupled plasma as long as it is a device that processes the wafer W using plasma, and any plasma source such as inductively coupled plasma, microwave plasma, or magnetron plasma can be used. ..

The following additional notes are further disclosed with respect to the above embodiments.

(Appendix 1) This is an etching method.
A step of providing an etching target layer including a silicon oxide layer and a substrate provided with a tungsten-containing mask on the etching target layer, and a step of providing the substrate.
The process of supplying a processing gas containing a tungsten-containing gas, and
It comprises a step of generating plasma from the processing gas and etching the etching target layer through the tungsten-containing mask.
Etching method.

(Appendix 2) Plasma processing equipment
With the chamber
The substrate support arranged in the chamber and
A plasma generator that generates plasma in the chamber,
Control unit and
Equipped with
The control unit
A step of providing the substrate support with a layer to be etched including a silicon oxide layer and a substrate having a tungsten-containing mask on the layer to be etched.
The process of supplying a processing gas containing a tungsten-containing gas, and
A step of generating plasma from the processing gas and etching the etching target layer through the tungsten-containing mask is performed.
Plasma processing equipment.

10 Plasma processing equipment 12 Chamber 14 Stage 18 Lower electrode 30 Upper electrode 62 First high-frequency power supply 64 Second high-frequency power supply 80 Control unit 101 Silicon substrate 102 Silicon-containing layer 103 Mask 107 Protective layer W wafer

Claims (22)

Etching method
A step of providing a substrate comprising a silicon- containing layer and a tungsten-containing mask having an opening defined by a side wall on the silicon -containing layer.
The process of supplying a processing gas containing a tungsten-containing gas, and
It comprises a step of generating plasma from the processing gas and etching the silicon -containing layer through the opening while forming a tungsten-containing protective layer on the upper portion and the side wall of the tungsten-containing mask.
The thickness of the protective layer formed on the upper part of the tungsten-containing mask is larger than the thickness of the protective layer formed on the side wall of the tungsten-containing mask.
Etching method. The processing gas includes CxHyFz (x, z are integers of 1 or more, y is an integer of 0 or more) gas.
The etching method according to claim 1. The CxHyFz gas comprises at least one gas selected from the group consisting of CF4, C3F8, C4F8, C4F6, C5F8, CH2F2, CHF3, CH3F.
The etching method according to claim 2. The treated gas further contains an oxygen-containing gas.
The etching method according to any one of claims 1 to 3 . The tungsten-containing mask is a mask containing tungsten or tungsten carbide.
The etching method according to any one of claims 1 to 4 . The tungsten-containing gas is a tungsten hexafluoride gas.
The etching method according to any one of claims 1 to 5 . The etching step supplies an electrical bias to attract ions and
The voltage of the electric bias is −500 V or more and 0 V or less.
The etching method according to any one of claims 1 to 6 . In the etching step, the electric bias is not supplied.
The etching method according to claim 7 . The generated plasma is a capacitively coupled plasma or an inductively coupled plasma.
The etching method according to any one of claims 1 to 8. The generated plasma is a capacitively coupled plasma, and the substrate is held on a mounting table.
High frequency power for plasma generation is supplied to the above-mentioned stand,
The etching method according to any one of claims 1 to 9. Etching method
A step of providing a substrate comprising a silicon-containing dielectric layer and a mask containing a metal having an opening defined by a side wall on the silicon-containing dielectric layer.
The process of supplying a processing gas containing a tungsten-containing gas, and
It has a step of generating plasma from the processing gas, forming a protective layer containing tungsten on the upper portion of the mask and the side wall of the mask, and etching the silicon-containing dielectric layer through the opening. ,
The thickness of the protective layer formed on the upper part of the mask is larger than the thickness of the protective layer formed on the side wall of the mask.
Etching method. The thickness of the protective layer formed on the side wall of the mask decreases from the upper part of the opening toward the depth direction.
The etching method according to claim 11. Etching method
A step of providing an etching target layer including a silicon -containing layer and a substrate provided with a tungsten-containing mask on the etching target layer.
The process of supplying a processing gas containing a tungsten-containing gas, and
It has a step of generating plasma from the processing gas and etching the etching target layer through the tungsten-containing mask.
The etching step forms a tungsten-containing protective layer on the upper part and the side wall of the tungsten-containing mask.
Etching method. The thickness of the protective layer formed on the upper part of the tungsten-containing mask is larger than the thickness of the protective layer formed on the side wall of the tungsten-containing mask.
The etching method according to claim 13 . The thickness of the protective layer formed on the side wall of the tungsten-containing mask decreases in the depth direction from the upper part of the opening defined by the side wall.
The etching method according to claim 13 or 14 . A method for manufacturing a semiconductor device, which comprises the etching method according to any one of claims 1 to 15 . A program for causing a plasma processing apparatus to execute the etching method according to any one of claims 1 to 15. It ’s a plasma processing device.
With the chamber
The substrate support arranged in the chamber and
A plasma generator that generates plasma in the chamber,
Control unit and
Equipped with
The control unit
A step of providing an etching target layer including a silicon -containing layer and a substrate having a tungsten-containing mask on the etching target layer to the substrate support.
The process of supplying a processing gas containing a tungsten-containing gas, and
A step of generating plasma from the processing gas and etching the etching target layer through the tungsten-containing mask is performed.
The etching step forms a tungsten-containing protective layer on the upper part and the side wall of the tungsten-containing mask.
Plasma processing equipment. The etching step supplies an electrical bias to attract ions and
The voltage of the electric bias is −500 V or more and 0 V or less.
The plasma processing apparatus according to claim 18. In the etching step, the electric bias is not supplied.
The plasma processing apparatus according to claim 19. The generated plasma is a capacitively coupled plasma or an inductively coupled plasma.
The plasma processing apparatus according to any one of claims 18 to 20. The generated plasma is a capacitively coupled plasma, and the substrate is held on a mounting table.
High frequency power for plasma generation is supplied to the above-mentioned stand,
The plasma processing apparatus according to any one of claims 18 to 21 .

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