JP7067328B2 - Gate drive circuit and pulse power supply for semiconductor switching elements - Google Patents

Description

The present invention relates to a pulse power supply and a gate drive circuit technique for a semiconductor switching element applicable to the pulse power supply.

In the pulse width modulation type pulse power supply applied in various fields, the circuit configurations capable of supplying high-voltage and large-current pulses to the load include pulse forming line (PFL), pulse forming nut work (PFN), and bloom line. In addition to a circuit configuration that uses means such as (BL), a circuit configuration that converts DC power energy from a DC power supply or the like into a pulse shape by a semiconductor switching element and directly supplies it to the load without using the means (described later). In FIG. 2 and the like, a configuration that converts into a pulse shape by semiconductor switching elements SW1, SW2 and the like; hereinafter, simply referred to as a direct supply configuration as appropriate) is known (for example, Patent Documents 1 and 2).

In the direct supply configuration, a high voltage and a large current are applied to the semiconductor switching element (for example, several kV to several tens of kV are applied) in the same manner as the application to the load. It is desirable to apply one having voltage property.

Further, in order to be able to apply a desired pulse to the load, the response speed of the switching operation (turn-on / turn-off) of the semiconductor switching element is fast (for example, the pulse rise time / fall time is several ns to several tens ns). It is desirable that the pulse width can be narrowed (for example, tens to hundreds of ns) and the pulse width can be easily modulated.

As described above, the semiconductor switching element having withstand voltage and applying a desired pulse to the load is a structure having a capacitive gate (for example, a MOSFET (MOS field effect transistor) structure using SiC or the like). There is one, and the semiconductor switching element may be appropriately operated by a gate drive circuit.

The gate drive circuit has a configuration in which the primary winding of the pulse transformer is connected to the pulse voltage source and the secondary winding of the pulse transformer is connected to the semiconductor switching element (specifically, one end side of the secondary winding is semiconductor switching. The configuration is connected to the gate of the element and the other end side of the secondary winding is connected to the source of the semiconductor switching element).

Japanese Unexamined Patent Publication No. 2013-9216 Japanese Unexamined Patent Publication No. 2010-193646

As described above, the secondary winding of the pulse transformer connected to the semiconductor switching element is equipped with a diode that prevents backflow in the path to the gate of the semiconductor switching element (hereinafter, simply referred to as a gate signal path). For example, in addition to being equipped by inserting and connecting diodes in series so that they are in the forward direction toward the gate), a resistor (so-called gate resistor) may be equipped, which can suppress ringing. Has been done.

However, if the resistance of the gate signal path is increased by the gate resistor as described above, the response speed of the switching operation of the semiconductor switching element tends to be slow, and there is a possibility that the desired high-speed operation cannot be performed.

The present invention has been made in view of such technical problems, and an object of the present invention is to provide a technique that contributes to improvement of a response speed of a switching operation of a semiconductor switching element and suppression of ringing.

One aspect of the present invention is a discharge transistor in which a pulse transformer in which the primary winding is connected to a pulse voltage source is connected in parallel between one end side of the secondary winding and the other end side of the secondary winding of the pulse transformer. It is a gate drive circuit of a semiconductor switching element provided with a Zener diode and a Zener diode.

Then, one end side of the secondary winding of the pulse transformer is connected to the gate of the semiconductor switching element, and the first, second, and third diodes connected in series to the one end side of the secondary winding are the first and first diodes. The second and third terminals are inserted and connected in series so as to be forward toward the gate of the semiconductor switching element, and the other end of the secondary winding of the pulse transformer is connected to the source of the semiconductor switching element. The discharge transistor is a PNP transistor, in which the emitter is connected between the second and third diodes on one end side of the secondary winding, the collector is connected to the other end side of the secondary winding, and the base is. Connected between the first and second diodes on one end side of the secondary winding, and connected to the other end side of the secondary winding via a resistor, the Zener diode has a cathode whose cathode is on one end side of the secondary winding. 2. Connected between the connection point of the discharge transistor with the emitter between the 3rd diode and the 3rd diode, the anode is connected to the other end side of the secondary winding, and the cathode of the 3rd diode. A bypass circuit that bypasses from the side to the anode side is connected, and the semiconductor switching element has a structure with a capacitive gate, and is characterized by converting the DC power energy supplied from the DC power supply to the load into a pulse shape. And.

The bypass circuit may be one in which resistors are inserted and connected in series. Further, the semiconductor switching element may have a MOSFET structure using SiC.

Another embodiment comprises a DC power source connected in series to the load and a first semiconductor switching element having a capacitive gate and inserted and connected in series between the DC power source and the load. It is a pulse power supply. The first semiconductor switching element is characterized in that the switching operation is performed by the above-mentioned gate drive circuit.

Further, in another embodiment, the second semiconductor switching element having a capacitive gate and being connected in parallel to the load is further provided, and the second semiconductor switching element is switched by the above-mentioned gate drive circuit. It may be one that works.

As shown above, according to the present invention, it is possible to contribute to the improvement of the response speed of the switching operation of the semiconductor switching element and the suppression of ringing.

The schematic block diagram for demonstrating the gate drive circuit 10 by an Example. The schematic block diagram for demonstrating the pulse power source P1 which is an application example of the gate drive circuit (for example, a gate drive circuit 10) of this embodiment. The timing chart diagram for demonstrating the switching operation example of the switches SW1 and SW2 of FIG. The schematic block diagram for demonstrating the gate drive circuit 40 which performs a switching operation of a plurality of switch product SW connected in series. The schematic block diagram for demonstrating the gate drive circuit 50 by a reference example.

The gate drive circuit for a semiconductor switching element according to the embodiment of the present invention can drive a semiconductor switching element (hereinafter, simply referred to as a switch) applicable to a pulse power supply having a direct supply configuration to be appropriately turned on and off. For example, it is completely different from a configuration in which a gate resistor or the like is simply provided in the gate signal path of the secondary winding of the pulse transformer (hereinafter, simply referred to as a conventional circuit) as in a conventional circuit.

That is, in this embodiment, instead of equipping the gate resistor, a discharge transistor and a Zener diode are provided between one end side of the secondary winding (gate signal path side) of the pulse transformer and the other end side of the secondary winding. It is a configuration connected in parallel.

Further, the current that can flow through the Zener diode or the like due to the transient phenomenon of the switch is suppressed by the bypass circuit provided on one end side of the secondary winding of the pulse transformer.

According to the configuration as in this embodiment, for example, even if the gate signal path of the pulse transformer is not equipped with a gate resistor, the Zener diode can cause ringing in the voltage between the gate and the source of the switch. Will suppress the ringing.

Further, as described above, the configuration without the gate resistor can reduce the resistance of the gate signal path as compared with, for example, the conventional circuit. As a result, the response speed of the switching operation of the switch becomes high, and it becomes easy to supply a desired pulse to the load.

Further, as described above, the current flowing due to the transient phenomenon when the switch is in the turn-off state can be one of the factors causing the switch to malfunction when the amount of current becomes large, but the current is suppressed as in the present embodiment. According to the configuration provided with the bypass circuit, the malfunction of the switch is suppressed.

In the gate drive circuit of the switch of the present embodiment, as described above, a discharge transistor and a Zener diode are connected in parallel between one end side of the secondary winding and the other end side of the secondary winding of the pulse transformer, and the transient of the switch. If the configuration suppresses the current that can flow through the Zener diode due to the phenomenon, the common technical knowledge of various fields (for example, the fields of pulse power supply technology, gate drive circuit technology, semiconductor switching element technology, etc.) is appropriately applied. It can be designed, and one example is shown below.

<< Application example of gate drive circuit according to this embodiment >>
FIG. 2 describes a pulse power supply P1 to which the gate drive circuit of the present embodiment (for example, the gate drive circuit 10 shown in FIG. 1 described later) can be applied.

In the pulse power supply P1 shown in FIG. 2, a DC power supply EV is connected in series to the load LD, and a switch SW1 is inserted and connected in series between the DC power supply EV and the load LD (on the positive electrode side in FIG. 2). There is. When the DC power energy of the DC power supply EV is supplied to the load LD, the DC power energy is converted into a pulse by repeating turn-on / turn-off by appropriately switching the switch SW1 by a gate drive circuit (not shown). Is supplied to the load LD. That is, a desired pulse can be supplied to the load LD.

In the case of the pulse power supply P1 shown in FIG. 2, one end of the capacitor C is connected between the DC power supply EV and the switch SW1, and the other end of the capacitor C is connected to the negative electrode side of the DC power supply EV. With this capacitor C, it is possible to suppress a voltage drop due to the responsiveness of the DC power supply EV.

Further, the resistor r1 is inserted and connected in series between the switch SW1 and the load LD, which is caused by the inductance component L (drifting inductance) and the load LD that may exist between the DC power supply EV and the load LD. Ringing will be suppressed.

If the load LD is a capacitive load and DC power energy remains, the energy may increase the fall time of the voltage on the load LD side. In such a case, as shown in FIG. 2, a configuration in which the switch SW2 is connected in parallel to the load LD can be mentioned.

Specifically, one end of the switch SW2 is connected between the switch SW1 of the DC power supply EV and the load LD (connected via the resistor r2 in FIG. 2), and the other end of the switch SW2 is connected to the DC power supply EV. It is configured to be connected to the negative electrode side, and the switches SW1 and SW2 may be switched on and off as appropriate as shown in the timing chart of FIG. The resistor r2 in FIG. 2 also contributes to the suppression of ringing caused by the inductance component and the load LD that may exist between the DC power supply EV and the load LD, similarly to the resistor r1.

By switching the switches SW1 and SW2 in this way, the influence of the energy remaining in the load LD can be suppressed, and the voltage on the load LD side can be quickly reduced.

When the load LD is a resistance load, it may be easy to quickly lower the voltage on the load LD side even if the switch SW2 or the like is not equipped as described above.

In the switches SW1 and SW2, various embodiments can be applied as long as the DC power of the DC power supply EV can be converted into a pulse shape and supplied to the load LD by repeating turn-on and turn-off as described above. It is possible, and one example thereof is to apply a power switching element having a structure having a capacitive gate such as an IGBT or MOSFET. As a specific example, an element having a MOSFET structure (so-called SiC element) having a capacitive gate made of SiC (silicon carbide) can be mentioned.

Further, the switches SW1 and SW2 may be configured to have withstand voltage resistance according to the high voltage and large current applied to the target load LD, respectively. For example, when a discrete type switch product is applied and configured, if the withstand voltage of the switch product alone is not sufficient, multiple switch products are used and connected in series as appropriate to obtain the desired withstand voltage. It is possible to have a configuration that has it.

As a specific example, as shown in FIG. 4, a plurality of switch product SWs (switches SW ₀ , ..., SW _n-1 , SW _n in FIG. 4) are connected in series, and each switch product SW is connected to the gate drive circuit 40. It is possible to perform a switching operation as appropriate.

Various aspects can be applied to the gate drive circuit 40, and examples thereof include a configuration in which the circuit unit 41 is appropriately equipped with a discharge transistor Q, a Zener diode Dz, or the like as shown in FIG. 1 described later. As shown in FIG. 4, when a plurality of switch product SWs are simultaneously switched, the primary winding T1 connected to a pulse voltage source (not shown) and the primary winding T1 are arranged to face each other. Examples thereof include a configuration including a pulse transformer PT having a plurality of secondary windings T2.

In the case of the primary winding T1 shown in FIG. 4, a plurality of winding portions Tm (for example, the number of switch product SWs connected in series) are linearly arranged at predetermined intervals (assuming each secondary winding T2). The configuration is arranged), and the secondary windings T2 are arranged so as to face each other so as to correspond to each winding portion Tm. The corresponding switch product SW is connected to each secondary winding T2.

Further, the number of turns of each of the primary winding T1 and the secondary winding T2 can be appropriately set according to the purpose. In FIG. 1 and the like described later, the case where the number of windings of the primary winding T1 is set to 1T and the secondary winding T2 is set to 3T is described, but the present invention is not limited to this. A pulse generated by a pulse voltage source (not shown) may be transmitted from the primary winding T1 to T2 so that the switch product SW (switch SW1 in FIG. 1 described later) can be appropriately switched as desired.

<< Configuration example of gate drive circuit according to this embodiment >>
<Reference example>
In the switches SW1 and SW2 shown in FIG. 2, a power switching element such as a SiC element having a structure having a capacitive gate can be applied as described above, and the switching operation can be performed at the timing shown in FIG. However, a voltage derived from a transient phenomenon (in the case of FIG. 2, also derived from the influence of the capacitor C in addition to the transient phenomenon) may be applied to the switches SW1 and SW2.

For example, in the case of FIG. 3, it is conceivable that a transient voltage is applied to the switch SW1 at the timing t1 and a transient voltage is applied to the switch SW2 at the timing t2.

Further, in the SiC element or the like applied to the switches SW1 and SW2, as the parasitic capacitance other than the gate capacitance, the input capacitance Ciss, the output capacitance Coss, and the feedback capacitance Crss exist inside the element as in the switch SW1 shown in FIG. ..

Therefore, for example, in a configuration in which the discharge transistor Q and the Zener diode Dz are simply connected in parallel, as in the gate drive circuit (reference example when applied to the switch SW1 in FIG. 5) 50 shown in FIG. 5, the switch SW1 is turned off. When a transient voltage is applied in this state, a current (current in a path such as i1 or i2 described later) may flow through the gate drive circuit 50 (Zener diode Dz or the like).

In the case of the gate drive circuit 50 of FIG. 5, in addition to the discharge transistor Q and the Zener diode Dz, the first and second diodes D1 and D2 for preventing the backflow of the Tg on one end side of the secondary winding T2 and the bypass. It is configured to include a resistor R3 for a circuit and a resistor R4 for preventing static electricity. Further, the base of the discharge transistor Q is connected to the other end side Ts of the secondary winding T2 via the resistor R1.

The resistor R1 is appropriately applied in consideration of the current amplification factor hfe of the discharge transistor Q, the magnitude of the base current, and the like. For example, when the resistance value of the resistor R1 is large, the base current tends to be small in the discharge transistor Q, but if the current amplification factor hfe of the discharge transistor Q is large, a sufficient amount of collector is collected. It is also possible to pass an electric current.

On the other hand, when the resistance value of the resistor R1 is small, it becomes easy to increase the base current in the discharge transistor Q, and even if the current amplification factor hfe of the discharge transistor Q is small, a sufficient amount of collector current flows. It is also possible.

As described above, if the discharge transistor Q is configured to allow a sufficient amount of collector current to flow, the charge remaining in the gate capacitance of the switch SW1 can be sufficiently discharged when the switch SW1 is in the turn-off state.

Here, when the switch SW1 is in the turn-off state and the Zener diode Dz does not operate the Zener and has a parasitic capacitance (the Zener diode Dz is charged and exists when the switch SW1 is in the turn-on state), A current can flow through a path such as loop i1 via the above-mentioned feedback capacitance Crss and the parasitic capacitance of the Zener diode Dz. Further, when the resistance value of the resistor R1 is small, a current can flow even in a path such as loop i2.

As the amount of current flowing through the loops i1 and i2 increases, the voltage between the gate and source of the switch SW1 also increases. If the voltage exceeds a predetermined threshold voltage, the switch SW1 may malfunction (for example, an unexpected turn-on state) or the switch SW1 may be damaged.

In the Zener diode Dz, when the cathode is connected to the anode side of the first diode D1 at the one end side Tg, the current of the path such as the loop i1 is transmitted by the first and second diodes D1 and D2. Although it can be suppressed so as to block, the distance between the gate and the source of the switch SW1 and the Zener diode Dz (hereinafter, simply referred to as simply the switch and the Zener) becomes long.

When the distance between the switch and the Zener is long, ringing may easily occur in the voltage between the gate and the source of the switch SW1 due to the inductance component that may exist between the switch and the Zener.

Further, by applying a resistor R1 having a relatively large resistance value, the current of the loop i2 can be suppressed, but the base current of the discharge transistor Q tends to be small. Therefore, when the current amplification factor hfe of the discharge transistor Q is small, the desired function of the discharge transistor Q may not be sufficiently exhibited (for example, it becomes difficult to sufficiently flow the collector current). ).

Further, although the transient phenomenon and the like when the gate drive circuit 50 is applied to the switch SW1 have been described, the same transient phenomenon and the like may occur when the gate drive circuit 50 is applied to the switch SW2.

Based on the transient phenomenon and the like shown above, it is preferable to suppress the current flowing in the path such as loops i1 and i2 so that the current amount of the current does not become too large. As an example thereof, instead of simply applying a configuration in which the discharge transistor Q and the Zener diode Dz are connected in parallel as in the gate drive circuit 50 of FIG. 5, the one end side Tg is provided as in the following embodiment. It is possible to apply a configuration in which the current of the loops i1 and i2 can be suppressed by the bypass circuit.

<Example>
The gate drive circuit 10 shown in FIG. 1 describes an example of a configuration applicable to each of the switches SW1 and SW2 in FIG. The same components as those shown in FIGS. 2 to 5 are designated by the same reference numerals, and detailed description thereof will be omitted as appropriate. Further, since the gate drive circuit 10 can be similarly applied to each of the switches SW1 and SW2, the case where it is applied to the switch SW1 will be described as appropriate, and the case where it is applied to the switch SW2 will be appropriately omitted.

The gate drive circuit 10 of FIG. 1 has a configuration including a pulse transformer PT, and the primary winding T1 of the pulse transformer PT is connected to a pulse voltage source (not shown), and the secondary winding T2 of the pulse transformer PT is connected. Is connected to the switch SW1.

In the secondary winding T2, one end side Tg of the secondary winding T2 is connected to the gate of the switch SW1, and the other end side Ts is connected to the source of the switch SW1. As a result, the Tg on one end side can function as a gate signal path.

Further, in the secondary winding T2, the first, second and third diodes D1, D2 and D3 connected in series to the one end side Tg are connected to the first, second and third diodes D1, D2 and D3. In this order, they are inserted and connected in series so as to be in the forward direction toward the gate of the switch SW1.

Further, a discharge transistor Q and a Zener diode Dz are connected in parallel between one end side Tg and the other end side Ts of the secondary winding T2.

In the connection configuration of the discharge transistor Q, the emitter is connected between the second and third diodes D2 and D3 at the one end side Tg (connected to the connection point p2 in FIG. 1), and the collector is connected to the other end side Ts. The base is connected between the first and second diodes D1 and D2 at one end side Tg (connected to the connection point p1 in FIG. 1), and is connected to the other end side Ts via the resistor R1. There is.

As the resistor R1, a resistor having a relatively large resistance value may be applied within a range in which the desired function of the discharge transistor Q can be sufficiently exhibited.

In the connection configuration of the Zener diode Dz, the cathode is between the connection point p2 with the emitter of the discharge transistor Q between the second and third diodes D2 and D3 of the one end side Tg and the third diode D3. It is connected (connected to the connection point p3 in FIG. 1), and the anode is connected to the other end side Ts.

Further, at one end side Tg, a bypass circuit BP is connected (connected to connection points p3 and p4 in FIG. 1) so that the third diode D3 can be bypassed from the cathode side to the anode side, and is connected to the bypass circuit BP. Is a resistor R2 inserted and connected in series.

In the bypass circuit BP, for example, backflow (flow from the anode side to the cathode side of the third diode D3) may occur depending on the characteristics (Vf, etc.) of the third diode D3 in the turn-on state. In such a case, , The fourth diode D4 may be applied to prevent backflow as shown in FIG. In the case of the fourth diode D4 of FIG. 1, in the bypass circuit BP, they are inserted and connected in series so as to be in the opposite direction toward the gate of the switch SW1.

In the resistor R2, a resistor having a relatively large resistance value is applied within a range in which the charge remaining in the gate capacitance of the switch SW1 can be sufficiently discharged (discharged by the discharge transistor Q via the bypass circuit BP). Can be mentioned.

In the gate drive circuit 10 configured as described above, a pulse voltage source (not shown) to which the primary winding T1 is connected is appropriately driven to generate a desired pulse, and the pulse is transferred from the primary winding T1 to T2. By transmitting the signal, the switch SW1 can be appropriately switched.

Further, by providing the Zener diode Dz, ringing of the voltage between the gate and the source of the switch SW1 can be suppressed without equipping the gate resistor. Further, according to the configuration without the gate resistor, it becomes easy to reduce the resistance at one end side Tg, it can contribute to the improvement of the response speed of the switching operation of the switch SW1, and the desired pulse is supplied to the load LD. It will be easier.

Further, by the bypass circuit BP bypassing from the cathode side to the anode side of the third diode D3, the current of the path as in loops i1 and i2 of FIG. 5 in the turn-off state of the switch SW1 is blocked by the third diode D3, respectively. It will go through the bypass circuit BP. The current passing through the bypass circuit BP is suppressed according to the magnitude of the resistance value of the bypass circuit BP (the resistance value of the resistor R2 in FIG. 1).

As a result, for example, even if the resistance value of the resistor R1 is reduced and the base current of the discharge transistor Q is increased, the current in the path as shown in the loop i2 of FIG. 5 is sufficiently suppressed (the resistance value of the resistor R2 is large). It is possible to suppress it accordingly. In addition, the variation of the discharge transistor Q that can be used will increase.

Therefore, according to the configuration such as the gate drive circuit 10, it is possible to prevent the current amount from becoming too large for the current flowing in the path such as the loops i1 and i2, and the malfunction of the switch SW1 is suppressed.

Although the above description has been made in detail only for the specific examples described in the present invention, it is clear to those skilled in the art that various changes and the like can be made within the scope of the technical idea of the present invention. It goes without saying that such changes belong to the scope of claims.

10, 40 ... Gate drive circuit BP ... Bypass circuit D1 to D4 ... 1st to 4th diodes Dz ... Zener diode EV ... DC power supply LD ... Load P1 ... Pulse power supply PT ... Pulse transformer p1 to p4 ... Connection point Q ... For discharge Transistors R1, R2, r1, r2 ... Resistors SW1, SW2 ... Switches (first and second semiconductor switching elements)
T1 ... Primary winding T2 ... Secondary winding Tg ... One end side Ts ... End side

Claims (5)

With a pulse transformer where the primary winding is connected to the pulse voltage source,
Discharge transistors and Zener diodes connected in parallel between one end of the secondary winding and the other end of the secondary winding of the pulse transformer.
Equipped with
One end of the secondary winding of the pulse transformer is connected to the gate of the semiconductor switching element,
On one end side of the secondary winding, the first, second, and third diodes connected in series are in the forward direction toward the gate of the semiconductor switching element in the order of the first, second, and third. , Inserted and connected in series,
The other end of the secondary winding of the pulse transformer is connected to the source of the semiconductor switching element,
The discharge transistor is a PNP transistor,
The emitter is connected between the second and third diodes on one end side of the secondary winding.
The collector is connected to the other end of the secondary winding,
The base is connected between the first and second diodes on one end side of the secondary winding, and is connected to the other end side of the secondary winding via a resistor.
Zener diode
The cathode is connected between the connection point of the discharge transistor with the emitter between the second and third diodes on one end side of the secondary winding and the third diode.
The anode is connected to the other end of the secondary winding,
A bypass circuit that bypasses from the cathode side to the anode side of the third diode is connected.
A semiconductor switching element has a structure having a capacitive gate, and is a gate drive circuit of a semiconductor switching element characterized by converting DC power energy supplied from a DC power supply to a load into a pulse shape. The gate drive circuit for a semiconductor switching element according to claim 1, wherein the bypass circuit has resistors inserted and connected in series. The gate drive circuit for a semiconductor switching element according to claim 1 or 2, wherein the semiconductor switching element has a MOSFET structure using SiC. A DC power supply connected in series to the load,
A first semiconductor switching element that has a capacitive gate and is inserted and connected in series between a DC power supply and a load.
Equipped with
The first semiconductor switching element is a pulse power supply characterized by switching operation by the gate drive circuit of the semiconductor switching element according to any one of claims 1 to 3. Further equipped with a second semiconductor switching element having a capacitive gate and connected in parallel to the load.
The pulse power supply according to claim 4, wherein the second semiconductor switching element performs switching operation by the gate drive circuit of the semiconductor switching element according to any one of claims 1 to 3.

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