JP7042992B2 - Variable gain amplifier - Google Patents

Description

The present disclosure relates to variable gain amplifiers.

In wireless communication such as wireless LAN (Local Area Network) communication such as Wi-Fi (registered trademark), mobile phone communication, broadcast signal reception such as television broadcasting, or radar signal reception such as in-vehicle radar or meteorological radar. Variable gain amplifiers are widely used.
The signal strength of radio waves for wireless communication changes exponentially according to the arrival distance. Therefore, the variable gain amplifier needs to have a gain control characteristic that changes the gain exponentially.

For example, Patent Document 1 comprises a linearization circuit, in addition to a first current steering pair consisting of differentially coupled interconducting devices for directing an input current signal to the output of the current steering circuit. Equipped with a differentially coupled device of a second pair electrically coupled in parallel with the first current steering pair, the first pair following the current steering (operation) occurring within the second pair. However, the linearization circuit controls the second difference pair, the current flowing through the device of the second difference pair is coupled to the first current steering pair, and the output current of the output device of the first pair is A variable gain amplifier with a current steering circuit configured to be exponentially dependent on the differential input voltage is disclosed.
The variable gain amplifier described in Patent Document 1 (hereinafter referred to as “conventional variable gain amplifier”) is provided with a linearization circuit so as to be linear on a decibel (dB) scale according to the strength of the input signal. It enables gain control that changes the gain.

Special table 2002-520894

In order to maximize the signal-to-noise ratio of the received signal in wireless communication, it is desirable that the variable gain amplifier performs high-precision and high-speed gain control according to the incoming signal strength.
The linearization circuit provided in the conventional variable gain amplifier has a feedback loop composed of a closed loop circuit. Generally, in a closed-loop circuit, it is necessary to suppress the loop band of the closed-loop circuit by using an integrator configured by a low-pass filter, a mirror integrator circuit, or the like in order to ensure stability against closed-loop oscillation. Therefore, the conventional variable gain amplifier has a problem that the responsiveness of the gain control to the strength of the input signal is lowered.

The present disclosure is to solve the above-mentioned problems, and an object of the present invention is to provide a variable gain amplifier capable of gain control having excellent responsiveness to the strength of an input signal.

The variable gain amplifier according to the present disclosure receives a linear control signal, and shows a signal value calculated by using a first arithmetic expression including a bicurve tangential term represented by a bicurve tangent function of the signal value of the linear control signal. It is a second arithmetic expression that generates and outputs a control signal and includes a bicurve positive tangent term indicated by a bicurve positive tangent function of the signal value of the linear control signal, and inverts the sign of the bicurve positive tangent term in the first arithmetic expression. A bicurve tangential function generator that generates and outputs a second control signal indicating a signal value calculated using the second arithmetic expression, and a first control signal and a second control signal that are output by the bicurve tangent function generator. Then, it is calculated using the third arithmetic expression including the term indicated by the exponential function of the signal value of the linear control signal derived by dividing the signal value of the first control signal by the signal value of the second control signal. A linearization circuit having a division unit that generates and outputs a third control signal indicating a signal value, and a third control signal output by the linearization circuit are received, and the passing gain is controlled based on the third control signal. It is equipped with a current steering circuit.

According to the present disclosure, it is possible to perform gain control having excellent responsiveness to the strength of the input signal.

FIG. 1 is a block diagram showing an example of the configuration of a main part of the variable gain amplifier according to the first embodiment. FIG. 2 is a circuit diagram showing an example of a circuit configuration of a linearization circuit and a current steering circuit included in the variable gain amplifier according to the first embodiment. FIG. 3 is a circuit diagram showing an example of the circuit configuration of the current steering circuit included in the variable gain amplifier according to the second embodiment. FIG. 4 is a circuit diagram showing an example of the circuit configuration of the division unit and the current steering circuit included in the variable gain amplifier according to the third embodiment.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

Embodiment 1.
The variable gain amplifier 100 according to the first embodiment will be described with reference to FIGS. 1 to 2.

The configuration of the main part of the variable gain amplifier 100 according to the first embodiment will be described with reference to FIG.
FIG. 1 is a block diagram showing an example of the configuration of a main part of the variable gain amplifier 100 according to the first embodiment.
The variable gain amplifier 100 includes a linearization circuit 110 and a current steering circuit 160.
The linearization circuit 110 includes a hyperbolic tangent function generation unit 120 and a division unit 140.

The hyperbolic tangent function generation unit 120 receives a linear control signal and generates a first control signal and a second control signal based on the linear control signal. The hyperbolic tangent function generation unit 120 outputs the generated first control signal and second control signal.
Specifically, the hyperbolic tangent function generation unit 120 generates a first control signal indicating a signal value calculated using a first arithmetic expression including a hyperbolic tangent term indicated by a hyperbolic tangent function of the signal value of the linear control signal. Generate. Further, the hyperbola positive tangent function generation unit 120 is a second arithmetic expression including the hyperbola positive tangent term indicated by the hyperbolic tangential function of the signal value of the linear control signal, and inverts the sign of the hyperbola positive tangent term in the first arithmetic expression. A second control signal indicating a signal value calculated by using the second arithmetic expression is generated.

The division unit 140 receives the first control signal and the second control signal output by the hyperbolic tangent function generation unit 120, and generates a third control signal based on the first control signal and the second control signal. The division unit 140 outputs the generated third control signal.
Specifically, the division unit 140 includes a third operation including a term indicated by an exponential function of the signal value of the linear control signal derived by dividing the signal value of the first control signal by the signal value of the second control signal. A third control signal indicating the signal value calculated using the equation is generated.

The current steering circuit 160 receives the third control signal output by the linearization circuit 110, and controls the passing gain based on the third control signal.
The current steering circuit 160 outputs an amplified current signal after gain control based on the linear control signal.

With reference to FIG. 2, the circuit configurations of the linearization circuit 110 and the current steering circuit 160 included in the variable gain amplifier 100 according to the first embodiment will be described.
FIG. 2 is a circuit diagram showing an example of the circuit configuration of the linearization circuit 110 and the current steering circuit 160 included in the variable gain amplifier 100 according to the first embodiment.
As shown in FIG. 2, for example, the hyperbolic tangent function generator 120 included in the linearization circuit 110 includes a first input terminal 121, a second input terminal 122, a first transistor 123, a second transistor 124, and a first current. A source 125 is provided.

The first transistor 123 and the second transistor 124 are each composed of a bipolar transistor.
The base terminal of the first transistor 123 is connected to the second input terminal 122, the emitter terminal of the first transistor 123 is connected to one end of the first current source 125, and the collector terminal of the first transistor 123 is the division unit 140. Connected to.
The base terminal of the second transistor 124 is connected to the first input terminal 121, the emitter terminal of the second transistor 124 is connected to one end of the first current source 125, and the collector terminal of the second transistor 124 is the division unit 140. Connected to.
The other end of the first current source 125 is grounded.

The linear control signal is input to the first input terminal 121 and the second input terminal 122. Specifically, the linear control signal is input as a voltage between the first input terminal 121 and the second input terminal 122 (hereinafter referred to as “gain control voltage _VIN ”).
Hereinafter, the voltage value of the gain control voltage _VIN will be described as X [volt (hereinafter referred to as “V”)].

A differential pair is configured by the first transistor 123, the second transistor 124, and the first current source 125.
The first transistor 123 receives the linear control signal input to the second input terminal 122 and generates the first control signal _SC1 . Specifically, the first control signal _SC1 is a current signal due to the collector current. Hereinafter, the current value, which is the signal value of the first control signal _SC1 , will be described as Y ₁ [ampere (hereinafter referred to as “A”)].
Similarly, the second transistor 124 receives the linear control signal input to the first input terminal 121 and generates the second control signal _SC2 . Specifically, the second control signal _SC2 is a current signal due to the collector current. Hereinafter, the current value, which is the signal value of the second control signal _SC2 , will be described as Y ₂ [A].

In the hyperbolic tangent function generation unit 120 shown in FIG. 2, Y ₁ and Y ₂ can be calculated by the following equations (1) and (2).
Y ₁ = a (1 + tanh (X / V _t )) ・ ・ ・ Equation (1)
Y ₂ = a (1-tanh (X / V _t )) ・ ・ ・ Equation (2)
Here, a is a constant and V _t is a thermal voltage [V].

As described above, the hyperbolic tangential function generation unit 120 shown in FIG. 2 is represented by the signal value of the linear control signal, that is, the hyperbolic tangential function of X [V] which is the voltage value of the gain control voltage _VIN . A signal value calculated using the equation (1) including / V _t ), that is, a first control signal _SC1 indicating Y ₁ which is a current value is generated.
Similarly, the hyperbolic tangential function generator 120 shown in FIG. 2 has a signal value of a linear control signal, that is, a tanh (X / V) indicated by a hyperbolic tangential function of X [V] which is a voltage value of a gain control voltage _VIN . The signal value, that is, the current value, which is the equation (2) including _t ) and is calculated by using the equation (2) in which the positive and negative signs of the tanh (X / V _t ) in the equation (1) are inverted. A _second control signal _SC2 indicating a certain Y2 is generated.
The hyperbolic tangent function generation unit 120 outputs the generated first control signal _SC1 and second control signal _SC2 to the division unit 140 included in the linearization circuit 110.

As shown in FIG. 2, for example, the dividing unit 140 included in the linearization circuit 110 includes a third transistor 141, a fourth transistor 142, a fifth transistor 143, a sixth transistor 144, a seventh transistor 145, and an eighth transistor 146. A second current source 147 and a third current source 148 are provided.

The third transistor 141, the fourth transistor 142, the fifth transistor 143, the sixth transistor 144, the seventh transistor 145, and the eighth transistor 146 are each composed of a bipolar transistor.
The dividing unit 140 shown in FIG. 2 includes the sum of the voltages between the base emitters of the third transistor 141, the fourth transistor 142, and the fifth transistor 143, and the sixth transistor 144, the seventh transistor 145, and the eighth transistor 146. It is a well-known division circuit that utilizes the fact that the sum of the voltages between the base and emitters of the above is equal.
The division unit 140 shown in FIG. 2 outputs the third control signal _SC3 from the signal line 190 connected to the collector terminal of the eighth transistor 146.

The collector currents of the third transistor 141, the fourth transistor 142, the fifth transistor 143, the sixth transistor 144, the seventh transistor 145, and the eighth transistor 146 are set to I _c3 [A], I _c4 [A], and I, respectively. When expressed as _c5 [A], I _c6 [A], I _c7 [A], and I _c8 [A], the following equation (3) holds. In addition, in the equation (3), in order to simplify the following description, the third transistor 141, the fourth transistor 142, the fifth transistor 143, the sixth transistor 144, the seventh transistor 145, and the eighth transistor 146 Assuming that each current amplification factor β is sufficiently large, each base current is ignored.

I _c3 , I _c4 , I _c5 = I _c6 , I _c7 , I _c8 ... Equation (3)
Further, since I _c5 = I _c6 , the equation (3) becomes the following equation (5).
I _c3・ I _c4 = I _c7・ I _c8・ ・ ・ Equation (5)

The collector terminal of the first transistor 123 included in the hyperbolic tangent function generation unit 120 shown in FIG. 2 is connected to the emitter terminal of the fourth transistor 142 and the base terminal of the fifth transistor 143.
Further, the collector terminal of the second transistor 124 included in the hyperbolic tangent function generation unit 120 shown in FIG. 2 is connected to the emitter terminal of the seventh transistor 145 and the base terminal of the eighth transistor 146.

Therefore, Y ₁ , which is the current value of the first control signal _SC1 calculated by the equation (1), corresponds to I _c4 in the equation (5). Further, Y ₂ , which is the current value of the second control signal _SC2 calculated by the equation (2), corresponds to I _c7 in the equation (5).
Therefore, the equation (5) can be transformed into the following equation (6).
I _c8 = I _c3 · Y ₁ / Y ₂ ... Equation (6)

As shown in FIG. 2, the division unit 140 included in the linearization circuit 110 outputs the current signal by _Ic8 , which is the collector current of the eighth transistor 146, as the third control signal _SC3 . Hereinafter, the current value, which is the signal value of the _third control signal _SC3 , will be described as Y3 [A].
That is, in the equation (6), I _c8 corresponds to Y ₃ which is the current value of the third control signal _SC 3, and Y _{3 secondly} controls Y ₁ which is the current value of the first control signal SC 1. It is shown that it corresponds to the value divided by Y ₂ , which is the current value of the signal _SC 2, multiplied by I _{c 3} .

By substituting the equations (1) and (2) into the equation (6), the following equation (7) can be obtained.
Y ₃ = I _c8 = I _c3・ exp (X / 2V _t ) ・ ・ ・ Equation (7)

As described above, the dividing unit 140 shown in FIG. 2 has the signal value of the _first control signal _SC1 , that is, the current value Y1, and the signal value of the second control signal _SC2 , that is, the current value. The signal value of the linear control signal derived by dividing by Y ₂ , that is, the signal value calculated using the equation (7) including the term represented by the exponential function of X, which is the voltage value, that is, the current value. A _third control signal _SC3 indicating a certain Y3 is generated.
The division unit 140 outputs the generated third control signal _SC3 to the current steering circuit 160.

As shown in FIG. 2, for example, the current steering circuit 160 includes a ninth transistor 171 and a tenth transistor 172, a first photoresist transistor 173, a second polyclonal transistor 174, a fourth current source 175, a voltage source 176, and a third input terminal 181. , An output terminal 182, an eleventh transistor 183, a twelfth transistor 184, and a fifth current source 185.
The 9th transistor 171 and the 10th transistor 172, the 1st polyclonal transistor 173, the 2nd polyclonal transistor 174, the 4th current source 175, and the voltage source 176 constitute a current mirror circuit 170.
The core portion 180 is configured by the third input terminal 181 and the output terminal 182, the eleventh transistor 183, the twelfth transistor 184, and the fifth current source 185.

The ninth transistor 171 and the tenth transistor 172, the eleventh transistor 183, and the twelfth transistor 184 are each composed of a bipolar transistor.
The first MOSFET transistor 173 and the second MOSFET transistor 174 are each composed of a P-type MOS (metal-oxide-semiconductor) transistor.

A current signal is input to the third input terminal 181.
From the output terminal 182, a part of the current signal input to the third input terminal 181 is output as an amplified current signal.
Specifically, the current steering circuit 160 conducts to the output terminal 182 of the amount of current input as a current signal to the third input terminal 181 based on the third control signal _SC3 output by the dividing unit 140. Limit the amount of current. The current steering circuit 160 performs gain control by limiting the amount of current conducted to the output terminal 182, and outputs the amplified current signal after the gain control from the output terminal 182.

When the current output by the _fifth current source 185 is _Io1 [A] and the bias current of the twelfth transistor 184 is Y4 [A], the G [antilogarithm], which is the gain of the current steering circuit 160, is as follows. Equation (8) is obtained.
G = Y ₄ / I _o1 ... Equation (8)

As shown in the equation (8), G [antilogarithm], which is the gain of the current steering circuit 160, is proportional to Y ₄ [A], which is the bias current of the twelfth transistor 184.
Y ₄ [A], which is the bias current of the twelfth transistor 184, changes according to the voltage value input to the base terminal of the twelfth transistor 184.

The current mirror circuit 170 folds back the third control signal _SC3 by the current mirror composed of the first polyclonal transistor 173 and the second polyclonal transistor 174. The current mirror circuit 170 inputs a signal output by the second polyclonal transistor 174 to the collector terminal of the tenth transistor 172 in which the base terminal and the collector terminal are connected by a diode.

The base terminal of the 11th transistor 183 is connected to the base terminal of the 9th transistor 171 and the anode terminal of the voltage source 176 to which the cathode terminal is grounded.
The base terminal of the twelfth transistor 184 is connected to the base terminal of the tenth transistor 172.
With this configuration, the current steering circuit 160 current mirrors the collector currents of the 9th transistor 171 and the 10th transistor 172 to the collector currents of the 11th transistor 183 and the 12th transistor 184, respectively.

Here, the transistor size ratio between the 9th transistor 171 and the 11th transistor 183, the transistor size ratio between the 10th transistor 172 and the 12th transistor 184, and the current ratio between the 4th current source 175 and the 5th current source 185. However, if all are designed to be 1: N (N is an arbitrary positive real number), the current ratio between the collector current of the 10th transistor 172 and the collector current of the 12th transistor 184 is 1: N.
Hereinafter, the transistor size ratio between the 9th transistor 171 and the 11th transistor 183, the transistor size ratio between the 10th transistor 172 and the 12th transistor 184, and the current ratio between the 4th current source 175 and the 5th current source 185 are as follows. , All are described as being designed to be 1: N.

In the design, the current ratio between the 10th transistor 172 and the collector current of the 12th transistor 184 is 1: N. Therefore, when the current ratio and the equation (7) are used, the equation (8) becomes the following equation (8). It can be expressed as 9).
G = (N ・ I _c3 / I _o1 ) ・ exp (X / 2V _t ) ・ ・ ・ Equation (9)
When G [antilogarithm], which is the gain of the current steering circuit 160 shown in the equation (9), is converted into a decibel (dB) scale, the equation (9) becomes the following equation (10).
20log ₁₀ G [dB]
= (X / 2V _t ) ・ 20log ₁₀ e + 20log ₁₀ (NI _c3 / I _o1 )
= (X / 2V _t ) ・ c + d ・ ・ ・ Equation (10)
Here, e is the number of Napiers, and c and d are constants.

As shown in the equation (10), it can be seen that G, which is the gain of the current steering circuit 160, is proportional to the signal value of the linear control signal, that is, X [V], which is the voltage value, on the dB scale.

The variable gain amplifier 100 shown in FIG. 2 does not have a closed loop circuit. Therefore, the variable gain amplifier 100 does not need to include an integrator configured by a low-pass filter, a mirror integrator circuit, or the like in order to ensure stability against closed-loop oscillation. Therefore, the variable gain amplifier 100 can perform gain control having excellent responsiveness to the strength of the input signal.

In the above description, variations such as manufacturing variations in bipolar transistor characteristics have been ignored. In fact, when the configuration of the variable gain amplifier 100 according to the first embodiment is realized by combining semiconductors or discrete components, there is a possibility that an error may occur in the desired exponential function characteristics due to the influence of the variation in the bipolar transistor characteristics. There is.
However, when the configuration of the variable gain amplifier 100 according to the first embodiment is configured as an IC in a semiconductor, the characteristics of the bipolar transistor can be changed by making the emitter area or current density of each transistor configured in the bipolar transistor constant. The above-mentioned error caused by the variation can be reduced.

For example, in the configuration of the dividing unit 140 in the variable gain amplifier 100 shown in FIG. 2, the third transistor 141, the fourth transistor 142, the fifth transistor 143, the sixth transistor 144, the seventh transistor 145, and the bipolar transistor are configured. The emitter areas of the eighth transistors 146 are the same, and the current ratios of the second current source 147 and the third current source 148 are set to 1: 2. With this configuration, in a bias state where the voltage value of the linear control signal is 0 [V], the third transistor 141, the fourth transistor 142, the fifth transistor 143, the sixth transistor 144, the seventh transistor 145, and , The current densities of the eighth transistors 146 are all equal, and the variable gain amplifier 100 that is robust against variations in the characteristics of the bipolar transistor can be realized.

Further, in the configuration of the variable gain amplifier 100 shown in FIG. 2, the first transistor 123, the second transistor 124, the third transistor 141, the fourth transistor 142, the fifth transistor 143, the sixth transistor 144, and the second transistor configured by the bipolar transistor are used. The emitter areas of the 7 transistors 145 and the 8th transistor 146 are the same, and the current ratios of the 1st current source 125, the 2nd current source 147, and the 3rd current source 148 are 2: 1: 2. It may be configured to be. With this configuration, in a bias state where the voltage value of the linear control signal is 0 [V], the first transistor 123, the second transistor 124, the third transistor 141, the fourth transistor 142, the fifth transistor 143, and the first transistor The current densities of the 6-transistor 144, the 7th transistor 145, and the 8th transistor 146 are all equal, and the variable gain amplifier 100 that is robust against variations in the bipolar transistor characteristics can be realized.

As described above, the variable gain amplifier 100 receives the linear control signal and shows the signal value calculated by using the first arithmetic expression including the bicurve tangential term indicated by the bicurve tangent function of the signal value of the linear control signal. It is a second arithmetic expression that generates and outputs the first control signal and includes the bicurve positive tangent term indicated by the bicurve tangential function of the signal value of the linear control signal, and determines the sign of the bicurve positive tangent term in the first arithmetic expression. A bicurve tangential function generation unit 120 that generates and outputs a second control signal indicating a signal value calculated using the inverted second arithmetic expression, and a first control signal and a first control signal output by the bicurve tangential function generation unit 120. 2 Using the third arithmetic expression including the term indicated by the exponential function of the signal value of the linear control signal derived by receiving the control signal and dividing the signal value of the first control signal by the signal value of the second control signal. A linearization circuit 110 having a division unit 140 for generating and outputting a third control signal indicating a signal value calculated in the above order, and a third control signal output by the linearization circuit 110 are received and a third control signal is received. The current steering circuit 160, which controls the passing gain based on the above, is provided.
With this configuration, the variable gain amplifier 100 can perform gain control with excellent responsiveness to the strength of the input signal.

Further, in the above configuration, the variable gain amplifier 100 is configured such that the hyperbolic tangent function generation unit 120 included in the linearization circuit 110 includes a differential pair composed of two bipolar transistors.
With this configuration, the variable gain amplifier 100 can perform gain control with excellent responsiveness to the strength of the input signal.

Further, in the variable gain amplifier 100, in the above configuration, the division unit 140 included in the linearization circuit 110 includes one or more bipolar transistors, so that the current densities of all the bipolar transistors included in the division unit 140 are equal. It was configured to be biased to.
With this configuration, the variable gain amplifier 100 becomes robust against variations in bipolar transistor characteristics. Therefore, the variable gain amplifier 100 can perform high-precision and high-speed gain control with respect to the strength of the input signal.

Embodiment 2.
An example of the circuit configuration of the main part of the variable gain amplifier 100a according to the second embodiment will be described with reference to FIG.
FIG. 3 is a circuit diagram showing an example of the circuit configuration of the current steering circuit 160a included in the variable gain amplifier 100a according to the second embodiment.
The variable gain amplifier 100a includes a linearization circuit 110 and a current steering circuit 160a.
The linearization circuit 110 includes a hyperbolic tangent function generation unit 120 and a division unit 140.
In the variable gain amplifier 100a according to the second embodiment, the current steering circuit 160 in the variable gain amplifier 100 according to the first embodiment shown in FIG. 2 is changed to the current steering circuit 160a.
In the configuration of the variable gain amplifier 100a according to the second embodiment, the same configuration as the variable gain amplifier 100 according to the first embodiment shown in FIG. 2 is designated by the same reference numerals and duplicated description will be omitted. That is, the description of the configuration of FIG. 3 having the same reference numerals as those shown in FIG. 2 will be omitted.

The current steering circuit 160a includes a ninth transistor 171a, a tenth transistor 172a, a first photoresist transistor 173, a second polyclonal transistor 174, a fourth current source 175, a voltage source 176, a third input terminal 181 and an output terminal 182, and an eleventh transistor 183a. , A twelfth transistor 184a, and a fifth current source 185.
In the current steering circuit 160a according to the second embodiment, the ninth transistor 171 and the tenth transistor 172, the eleventh transistor 183, and the twelfth transistor 184 in the current steering circuit 160 according to the first embodiment shown in FIG. The ninth transistor 171a, the tenth transistor 172a, the eleventh transistor 183a, and the twelfth transistor 184a have been changed.

The 9th transistor 171a, the 10th transistor 172a, the 1st polyclonal transistor 173, the 2nd polyclonal transistor 174, the 4th current source 175, and the voltage source 176 constitute a current mirror circuit 170a.
The core portion 180a is configured by the third input terminal 181 and the output terminal 182, the eleventh transistor 183a, the twelfth transistor 184a, and the fifth current source 185.
The ninth transistor 171a, the tenth transistor 172a, the eleventh transistor 183a, and the twelfth transistor 184a are each composed of an N-type MOS transistor (hereinafter referred to as "MOS FET transistor").

The gate terminal of the 11th transistor 183a is connected to the gate terminal of the 9th transistor 171a and the anode terminal of the voltage source 176 to which the cathode terminal is grounded.
The gate terminal of the twelfth transistor 184a is connected to the gate terminal of the tenth transistor 172a.
With this configuration, the current steering circuit 160a can operate in the same manner as the current steering circuit 160 shown in FIG.

Embodiment 3.
An example of the circuit configuration of the main part of the variable gain amplifier 100b according to the third embodiment will be described with reference to FIG.
FIG. 4 is a circuit diagram showing an example of the circuit configuration of the division unit 140b and the current steering circuit 160b included in the variable gain amplifier 100b according to the third embodiment.
The variable gain amplifier 100b includes a linearization circuit 110b and a current steering circuit 160b.
The linearization circuit 110b includes a hyperbolic tangent function generation unit 120 and a division unit 140b.
The variable gain amplifier 100b according to the third embodiment is a division unit 140 (hereinafter, simply referred to as “variable gain amplifier 100 shown in FIG. 2”) according to the first embodiment shown in FIG. The division unit 140b and the current steering circuit 160 (hereinafter, simply referred to as the current steering circuit 160 shown in FIG. 2) are simply changed to the division unit 140b and the current steering circuit 160b. Is.
In the configuration of the variable gain amplifier 100b according to the third embodiment, the same configuration as that of the variable gain amplifier 100 shown in FIG. 2 is designated by the same reference numerals and duplicated description will be omitted. That is, the description of the configuration of FIG. 4 having the same reference numerals as those shown in FIG. 2 will be omitted.

The dividing unit 140b includes a third transistor 141, a fourth transistor 142, a fifth transistor 143, a sixth transistor 144, a seventh transistor 145, an eighth transistor 146, a second current source 147, and a third current source 148. ..
The circuit configuration of the division unit 140b is the same as the circuit configuration of the division unit 140 shown in FIG.
The dividing unit 140b has a potential difference between the potential of the third control signal _SC3 in the signal line 191 connected to the base terminal of the eighth transistor 146 and the potential in the signal line 192 connected to the base terminal of the fifth transistor 143. Is output as a differential voltage.

The current steering circuit 160b includes a third input terminal 181 and an output terminal 182, an eleventh transistor 183, a twelfth transistor 184, and a fifth current source 185. That is, the current steering circuit 160b has the same circuit configuration as the current steering circuit 160 shown in FIG. 2, in which the current mirror circuit 170 is deleted and only the core portion 180 is provided.
The other end of the signal line 192, one end of which is connected to the base terminal of the fifth transistor 143, is connected to the base terminal of the eleventh transistor 183 included in the current steering circuit 160b.
The other end of the signal line 191 whose one end is connected to the base terminal of the eighth transistor 146 is connected to the base terminal of the twelfth transistor 184 included in the current steering circuit 160b.

Since the division unit 140b and the division unit 140 shown in FIG. 2 have the same circuit configuration, I _c8 [A], which is the current value of the collector current of the eighth transistor 146 included in the division unit 140b, is expressed in the equation (7). As shown, it is an exponential function of X [V] which is the voltage value of the linear control signal.
Here, the transistor size ratio between the 5th transistor 143 and the 11th transistor 183, the transistor size ratio between the 8th transistor 146 and the 12th transistor 184, and the current ratio between the 3rd current source 148 and the 5th current source 185. However, if all are designed to be 1: N, the current ratio between the collector current of the 8th transistor 146 and the collector current of the 12th transistor 184 is 1: N.

In the design, the dividing unit 140b outputs the third control signal _SC3 as the above-mentioned differential voltage, so that the fifth transistor 143 and the eighth transistor 146 are the same as the current mirror circuit 170 shown in FIG. It operates as a current mirror circuit that multiplies the current ratio between the collector current of the 10 transistor 172 and the collector current of the 12th transistor 184 by N times.
With this configuration, the variable gain amplifier 100b can have a smaller circuit scale than the variable gain amplifier 100 shown in FIG.

It should be noted that, within the scope of the disclosure, any combination of embodiments can be freely combined, any component of each embodiment can be modified, or any component can be omitted in each embodiment. ..

The variable gain amplifier according to the present disclosure can be applied to wireless communication equipment.

100, 100a, 100b variable gain amplifier, 110, 110b linearization circuit, 120 bicurve tangent function generator, 121 1st input terminal, 122 2nd input terminal, 123 1st transistor, 124 2nd transistor, 125 1st current source , 140, 140b Divider, 141 3rd transistor, 142 4th transistor, 143 5th transistor, 144 6th transistor, 145 7th transistor, 146 8th transistor, 147 2nd current source, 148 3rd current source, 160 , 160a, 160b Current steering circuit, 170, 170a Current mirror circuit, 171, 171a 9th transistor, 172, 172a 10th transistor, 173 1st polyclonal transistor,
174 2nd polyclonal transistor, 175 4th current source, 176 voltage source, 180, 180a core part, 181 3rd input terminal, 182 output terminal, 183, 183a 11th transistor, 184, 184a 12th transistor, 185 5th current source , 190 signal line, 191 signal line, 192 signal line, _SC1 first control signal, _{SC2 second control signal, SC3 third} control signal, _VIN gain control voltage.

Claims (3)

In response to the linear control signal, the first control signal indicating the signal value calculated using the first arithmetic expression including the hyperbolic tangential term indicated by the hyperbolic tangential function of the signal value of the linear control signal is generated and output. , The second arithmetic expression including the hyperbolic tangential term indicated by the hyperbolic tangent function of the signal value of the linear control signal, and the sign of the hyperbolic tangent term in the first arithmetic expression is inverted. A hyperbolic tangent function generator that generates and outputs a second control signal that indicates the signal value calculated using
The linearity derived by receiving the first control signal and the second control signal output by the hyperbolic tangent function generation unit and dividing the signal value of the first control signal by the signal value of the second control signal. A division unit that generates and outputs a third control signal indicating a signal value calculated using a third arithmetic expression including a term indicated by an exponential function of the signal value of the control signal.
With a linearization circuit,
A current steering circuit that receives the third control signal output by the linearization circuit and controls the passing gain based on the third control signal, and a current steering circuit.
It features a variable gain amplifier. The variable gain amplifier according to claim 1, wherein the hyperbolic tangent function generator included in the linearization circuit includes a differential pair composed of two bipolar transistors. The division unit included in the linearization circuit includes two or more bipolar transistors, and is biased so that the current densities of all the bipolar transistors included in the division unit are equal to each other. The variable gain amplifier described.

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