JP7019743B2 - Solid-state image sensor and image sensor - Google Patents

Description

The present invention relates to a solid-state image sensor and an image pickup system.

In a solid-state image sensor represented by a CCD image sensor or a CMOS image sensor, various studies have been made to improve the sensitivity and the amount of charge storage of the photoelectric conversion unit that generates a signal carrier. As the photoelectric conversion unit of the solid-state imaging device, it has become mainstream to use an embedded photodiode structure composed of a pn junction between a p-type semiconductor region provided on the surface portion of a semiconductor substrate and an n-type semiconductor region forming a charge storage region. ing. In this case, the signal carrier generated by the photoelectric conversion unit is an electron.

In Patent Document 1, the charge storage amount of the photoelectric conversion unit is increased by arranging a p-type semiconductor region having a concentration higher than that of the well under the n-type semiconductor region forming the charge storage region to increase the pn junction capacity. It is stated that it should be done. Further, Patent Document 1 describes that an opening is provided in the p-type semiconductor region in order to prevent a decrease in sensitivity due to the provision of the p-type semiconductor region below the n-type semiconductor region as the charge storage region. There is.

In recent years, it has been proposed to perform imaging by a global electronic shutter operation in a CMOS image sensor. The global electronic shutter operation is a driving method for taking an image so that the exposure periods match among a plurality of pixels, and has an advantage that the subject image is not easily distorted even when a fast-moving subject is photographed. The above-mentioned problem of improving the sensitivity and the amount of charge storage of the photoelectric conversion unit is the same in the solid-state image pickup device provided with the function of the global electronic shutter.

Japanese Unexamined Patent Publication No. 2014-165286

The pixel of the solid-state image sensor having the function of the global electronic shutter includes a holding unit for temporarily holding the signal carrier, in addition to the photoelectric conversion unit. Since this holding unit holds the signal carriers generated during the exposure period different from the signal carriers held by the photoelectric conversion unit, it is extremely difficult to suppress the leakage of the signal carriers from the photoelectric conversion unit to the holding unit. Is important to.

However, Patent Document 1 does not consider application to a solid-state image sensor having a function of a global electronic shutter. Therefore, the configuration described in Patent Document 1 is insufficient to suppress leakage of the signal carrier from the photoelectric conversion unit to the holding unit in the solid-state image sensor provided with the function of the global electronic shutter.

An object of the present invention is to provide a solid-state image pickup device and an image pickup system capable of improving the sensitivity and charge storage amount of the photoelectric conversion unit while reducing noise caused by leakage of a signal carrier from the photoelectric conversion unit to another holding unit. It is in.

According to one aspect of the present invention, a photoelectric conversion unit that generates a charge by photoelectric conversion, a first holding unit that holds the charge transferred from the photoelectric conversion unit, and a first holding unit that is transferred from the first holding unit. A solid-state imaging device having a plurality of pixels including a second holding unit that holds a charge and an amplification unit that outputs a signal based on the amount of the charge held by the second holding unit. The photoelectric conversion unit includes a second conductive type second semiconductor region for accumulating the generated charge, a first conductive type third semiconductor region provided below the second semiconductor region, and the first conductive type region. It has a fourth semiconductor region of the second conductive type provided at the lower part of the semiconductor region of 3, and the first holding portion is provided at a distance from the second semiconductor region. 2 Conductive type 5th semiconductor region and the 1st conductive type 6th semiconductor region provided at a depth provided in the lower part of the 5th semiconductor region and provided with the 3rd semiconductor region. And, between the third semiconductor region and the sixth semiconductor region, there is a semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region. The semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region is a region that overlaps with the second semiconductor region and the fourth semiconductor region in a plan view, and is the photoelectric region. Provided is a solid-state imaging device arranged within a range between a central portion of an opening region that overlaps with a conversion unit in a plan view and is not obstructed by a wiring and the first holding portion.
Further, according to another aspect of the present invention, a photoelectric conversion unit that generates a charge by photoelectric conversion, a first holding unit that holds the charge transferred from the photoelectric conversion unit, and the first holding unit. A solid-state imaging device having a plurality of pixels, each of which includes a second holding unit that holds the charge transferred from the second holding unit and an amplifying unit that outputs a signal based on the amount of the charge held by the second holding unit. Therefore, the photoelectric conversion unit has a second conductive type second semiconductor region for accumulating the generated charge, and the first holding unit is provided apart from the second semiconductor region. A third semiconductor region of the first conductive type, which has a fifth semiconductor region of the second conductive type and is provided below the second semiconductor region and the fifth semiconductor region, and the third semiconductor region. It further has a fourth semiconductor region of the second conductive type provided in the lower part of the semiconductor region of the above, and at least a part of the second semiconductor region and the fourth semiconductor region is connected. The portion where the second semiconductor region and the fourth semiconductor region are connected is a region where the second semiconductor region and the fourth semiconductor region overlap in a plan view, and is a region in which the photoelectric conversion unit and the fourth semiconductor region are connected. Provided is a solid-state imaging device arranged within a range between a central portion of an opening region unobstructed by overlapping wires and the first holding portion.

According to the present invention, it is possible to improve the sensitivity and saturated charge amount of the photoelectric conversion unit and prevent unintended charges from leaking into the holding unit and causing noise.

It is a block diagram which shows the schematic structure of the solid-state image sensor according to 1st Embodiment of this invention. It is an equivalent circuit diagram of the pixel of the solid-state image sensor according to 1st Embodiment of this invention. It is a top view (the 1) of the pixel of the solid-state image sensor according to 1st Embodiment of this invention. It is sectional drawing of the pixel of the solid-state image sensor according to 1st Embodiment of this invention. FIG. 2 is a plan view (No. 2) of pixels of the solid-state image sensor according to the first embodiment of the present invention. be. It is a top view of the pixel of the solid-state image sensor according to the 2nd Embodiment of this invention. It is sectional drawing of the pixel of the solid-state image sensor according to 2nd Embodiment of this invention. It is a top view of the pixel of the solid-state image sensor according to the modification of 2nd Embodiment of this invention. It is a top view of the pixel of the solid-state image sensor according to the 3rd Embodiment of this invention. It is sectional drawing of the pixel of the solid-state image sensor according to 3rd Embodiment of this invention. It is a block diagram which shows the schematic structure of the image pickup system according to 4th Embodiment of this invention. It is a figure which shows the structural example of the image pickup system and the moving body according to 5th Embodiment of this invention.

[First Embodiment]
The solid-state image sensor according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 5. FIG. 1 is a block diagram showing a schematic configuration of a solid-state image sensor according to the present embodiment. FIG. 2 is an equivalent circuit diagram of pixels of a solid-state image sensor according to the present embodiment. 3 and 5 are plan views of the pixels of the solid-state image sensor according to the present embodiment. FIG. 4 is a cross-sectional view of the pixels of the solid-state image sensor according to the present embodiment.

As shown in FIG. 1, the solid-state image sensor 100 according to the present embodiment includes a pixel region 10, a vertical scanning circuit 20, a column readout circuit 30, a horizontal scanning circuit 40, a control circuit 50, and an output circuit 60. Have.

The pixel region 10 is provided with a plurality of pixels 12 arranged in a matrix over a plurality of rows and a plurality of columns. A control signal line 14 is arranged in each row of the pixel array in the pixel region 10 extending in the row direction (horizontal direction in FIG. 1). The control signal line 14 is connected to each of the pixels 12 arranged in the row direction, and forms a signal line common to these pixels 12. Further, in each row of the pixel array in the pixel region 10, vertical output lines 16 are arranged so as to extend in the row direction (vertical direction in FIG. 1). The vertical output lines 16 are connected to the pixels 12 arranged in the column direction, respectively, and form a signal line common to these pixels 12.

The control signal line 14 of each line is connected to the vertical scanning circuit 20. The vertical scanning circuit 20 is a circuit unit that supplies a control signal for driving the reading circuit in the pixel 12 to the pixel 12 via the control signal line 14 when the pixel signal is read from the pixel 12. One end of the vertical output line 16 of each row is connected to the row readout circuit 30. The pixel signal read from the pixel 12 is input to the column reading circuit 30 via the vertical output line 16. The column reading circuit 30 is a circuit unit that performs predetermined signal processing such as amplification processing and AD conversion processing on the pixel signal read from the pixel 12. The column readout circuit 30 may include a differential amplifier circuit, a sample hold circuit, an AD conversion circuit, and the like.

The horizontal scanning circuit 40 is a circuit unit that supplies a control signal for sequentially transferring the pixel signals processed by the column readout circuit 30 to the output circuit 60 for each column to the column readout circuit 30. The control circuit 50 is a circuit unit for supplying a control signal for controlling the operation and timing of the vertical scanning circuit 20, the column readout circuit 30, and the horizontal scanning circuit 40. The output circuit 60 is composed of a buffer amplifier, a differential amplifier, and the like, and is a circuit unit for outputting a pixel signal read from the column reading circuit 30 to an external signal processing unit of the solid-state image pickup device 100.

FIG. 2 is a circuit diagram showing an example of a pixel circuit constituting the pixel region 10. FIG. 2 shows four pixels 12 arranged in 2 rows × 2 columns among the pixels 12 constituting the pixel area 10, but the number of pixels 12 constituting the pixel area 10 is particularly limited. It is not something that will be done.

Each of the plurality of pixels 12 includes a photoelectric conversion unit D, transfer transistors M1 and M2, a reset transistor M3, an amplification transistor M4, a selection transistor M5, and an overflow transistor M6. The photoelectric conversion unit D is, for example, a photodiode. In the photodiode of the photoelectric conversion unit D, the anode is connected to the ground voltage line, and the cathode is connected to the source of the transfer transistor M1 and the source of the overflow transistor M6. The drain of the transfer transistor M1 is connected to the source of the transfer transistor M2. The capacitance parasitic on the connection node between the drain of the transfer transistor M1 and the source of the transfer transistor M2 has a function as a charge holding portion. In FIG. 2, this capacitance is represented by a capacitive element (C1). In the following description, this capacitive element may be referred to as a holding unit C1.

The drain of the transfer transistor M2 is connected to the source of the reset transistor M3 and the gate of the amplification transistor M4. The connection node of the drain of the transfer transistor M2, the source of the reset transistor M3, and the gate of the amplification transistor M4 is a so-called floating diffusion (FD) region. The capacity parasitizing the FD region (floating diffusion capacity) has a function as a charge holding portion. In FIG. 2, this capacitance is represented by a capacitance element (C2) connected to the FD region. In the following description, the FD region may be referred to as a holding portion C2. The drain of the reset transistor M3 and the drain of the amplification transistor M4 are connected to the power supply voltage line (SiO). The voltage supplied to the drain of the reset transistor M3 and the voltage supplied to the drain of the amplification transistor M4 may be the same or different. The source of the amplification transistor M4 is connected to the drain of the selection transistor M5. The source of the selection transistor M5 is connected to the vertical output line 16.

A control signal line 14 is arranged in each row of the pixel array in the pixel region 10 extending in the row direction (horizontal direction in FIG. 2). The control signal line 14 of each line includes a control line GS, a control line TX, a control line RES, a control line SEL, and a control line OFG. The control line GS is connected to the gate of the transfer transistor M1 of the pixels 12 arranged in the row direction, and forms a signal line common to these pixels 12. The control line TX is connected to each gate of the transfer transistor M2 of the pixels 12 arranged in the row direction, and forms a signal line common to these pixels 12. The control line RES is connected to the gate of the reset transistor M3 of the pixels 12 arranged in the row direction, and forms a signal line common to these pixels 12. The control line SEL is connected to the gate of the selection transistor M5 of the pixels 12 arranged in the row direction, and forms a signal line common to these pixels 12. The control line OFG is connected to the gate of the overflow transistor M6 of the pixels 12 arranged in the row direction, and forms a signal line common to these pixels 12. In FIG. 2, a corresponding line number is added to the name of each control line (for example, GS (n), GS (n + 1)).

The control line GS, control line TX, control line RES, control line SEL, and control line OFG are connected to the vertical scanning circuit 20. A drive pulse for controlling the transfer transistor M1 is output from the vertical scanning circuit 20 to the control line GS. A drive pulse for controlling the transfer transistor M2 is output from the vertical scanning circuit 20 to the control line TX. A drive pulse for controlling the reset transistor M3 is output from the vertical scanning circuit 20 to the control line RES. A drive pulse for controlling the selection transistor M5 is output from the vertical scanning circuit 20 to the control line SEL. A drive pulse for controlling the overflow transistor M6 is output from the vertical scanning circuit 20 to the control line OFG. These control signals are supplied from the vertical scanning circuit 20 in response to a predetermined timing signal from the control circuit 50. A logic circuit such as a shift register or an address decoder is used in the vertical scanning circuit 20.

Vertical output lines 16 are arranged in each row of the pixel array in the pixel region 10 extending in the row direction (vertical direction in FIG. 2). The vertical output lines 16 are connected to the sources of the selection transistors M5 of the pixels 12 arranged in the column direction, and form a signal line common to these pixels 12. A current source 18 is connected to the vertical output line 16.

The photoelectric conversion unit D converts the incident light into an amount of electric charge corresponding to the amount of light (photoelectric conversion), and accumulates the generated electric charge. The overflow transistor M6 discharges the electric charge accumulated in the photoelectric conversion unit D to the drain. At this time, the drain OFD of the overflow transistor M6 may be connected to the power supply voltage line (SiO).

The transfer transistor M1 transfers the electric charge held by the photoelectric conversion unit D to the holding unit C1. The transfer transistor M1 operates as a global electronic shutter. The holding unit C1 holds the electric charge generated by the photoelectric conversion unit D at a place different from that of the photoelectric conversion unit D. The transfer transistor M2 transfers the electric charge held by the holding unit C1 to the holding unit C2. The holding unit C2 holds the charge transferred from the holding unit C1 and sets the voltage of the input node (gate of the amplification transistor M4) of the amplification unit to a voltage corresponding to the capacity and the amount of the transferred charge. do.

The reset transistor M3 resets the holding portion C2 to a predetermined voltage corresponding to the voltage VDD. At that time, it is also possible to reset the holding portion C1 by turning on the transfer transistor M2 as well. Further, the photoelectric conversion unit D can be reset by turning on the transfer transistor M1 as well.

The selection transistor M5 selects the pixel 12 that outputs a signal to the vertical output line 16. The amplification transistor M4 has a configuration in which a voltage VDD is supplied to the drain and a bias current is supplied from the current source 18 to the source via the selection transistor M5, and an amplification unit (source follower circuit) having a gate as an input node. To configure. As a result, the amplification transistor M4 outputs the signal Vout based on the electric charge generated by the incident light to the vertical output line 16. In addition, in FIG. 2, a corresponding column number is added to the signal Vout, respectively (Vout (m), Vout (m + 1)).

With such a configuration, the electric charge generated in the photoelectric conversion unit D while the holding unit C1 holds the electric charge can be accumulated in the photoelectric conversion unit D. This makes it possible to perform an imaging operation, that is, a so-called global electronic shutter operation, in which the exposure periods match among the plurality of pixels 12. The electronic shutter is to electrically control the accumulation of electric charges generated by the incident light.

FIG. 3 shows an example of the planar layout of the pixels 12 in the solid-state image sensor according to the present embodiment. In FIG. 3, for simplification, the areas where each element of the pixel 12 is provided are described by rectangular blocks, but these do not represent the shape of each element and at least the corresponding elements in each area. It shows that a part is arranged. For example, the region corresponding to the transfer transistors M1 and M2 and the overflow transistor M6 generally corresponds to the region where the gate of each transistor is arranged. Further, the region where the reset transistor M3, the amplification transistor M4 and the selection transistor M5 are provided is represented as one region.

The photoelectric conversion unit D, the transfer transistor M1, the holding unit C1, the transfer transistor M2, and the holding unit C2 are arranged in the unit region of the pixel 12 so as to be adjacent to each other in this order. The overflow transistor M6 is arranged adjacent to the photoelectric conversion unit D. The arrow shown in FIG. 3 indicates the charge transfer direction when the transfer transistors M1 and M2 and the overflow transistor M6 are driven. That is, by driving the transfer transistor M1, the electric charge of the photoelectric conversion unit D is transferred to the holding unit C1. By driving the transfer transistor M2, the electric charge of the holding unit C1 is transferred to the holding unit C2. By driving the overflow transistor M6, the electric charge of the photoelectric conversion unit D is transferred (discharged) to the drain OFD of the overflow transistor M6.

FIG. 4 is a schematic cross-sectional view taken along the line AA'of FIG. A p-type semiconductor region 112 (seventh semiconductor region) constituting a well is provided on the surface of the n-type semiconductor substrate 110. In one example, the p-type is the first conductive type and the n-type is the second conductive type. A photoelectric conversion unit D, a holding unit C1, an n-type semiconductor region 122, and an n-type semiconductor region 124 are arranged on the surface portion of the p-type semiconductor region 112 so as to be separated from each other. Here, the description of the reset transistor M3, the amplification transistor M4, and the selection transistor M5 that do not appear in the cross section of FIG. 4 will be omitted.

The photoelectric conversion unit D has a p-type semiconductor region 114 (first semiconductor region) in contact with the surface of the semiconductor substrate 110 and an n-type semiconductor region 116 (second semiconductor region) provided below the p-type semiconductor region 114. It is an embedded photodiode including and. The n-type semiconductor region 116 is a charge storage layer for accumulating signal charges (electrons) generated in the photoelectric conversion unit D. The holding portion C1 includes a p-type semiconductor region 118 (eighth semiconductor region) in contact with the surface of the semiconductor substrate 110 and an n-type semiconductor region 120 (fifth semiconductor region) provided below the p-type semiconductor region 118. It has an embedded diode structure including. The n-type semiconductor region 122 constitutes the holding portion C2. The n-type semiconductor region 124 constitutes the drain OFD of the overflow transistor M6.

A gate electrode 128 is provided on the semiconductor substrate 110 between the n-type semiconductor region 116 and the n-type semiconductor region 120 via a gate insulating film 126. As a result, the transfer transistor M1 having the n-type semiconductor region 116 as the source, the n-type semiconductor region 120 as the drain, and the gate electrode 128 as the gate is configured. Further, a gate electrode 132 is provided on the semiconductor substrate 110 between the n-type semiconductor region 120 and the n-type semiconductor region 122 via a gate insulating film 130. As a result, the transfer transistor M2 having the n-type semiconductor region 120 as the source, the n-type semiconductor region 122 as the drain, and the gate electrode 132 as the gate is configured. Further, a gate electrode 136 is provided on the semiconductor substrate 110 between the n-type semiconductor region 116 and the n-type semiconductor region 124 via a gate insulating film 134. As a result, the overflow transistor M6 having the n-type semiconductor region 116 as the source, the n-type semiconductor region 124 as the drain, and the gate electrode 136 as the gate is configured.

The photoelectric conversion unit D further has a p-type semiconductor region 138 (third semiconductor region) provided below the n-type semiconductor region 116. Further, the holding portion C1 further has a p-type semiconductor region 138 (sixth semiconductor region) provided below the n-type semiconductor region 120. The p-type semiconductor region 138 has a role as a depletion suppressing layer for suppressing the depletion layer from spreading downward from the n-type semiconductor regions 116 and 120, and has a higher impurity concentration than the p-type semiconductor region 112. .. The p-type semiconductor region 138 (third semiconductor region) is provided with an opening 140 in a part of a region overlapping the n-type semiconductor region 116 in a plan view. In the present specification, the plan view is a two-dimensional plan view obtained by projecting each component of the solid-state imaging device onto a plane parallel to the surface of the semiconductor substrate 110, and is, for example, in the plan layout view of FIG. handle.

The p-type semiconductor region 138 is preferably configured so that its potential can be fixed. From such a viewpoint, in the present embodiment, the p-type semiconductor region 138 extends in a direction parallel to the surface of the semiconductor substrate 110, and the p-type semiconductor region 138 and the p-type semiconductor region 112 are connected to each other. With this configuration, the p-type semiconductor region 138 can be fixed to the potential of the p-type semiconductor region 112 as a well, for example, the ground potential. The mode of connecting the p-type semiconductor region 138 and the p-type semiconductor region 112 is not limited to the example of the present embodiment. For example, a part of the bottom surface of the p-type semiconductor region 138 may be extended in the depth direction so as to penetrate the n-type semiconductor region 142 and connected to the p-type semiconductor region 112.

FIG. 5A is a plan view of FIG. 3 in which a region provided with a p-type semiconductor region 138 is superimposed. The p-type semiconductor region 138 is generally arranged below the photoelectric conversion unit D, the holding unit C1, the transfer transistors M1 and M2, and the gate portion of the overflow transistor M6. It is desirable that the opening 140 is arranged on the holding portion C1 side of the central portion 144 of the photoelectric conversion unit D. The central portion 144 of the photoelectric conversion unit D referred to here may be the center of gravity of the n-type semiconductor region 116 in a plan view, or may be the center of an opening region that is not blocked by wiring or the like, and may be on the photoelectric conversion unit D. When the optical waveguide is arranged, it may be the center of the optical waveguide. Normally, in any definition, the central portion 144 of the photoelectric conversion unit D is at substantially the same position. The light incident on the pixel 12 is collected in the central portion 144 of the photoelectric conversion unit D by a microlens (not shown) provided above the photoelectric conversion unit D.

The photoelectric conversion unit D further has an n-type semiconductor region 142 (fourth semiconductor region) provided below the p-type semiconductor region 138. The n-type semiconductor region 142 is provided in a region that overlaps with the n-type semiconductor region 116 at least in a plan view. In the example shown in FIG. 4, the n-type semiconductor region 142 is provided so as to extend from a region overlapping the n-type semiconductor region 116 in a plan view to a region overlapping the n-type semiconductor region 120 of the holding portion C1 in a plan view. ing. The n-type semiconductor region 116 and the n-type semiconductor region 142 are connected to each other via an opening 140, and form one continuous n-type semiconductor region. On the other hand, the n-type semiconductor region 120 and the n-type semiconductor region 142 are separated from each other by the p-type semiconductor region 138. The n-type semiconductor region 142 of the adjacent pixel 12 is separated by the p-type semiconductor region 112.

It is preferable that the portion other than the photoelectric conversion unit D is shielded from light by the light-shielding film 146 from a position as close as possible to the photoelectric conversion unit D. FIG. 4 shows a light-shielding film 146 provided on the semiconductor substrate 110. For example, a light-shielding film 146 is arranged so as to cover at least the entire holding portion C1 with a metal film having an opening 148 in the central region including at least the central portion 144 of the photoelectric conversion unit D. Since the vicinity of the contact portion connected to the gate electrodes 128, 132, 136 and the n-type semiconductor regions 122, 124 cannot be covered with the light-shielding film 146 and light may leak, there is a gap between the light-shielding films 146. Is preferably separated from the holding portion C1 as much as possible.

FIG. 5B is a plan view of FIG. 3 in which a region provided with the light-shielding film 146 is superimposed. In FIG. 5B, the description of the contact portion connected to the gate electrodes 128, 132, 136 and the n-type semiconductor regions 122, 124 is omitted. In the solid-state image sensor according to the present embodiment, the opening 140 provided in the p-type semiconductor region 138 is preferably covered with a light-shielding film 146, for example, as shown in FIG. 5 (b).

In the solid-state image sensor according to the present embodiment, the concentration of the n-type semiconductor region 142 is designed so that most of the n-type semiconductor region 142 is depleted even when electrons are accumulated in the n-type semiconductor region 116. On the other hand, the concentration of the p-type semiconductor region 138 is designed so that the entire region is not depleted. For example, the impurity concentration of each part can be set as follows. In the p-type semiconductor region 112, the impurity concentration (boron concentration) is 1.0E15 [cm ^-3 ]. In the n-type semiconductor region 116, the impurity concentration (arsenic concentration) is 2.5E17 [cm ^-3 ], and the peak position of the impurity concentration is 0.2 [μm] in depth. In the n-type semiconductor region 120, the impurity concentration (arsenic concentration) is 2.5E17 [cm ^-3 ], and the peak position of the impurity concentration is 0.2 [μm] in depth. In the p-type semiconductor region 138, the impurity concentration (boron concentration) is 1.0E16 [cm ^-3 ], the peak position of the impurity concentration is 0.7 [μm] in depth, and the thickness is 0.8 [μm]. In the n-type semiconductor region 142, the impurity concentration (phosphorus concentration) is 4.0E14 [cm ^-3 ], and the depth of the bottom (interface with the p-type semiconductor region 112) is 3.0 [μm]. By setting the impurity concentration of each part in this way, it is possible to realize a state in which most of the n-type semiconductor region 142 is depleted and the entire p-type semiconductor region 138 is not depleted.

As described above, in the solid-state image sensor according to the present embodiment, the p-type semiconductor region 138 is provided below the n-type semiconductor region 116 constituting the charge storage layer of the photoelectric conversion unit D. One purpose of providing the p-type semiconductor region 138 is to increase the saturated charge amount of the n-type semiconductor region 116 as the charge storage layer.

By providing the p-type semiconductor region 138 below the n-type semiconductor region 116, a pn junction capacitance is formed between the n-type semiconductor region 116 and the p-type semiconductor region 138. As is clear from the relational expression expressed by Q = CV, when a fixed reverse bias voltage V in the pn junction of the photoelectric conversion unit D is applied, the larger the pn junction capacitance C, the larger the accumulated charge amount Q. .. The signal charge accumulated in the n-type semiconductor region 116 is transferred to the signal output unit, but when the potential of the n-type semiconductor region 116 reaches a predetermined potential determined by the power supply voltage or the like, the signal charge of the n-type semiconductor region 116 is reached. Will not be transferred. That is, since the amount of fluctuation of the voltage V due to the transfer of the signal charge is fixed, the amount of saturated charge increases in proportion to the pn junction capacitance of the photoelectric conversion unit D. Therefore, by providing the p-type semiconductor region 138, the saturated charge amount of the n-type semiconductor region 116 as the charge storage layer can be increased.

However, in the solid-state image sensor having the holding portion C1, there is a concern that the noise component leaking into the holding portion C1 increases by providing the p-type semiconductor region 138. For example, the holding unit C1 may accumulate the signal charge of the previous frame during the exposure period of the photoelectric conversion unit D. Therefore, when the signal charge based on the light incident on the photoelectric conversion unit D leaks into the n-type semiconductor region 120, it is superimposed as noise on the signal of the previous frame.

The light collected in the central portion 144 of the photoelectric conversion unit D has a spread as wide as the wavelength. Most of the light that has penetrated into the device is absorbed by the n-type semiconductor region 116 and the p-type semiconductor region 114 of the photoelectric conversion unit D, but a non-negligible amount of light is incident on the p-type semiconductor region 138. As a result, electron-hole pairs are generated by photoelectric conversion even in the p-type semiconductor region 138. The inside of the p-type semiconductor region 138 is a neutral region and no electric field exists, but a small part of the electrons generated in the p-type semiconductor region 138 diffuses and leaks into the holding portion C1. If the electrons generated in the p-type semiconductor region 138 leak into the holding portion C1, it causes noise. Therefore, in a solid-state image pickup device having the holding portion C1, it is important how to reduce the signal charge leaking from the p-type semiconductor region 138 to the holding portion C1.

From this point of view, in the solid-state image sensor according to the present embodiment, the n-type semiconductor region 142 is provided below the p-type semiconductor region 138. As described above, in the solid-state image sensor according to the present embodiment, the concentration is designed so that most of the n-type semiconductor region 142 is depleted. Further, the concentration of the p-type semiconductor region 138 is designed so that the entire region is not depleted. As a result, an electric field is generated between the p-type semiconductor region 138 and the n-type semiconductor region 142 in the direction perpendicular to the surface of the semiconductor substrate 110, and the electrons generated in the p-type semiconductor region 138 are the n-type semiconductor region 116 or n. The ratio of being attracted to the type semiconductor region 142 and reaching the holding portion C1 is reduced. As a result, the noise component leaking into the holding portion C1 can be reduced.

In addition, Patent Document 1 describes that the p-type semiconductor region is arranged under the n-type semiconductor region constituting the charge storage layer of the photoelectric conversion unit. However, in Patent Document 1, below this p-type semiconductor region is a p-type semiconductor region (p-type well), and these p-type semiconductor regions are not depleted. Therefore, when the structure described in Patent Document 1 is applied to a solid-state imaging device having a holding portion C1 as it is, it is possible to prevent electrons generated in the p-type semiconductor region under the charge storage layer from leaking into the holding portion C1 due to diffusion. You can't.

The opening 140 serves as a movement path for signal charges when collecting signal charges generated in a region deeper than the n-type semiconductor region 116, for example, the n-type semiconductor region 142, in the n-type semiconductor region 116. Therefore, by providing the opening 140 in the p-type semiconductor region 138, the light receiving sensitivity can be improved as compared with the case where the opening 140 is not provided.

In a plan view, the opening 140 does not include the central portion 144 of the photoelectric conversion portion D, and is preferably arranged at a location close to the holding portion C1. Since the strongest light enters the central portion 144 of the photoelectric conversion unit D, a large amount of electric charge is generated in the p-type semiconductor region 138. By providing the opening 140 closer to the holding portion C1 than the central portion 144 of the photoelectric conversion unit D, the electrons generated in the p-type semiconductor region 138 near the central portion 144 of the photoelectric conversion unit D can be generated by the holding portion C1. Is drawn into the potential of the opening 140 before reaching. The electrons drawn into the potential of the opening 140 are captured by the n-type semiconductor region 116 or the n-type semiconductor region 142. Therefore, with such an arrangement, the noise component leaking into the holding portion C1 can be further reduced.

From the same viewpoint, it is more preferable to arrange the opening 140 in a place where it does not overlap with the region where the light is incident. For example, as in the solid-state image sensor according to the present embodiment, it is preferable to have a configuration in which the top of the opening 140 is shielded from light by a light-shielding film 146, wiring, or the like.

As described above, the n-type semiconductor region 142 may be arranged so as to extend below the holding portion C1. A very small amount of the light incident on the pixel 12 is also incident under the holding portion C1 due to scattering or the like. By extending the n-type semiconductor region 142 to the bottom of the holding portion C1, the deep photoelectric conversion region expands, and the electric charge generated under the holding portion C1 can also be collected in the n-type semiconductor region 116. Thereby, the light receiving sensitivity can be further improved.

In order to extend the p-type semiconductor region 138 to the lower part of the n-type semiconductor region 120, the saturated charge amount of the n-type semiconductor region 120 as the charge storage layer in the holding portion C1 is determined as in the case of the n-type semiconductor region 116. It has the effect of increasing. However, the p-type semiconductor region 138 between the n-type semiconductor region 120 and the n-type semiconductor region 142 is not provided with an opening, and the n-type semiconductor region 120 is separated from the n-type semiconductor region 142. With such a configuration, it is possible to prevent the electric charge generated in the n-type semiconductor region 142 and the region deeper than the n-type semiconductor region 142 from flowing into the n-type semiconductor region 120.

The p-type semiconductor region 138 can be formed by ion-implanting impurity ions using a photoresist that opens a predetermined region as a mask. At this time, the opening 140 can be formed by covering a part of the region overlapping with the n-type semiconductor region 116 in a plan view with a photoresist. The impurity concentration and depth of the p-type semiconductor region 138 may be changed between the region below the n-type semiconductor region 116 and the region below the n-type semiconductor region 120. By doing so, the p-type semiconductor region 138 can be designed according to the characteristics required for the photoelectric conversion unit D and the holding unit C1, respectively, and the degree of freedom in design is improved. However, in this case, two photolithography steps are required. Therefore, from the viewpoint of reducing the manufacturing cost, the region below the n-type semiconductor region 116 and the region below the n-type semiconductor region 120 are simultaneously p-typed. It is preferable to form the semiconductor region 138. In this case, the p-type semiconductor region 138 under the n-type semiconductor region 116 and the p-type semiconductor region 138 under the n-type semiconductor region 120 are formed at the same depth of the semiconductor substrate and at the same impurity concentration. ..

As described above, according to the present embodiment, the electric charge generated in the p-type semiconductor region 138 can be collected in the n-type semiconductor region 116 of the photoelectric conversion unit D. This makes it possible to improve the sensitivity of the photoelectric conversion unit D and prevent unintended charges from leaking into the holding unit C1.

[Second Embodiment]
The solid-state image sensor according to the second embodiment of the present invention will be described with reference to FIGS. 6 to 8. FIG. 6 is a plan view of the pixels of the solid-state image sensor according to the present embodiment. FIG. 7 is a cross-sectional view of the pixels of the solid-state image sensor according to the present embodiment. FIG. 8 is a plan view of the pixels of the solid-state image sensor according to the modified example of the present embodiment. The same components as those of the solid-state image sensor according to the first embodiment are designated by the same reference numerals, and the description thereof will be omitted or simplified.

In the first embodiment, the leakage of the signal charge from the p-type semiconductor region 138 to the holding portion C1 in one pixel 12 is considered, but the leakage of the signal charge from the p-type semiconductor region 138 to the holding portion C1 is considered. It can also occur between adjacent pixels 12. In the present embodiment, a solid-state imaging device capable of suppressing leakage of signal charges from the p-type semiconductor region 138 of one pixel (pixel 12A) to the holding portion C1 of another pixel (pixel 12B) adjacent thereto is provided. show.

In the solid-state image sensor according to the present embodiment, as shown in FIG. 6, the pixels 12 having the planar layout shown in FIG. 3 are arranged adjacent to each other in the vertical direction in the drawing. When the upper pixel 12 is referred to as the pixel 12A and the lower pixel 12 is referred to as the pixel 12B in FIG. 6, the photoelectric conversion unit D of the pixel 12A and the holding unit C1 of the pixel 12B are arranged adjacent to each other. In such a layout, the signal charge may leak from the p-type semiconductor region 138 of the photoelectric conversion unit D of the pixel 12A to the holding unit C1 of the pixel 12B.

From this point of view, in the solid-state image sensor according to the present embodiment, the central portion 144 of the photoelectric conversion unit D of one pixel (pixel 12A) and the holding unit C1 of another pixel (pixel 12B) adjacent to the central portion 144 thereof. An opening 140 is also provided between them. FIG. 7 is a schematic cross-sectional view taken along the line BB'of FIG. As shown in FIG. 7, the n-type semiconductor region 116 is connected to the n-type semiconductor region 142 via two openings 140 outside the central portion 144 of the photoelectric conversion unit D. With such a configuration, it is possible to more reliably reduce the leakage of electric charge from the p-type semiconductor region 138 under the photoelectric conversion unit D to the holding unit C1.

In the present embodiment, the two openings 140 are arranged in the region overlapping the n-type semiconductor region 116 in the plan view, but as shown in FIG. 8, for example, the central portion 144 of the photoelectric conversion unit D is included in the plan view. The opening 140 may be arranged so as to surround the area. In this case, the supply of the fixed voltage to the p-type semiconductor region 138 extends a part of the bottom of the p-type semiconductor region 138 in the depth direction to the p-type semiconductor region 112 as described in the first embodiment. This can be achieved by connecting.

As described above, according to the present embodiment, the electric charge generated in the p-type semiconductor region 138 can be collected in the n-type semiconductor region 116 of the photoelectric conversion unit D. This makes it possible to improve the sensitivity of the photoelectric conversion unit D and prevent unintended charges from leaking into the holding unit C1.

[Third Embodiment]
The solid-state image sensor according to the third embodiment of the present invention will be described with reference to FIGS. 9 and 10. FIG. 9 is a plan view of the pixels of the solid-state image sensor according to the present embodiment. FIG. 10 is a cross-sectional view of the pixels of the solid-state image sensor according to the present embodiment. The same components as those of the solid-state image sensor according to the first and second embodiments are designated by the same reference numerals, and the description thereof will be omitted or simplified.

In the solid-state image sensor according to the present embodiment, as shown in FIG. 9, the pixels 12 having the planar layout shown in FIG. 3 are arranged horizontally adjacent to each other in the drawing symmetrically in a mirror image. When the pixel on the left side is referred to as the pixel 12A and the pixel on the right side is referred to as the pixel 12B in FIG. 9, the photoelectric conversion unit D of the pixel 12A and the photoelectric conversion unit D of the pixel 12B are arranged adjacent to each other.

When the opening 140 is arranged so as to surround the region including the central portion 144 of the photoelectric conversion unit D in a plan view, the bottom portion of the p-type semiconductor region 138 is set in the depth direction as described in the modified example of the second embodiment. It is necessary to devise such as stretching to the p-type semiconductor region 112 and connecting to the p-type semiconductor region 112.

On the other hand, when the photoelectric conversion units D of adjacent pixels 12 are arranged facing each other as in the layout shown in FIG. 9, the p-type semiconductor regions 138 provided in the photoelectric conversion units D of these two pixels 12 are continuous. It can be formed with one pattern. Since a p-type semiconductor region (not shown) for separating the pixels is provided between the pixels 12A and the pixels 12B, the p-type semiconductor region 138 formed across the pixels 12 is a p-type for separation. It can be connected to the p-type semiconductor region 112 via or directly to the semiconductor region. FIG. 10 is a schematic cross-sectional view taken along the line CC'of FIG. FIG. 10 shows a state in which the p-type semiconductor region 138 and the p-type semiconductor region 112 are connected at the boundary portion between the pixel 12A and the pixel 12B.

The layout of this embodiment can also be applied to pixels for focus detection. In this case, one microlens (not shown) that collects light on the pixel 12 is arranged with respect to the photoelectric conversion unit D of the pixel 12A and the photoelectric conversion unit D of the pixel 12B. The central portion 150 of the light collected by the microlens is arranged between the photoelectric conversion unit D of the pixel 12A and the photoelectric conversion unit D of the pixel 12B. By doing so, it is possible to detect a signal based on light that has passed through different pupil regions of the optical system from the pixels 12A and 12B, and it can be used as a focus detection signal.

As described above, according to the present embodiment, the electric charge generated in the p-type semiconductor region 138 can be collected in the n-type semiconductor region 116 of the photoelectric conversion unit D. This makes it possible to improve the sensitivity of the photoelectric conversion unit D and prevent unintended charges from leaking into the holding unit C1.

[Fourth Embodiment]
The imaging system according to the fourth embodiment of the present invention will be described with reference to FIG. The same components as those of the solid-state image pickup apparatus according to the first to third embodiments are designated by the same reference numerals, and the description thereof will be omitted or simplified. FIG. 11 is a block diagram showing a schematic configuration of an imaging system according to the present embodiment.

The solid-state image sensor 100 described in the first to third embodiments is applicable to various image pickup systems. Examples of applicable imaging systems include digital still cameras, digital camcorders, surveillance cameras, copiers, fax machines, mobile phones, in-vehicle cameras, observation satellites and the like. The image pickup system also includes a camera module including an optical system such as a lens and an image pickup device. FIG. 11 illustrates a block diagram of a digital still camera as an example of these.

The image pickup system 200 illustrated in FIG. 11 includes an image pickup device 201, a lens 202 for forming an optical image of a subject on the image pickup device 201, a diaphragm 204 for varying the amount of light passing through the lens 202, and a lens 202 for protection. Has a barrier 206 of. The lens 202 and the aperture 204 are optical systems that collect light on the image pickup apparatus 201. The image pickup device 201 is the solid-state image pickup device 100 described in the first to third embodiments, and converts the optical image formed by the lens 202 into image data.

The image pickup system 200 also has a signal processing unit 208 that processes an output signal output from the image pickup apparatus 201. The signal processing unit 208 performs AD conversion that converts the analog signal output by the image pickup apparatus 201 into a digital signal. In addition, the signal processing unit 208 also performs various corrections and compressions as necessary to output image data. The AD conversion unit, which is a part of the signal processing unit 208, may be formed on a semiconductor substrate provided with the image pickup device 201, or may be formed on a semiconductor substrate different from the image pickup device 201. Further, the image pickup apparatus 201 and the signal processing unit 208 may be formed on the same semiconductor substrate.

The image pickup system 200 further includes a memory unit 210 for temporarily storing image data, and an external interface unit (external I / F unit) 212 for communicating with an external computer or the like. Further, the imaging system 200 includes a recording medium 214 such as a semiconductor memory for recording or reading imaging data, and a recording medium control interface unit (recording medium control I / F unit) 216 for recording or reading on the recording medium 214. Have. The recording medium 214 may be built in the image pickup system 200 or may be detachable.

Further, the image pickup system 200 has an overall control / calculation unit 218 that controls various calculations and the entire digital still camera, and a timing generation unit 220 that outputs various timing signals to the image pickup device 201 and the signal processing unit 208. Here, a timing signal or the like may be input from the outside, and the image pickup system 200 may have at least an image pickup device 201 and a signal processing unit 208 that processes an output signal output from the image pickup device 201.

The image pickup device 201 outputs an image pickup signal to the signal processing unit 208. The signal processing unit 208 performs predetermined signal processing on the image pickup signal output from the image pickup apparatus 201, and outputs image data. The signal processing unit 208 uses the image pickup signal to generate an image.

By applying the solid-state image sensor 100 according to the first to third embodiments, it is possible to realize an image pickup system capable of acquiring a high-quality image having high sensitivity and a large saturation signal amount.

[Fifth Embodiment]
The image pickup system and the moving body according to the fifth embodiment of the present invention will be described with reference to FIG. FIG. 12 is a diagram showing a configuration of an imaging system and a moving body according to the present embodiment.

FIG. 12A shows an example of an imaging system related to a vehicle-mounted camera. The image pickup system 300 includes an image pickup device 310. The image pickup device 310 is the solid-state image pickup device 100 according to any one of the first to third embodiments. The image pickup system 300 has an image processing unit 312 that performs image processing on a plurality of image data acquired by the image pickup device 310, and a parallax (phase difference of the parallax image) from the plurality of image data acquired by the image pickup system 300. It has a parallax calculation unit 314 that performs calculation. Further, the imaging system 300 includes a distance measuring unit 316 that calculates the distance to the object based on the calculated parallax, and a collision determination unit 318 that determines whether or not there is a possibility of collision based on the calculated distance. And have. Here, the parallax calculation unit 314 and the distance measurement unit 316 are examples of distance information acquisition means for acquiring distance information to an object. That is, the distance information is information related to parallax, defocus amount, distance to an object, and the like. The collision determination unit 318 may determine the possibility of collision by using any of these distance information. The distance information acquisition means may be realized by hardware specially designed, or may be realized by a software module. Further, it may be realized by FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or the like, or may be realized by a combination thereof.

The image pickup system 300 is connected to the vehicle information acquisition device 320, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, the image pickup system 300 is connected to a control ECU 330, which is a control device that outputs a control signal for generating a braking force to the vehicle based on the determination result of the collision determination unit 318. The image pickup system 300 is also connected to an alarm device 340 that issues an alarm to the driver based on the determination result of the collision determination unit 318. For example, when the possibility of a collision is high as a result of the collision determination unit 318, the control ECU 330 controls the vehicle to avoid the collision and reduce the damage by applying the brake, returning the accelerator, suppressing the engine output, and the like. The alarm device 340 warns the user by sounding an alarm such as a sound, displaying alarm information on the screen of a car navigation system, or giving vibration to the seat belt or steering.

In the present embodiment, the surroundings of the vehicle, for example, the front or the rear, are imaged by the image pickup system 300. FIG. 12B shows an imaging system for imaging the front of the vehicle (imaging range 350). The vehicle information acquisition device 320 sends an instruction to the image pickup system 300 or the image pickup device 310. With such a configuration, the accuracy of distance measurement can be further improved.

In the above, an example of controlling so as not to collide with another vehicle has been described, but it can also be applied to control for automatically driving following other vehicles and control for automatically driving so as not to go out of the lane. .. Further, the image pickup system can be applied not only to a vehicle such as a own vehicle but also to a moving body (moving device) such as a ship, an aircraft, or an industrial robot. In addition, it can be applied not only to mobile objects but also to devices that widely use object recognition, such as intelligent transportation systems (ITS).

[Modification Embodiment]
The present invention is not limited to the above embodiment and can be modified in various ways.

For example, an example in which a partial configuration of any of the embodiments is added to another embodiment or an example in which a partial configuration of another embodiment is replaced with another embodiment is also an embodiment of the present invention.

Further, in the above embodiment, a solid-state image sensor using a photoelectric conversion unit D that generates electrons as a signal charge has been described as an example, but a solid-state image sensor using a photoelectric conversion unit D that generates holes as a signal charge has been described. The same applies to. In this case, the conductive type of the semiconductor region constituting each part of the pixel 12 is a reverse conductive type. The names of the source and drain of the transistor described in the above embodiment may differ depending on the conductive type of the transistor, the function of interest, and the like, and all or part of the above source and drain are referred to by the opposite names. Sometimes.

Further, in the above embodiment, the holding portion C1 has an embedded diode structure including a p-type semiconductor region 118 and an n-type semiconductor region 120, but the configuration of the holding portion C1 is not limited to this. For example, instead of arranging the p-type semiconductor region 118 on the surface of the semiconductor substrate 110, an electrode is arranged on the semiconductor substrate 110 via an insulating film, and a MOS capacity is provided between the electrode and the n-type semiconductor region 120. It may be configured to form. This electrode can also be connected to the gate electrode 128 of the transfer transistor M1.

Further, in the above embodiment, the solid-state image sensor provided with the function of the global electronic shutter has been described as an example, but the present invention has a holding unit for temporarily holding the signal carrier separately from the photoelectric conversion unit. It can be widely applied to a solid-state image sensor provided.

Further, the image pickup system shown in the above embodiment shows an example of an image pickup system to which the solid-state image pickup device of the present invention can be applied, and the image pickup systems to which the solid-state image pickup device of the present invention can be applied are shown in FIGS. 11 and 12. It is not limited to the configuration shown in.

It should be noted that the above embodiments are merely examples of embodiment of the present invention, and the technical scope of the present invention should not be construed in a limited manner by these. That is, the present invention can be implemented in various forms without departing from the technical idea or its main features.

D ... Photoelectric conversion unit C1, C2 ... Holding unit 110 ... Semiconductor substrate 112, 114, 118, 138 ... P-type semiconductor region 116, 118, 122, 124, 142 ... n-type semiconductor region 140 ... Opening 144 ... Photoelectric conversion unit Central part 146 ... Light-shielding film

Claims (21)

A photoelectric conversion unit that generates an electric charge by photoelectric conversion, a first holding unit that holds the electric charge transferred from the photoelectric conversion unit, and a second holding unit that holds the electric charge transferred from the first holding unit. A solid-state image pickup device having a plurality of pixels, each of which includes an amplification unit that outputs a signal based on the amount of electric charge held by the second holding unit.
The photoelectric conversion unit includes a second conductive type second semiconductor region for accumulating generated charges, a first conductive type third semiconductor region provided below the second semiconductor region, and the above-mentioned. It has a fourth semiconductor region of the second conductive type provided at the lower part of the third semiconductor region, and has.
The first holding portion is a fifth semiconductor region of the second conductive type provided apart from the second semiconductor region, and a lower portion of the fifth semiconductor region, wherein the third holding portion is the third. It has a sixth semiconductor region of the first conductive type provided at a depth provided with a semiconductor region, and has.
Between the third semiconductor region and the sixth semiconductor region, there is a semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region.
The semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region is a region that overlaps with the second semiconductor region and the fourth semiconductor region in a plan view, and is the photoelectric region. A solid-state image pickup device characterized in that it is arranged within a range between a central portion of an opening region that overlaps with a conversion unit in a plan view and is not obstructed by wiring and the first holding portion. The solid-state image pickup apparatus according to claim 1, wherein at least a part of the second semiconductor region and the fourth semiconductor region are connected to each other. The solid-state image pickup device according to claim 1, wherein the semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region has the second conductive type. The semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region is the first holding portion of another pixel adjacent to the central portion of the photoelectric conversion portion in a plan view. The solid-state image pickup device according to any one of claims 1 to 3, wherein the solid-state image pickup device is also arranged within the range between the two. Further having a light-shielding film covering the first holding portion,
One of claims 1 to 4, wherein the light-shielding film extends over the semiconductor region having a lower potential than each of the third semiconductor region and the sixth semiconductor region. The solid-state image sensor according to the section. The solid-state image sensor according to any one of claims 1 to 5, wherein the fourth semiconductor region extends to the lower portion of the sixth semiconductor region. The third semiconductor region and the sixth semiconductor region are provided at the same depth of the semiconductor substrate, and the impurity concentration is the same, according to any one of claims 1 to 6. The solid-state image sensor described. The photoelectric conversion unit of one pixel and the photoelectric conversion unit of another pixel are arranged adjacent to each other, and the third semiconductor region of the one pixel and the third semiconductor region of the other pixel are arranged adjacent to each other. The solid-state image pickup device according to any one of claims 1 to 7, wherein the solid-state image pickup device is connected to the image sensor. The impurity concentration of the third semiconductor region is set so that the entire semiconductor region is not depleted.
One of claims 1 to 8, wherein the fourth semiconductor region has an impurity concentration set so as to be depleted even when charges are accumulated in the second semiconductor region. The solid-state image sensor according to the section. The photoelectric conversion unit and the first holding unit are provided in the seventh semiconductor region of the first conductive type.
The solid-state image sensor according to any one of claims 1 to 9, wherein the third semiconductor region and the sixth semiconductor region are connected to the seventh semiconductor region. The solid-state image sensor according to claim 10, wherein the third semiconductor region and the sixth semiconductor region have a higher impurity concentration than the seventh semiconductor region. The first holding portion further has an eighth semiconductor region of the first conductive type provided on the surface portion of the semiconductor substrate.
The solid-state image sensor according to any one of claims 1 to 11, wherein the fifth semiconductor region is provided below the eighth semiconductor region. A photoelectric conversion unit that generates an electric charge by photoelectric conversion, a first holding unit that holds the electric charge transferred from the photoelectric conversion unit, and a second holding unit that holds the electric charge transferred from the first holding unit. A solid-state image pickup device having a plurality of pixels, each of which includes an amplification unit that outputs a signal based on the amount of electric charge held by the second holding unit.
The photoelectric conversion unit has a second conductive type second semiconductor region for accumulating the generated charges.
The first holding portion has a fifth semiconductor region of the second conductive type provided apart from the second semiconductor region.
The third semiconductor region of the first conductive type provided below the second semiconductor region and the fifth semiconductor region, and the second conductive type provided below the third semiconductor region. Further has 4 semiconductor regions,
At least a part of the second semiconductor region and the fourth semiconductor region are connected to each other.
The portion where the second semiconductor region and the fourth semiconductor region are connected is a region where the second semiconductor region and the fourth semiconductor region overlap in a plan view, and is a region in which the photoelectric conversion unit and the fourth semiconductor region are connected in a plan view. A solid-state image sensor, characterized in that it is arranged within a range between a central portion of an opening region not blocked by overlapping wiring and the first holding portion. The solid-state image sensor according to claim 13, wherein the portion connecting the second semiconductor region and the fourth semiconductor region has a semiconductor region having a lower potential than the third semiconductor region. The solid-state image sensor according to claim 14, wherein the semiconductor region having a lower potential than the third semiconductor region has the second conductive type. The solid-state image pickup device according to any one of claims 1 to 15, wherein the central portion of the photoelectric conversion unit is located at the center of gravity of the second semiconductor region in a plan view. Further having an optical waveguide arranged on the photoelectric conversion unit,
The solid-state image pickup device according to any one of claims 1 to 16, wherein the central portion of the photoelectric conversion unit is located at the center of the optical waveguide in a plan view. It further has a first semiconductor region of the first conductive type provided on the surface portion of the semiconductor substrate.
The solid-state image sensor according to any one of claims 1 to 17, wherein the second semiconductor region is provided below the first semiconductor region. The solid-state image pickup apparatus according to any one of claims 1 to 18, wherein the central portion of the aperture region and the central portion of the photoelectric conversion portion in a plan view are at the same position in a plan view. The solid-state image sensor according to any one of claims 1 to 19.
An image pickup system characterized by having a signal processing unit for processing a signal output from the pixel of the solid-state image pickup device. It ’s a mobile body,
The solid-state image sensor according to any one of claims 1 to 19.
A distance information acquisition means for acquiring distance information to an object from a parallax image based on a signal from the solid-state image sensor, and
A moving body having a control means for controlling the moving body based on the distance information.

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