JP7017377B2 - Multiplexer - Google Patents

Description

The present invention relates to a multiplexer, for example, a multiplexer in which a plurality of dielectric layers are laminated.

In order to increase the speed of wireless communication such as smart phones and mobile phones, a technology for simultaneously communicating a large number of bands such as carrier aggregation is used. Therefore, a multiplexer is used. In the multiplexer, one end of each of a plurality of low-pass filters (LPF), band-pass filter (BPF) and / or high-pass filter (HPF) is commonly connected to a common terminal (for example, Patent Documents 1 to 3).

Japanese Unexamined Patent Publication No. 2015-115866 Japanese Unexamined Patent Publication No. 2006-332980 Japanese Unexamined Patent Publication No. 2011-91862

However, in a multiplexer having LPF, BPF and HPF, the attenuation characteristic of HPF is deteriorated.

The present invention has been made in view of the above problems, and an object of the present invention is to suppress deterioration of the attenuation characteristics of the high-pass filter.

The present invention comprises a low-pass filter connected between a common terminal and a first terminal and formed by one or more first inductors and one or more first capacitors, and between the common terminal and the second terminal. A bandpass filter having a pass band higher than the pass band of the low pass filter and formed by one or more second inductors and one or more second capacitors, and the common terminal and the third terminal. A high-pass filter connected between the two, having a pass band higher than the pass band of the band-pass filter, and formed by one or more third inductors and one or more third capacitors, and one end to the common terminal. The one or a plurality of third capacitors include a fourth inductor that is connected and the other end is connected to the high-pass filter, is connected to the common terminal without intervening other elements, and the capacitors are not connected in parallel . A fourth capacitor connected to the fourth inductor without intervening other elements and connected in series between the common terminal and the third terminal, wherein the one or more first inductors are other elements. The one or more second capacitors include a sixth inductor that is connected to the common terminal without a capacitor, is connected in series between the common terminal and the first terminal, and the capacitors are not connected in parallel. It is a multiplexer including a sixth capacitor which is connected to the common terminal without passing through another element, is connected in series between the common terminal and the second terminal, and the inductor is not connected in parallel .

In the above configuration, the one or more third capacitors include a fourth capacitor connected to the fourth inductor without intervening other elements and connected in series between the common terminal and the third terminal. It can be configured.

In the above configuration, the one or more third inductors include a fifth inductor connected to the fourth capacitor without intervening other elements and shunted between the common terminal and the third terminal. The one or a plurality of third capacitors are connected to the fourth capacitor and the fifth inductor without interposing other elements, and the fifth capacitor connected in series between the common terminal and the third terminal. It can be configured to include.

In the above configuration, the capacitance of the fourth capacitor may be ½ or less of the capacitance of the fifth capacitor.

In the above configuration, a plurality of laminated dielectric layers, a plurality of conductor patterns formed on the surface of one of the plurality of dielectric layers, and at least one of the plurality of dielectric layers, respectively. The one or more first inductors, said one or more, comprising a plurality of via wires that penetrate one dielectric layer and electrically connect to at least one conductor pattern of the plurality of conductor patterns. The first capacitor, the one or more second inductors, the one or more second capacitors, the one or more third inductors, the one or more third capacitors and the fourth inductor, respectively. It can be configured to include at least a part of the conductor pattern of.

The present invention comprises a low-pass filter connected between a common terminal and a first terminal and formed by one or more first inductors and one or more first capacitors, and between the common terminal and the second terminal. A bandpass filter having a pass band higher than the pass band of the low pass filter and formed by one or more second inductors and one or more second capacitors, and the common terminal and the third terminal. A high-pass filter connected between the two, having a pass band higher than the pass band of the band-pass filter, and formed by one or more third inductors and one or more third capacitors, and one end to the common terminal. A fourth inductor connected and the other end of which is connected to the high-pass filter, a plurality of laminated dielectric layers, and a plurality of conductors formed on the surface of one of the plurality of capacitor layers. It comprises a body pattern and a plurality of via wirings, each penetrating at least one of the plurality of dielectric layers and electrically connected to at least one of the plurality of conductor patterns. The one or more first inductors, the one or more first capacitors, the one or more second inductors, the one or more second capacitors, the one or more third inductors, the one or more. The third capacitor and the fourth inductor each include at least a part of the plurality of conductor patterns, and the length of the conductor pattern connecting the fourth inductor and the common terminal is the same as that of the low pass filter. It is a multiplexer shorter than the length of the conductor pattern that electrically connects the terminals and the length of the conductor pattern that electrically connects the bandpass filter and the common terminal.

In the above configuration, the fourth inductor includes at least two conductor patterns provided on the surfaces of at least two dielectric layers, respectively, and the at least two conductor patterns are in the stacking direction of the plurality of dielectric layers. In the above, it is possible to configure the winding pattern in which at least a part thereof overlaps.

According to the present invention, deterioration of the attenuation characteristics of the high-pass filter can be suppressed.

FIG. 1 is a circuit diagram of a multiplexer according to Comparative Example 1. FIG. 2 is a diagram showing the passage characteristics of the multiplexer according to Comparative Example 1. FIG. 3 is a circuit diagram of the multiplexer according to Comparative Example 2. FIG. 4 is a diagram showing the passage characteristics of the multiplexer according to Comparative Example 2. FIG. 5 is a diagram showing a passband loss of the multiplexer according to Comparative Examples 1 and 2. FIG. 6 is a circuit diagram of the multiplexer according to the first embodiment. FIG. 7 is a diagram showing the passage characteristics of the multiplexer according to Comparative Example 1 and Example 1. FIG. 8 is a diagram showing a passband loss of the multiplexer according to Comparative Example 1 and Example 1. FIG. 9 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 10 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 11 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 12 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 13 is an enlarged view of the conductor pattern 12k in the first embodiment.

[Comparative Example 1]
FIG. 1 is a circuit diagram of a multiplexer according to Comparative Example 1. As shown in FIG. 1, an LPF (low-pass filter) 22 is connected between the common terminal Tan and the terminal T1. A BPF (bandpass filter) 24 is connected between the common terminal Tant and the terminal T2. An HPF (high-pass filter) 26 is connected between the common terminal Tant and the terminal T3. LPF22, BPF24 and HPF26 are commonly connected at the common node Na. The pass band of the BPF 24 is higher than the pass band of the LPF 22, and the pass band of the HPF 26 is higher than the pass band of the BPF 24.

The LPF 22 outputs a passband signal among the high frequency signals input to the terminal T1 (or the common terminal Tant) to the common terminal Tant (or the terminal T1), and suppresses signals in other frequency bands. The BPF 24 outputs a passband signal among the high frequency signals input to the terminal T2 (or common terminal Tant) to the common terminal Tant (or terminal T2), and suppresses signals in other frequency bands. The HPF 26 outputs a passband signal among the high frequency signals input to the terminal T3 (or the common terminal Tant) to the common terminal Tant (or the terminal T3), and suppresses signals in other frequency bands.

The LPF22, BPF24 and HPF26 are formed of one or more inductors and one or more capacitors, respectively. The LPF 22 has inductors L11 and L12 and capacitors C11 to C13. The inductors L11 and L12 are connected in series between the common terminal Tant and the terminal T1. The capacitor C11 is connected between the node N11 between the inductors L11 and L12 and the ground. The capacitor C13 is connected between the node N12 on the terminal T1 side of the inductor L12 and the ground. The capacitor C12 is connected in parallel to the inductor L12 between the nodes N11 and N12.

BPF24 has HPF24a and LPF24b. The HPF24a and LPF24b are connected in series between the common terminal Tant and the terminal T2. The HPF 24a has an inductor L21 and capacitors C21 to C23. The LPF24b has an inductor L22 and capacitors C24 to C26. Capacitors C21, C23 and inductor L22 are connected in series between the common terminal Tant and the terminal T2. The inductor L21 and the capacitor C22 are connected in series between the node N21 between the capacitors C21 and C23 and the ground. The capacitor C24 is connected between the node N22 between the capacitor C23 and the inductor L22 and the ground. The capacitor C26 is connected between the node N23 on the terminal T2 side of the inductor L22 and the ground. The capacitor C25 is connected in parallel with the inductor L22 between the nodes N22 and N23.

The HPF 26 has an inductor L31 and capacitors C31 to C33. Capacitors C31 and C33 are connected in series between the common terminal Tant and the terminal T3. The inductor L31 and the capacitor C32 are connected in series between the node N32 between the capacitors C31 and C33 and the ground.

The passing characteristics between the common terminal Tan and the terminals T1 to T3 in Comparative Example 1 were simulated. Table 1 shows the inductance and capacitance used in the simulation.

FIG. 2 is a diagram showing the passage characteristics of the multiplexer according to Comparative Example 1. T1 to T3 are passage characteristics between the common terminal Tant and terminals T1 to T3, respectively, and correspond to the passage characteristics of LPF22, BPF24, and HPF26, respectively. As shown in FIG. 2, the pass band of the LPF 22 is about 2.7 GHz or less. The pass band of the BPF 24 is about 3.1 GHz to 4.2 GHz. The pass band of HPF26 is about 4.5 GHz or more. The passbands of LPF22, BPF22 and HPF26 do not overlap each other. As in the region 50, the attenuation characteristics of the HPF 26 from 1.5 GHz to 3.7 GHz are deteriorated.

The attenuation characteristic of the HPF 26 deteriorates because the capacitance of the capacitor C31 is large. If the capacitance of the capacitor C31 is reduced, the attenuation characteristic in the region 50 is improved. However, when LPF22, BPF24 and HPF26 are connected to the common terminal Tant and the impedance is matched so as to improve the attenuation characteristic of HPF26 in the pass band of other filters (LPF22 and BPF24), the capacitance of the capacitor C31 becomes large. It ends up.

[Comparative Example 2]
FIG. 3 is a circuit diagram of the multiplexer according to Comparative Example 2. As shown in FIG. 3, the LPF24b and the HPF26 are commonly connected at the node N31. HPF24a is connected between the node N31 and the common terminal Tant. The LPF24b and the HPF24a function as a BPF corresponding to the BPF24 in FIG. An inductor L23 is connected between the nodes N31 and N22. The multiplexer according to Comparative Example 2 has a diplexer 25a having LPF22 and HPF24a, and a diplexer 25b having LPF24b and HPF26. Other configurations are the same as those in FIG. 1 of Comparative Example 1, and the description thereof will be omitted.

In Comparative Example 2, the HPF24a is connected in series with the HPF26 between the common terminal Tant and the terminal T3. Therefore, the damping characteristic in the region 50 is improved.

The passing characteristics between the common terminal Tan and the terminals T1 to T3 in Comparative Example 2 were simulated. Table 2 shows the inductance and capacitance used in the simulation.

FIG. 4 is a diagram showing the passage characteristics of the multiplexer according to Comparative Example 2. T1 to T3 are passage characteristics between the common terminal Tant and the terminals T1 to T3, respectively. As shown in FIG. 4, the attenuation characteristic of 1.5 GHz to 3.5 GHz between the common terminal Tant and the terminal T1 is improved as compared with FIG. 2 of Comparative Example 1.

FIG. 5 is a diagram showing a passband loss of the multiplexer according to Comparative Examples 1 and 2. The broken line and the solid line indicate Comparative Examples 1 and 2, respectively. As shown in FIG. 5, the loss between the common terminal Tant and the terminal T1 and the loss between the common terminal Tant and the terminal T2 are substantially the same in Comparative Examples 1 and 2. As shown by the arrow 52, the loss between the common terminal Tant and the terminal T3 in Comparative Example 2 is larger than the loss in Comparative Example 1.

Table 3 shows the loss between the common terminal Tant and the terminal T1 at 2690 MHz, the loss between the common terminal Tant and the terminal T2 at 3500 MHz, and the common terminal Tant and the terminal T3 at 5150 MHz in Comparative Examples 1 and 2. It is a table showing the loss between.

As shown in Table 3, the losses at the terminals T1 and T2 in Comparative Example 2 are similar to or improved from those in Comparative Example 1. However, the loss between the common terminal Tant and the terminal T3 in Comparative Example 2 is about 0.32 dB worse than that of Comparative Example 1.

As shown in FIGS. 5 and 3, in Comparative Example 2, the loss of the HPF deteriorates. This is because the two HPFs 24a and 26 are connected in series between the common terminal Tant and the terminal T3.

FIG. 6 is a circuit diagram of the multiplexer according to the first embodiment. As shown in FIG. 6, in the first embodiment, the inductor L4 is connected between the node N31 and the node Na on the common terminal Tant side of the HPF 26. Other configurations are the same as those in FIG. 1 of Comparative Example 1, and the description thereof will be omitted.

In the first embodiment, the inductor L4 is provided. By setting the inductance of the inductor L4 to an appropriate value, the capacitance of the capacitor C31 can be reduced even if impedance matching is performed. Therefore, the attenuation characteristics in the low band can be improved.

The passage characteristics between the common terminal Tant and the terminals T1 to T3 in the first embodiment were simulated. Table 4 shows the inductance and capacitance used in the simulation.

FIG. 7 is a diagram showing the passage characteristics of the multiplexer according to Comparative Example 1 and Example 1. T1 to T3 are passage characteristics between the common terminal Tant and the terminals T1 to T3, respectively. The broken line and the solid line indicate Comparative Example 1 and Example 1, respectively. As shown in FIG. 7, the attenuation characteristic between the common terminal Tan and the terminal T3 from 1.5 GHz to 3.7 GHz is improved as compared with FIG. 2 of Comparative Example 1. As shown by the arrow 54, the attenuation at 2.6 GHz is -12.2 dB in Comparative Example 1 and -17.5 dB in Example 1, which is an improvement of 5.3 dB.

FIG. 8 is a diagram showing a passband loss of the multiplexer according to Comparative Example 1 and Example 1. The broken line and the solid line indicate Comparative Example 1 and Example 1, respectively. As shown in FIG. 8, the loss between the common terminal Tant and the terminal T1 in the first embodiment, the loss between the common terminal Tant and the terminal T2, and the loss between the common terminal Tant and the terminal T3 are compared. It is about the same as the loss in Example 1.

Table 5 shows the loss between the common terminal Tant and the terminal T1 at 2690 MHz, the loss between the common terminal Tant and the terminal T2 at 3500 MHz, and the common terminal Tant and the terminal T3 at 5150 MHz in Comparative Examples 1 and 1. It is a table showing the loss between.

As shown in Table 5, in the first embodiment, the losses at the terminals T1 and T2 are slightly improved as compared with the comparative example 1. Although the loss between the common terminal Tant and the terminal T3 in Example 1 is 0.11 dB deteriorated from that of Comparative Example 1, it is smaller than the loss deterioration (0.32 dB) of Comparative Example 2 in Table 3.

As shown in FIG. 7, in Example 1, deterioration of the attenuation characteristic in the low frequency region of HPF 26 is suppressed as compared with Comparative Example 1. Further, as shown in FIGS. 8 and 5, deterioration of the loss of HPF 26 is suppressed as compared with Comparative Example 2. This is because by providing the inductor L4, impedance matching can be performed even if the capacitance of the capacitor C31 is reduced. By reducing the capacitance of the capacitor C31, the impedance in the low frequency region becomes large and the attenuation characteristic in the low frequency region is improved.

9 to 12 are disassembled perspective views of the multiplexer according to the first embodiment. As shown in FIGS. 9 to 12, a plurality of dielectric layers 11a to 11j are laminated in the laminated body 10. Conductor patterns 12a to 12j are formed on the upper surfaces of the dielectric layers 11a to 11j. A terminal 14 is provided on the lower surface of the dielectric layer 11j. The inductor is formed from at least one of the conductor patterns 12a to 12j. The capacitor is formed from conductor patterns 12a to 12j sandwiching one or more dielectric layers 11b to 11i.

A via wiring 13 penetrating the dielectric layers 11b to 11j is provided. The connection of the via wiring 13 is shown by a broken line. The black circles indicate that the via wiring 13 penetrates the illustrated dielectric layers 11b to 11j. The white circles indicate that the via wiring 13 penetrates the dielectric layers 11b to 11i one above the dielectric layers 11c to 11j shown, but does not penetrate the dielectric layers 11c to 11j shown. The dashed arrow indicates the connection destination in another figure. For example, the broken line arrow L4a in FIG. 9 indicates that the inductor L4 is connected to a part L4a in FIG.

As shown in FIG. 9, the conductor pattern 12a serves as a direction identification mark. A part L11b of the inductor L11, an inductor L12, a part L21b of the inductor L21, an inductor L22, an inductor L31 and a part L4c of the inductor L4 are formed by a conductor pattern 12b. A part L11a of the inductor L11, a part L21a of the inductor L21, and a part L4b of the inductor L4 are formed by the conductor pattern 12c.

As shown in FIG. 10, a part L4a of the inductor L4 is formed by the conductor pattern 12d. One electrode C31b of the capacitor C31 is formed by the conductor pattern 12e. One electrode C12b of the capacitor C12, one electrode C21b of the capacitor C21, and one electrode C23b of the capacitor C23 are formed by the conductor pattern 12f.

As shown in FIG. 11, the other electrode C21a of the capacitor C21, the other electrode C23a of the capacitor C23, one electrode C24b of the capacitor C24, one electrode C25b of the capacitor C25, the other electrode C31a of the capacitor C31 and the capacitor C33. One electrode C33b is formed by the conductor pattern 12g. Of the conductor pattern 12g, the conductor pattern 12k is provided with a node Na to which LPF22, BPF24 and HPF26 are commonly connected.

The other electrode C12a of the capacitor C12, the other electrode C25a of the capacitor C25, and the other electrode C33a of the capacitor C33 are formed by the conductor pattern 12h. One electrode C11b of the capacitor C11, one electrode C13b of the capacitor C13, one electrode C22b of the capacitor C22, one electrode C26b of the capacitor C26 and one electrode C32b of the capacitor C32 are formed by the conductor pattern 12i.

As shown in FIG. 12, the ground pattern Gnd is formed by the conductor pattern 12j. The ground pattern also serves as the other electrodes C11a, C13a, C22a, C24a, C26a and C32a of the capacitors C11, C13, C22, C24, C26 and C32, respectively. The terminal 14 provided on the lower surface of the dielectric layer 11j includes a common terminal Tant, terminals T1 to T3, and a ground terminal Tgnd. The ground terminal Tgnd is electrically connected to the ground pattern Gnd via the via wiring 13.

The dielectric layers 11a to 11j are made of, for example, a ceramic material and contain oxides of, for example, Si, Ca and Mg (for example, Diobside CaMgSi _{2O 6} ) as main components. The conductor patterns 12a to 12j and the via wiring 13 are metal layers containing, for example, Ag, Pd, Pt, Cu, Ni, Au, Au—Pd alloy or Ag—Pt alloy. The terminal 14 has a metal layer made of the same material as the conductor patterns 12a to 12j and a plating layer provided under the metal layer. The plating layer is, for example, a Ni film, a Sn film, or the like. The Sn film is a solder layer for mounting the multiplexer on a motherboard or the like, and the Ni film is a barrier layer for suppressing mutual diffusion between the solder layer and the electric body pattern.

According to the first embodiment, the LPF 22 is connected between the common terminal Tant and the terminal T1 (first terminal) by one or more inductors (first inductor) and one or more capacitors (first capacitor). It is formed. The BPF 24 is connected between the common terminal Tant and the terminal T2 (second terminal) and has a pass band higher than that of the LPF 22 and has one or more inductors (second inductor) and one or more capacitors (2nd inductor). It is formed by a second capacitor). The HPF 26 is connected between the common terminal Tant and the terminal T3 (third terminal), has a pass band higher than the pass band of the BPF 24, and has one or more inductors (third inductor) and one or more capacitors (third capacitor). It is formed by 3 capacitors).

When such a multiplexer tries to match impedance, the attenuation characteristic of HPF 26 deteriorates as shown in FIG. 2 of Comparative Example 1. Therefore, an inductor L4 (fourth inductor) having one end connected to the common terminal Tant and the other end connected to the HPF 26 is provided. As a result, the attenuation characteristics of HPF 26 can be improved as shown in FIG. Further, as shown in FIG. 8, the loss of HPF 26 can be suppressed as compared with Comparative Example 2.

Further, the inductor or capacitor electrically connected to the inductor L4 side most in the HPF 26 is a capacitor C31 (fourth capacitor) connected in series between the common terminal Tant and the terminal T3.

That is, in the HPF26, the inner capacitor is connected to the inductor L4 without passing through other elements (that is, the capacitor and the inductor), and the capacitor C31 (fourth capacitor) connected in series between the common terminal Tant and the terminal T3. )including.

As described above, when the element on the most common terminal Tant side of the HPF 26 is the capacitor C31, the capacitance of the capacitor C31 is increased when impedance matching is attempted as in Comparative Example 1. If the capacitance of the capacitor C31 is large, the attenuation characteristics at low frequencies deteriorate. Therefore, by providing the inductor L4 as in the first embodiment, deterioration of the attenuation characteristics of the HPF 26 can be suppressed.

Further, in the HPF 26, the inductor or capacitor electrically connected to the inductor L4 side next to the capacitor C31 is the inductor L31 (fifth inductor) shunt-connected between the common terminal Tant and the terminal T3. The inductor or capacitor electrically connected to the inductor L4 side next to the inductor L31 is a capacitor C33 (fifth capacitor) connected in series between the common terminal Tant and the terminal T3.

That is, the inductor in the HPF 26 includes an inductor L31 (fifth inductor) connected to the capacitor C31 without interposing other elements and shunt-connected between the common terminal Tant and the terminal T3. Further, the capacitor in the HPF 26 includes a capacitor C33 (fifth capacitor) connected to the capacitor C31 and the inductor L31 without interposing other elements and connected in series between the common terminal Tant and the terminal T3.

As described above, when the T-type CLC filter is used for the HPF26, the attenuation characteristics tend to deteriorate. Therefore, by providing the inductor L4, deterioration of the attenuation characteristics can be suppressed.

The capacitance of the capacitor C31 is ½ or less of the capacitance of the capacitor C33. As a result, deterioration of the damping characteristics can be further suppressed. The capacitance of the capacitor C31 is preferably 1/3 or less of the capacitance of the capacitor C33.

When the LPF and the HPF are connected to the common terminal Tant as in the diplexer, if the first stage of the LPF is an inductor and the first stage of the HPF is a capacitor, impedance matching between the LPF and the HPF can be easily performed.

However, in the LPF 22, the inductor or capacitor electrically connected to the most common terminal Tant side is the inductor L11 (sixth inductor) connected in series between the common terminal Tant and the terminal T1. In the BPF 24, the inductor or capacitor electrically connected to the most common terminal Tant side is the capacitor C21 (sixth capacitor) connected in series between the common terminal Tant and the terminal T2.

That is, the inductor of the LPF 22 includes an inductor L11 (sixth inductor) connected to the common terminal Tant via another element (that is, an inductor and a capacitor) and connected in series between the common terminal Tant and the terminal T1. The capacitor of the BPF 24 includes a capacitor C21 (sixth capacitor) connected to the common terminal Tant without other elements (ie, inductor and capacitor) and connected in series between the common terminal Tant and the terminal T2.

As described above, when the first stage of the LPF 22 (that is, the element closest to the common terminal Tant) is the inductor L11, the first stage of the BPF 24 is the capacitor C21, and the first stage of the HPF 26 is the capacitor C31, the first stage has two capacitors. .. This makes it difficult to match the three filters. Therefore, it is preferable to provide the inductor L4 as in the first embodiment.

The multiplexer includes a plurality of dielectric layers 11a to 11j, a plurality of conductor patterns 12a to 12j formed on the surface of one of the plurality of dielectric layers 11a to 11j, and a plurality of dielectrics, respectively. It comprises a plurality of via wirings 13 that penetrate at least one dielectric layer of layers 11a to 11j and are electrically connected to at least one conductor pattern of the plurality of conductor patterns 12a to 12j. The LPF22, BPF24 and HPF26 inductors and capacitors each include at least a portion of a plurality of conductor patterns. In this way, the multiplexer can be formed by laminating dielectric layers.

FIG. 13 is an enlarged view of the conductor pattern 12k in the first embodiment. As shown in FIG. 13, a conductor pattern 12k is provided on the surface of the dielectric layer 11g. The conductor pattern 12k has a node Na to which the LPF22, BPF24 and the inductor L4 are commonly connected. The via wiring 13a connecting the common terminal Tant and the conductor pattern 12k is connected to the conductor pattern 12k at the position P1. The via wiring 13b that electrically connects the inductor L4 and the conductor pattern 12k is electrically connected to the conductor pattern 12k at the position P2. The via wiring 13c that electrically connects the inductor L11 of the LPF 22 and the conductor pattern 12k is electrically connected to the conductor pattern 12k at the position P3. The other electrode C21a of the capacitor C21 of the BPF 24 is integrally formed with the conductor pattern 12k and is connected to the conductor pattern 12k at the position P4.

The positions P1 and P2 are substantially the same positions in the conductor pattern 12k, and the positions P1 and P2 correspond to the node Na. From this, the length of the conductor pattern 12k connecting the inductor L4 and the common terminal Tant is almost 0. On the other hand, the length of the conductor pattern 12k connecting the LPF 22 and the common terminal Tant corresponds to the length D1 of the positions P1 and P3, and the length of the conductor pattern 12k connecting the BPF 24 and the common terminal Tant is the position. It corresponds to the length D2 of P1 and P4. As described above, the length of the conductor pattern 12k connecting the inductor L4 and the common terminal Tant is the length of the conductor pattern 12k for electrically connecting the LPF 22 and the common terminal Tant, and the length of the conductor pattern 12k connecting the BPF 24 and the common terminal Tant. It is shorter than the length of the electrically connected conductor pattern 12k.

As a result, the parasitic capacitance added between the inductor L4 and the common terminal Tant becomes small, so that impedance matching becomes easy.

As shown in FIGS. 9 and 10, the inductor L4 includes at least two conductor patterns 12b to 12d provided on the surfaces of at least two dielectric layers 11b to 11d, respectively. The conductor pattern of a part L4b and L4c of the inductor L4 is a winding pattern in which at least a part overlaps in the stacking direction of the plurality of dielectric layers 11a to 11j. Thereby, the inductor L4 having a large inductance can be formed by using the conductor patterns 12b to 12d.

In the first embodiment, an example in which the multiplexer is formed on the laminated body 10 in which the dielectric layers 11a to 11j are laminated has been described, but the multiplexer may be formed in addition to the laminated body 10. The number of layers of the dielectric layers 11a to 11j can be arbitrarily set.

Although the examples of the present invention have been described in detail above, the present invention is not limited to such specific examples, and various modifications and variations are made within the scope of the gist of the present invention described in the claims. It can be changed.

10 Laminated body 11a-11j Dielectric layer 12a-12k Conductor pattern 13, 13a-13c Via wiring 14 terminals

Claims (7)

A low-pass filter connected between the common terminal and the first terminal and formed by one or more first inductors and one or more first capacitors.
A bandpass filter connected between the common terminal and the second terminal, having a passband higher than that of the lowpass filter, and formed by one or more second inductors and one or more second capacitors. When,
A high-pass filter connected between the common terminal and the third terminal, having a pass band higher than the pass band of the bandpass filter, and formed by one or more third inductors and one or more third capacitors. When,
A fourth inductor in which one end is connected to the common terminal and the other end is connected to the high-pass filter, connected to the common terminal without interposing other elements, and the capacitors are not connected in parallel .
Equipped with
The one or more third capacitors include a fourth capacitor connected to the fourth inductor without intervening other elements and connected in series between the common terminal and the third terminal.
The one or a plurality of first inductors are connected to the common terminal without interposing other elements, are connected in series between the common terminal and the first terminal, and the capacitors are not connected in parallel to the sixth inductor. Including
The one or a plurality of second capacitors are connected to the common terminal without interposing other elements, are connected in series between the common terminal and the second terminal, and the inductor is not connected in parallel to the sixth capacitor. Inductor including . With multiple laminated dielectric layers,
A plurality of conductor patterns formed on the surface of one of the plurality of dielectric layers, each of which has a plurality of conductor patterns.
A plurality of via wirings, each of which penetrates at least one dielectric layer of the plurality of dielectric layers and is electrically connected to at least one conductor pattern of the plurality of conductor patterns.
Equipped with
The one or more first inductors, the one or more first capacitors, the one or more second inductors, the one or more second capacitors, the one or more third inductors, the one or more. The multiplexer according to claim 1 , wherein the third capacitor and the fourth inductor each include at least a part of the plurality of conductor patterns. A low-pass filter connected between the common terminal and the first terminal and formed by one or more first inductors and one or more first capacitors.
A bandpass filter connected between the common terminal and the second terminal, having a passband higher than that of the lowpass filter, and formed by one or more second inductors and one or more second capacitors. When,
A high-pass filter connected between the common terminal and the third terminal, having a pass band higher than the pass band of the bandpass filter, and formed by one or more third inductors and one or more third capacitors. When,
A fourth inductor with one end connected to the common terminal and the other end connected to the high-pass filter.
With multiple laminated dielectric layers,
A plurality of conductor patterns formed on the surface of one of the plurality of dielectric layers, each of which has a plurality of conductor patterns.
A plurality of via wirings, each of which penetrates at least one dielectric layer of the plurality of dielectric layers and is electrically connected to at least one conductor pattern of the plurality of conductor patterns.
Equipped with
The one or more first inductors, the one or more first capacitors, the one or more second inductors, the one or more second capacitors, the one or more third inductors, the one or more. The third capacitor and the fourth inductor each contain at least a portion of the plurality of conductor patterns.
The length of the conductor pattern connecting the fourth inductor and the common terminal is the length of the conductor pattern electrically connecting the low-pass filter and the common terminal, and the band-pass filter and the common terminal. A multiplexer that is shorter than the length of the conductor pattern that electrically connects the. The fourth inductor comprises at least two conductor patterns, each provided on the surface of at least two dielectric layers.
The multiplexer according to claim 3 , wherein the at least two conductor patterns are winding patterns in which at least a part thereof overlaps in the stacking direction of the plurality of dielectric layers. 3 . 4. The multiplexer according to 4. The one or more third inductors include a fifth inductor connected to the fourth capacitor without intervening other elements and shunted between the common terminal and the third terminal.
The one or a plurality of third capacitors are connected to the fourth capacitor and the fifth inductor without interposing other elements, and the fifth capacitor connected in series between the common terminal and the third terminal. The multiplexer according to any one of claims 1, 2 and 5 . The multiplexer according to claim 6 , wherein the capacitance of the fourth capacitor is ½ or less of the capacitance of the fifth capacitor.

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