JP7017299B2 - Manufacturing method of diamond electronic element and diamond electronic element - Google Patents

Description

The present invention relates to a diamond electronic element and a method for manufacturing a diamond electronic element.

Diamond has a wide bandgap of 5.47 eV and a very high dielectric breakdown electric field strength of 10 MV / cm. Furthermore, since it has the highest thermal conductivity of a substance, it is advantageous as a high-output power device if it is used for an electronic device.

In addition, diamond has high drift mobility and is advantageous as the fastest power device among semiconductors even when compared with the Johnson figure of merit. Therefore, diamond is said to be the ultimate semiconductor suitable for high frequency and high power electronic devices.

Currently, most single crystal diamonds for manufacturing diamond semiconductors are diamonds called Ib type synthesized by the high temperature and high pressure method (HPHT). This Ib-type diamond contains a large amount of nitrogen impurities and can only be obtained up to a size of about 8 mm square at the maximum, and is not practical. In addition, a method called a mosaic method in which a large number of HPHT substrates are arranged side by side and joined together is also proposed (Non-Patent Document 1), but the problem of imperfections in the seams remains.

On the other hand, in the Chemical Vapor Deposition (CVD) method, polycrystalline diamond can obtain a large area diamond with a diameter of about 6 inches (150 mm) with high purity, but it is usually suitable for electronic devices. It was difficult to crystallize. This is because, since single crystal Si is conventionally used as a substrate, the difference in lattice constant from diamond is large (mismatch degree 52.6%), and it is very difficult to directly grow heteroepitaxially.

Therefore, various studies have progressed, and it has been reported that it is effective to form a diamond on Pt (Non-Patent Document 2) or Ir (Non-Patent Document 3) as a base film.

Currently, research using Ir undercoat is the most advanced. This causes the Ir film to grow heteroepitaxially on a substrate such as MgO. Next, the DC plasma method is used for bias pretreatment with hydrogen-diluted methane gas, and the plasma CVD method is used for long-term growth of diamond, which is usually used as a self-supporting substrate for diamond having a thickness of about 400 μm to 1000 μm.

However, the difference in the linear expansion coefficient between the substrate and the Ir film, and also the diamond is large. For example, the linear expansion coefficients of the MgO substrate and the Ir film, and further the diamond are 13.8 × 10 ^{-6K -1} , 7. It is 1 × 10 ^-6 K ^-1 and 1.1 × 10 ^-6 K ^-1 , and a large thermal stress is generated between the diamond and the underlying substrate (Non-Patent Document 4).

It is also known that diamond generally rapidly generates a large internal stress with crystal growth (Non-Patent Document 5). Actually, there is an example of trying to form diamond as thick as 200 μm, and in some cases, about 1 mm on an Ir film-formed substrate, but if it is left as it is, cracks will still occur and it will not be practical (Non-Patent Document 6).

In addition, both HPHT and conventional heteroepic diamond self-supporting substrates have process elements that increase costs due to diamond growth to a thickness that can be handled, slicing, and polishing of large uneven surfaces. It contained a lot.

H. Yamada, Appl. Phys. Let. 104, 102110 (2014). Y. Shintani, J.M. Mater. Res. 11,2955 (1996). K. Ohtsuka, Jpn. J. Apple. Phys. 35, L1072 (1996). A. K. Shinha, J.M. Apple. Phys. 49,2423 (1978). H. Noguchi, J.M. Vac. Sci. Technol. B16, 1167 (1998). Atsushi Sawabe, Journal of the Japanese Society for Crystal Growth 39,179 (2012).

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a large area, low cost, high quality diamond electronic element and a method for manufacturing a diamond electronic element.

In order to achieve the above object, according to the present invention, it is a diamond electronic element.
A silicon substrate, an intermediate layer formed on the silicon substrate and composed of any one of a single crystal MgO layer, a single crystal SrTiO ₃ layer, an α-Al _{2O 3} layer, and a YSZ (yttria-stabilized zirconia) layer. It has a base layer formed on the intermediate layer and composed of any of an iridium layer, a rhodium layer, and a platinum layer, and a single crystal diamond layer formed on the base layer.
Provided is a diamond electronic device characterized in that the thickness of the single crystal diamond layer is 300 μm or less.

Such a device would be a large area, low cost, high quality diamond electronic device. In particular, since the thickness of the single crystal diamond layer is 300 μm or less, the time for forming the single crystal diamond layer is shortened. Further, since the unevenness of the surface of the single crystal diamond layer is suppressed, the time required for the polishing process is shortened. Therefore, the cost is low. Further, since the warp of the single crystal diamond layer is suppressed, the generation and breakage of cracks are prevented, and the polishing process and the device can be easily manufactured.

At this time, one or more thin films made of gold, platinum, titanium, chromium, iridium, rhodium, silicon, or silicon oxide (SiO ₂ ) are formed between the silicon base material and the intermediate layer. Is preferable.

In such a case, the interposition of the thin film improves the connectivity between the intermediate layer and the silicon base material, and a better intermediate layer is formed.

At this time, the crystallinity of the single crystal diamond layer is the rocking curve half width at half maximum of the diffraction intensity peak at 2θ = 119.5 °, which is attributed to diamond (004) analyzed by the X-ray diffraction method having a wavelength of λ = 1.54 Å. FWHM) can be 3 ° or less.

Sufficient device performance can be obtained as long as it has a half-value width in such a range.

At this time, the single crystal diamond layer is selected from one of a p-type single crystal diamond into which a boron impurity is introduced, an n-type single crystal diamond into which a phosphorus impurity is introduced, and a high-resistance single crystal diamond into which no impurity is introduced. It is preferable that two or more crystalline diamond layers are laminated.

By forming such a laminated single crystal diamond layer composed of two or more layers, it can be suitably operated as various devices depending on the purpose.

Further, according to the present invention, it is a method for manufacturing a diamond electronic element.
It consists of a preparatory step for preparing a silicon substrate, and one of a single crystal MgO layer, a single crystal SrTiO ₃ layer, an α-Al _{2O 3} layer, and a YSZ (yttria-stabilized zirconia) layer on the silicon substrate. An intermediate layer step of forming an intermediate layer, an underlayer step of forming an underlayer composed of an yttria layer, a rhodium layer, or a platinum layer on the intermediate layer, and a single crystal diamond layer being formed on the underlayer. Including single crystal diamond layer step
Provided is a method for manufacturing a diamond electronic element, characterized in that the thickness of the single crystal diamond layer formed in the single crystal diamond layer step is 300 μm or less.

In this way, a large area, low cost, high quality diamond electronic device can be manufactured. In particular, since the thickness of the single crystal diamond layer is 300 μm or less, the time for forming the single crystal diamond layer is shortened. Further, since the unevenness of the surface of the single crystal diamond layer can be suppressed, the time required for the polishing process is shortened. Therefore, the cost can be reduced. Further, since the warp of the single crystal diamond layer is suppressed, the generation and breakage of cracks can be prevented, and polishing and device fabrication can be easily performed.

At this time, between the preparation step and the intermediate layer step, a thin film made of any one of gold, platinum, titanium, chromium, iridium, rhodium, silicon, and silicon oxide (SiO ₂ ) is formed on the silicon base material. It is preferable to have a step of forming more than one layer.

By doing so, the interposition of the thin film improves the connectivity between the intermediate layer and the silicon base material, and makes it possible to form a better intermediate layer.

At this time, in the single crystal diamond layer step, the crystallinity of the single crystal diamond layer formed on the base layer was analyzed by an X-ray diffraction method having a wavelength of λ = 1.54 Å, and 2θ = assigned to diamond (004). The locking curve half-value width (FWHM) of the diffraction intensity peak at 119.5 ° is preferably 3 ° or less.

Sufficient device performance can be obtained by setting the full width at half maximum in such a range.

At this time, in the single crystal diamond layer step, as the single crystal diamond layer formed on the base layer, a p-type single crystal diamond introduced with a boron impurity, an n-type single crystal diamond introduced with a phosphorus impurity, and an impurity are introduced. Two or more single crystal diamond layers selected from any of the high resistance single crystal diamonds can be laminated.

By forming a laminated single crystal diamond layer composed of two or more layers in this way, it can be suitably operated as various devices depending on the purpose.

The diamond electronic element and the method for manufacturing a diamond electronic element of the present invention provide a large area, low cost, and high quality diamond electronic element. If such a diamond electronic element is used for an LED, a power device, or the like, it is possible to sufficiently obtain desired characteristics in a large area at low cost.

It is a schematic diagram which showed an example of the diamond electronic element of this invention. It is a schematic diagram which showed an example of the manufacturing method of the diamond electronic element of this invention. It is the schematic sectional drawing of the diamond Schottky barrier diode produced in the Example. It is an appearance photograph of the diamond Schottky barrier diode produced in the Example. It is a graph which showed the measurement result of the IV characteristic of the diamond Schottky barrier diode produced in the Example.

Hereinafter, embodiments of the present invention will be described, but the present invention is not limited thereto.

As described above, conventionally, it has not been possible to manufacture a large-area, low-cost, high-quality diamond electronic device. Therefore, the present inventor has made extensive studies to solve such a problem. As a result, we thought that it would be optimal to use the base material as a silicon base material and to have an intermediate layer, an underlayer, and a single crystal diamond layer on top of it. We have found that a diamond electronic device having desired performance can be obtained by defining the thickness of the crystalline diamond layer to be 300 μm or less, and completed the present invention.

First, the diamond electronic device of the present invention will be described with reference to FIG.
As shown in FIG. 1, the diamond electronic device 1 of the present invention includes a silicon base material 2, an intermediate layer 3 formed on the silicon base material 2, and a base layer 4 formed on the intermediate layer 3. It has a single crystal diamond layer 5 formed on the base layer 4.

The intermediate layer 3 is composed of any one of a single crystal MgO layer, a single crystal SrTiO ₃ layer, an α-Al _{2O 3} layer, and a YSZ (yttria-stabilized zirconia) layer. Further, the base layer 4 is composed of any one of an iridium layer, a rhodium layer, and a platinum layer.

At this time, one or more thin films 6 made of gold, platinum, titanium, chromium, iridium, rhodium, silicon, or silicon oxide (SiO ₂ ) were formed between the silicon base material 2 and the intermediate layer 3. It is preferable that it is a thing.

In such a case, the interposition of the thin film 6 improves the connectivity between the intermediate layer 3 and the silicon base material 2, and the intermediate layer 3 in a better state is formed. ..

In the present invention, it suffices to have an intermediate layer above the silicon substrate, a base layer above the intermediate layer, and a single crystal diamond layer above the base layer. A relaxation layer or the like may be provided between them depending on the purpose. Further, each of the layers may be composed of two or more layers.

The crystallinity of the single crystal diamond layer 5 formed on the base layer 4 is the locking of the diffraction intensity peak at 2θ = 119.5 ° attributed to diamond (004) analyzed by the X-ray diffraction method with a wavelength of λ = 1.54 Å. The curve half width (FWHM) is preferably 3 ° or less.
Sufficient device performance can be obtained as long as it has a half-value width in such a range.

Here, the thickness of the single crystal diamond layer 5 needs to be 300 μm or less.
As described above, in the diamond electronic element of the present invention, the thickness of the single crystal diamond layer 5 is 300 μm or less, so that the time for forming the single crystal diamond layer 5 is shortened. Further, since the unevenness of the surface of the single crystal diamond layer 5 is suppressed, the time required for the polishing process is shortened. Therefore, the cost is low. Further, since the warp of the single crystal diamond layer 5 is suppressed, the generation and breakage of cracks are prevented, and the polishing process and the device can be easily manufactured.

The single crystal diamond layer 5 is a single crystal diamond layer selected from one of a p-type single crystal diamond having a boron impurity introduced, an n-type single crystal diamond having a phosphorus impurity introduced, and a high resistance single crystal diamond having no impurity introduced. It can be a stack of two or more layers. The selection of the single crystal diamond layer 5 to be laminated is not particularly limited, and for example, two layers of p-type single crystal diamond can be appropriately determined.

By forming such a laminated single crystal diamond layer 5 composed of two or more layers, it can be suitably operated as various devices depending on the purpose. For example, it can be specifically used for LEDs, power devices, and the like.

When a laminated single crystal diamond layer composed of two or more layers as described above is formed, the total thickness of them needs to be 300 μm or less.

Such a diamond electronic element 1 of the present invention provides a large area, low cost, and high quality diamond electronic element. If such a diamond electronic element 1 is used for an LED, a power device, or the like, it is possible to sufficiently obtain desired characteristics in a large area at low cost.

Next, the method for manufacturing the diamond electronic device of the present invention will be described with reference to FIGS. 1 and 2.
(Preparation process: SP1 in FIG. 2)
First, the silicon base material 2 is prepared.
The silicon substrate 2 to be prepared is not particularly limited, and may be, for example, a single crystal silicon wafer having a diameter of 5 to 150 mm polished on both sides. Silicon wafers with a large area and high quality can be obtained at low cost.

Here, between the above-mentioned preparation step (SP1 in FIG. 2) and the intermediate layer step (SP2 in FIG. 2) described later, gold, platinum, titanium, chromium, iridium, rhodium, silicon, It is preferable to perform a step of forming one or more thin films made of any one of silicon oxide (SiO ₂ ).

By interposing one or more thin films 6 between the silicon base material 2 and the intermediate layer 3 in this way, the connectivity between the intermediate layer 3 and the silicon base material 2 is improved, and the intermediate layer is in a better state. It becomes possible to form the layer 3. The forming method is not particularly limited, and any conventional method can be adopted.

(Intermediate layer process: SP2 in FIG. 2)
Next, an intermediate layer 3 composed of any one of a single crystal MgO layer, a single crystal SrTiO ₃ layer, an α-Al _{2O 3} layer, and a YSZ (yttria-stabilized zirconia) layer is formed on the silicon base material 2.

The intermediate layer 3 can be formed by, for example, spatter, electron beam vapor deposition, vapor phase synthesis, molecular beam epitaxy method, or the like, or by a bonding method, an adhesive method, or the like.

(Underground layer process; SP3 in FIG. 2)
Next, an underlayer 4 composed of any of an iridium layer, a rhodium layer, and a platinum layer is formed on the intermediate layer 3.

The base layer 4 can be formed by heteroepitaxial growth by, for example, sputtering, electron beam deposition, vapor phase synthesis, molecular beam epitaxy, or the like.

(Single crystal diamond layer process: SP4 in FIG. 2)
Then, the single crystal diamond layer 5 is formed on the base layer 4.
At this time, if the thickness of the single crystal diamond layer 5 is thicker than 300 μm, long-term growth is required, surface irregularities become large, and long-time polishing is required, which is a high cost factor. .. In addition, the warp becomes large, which makes polishing and device fabrication difficult. In some cases, it may cause cracks or damage.

Therefore, the thickness of the single crystal diamond layer 5 formed in the single crystal diamond layer step is set to 300 μm or less. As a result, the time for forming the single crystal diamond layer is shortened, and further, the unevenness of the surface of the single crystal diamond layer can be suppressed, so that the time required for the polishing process is also shortened. Therefore, the cost can be reduced. Further, since the warp of the single crystal diamond layer is suppressed, the generation and breakage of cracks can be prevented, and polishing and device fabrication can be easily performed.

The single crystal diamond layer 5 can be formed by heteroepitaxial growth by microwave CVD, DC plasma CVD, thermal filament CVD, arc discharge CVD method or the like.

At this time, the crystallinity of the single crystal diamond layer 5 formed on the base layer 4 was analyzed by an X-ray diffraction method having a wavelength of λ = 1.54 Å, and the diffraction intensity peak at 2θ = 119.5 ° attributed to diamond (004). The half-value width (FWHM) of the locking curve is preferably 3 ° or less. The formation of the diamond layer 5 having such crystalline properties is performed, for example, by subjecting the surface of the underlying layer 4 to pretreatment (bias treatment) for forming diamond nuclei, followed by microwave CVD, DC plasma CVD, and thermal filament. This can be done by heteroepitaxially growing the single crystal diamond layer 5 by CVD, arc discharge CVD, or the like.

By doing so, the full width at half maximum becomes sufficiently small, and it is possible to more reliably obtain sufficient device performance.

At this time, as the single crystal diamond layer 5 formed on the base layer 4, p-type single crystal diamond introduced with boron impurities, n-type single crystal diamonds introduced with phosphorus impurities, and high-resistance single crystal diamonds not introduced with impurities. Two or more single crystal diamond layers 5 selected from any of these can be laminated. The selection of the single crystal diamond layer 5 to be laminated is not particularly limited, and for example, two layers of p-type single crystal diamond can be appropriately determined.

By forming such a laminated single crystal diamond layer 5 composed of two or more layers, it can be suitably operated as various devices depending on the purpose.

Further, when the single crystal diamond layer 5 has a layer structure of two or more layers as described above, the total thickness of them needs to be 300 μm or less.

With such a method for manufacturing a diamond electronic component of the present invention, a large area, low cost, and high quality diamond electronic device can be manufactured. If such a diamond electronic element is used for an LED, a power device, or the like, it is possible to sufficiently obtain desired characteristics in a large area at low cost.

Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples of the present invention, but the present invention is not limited thereto.

(Example 1)
First, a single crystal silicon wafer having a diameter of 10.0 mm and a thickness of 1.0 mm and having both sides polished in an orientation (100) was prepared as the silicon substrate 2.

Then, a single crystal MgO layer is epitaxially grown on the surface side of the single crystal diamond layer 5 on the surface side where the film is formed by an electron beam vapor deposition method in a vacuum under the condition of a substrate temperature of 900 ° C. until the single crystal MgO layer reaches 1 μm. Layer 3 was formed.

Next, an Ir (iridium) layer was heteroepitaxially grown on the single crystal MgO layer to form the base layer 4. For the film formation, R.I. F. (13.56 MHz) Magnetron spatter method was used. After heating the substrate on which the single crystal MgO layer was formed to 800 ° C. and confirming that the base pressure was 6 × 10 ^-7 Torr (about 8.0 × 10 ^-5 Pa) or less, 10 sccm of Ar gas was introduced. did. After adjusting the opening degree of the valve leading to the exhaust system to 5 × 10 ^-2 Torr (about 6.7 Pa), R. F. A film was formed for 15 minutes by inputting a power of 1000 W. The obtained Ir layer had a thickness of 0.7 μm.

Next, a pretreatment (bias treatment) for nucleation of diamond was performed. After setting the substrate on which the Ir layer was formed on a flat plate electrode with a diameter of 15 mm and confirming that the base pressure was 1 × 10 ^-6 Torr (about 1.3 × 10 ^-4 Pa) or less, Hydrogen-diluted methane (CH ₄ / (CH ₄ + H ₂ ) = 5.0 vol.%) Was introduced in an amount of 500 sccm. After adjusting the opening degree of the valve leading to the exhaust system to 100 Torr (about 1.3 × 10 ⁴ Pa), a negative voltage was applied to the electrode on the substrate side and exposed to plasma for 90 seconds to bias the substrate surface. ..

Finally, the single crystal diamond layer 5 was heteroepitaxially grown by the DC plasma CVD method. The biased substrate is set in the chamber of the DC plasma CVD apparatus, exhausted to a base pressure of 10 ^-3 Torr (about 1.3 × 10 ^-1 Pa) or less with a rotary pump, and then the raw material gas. Hydrogen-diluted methane (CH ₄ / (CH ₄ + H ₂ ) = 5.0 vol.%) Was introduced at 1000 sccm. After adjusting the opening degree of the valve leading to the exhaust system to 110 Torr (about 1.5 × 10 ⁴ Pa) in the chamber, a DC current of 2.0 A was passed to form a film for 10 hours. The substrate temperature during film formation was measured with a pyrometer and found to be 950 ° C.

The obtained single crystal diamond layer 5 was a completely continuous film with no peeling on the entire surface of the substrate having a diameter of 10 mm, and the film thickness was 50 μm. When this single crystal diamond layer 5 was subjected to X-ray diffraction measurement (incident X-ray wavelength 1.54 Å), the half width of the diffraction intensity peak at 2θ = 119.5 ° attributable to diamond (004) was 600 arcsec (about 0.167 °). )Met.

A 2 mm square was cut out from this substrate to form a substrate, and a diamond Schottky barrier diode (SBD) was produced.

First, the surface of the single crystal diamond layer 5 was polished to have a surface roughness RMS = 0.3 nm (measurement in a 10 μm square region AFM). Next, a high-concentration boron-doped p-type single crystal diamond layer 5a (P ⁺ _, 10 ²⁰ atoms / cm ³ ) was formed to a thickness of 1 μm by a microwave CVD method. Further, a low boron-doped p-type single crystal diamond layer 5b (P, 4 × 10 ¹⁶ atoms / cm ³ ) was formed to a thickness of 1 μm. Ohmic electrodes 7 (Au / Pt / Ti interface side) having a diameter of 380 μm and Schottky electrodes 8 having a diameter of 180 μm for SBD were formed on the electrodes. FIG. 3 is a schematic cross-sectional view of the created SBD. FIG. 4 is an external photograph of the produced SBD.

The IV characteristics of the SBD thus produced were measured. The measurement results at this time are shown in FIG. The rectifying characteristic derived from the measurement result was 10 ¹² , and the ideality factor was n = 1.2. These are the same values as HPHT diamonds.

(Example 2)
In Example 1, a single crystal diamond having a thickness of 50 μm was formed in the same manner except that a thin film of Pt was formed on the silicon substrate 2 by a sputtering method in an amount of 1 μm and then heteroepitaxially grown on the single crystal MgO layer (intermediate layer). When the layer 5 was formed, when the single crystal diamond layer 5 was subjected to X-ray diffraction measurement (incident X-ray wavelength 1.54 Å), the half-value width of the diffraction intensity peak at 2θ = 119.5 ° attributable to diamond (004) was found. It was 530 arcsec (about 0.147 °). When SBD was prepared in the same manner as in Example 1 and the IV characteristics were measured, it was possible to show the same characteristics as HPHT diamond.

(Example 3)
In Example 1, the single crystal MgO layer is epitaxially grown on the surface side of the single crystal diamond layer 5 on the silicon substrate 2 by the molecular beam epitaxy (MBE) method until the thickness becomes 50 nm. Then, a single crystal diamond layer 5 having a thickness of 50 μm was formed in the same manner except that the Ir layer (underlayer 4) was heteroepitaxially grown. The single crystal diamond layer 5 was measured by X-ray diffraction (incident X). When the line wavelength was 1.54 Å), the half-value width of the diffraction intensity peak at 2θ = 119.5 ° attributable to diamond (004) was 560 arcsec (about 0.156 °). When SBD was prepared in the same manner as in Example 1 and the IV characteristics were measured, it was possible to show the same characteristics as HPHT diamond.

(Example 4)
In Example 1, a single crystal MgO layer is formed on the surface side of the single crystal diamond layer 5 on the silicon substrate 2 by a pulsed laser deposition (PLD) method until the thickness becomes 10 μm. A single crystal diamond layer 5 having a thickness of 50 μm was formed in the same manner except that the Ir layer (underlayer 4) was heteroepitaxially grown after the epitaxial growth. The single crystal diamond layer 5 was measured by X-ray diffraction (incident). When the X-ray wavelength was 1.54 Å), the half-value width of the diffraction intensity peak at 2θ = 119.5 ° attributable to diamond (004) was 610 arcsec (about 0.169 °). When SBD was prepared in the same manner as in Example 1 and the IV characteristics were measured, it was possible to show the same characteristics as HPHT diamond.

(Example 5)
After forming the single crystal diamond layer 5 of 50 μm by DC plasma CVD in the same manner as in Example 1, the single crystal diamond layer 5 was additionally grown for 35 hours by microwave CVD, and the total thickness of the single crystal diamond layer 5 was 298 μm. did. Then, in the same manner as in Example 1, a high-concentration boron-doped single crystal diamond layer 5a was formed to a thickness of 1 μm, and a low-concentration boron-doped single crystal diamond layer 5b was formed to a thickness of 1 μm (see FIG. 3). That is, the total thickness of the single crystal diamond layers 5, 5a, and 5b in Example 5 was set to 300 μm. After that, an SBD was prepared in the same manner as in Example 1, and its IV characteristics were measured. As a result, it was possible to show the same characteristics as HPHT diamond.

(Example 6)
After forming the single crystal diamond layer 5 of 10 μm by DC plasma CVD in the same manner as in Example 1, the single crystal diamond layer 5 is additionally grown for 13 hours by microwave CVD, and the total thickness of the single crystal diamond layer 5 is 101 μm. did. Then, in the same manner as in Example 1, a high-concentration boron-doped single crystal diamond layer 5a was formed to a thickness of 1 μm, and a low-concentration boron-doped single crystal diamond layer 5b was formed to a thickness of 1 μm (see FIG. 3). That is, the total thickness of the single crystal diamond layers 5, 5a, and 5b in Example 6 was 103 μm. After that, an SBD was prepared in the same manner as in Example 1, and its IV characteristics were measured. As a result, it was possible to show the same characteristics as HPHT diamond.

(Example 7)
After forming the single crystal diamond layer 5 of 10 μm by DC plasma CVD in the same manner as in Example 1, the single crystal diamond layer 5 was additionally grown for 27 hours by microwave CVD to make the total thickness of the single crystal diamond layer 5 199 μm. did. Then, in the same manner as in Example 1, a high-concentration boron-doped single crystal diamond layer 5a was formed to a thickness of 1 μm, and a low-concentration boron-doped single crystal diamond layer 5b was formed to a thickness of 1 μm (see FIG. 3). That is, the total thickness of the single crystal diamond layers 5, 5a, and 5b in Example 7 was set to 201 μm. After that, an SBD was prepared in the same manner as in Example 1, and its IV characteristics were measured. As a result, it was possible to show the same characteristics as HPHT diamond.

As described above, in Examples 1 to 7, it was possible to produce a diamond electronic element having a large area and a low cost with the same quality as the HPHT diamond.

(Comparative Example 1)
Instead of using the silicon base material used in Example 1, a single crystal MgO having a diameter of 10.0 mm and a thickness of 1.0 mm and polished on both sides in an orientation (100) was used as a base material, and Examples thereof were used. The Ir layer was formed, biased, and DC plasma CVD in the same manner as in No. 1 to grow a single crystal diamond layer having a thickness of 50 μm. After the CVD was completed, the temperature was returned to room temperature and the mixture was taken out of the chamber. As a result, the single crystal diamond layer / Ir layer was peeled off from the surface of the single crystal MgO layer and scattered. It is considered that this was peeled off due to the large stress.

(Comparative Example 2)
After forming a 50 μm single crystal diamond layer by DC plasma CVD in the same manner as in Example 1, the single crystal diamond layer was additionally grown for 43 hours by microwave CVD to bring the total thickness of the single crystal diamond layer to 350 μm. After that, when the temperature was returned to room temperature and taken out of the chamber, many cracks were found on the entire surface of the single crystal diamond layer.

The present invention is not limited to the above embodiment. The above-described embodiment is an example, and the present invention can be anything that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits the same function and effect. Is included in the technical scope of.

1 ... diamond electronic element, 2 ... silicon substrate, 3 ... intermediate layer, 4 ... base layer,
5, 5a, 5b ... Single crystal diamond layer, 6 ... Thin film, 7 ... Ohmic electrode,
8 ... Schottky electrode.

Claims (4)

It is a diamond electronic element,
A silicon substrate, an intermediate layer formed on the silicon substrate and composed of either an α -Al ₂ O ₃ layer or a YSZ (yttria-stabilized zirconia) layer, and an iridium layer formed on the intermediate layer. It has a base layer composed of either a rhodium layer or a platinum layer, and a single crystal diamond layer formed on the base layer.
One or more thin films made of gold, platinum, titanium, chromium, iridium, rhodium, or silicon are formed between the silicon base material and the intermediate layer.
The thickness of the single crystal diamond layer is 300 μm or less.
The single crystal diamond layer is a single crystal diamond layer selected from one of a p-type single crystal diamond having a boron impurity introduced, an n-type single crystal diamond having a phosphorus impurity introduced, and a high resistance single crystal diamond having no impurity introduced. A diamond electronic element characterized by having two or more layers laminated. The rocking curve half-value width (FWHM) of the diffraction intensity peak at 2θ = 119.5 ° attributable to diamond (004) analyzed by the X-ray diffraction method with a wavelength of λ = 1.54 Å is 3 for the crystallinity of the single crystal diamond layer. The diamond electronic element according to claim 1, wherein the temperature is not more than or equal to. It is a manufacturing method of diamond electronic elements.
A preparatory step for preparing a silicon base material, an intermediate layer step for forming an intermediate layer composed of either an α _- Al ₂ O3 layer or a YSZ (yttria-stabilized zirconia) layer on the silicon base material, and the above-mentioned It includes a base layer step of forming a base layer composed of any of an yttria layer, a rhodium layer, and a platinum layer on an intermediate layer, and a single crystal diamond layer step of forming a single crystal diamond layer on the base layer.
Between the preparation step and the intermediate layer step, there is a step of forming one or more thin films made of gold, platinum, titanium, chromium, iridium, rhodium, or silicon on the silicon substrate.
The thickness of the single crystal diamond layer formed in the single crystal diamond layer step is set to 300 μm or less.
In the single crystal diamond layer step, as the single crystal diamond layer formed on the base layer, a p-type single crystal diamond introduced with a boron impurity, an n-type single crystal diamond introduced with a phosphorus impurity, and a high resistance single without introducing an impurity. A method for manufacturing a diamond electronic element, which comprises laminating two or more single crystal diamond layers selected from any of crystalline diamonds. In the single crystal diamond layer step, the crystallinity of the single crystal diamond layer formed on the base layer was analyzed by an X-ray diffraction method having a wavelength of λ = 1.54 Å. The method for manufacturing a diamond electronic element according to claim 3, wherein the locking curve half-value width (FWHM) of the diffraction intensity peak in the above method is 3 ° or less.

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