JP7010428B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device including an integrated electronic circuit.

Currently, various semiconductor devices including integrated electronic circuits are used to process signals.

Processing of certain signals (eg, encryption and decryption thereof) may require the confidentiality and / or authenticity of the signal being processed. In this case, it is required that the signal containing the confidential information is not transmitted to the signal line that can be directly accessed from the outside. Further, it is required that the circuit for processing the signal containing confidential information does not leak the contents of the signal in the form of unnecessary radio waves or power supply noise.

For example, Patent Document 1 discloses that a semiconductor device such as an electronic device provided on a printed circuit board is surrounded by a shield.

Japanese Unexamined Patent Publication No. 2016-522471

When a shield as in Patent Document 1 is used, when the shield is removed by an attacker, the signal line that transmits a signal containing confidential information can be directly accessed from the outside, or the content of the signal is unnecessary. It leaks in the form of noise. This may impair the confidentiality and / or authenticity of the signal being processed. Further, even in the case of a single semiconductor device, the confidentiality and / or authenticity of the signal processed internally may be impaired by cutting the package or the like.

An object of the present invention is to solve the above problems and to provide a novel semiconductor device in which the confidentiality and / or authenticity of a signal processed internally is less likely to be impaired as compared with the prior art.

According to the semiconductor device according to the first aspect of the present invention.
A semiconductor device including a first and second circuit boards and comprising a plurality of circuit boards stacked on each other.
Each of the circuit boards has first and second surfaces parallel to each other.
The first circuit board comprises a first shield conductor formed parallel to the first and second surfaces of the first circuit board.
The second circuit board comprises a second shield conductor formed parallel to the first and second surfaces of the second circuit board.
At least one of the plurality of circuit boards comprises at least one electronic circuit formed so as to be located between the first and second shield conductors.
The semiconductor device is formed on the plurality of circuit boards so as to electrically connect the first and second shield conductors to each other and to surround the electronic circuit with a predetermined distance from each other. Equipped with multiple via conductors
The first shield conductor includes third and fourth shield conductors that are not electrically connected to each other.
The second shield conductor includes fifth and sixth shield conductors that are not electrically connected to each other.
The third and fifth shield conductors and the plurality of via conductors that electrically connect the third and fifth shield conductors to each other are electrically connected to a first power supply terminal to which a first potential is applied. Connected to
A second potential different from the first potential is applied to the fourth and sixth shield conductors and the plurality of via conductors that electrically connect the fourth and sixth shield conductors to each other. It is electrically connected to the second power supply terminal .

According to the semiconductor device according to the second aspect of the present invention, in the semiconductor device according to the first aspect,
The first and second shield conductors are formed in a solid, mesh-like, or striped shape.

According to the semiconductor device according to the third aspect of the present invention, in the semiconductor device according to the first or second aspect,
The first and second shield conductors and the plurality of via conductors are electrically connected to a ground terminal or a power supply terminal.

According to the semiconductor device according to the fourth aspect of the present invention, in the semiconductor device according to one of the first to third aspects.
The electronic circuit is
A first circuit portion formed on one of a pair of circuit boards adjacent to each other,
Including a second circuit portion formed on the other side of the pair of circuit boards adjacent to each other.
The first and second circuit portions are electrically connected to each other.

According to the semiconductor device according to the fifth aspect of the present invention, in the semiconductor device according to the fourth aspect,
The first circuit portion includes an active element.
The second circuit portion includes a passive element.

According to the semiconductor device according to the sixth aspect of the present invention, in the semiconductor device according to one of the first to fifth aspects.
The semiconductor device comprises at least one third circuit board provided between the first and second circuit boards.
The first to third circuit boards include a plurality of electronic circuits formed so as to be located between the first and second shield conductors.

According to the semiconductor device according to the seventh aspect of the present invention, in the semiconductor device according to one of the first to sixth aspects.
The semiconductor device is
At least three circuit boards and
It comprises a plurality of shield conductor pairs including first and second shield conductors respectively formed on a pair of different circuit boards.
The at least two circuit boards are formed on at least two of the at least three circuit boards so that the at least three circuit boards are located between the first and second shield conductors of each shield conductor pair. Equipped with an electronic circuit
The first shield conductor of one of the pair of electronic circuits adjacent to each other is integrated with the second shield conductor of the other of the pair of electronic circuits adjacent to each other.

According to the semiconductor device according to one aspect of the present invention, the confidentiality and / or the authenticity of the signal processed internally can be less likely to be impaired as compared with the prior art.

It is a perspective view which shows the structure of the semiconductor device which concerns on 1st Embodiment. FIG. 3 is a cross-sectional view taken along the line AA of FIG. It is sectional drawing in BB line of FIG. It is a figure which shows the upper surface of the circuit board 1 of FIG. It is a figure which shows the lower surface of the circuit board 1 of FIG. It is a figure which shows the lower surface of the circuit board 1A which concerns on 1st modification of 1st Embodiment. It is a figure which shows the upper surface of the circuit board 2 of FIG. It is a figure which shows the lower surface of the circuit board 2 of FIG. It is a figure which shows the lower surface of the circuit board 2A which concerns on the 2nd modification of 1st Embodiment. It is sectional drawing which shows the structure of the semiconductor device which concerns on 2nd Embodiment. It is sectional drawing which shows the structure of the semiconductor device which concerns on 3rd Embodiment. It is a figure which shows the passive circuit 13Cb and the electronic circuit 25C of the semiconductor device of FIG. 11 by the equivalent circuit. It is a figure which shows the upper surface of the circuit board 1C of FIG. It is a figure which shows the 1st Embodiment of the lower surface of the circuit board 1C of FIG. It is a figure which shows the 2nd Embodiment of the lower surface of the circuit board 1C of FIG. It is a figure which shows the 3rd Embodiment of the lower surface of the circuit board 1C of FIG. It is sectional drawing which shows the structure of the semiconductor device which concerns on 4th Embodiment. It is sectional drawing which shows the structure of the semiconductor device which concerns on 5th Embodiment. It is a figure which shows the passive circuit 13Cb, the electronic circuit 25C, the passive circuit 23Cb, and the electronic circuit 35C of the semiconductor device of FIG. 18 by an equivalent circuit. It is sectional drawing which shows the structure of the semiconductor device which concerns on the modification of 5th Embodiment. It is a figure which shows the passive circuit 23Cb and the electronic circuit 35C of the semiconductor device of FIG. 20 by the equivalent circuit.

Hereinafter, the semiconductor device according to each embodiment of the present invention will be described with reference to the drawings. In each figure, the same reference numerals indicate similar components.

First embodiment.
FIG. 1 is a perspective view showing a configuration of a semiconductor device according to the first embodiment. The semiconductor device of FIG. 1 includes a circuit board 1, a circuit board 2, a package board 5, a plurality of pad conductors 6, and a plurality of bonding wires 7.

Circuit boards 1 and 2 are parallel to each other along the XY plane of FIG. 1 + Z side surface (also referred to as “top surface” or “first surface”) and −Z side surface (“bottom surface” or “second surface”). Also called "face"). The circuit boards 1 and 2 include a semiconductor substrate and at least one wiring layer formed parallel to the XY plane in the semiconductor substrate, respectively. For example, the semiconductor substrate is made of silicon and the wiring layer is made of copper. An electronic circuit is formed on at least one of the circuit boards 1 and 2. On the upper surface of the circuit board 1, a plurality of pad conductors 12a for supplying electric power to an internal electronic circuit and inputting / outputting signals are formed.

The circuit boards 1 and 2 are stacked so that the lower surface of the circuit board 1 and the upper surface of the circuit board 2 face each other, and are electrically and mechanically connected to each other. The circuit boards 1 and 2 are fixed to the package substrate 5 on the lower surface of the circuit board 2 by, for example, bonding.

The package substrate 5 is a part of a package such as a resin or ceramic that encloses a semiconductor device.

Each pad conductor 12a is electrically connected to the pad conductor 6 formed on the package substrate 5 by the bonding wire 7. Each pad conductor 6 receives power from the outside of the package after sealing the entire semiconductor device, and is electrically connected to a lead conductor for inputting / outputting signals. Alternatively, each pad conductor 12a may be directly connected to the lead conductor formed on the package substrate 5 by the bonding wire 7. As a further alternative, each pad conductor 12a may be electrically connected to each pad conductor 6 using flip-chip mounting instead of the bonding wire 7. In this case, the surface of the circuit board 1 on which each pad conductor 12a is formed faces the package substrate 5, and each pad conductor 6 is formed at a position facing each pad conductor 12a. Each pad conductor 12a is electrically connected to each pad conductor 6 via a bump.

FIG. 2 is a cross-sectional view taken along the line AA of FIG. FIG. 3 is a cross-sectional view taken along the line BB of FIG.

As shown in FIGS. 2 and 3, the circuit board 1 includes a semiconductor substrate 11, a plurality of pad conductors 12a, a shield conductor 13, a plurality of via conductors 14a, and a plurality of via conductors 14b. Each pad conductor 12a is formed on the upper surface of the semiconductor substrate 11 as one wiring layer of the circuit board 1. The shield conductor 13 is formed on the lower surface of the semiconductor substrate 11 as another wiring layer of the circuit board 1. Each via conductor 14a is formed so as to penetrate the semiconductor substrate 11 in the Z direction (thickness direction) so as to be electrically connected to the pad conductor 12a and electrically connected to the shield conductor 13. Will be done. Each via conductor 14b is formed so as to penetrate the semiconductor substrate 11 in the Z direction so as to be electrically connected to the pad conductor 12a and not to be electrically connected to the shield conductor 13.

As shown in FIGS. 2 and 3, the circuit board 2 includes a semiconductor substrate 21, a multilayer wiring 22, a shield conductor 23, a plurality of via conductors 24, and an electronic circuit 25. The semiconductor substrate 21 has a multilayer wiring 22 including a plurality of wiring layers 22a and a plurality of dielectric layers 22b on the upper surface thereof, and has a shield conductor 23 on the lower surface thereof. In the examples of FIGS. 2 and 3, the multilayer wiring 22 includes six wiring layers 22a. Each wiring layer 22a includes a wiring conductor 22aa and an insulating dielectric 22ab patterned by any semiconductor process technique. As a result, the electronic circuit 25 is formed in the multilayer wiring 22. The electronic circuit 25 includes a plurality of circuit elements 25a such as transistors, diodes, capacitors, resistors, and inductors. The electronic circuit 25 may be formed by CMOS process technology or other process technology. The shield conductor 23 is formed on the lower surface of the semiconductor substrate 21 as another wiring layer of the circuit board 2. Each via conductor 24 is formed so as to penetrate the semiconductor substrate 21 in the Z direction (thickness direction) so as to be electrically connected to the multilayer wiring 22 and electrically connected to the shield conductor 23. Will be done.

As shown in FIGS. 2 and 3, the circuit boards 1 and 2 are stacked so that the lower surface of the circuit board 1 and the upper surface of the circuit board 2 face each other via the plurality of bumps 4. The shield conductor 13 is electrically connected to the via conductor 24 via the bump 4. As a result, the shield conductor 13, the bump 4, the via conductor 24, and the shield conductor 23 are electrically connected to each other. The shield conductor 13 is electrically connected to a voltage source (for example, a ground terminal or a power supply terminal) having a predetermined potential outside the semiconductor device via the via conductor 14a, the pad conductor 12a, and the bonding wire 7. Therefore, the shield conductor 13, the bump 4, the via conductor 24, and the shield conductor 23 have the same predetermined potential (for example, ground potential or power supply potential). Further, as shown in FIG. 3, the electronic circuit 25 is electrically connected to a circuit outside the semiconductor device via the bump 4, the via conductor 14b, the pad conductor 12a, and the bonding wire 7.

Between the circuit boards 1 and 2, the portion other than the bump 4 is filled with an adhesive or other sealing material (underfill). As a result, the circuit boards 1 and 2 are mechanically connected to each other. However, in each figure, the illustration of the adhesive or other sealing material is omitted.

By stacking the circuit boards 1 and 2, the electronic circuit 25 is located between the shield conductors 13 and 23. Further, the plurality of via conductors 14a and 24 and the plurality of bumps 4 are formed so as to electrically connect the shield conductors 13 and 23 to each other and to surround the electronic circuit 25 with a predetermined distance from each other. Ru. Therefore, the electronic circuit 25 is surrounded by a shield structure including shield conductors 13 and 23, bumps 4, and via conductor 24. The spacing d1 (see FIG. 3) forming the via conductors 14a and 24 follows the design criteria for pad placement in the semiconductor process technology forming the electronic circuit 25. The interval d1 may be set shorter than the minimum value of the wavelength of the signal processed by the electronic circuit 25, for example.

In order to form the plurality of via conductors 24 included in the shield structure at the interval d1, for example, as shown in FIG. 3, the via conductors 14a and 14b may be alternately arranged on the circuit board 1.

The package substrate 5 may further include a wiring layer at a position facing the circuit board 2. The wiring layer of the package substrate 5 may be electrically connected to the shield conductor 23 of the circuit board 2 or another portion (for example, a part of the electronic circuit 25).

FIG. 4 is a diagram showing the upper surface of the circuit board 1 of FIG. As described above, a plurality of pad conductors 12a are formed on the upper surface of the semiconductor substrate 11.

FIG. 5 is a diagram showing the lower surface of the circuit board 1 of FIG. As described above, the shield conductor 13 is formed on the lower surface of the semiconductor substrate 11. The shield conductor 13 may be formed, for example, as a solid region. A part of the region of the lower surface of the semiconductor substrate 11 facing each pad conductor 12a on the upper surface of the semiconductor substrate 11 (shown by a broken line in FIG. 5) is formed as a part of the shield conductor 13, and a part of the other. In this region, the conductor of the shield conductor 13 is removed and the semiconductor substrate 11 is exposed. As described with reference to FIG. 3, a via conductor 14a is formed in a region formed as a part of the shield conductor 13 in the region of the lower surface of the semiconductor substrate 11, and the conductor is removed to form the semiconductor substrate 11. A via conductor 14b is formed in the exposed region. Thereby, the electronic circuit 25 and the shield structure can be electrically connected to the circuit outside the semiconductor device via the bonding wire 7 or the like without being electrically connected to each other.

FIG. 6 is a diagram showing the lower surface of the circuit board 1A according to the first modification of the first embodiment. In the example of FIG. 6, the shield conductor 13A is formed on the lower surface of the semiconductor substrate 11. The shield conductor 13A may be formed, for example, as a mesh-like region including a plurality of strip conductors arranged with a distance d2 from each other. The interval d2 follows the design criteria of the wiring layer in the semiconductor process technology forming the electronic circuit 25. The interval d2 may be set shorter than the minimum value of the wavelength of the signal processed by the electronic circuit 25, for example.

FIG. 7 is a diagram showing the upper surface of the circuit board 2 of FIG. A plurality of pad conductors 22c are formed on a part of the wiring layer 22a on the uppermost surface of the semiconductor substrate 21. The pad conductor 22c is electrically connected to the via conductor 24 or the electronic circuit 25 of the circuit board 2. The pad conductor 22c is further electrically connected to the shield conductor 13 or the via conductor 14a of the circuit board 1 via the bump 4.

FIG. 8 is a diagram showing the lower surface of the circuit board 2 of FIG. As described above, the shield conductor 23 is formed on the lower surface of the semiconductor substrate 21. The shield conductor 23 may be formed, for example, as a solid region.

FIG. 9 is a diagram showing the lower surface of the circuit board 2A according to the second modification of the first embodiment. In the example of FIG. 9, the shield conductor 23A is formed on the lower surface of the semiconductor substrate 21. The shield conductor 23A may be formed, for example, as a striped region including a plurality of strip conductors arranged with a distance d3 from each other. The interval d3 follows the design criteria of the wiring layer in the semiconductor process technology forming the electronic circuit 25. The interval d3 may be set shorter than the minimum value of the wavelength of the signal processed by the electronic circuit 25, for example.

The shield conductor of the circuit board 1 may be formed as a striped or other shaped region. Further, the shield conductor of the circuit board 2 may be formed as a mesh-like or other-shaped region.

The semiconductor device of FIG. 1 surrounds an electronic circuit 25 with a shield structure including shield conductors 13 and 23, bumps 4, and via conductors 24. As a result, when the electronic circuit 25 processes a signal containing confidential information, it is possible to prevent the content of the signal from leaking in the form of unnecessary radio waves or power supply noise. Further, even when processing a signal including non-confidential information, it becomes difficult to radiate unnecessary radio waves or power supply noise, so that unnecessary influence on an external circuit can be reduced.

Further, in the semiconductor device of FIG. 1, since the shield structure is integrated in the circuit boards 1 and 2 instead of the package of the semiconductor device, a signal including confidential information is transmitted even if the package is attacked by cutting or the like. It is difficult for the line to be directly accessible from the outside. The shield conductors 13 and 23 may be formed to have a thickness sufficient, for example, 10 to 100 μm, so that they are not easily scraped off when attacked by cutting or the like.

Further, in the semiconductor device of FIG. 1, a shield structure can be added to the circuit board by using ordinary semiconductor process technology.

Therefore, the semiconductor device of FIG. 1 can make it difficult to impair the confidentiality and / or authenticity of the signal processed inside the semiconductor device as compared with the prior art.

Second embodiment.
In the first embodiment, the case where the semiconductor device includes one shield structure electrically connected to a voltage source having a predetermined potential has been described. On the other hand, in the second embodiment, a case where the semiconductor device includes a plurality of shield structures electrically connected to voltage sources having different potentials will be described.

FIG. 10 is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment. The semiconductor device of FIG. 10 includes circuit boards 1B and 2B in place of the circuit boards 1 and 2 of the semiconductor device of FIG. The circuit board 1B includes shield conductors 13Ba and 13Bb that are not electrically connected to each other in place of the shield conductor 13 of the circuit board 1 of FIG. The circuit board 2B includes shield conductors 23Ba and 23Bb that are not electrically connected to each other in place of the shield conductor 23 of the circuit board 2 of FIG.

The shield conductor 13Ba is electrically connected to the shield conductor 23Ba via the bump 4 and the via conductor 24. Therefore, the electronic circuit 25 is surrounded by a shield structure including shield conductors 13Ba and 23Ba, and bumps 4 and via conductors 24 that electrically connect them to each other. The shield conductor 13Ba is electrically connected to a voltage source having a first potential V1 outside the semiconductor device via a via conductor 14a, a pad conductor 12a, and a bonding wire 7. Therefore, the shield conductors 13Ba and 23Ba, and the bump 4 and the via conductor 24 that electrically and electrically connect them to each other have the same potential V1.

The shield conductor 13Bb is also electrically connected to the shield conductor 23Bb via the bump 4 and the via conductor 24. Therefore, the electronic circuit 25 is surrounded by a shield structure including shield conductors 13Bb and 23Bb, and bumps 4 and via conductors 24 that electrically connect them to each other. This shield structure is not electrically connected to the shield structure including the shield conductors 13Ba, 23Ba and the like described above. The shield conductor 13Bb is connected to a voltage source having a second potential V2 outside the semiconductor device via the via conductor 14a, the pad conductor 12a, and the bonding wire 7. Therefore, the shield conductors 13Bb and 23Bb, and the bump 4 and the via conductor 24 that electrically connect them to each other have the same potential V2.

The semiconductor device of FIG. 10 has a degree of freedom in supplying power to the electronic circuit 25 by electrically connecting two shield structures that are not electrically connected to each other to voltage sources having different potentials V1 and V2, respectively. Can be improved. As a result, when the electronic circuit 25 includes a plurality of circuit portions operating at different voltages, a power conversion circuit such as a step-up circuit and a step-down circuit becomes unnecessary inside the electronic circuit 25.

According to the semiconductor device of FIG. 10, when it is desired to reduce the mutual influence of a plurality of circuit parts (for example, an analog circuit part and a digital circuit part) included in the electronic circuit 25, these circuit parts are separately separated. It can supply power.

According to the second embodiment, the semiconductor device may include three or more shielded structures each electrically connected to voltage sources having three or more potentials different from each other.

Third embodiment.
In the first and second embodiments, the case where the electronic circuit 25 is formed on one circuit board 2 or 2B has been described. When the circuit board 1 or 1B is removed from the semiconductor device, the electronic circuit 25 becomes accessible from the outside, and the confidentiality and / or authenticity of the signal processed by the electronic circuit 25 may be impaired. Therefore, even in such a case, it is required that the confidentiality and / or authenticity of the processed signal is not easily impaired. In the third embodiment, the case where the electronic circuit is formed over two circuit boards adjacent to each other will be described.

FIG. 11 is a cross-sectional view showing the configuration of the semiconductor device according to the third embodiment. The semiconductor device of FIG. 11 includes circuit boards 1C and 2C in place of the circuit boards 1 and 2 of the semiconductor device of FIG.

The circuit board 1C includes a semiconductor substrate 11, a shield conductor 12C, a plurality of pad conductors 13Ca, a passive circuit 13Cb, and a plurality of via conductors 14c. The shield conductor 12C is formed on the upper surface of the semiconductor substrate 11 as one wiring layer of the circuit board 1C. Each pad conductor 13Ca and passive circuit 13Cb are formed on the lower surface of the semiconductor substrate 11 as another wiring layer of the circuit board 1C. The passive circuit 13Cb includes one or more passive elements such as capacitors, resistors and / or inductors. Each via conductor 14c penetrates the semiconductor substrate 11 in the Z direction (thickness direction) so as to be electrically connected to the shield conductor 12C and electrically connected to each pad conductor 13Ca. It is formed.

The circuit board 2C includes an electronic circuit 25C instead of the electronic circuit 25 of the circuit board 2 of FIG.

FIG. 12 is a diagram showing the passive circuit 13Cb and the electronic circuit 25C of the semiconductor device of FIG. 11 by an equivalent circuit. The example of FIG. 12 shows a case where the passive circuit 13Cb includes a passive element (for example, a capacitor) and the electronic circuit 25C includes an active element (for example, an operational amplifier and a switching element). The passive circuit 13Cb and the electronic circuit 25C are electrically connected to each other over the circuit boards 1C and 2C via the bump 4. As a result, the passive circuit 13Cb and the electronic circuit 25C operate as an integrated electronic circuit. In other words, the electronic circuit 25C functions as the first circuit portion of the integrated electronic circuit, and the passive circuit 13Cb functions as the second circuit portion of the integrated electronic circuit.

FIG. 13 is a diagram showing the upper surface of the circuit board 1C of FIG. As described above, the shield conductor 12C is formed on the upper surface of the semiconductor substrate 11. The shield conductor 12C may be formed, for example, as a solid region, or as a mesh, striped, or other shaped region. Further, a plurality of pad conductors 12a are formed on the upper surface of the semiconductor substrate 11 as in FIG. 4. Each pad conductor 12a is electrically connected to the pad conductor 13Ca on the lower surface via the via conductor 14c. However, a part of the plurality of pad conductors 12a is formed so as to be connected or integrated with the shield conductor 12C. Therefore, as described above, the shield conductor 12C is electrically connected to the pad conductor 13Ca on the lower surface via the via conductor 14c.

FIG. 14 is a diagram showing a first embodiment of the lower surface of the circuit board 1C of FIG. As described above, a plurality of pad conductors 13Ca and passive circuits 13Cb are formed on the lower surface of the semiconductor substrate 11. In the example of FIG. 14, the passive circuit 13Cb is a capacitor containing a pair of comb-shaped electrodes that fit together. A pad conductor 13Cc is formed at one end of each electrode, and each pad conductor 13Cc is electrically connected to the electronic circuit 25C via the bump 4.

FIG. 15 is a diagram showing a second embodiment of the lower surface of the circuit board 1C of FIG. In the example of FIG. 15, the passive circuit 13Cb is a resistor including a meander-like electrode. Pad conductors 13Cc are formed at both ends of the electrodes, and each pad conductor 13Cc is electrically connected to the electronic circuit 25C via the bump 4.

FIG. 16 is a diagram showing a third embodiment of the lower surface of the circuit board 1C of FIG. In the example of FIG. 16, the passive circuit 13Cb is an inductor including spiral electrodes. Pad conductors 13Cc are formed at both ends of the electrodes, and each pad conductor 13Cc is electrically connected to the electronic circuit 25C via the bump 4.

As described above, in the semiconductor device of FIG. 11, the passive circuit 13Cb and the electronic circuit 25C operate as an integrated electronic circuit. Therefore, when the circuit board 1C is separated from the circuit board 2C, at the same time, the electrical connection between the passive circuit 13Cb and the electronic circuit 25C via the bump 4 is lost, and the passive circuit 13Cb and the electronic circuit 25C are integrated. It cannot operate as an electronic circuit. Therefore, when the circuit board 1C is separated from the circuit board 2C, it is possible to make it difficult to impair the confidentiality and / or the authenticity of the signal processed by the passive circuit 13Cb and the electronic circuit 25C. As described above, in the semiconductor device of FIG. 11, hardware security can be improved as compared with the prior art.

The semiconductor device of FIG. 11 surrounds the passive circuit 13Cb and the electronic circuit 25C by a shield structure including shield conductors 12C and 23, bumps 4, via conductors 14c and 24. As a result, when the passive circuit 13Cb and the electronic circuit 25C process a signal containing confidential information, it is possible to prevent the content of the signal from leaking in the form of unnecessary radio waves or power supply noise, as in the first embodiment. ..

In the semiconductor device of FIG. 11, by separating the passive element from the electronic circuit 25C and isolating it on the circuit board 1C, it is possible to suppress conduction noise wrapping around from the passive element to the electronic circuit 25C. Further, in the semiconductor device of FIG. 11, since the passive element is provided in a wiring layer different from the multilayer wiring 22 in which the electronic circuit 25 is provided, the thickness of the conductor of the passive element can be easily increased. Thereby, for example, the performance of the passive element can be improved so as to have a high capacity, a low resistance, and / or a high Q value. Further, in the semiconductor device of FIG. 11, the passive element is hidden inside the shield structure, so that electromagnetic noise radiated or received by the passive circuit 13Cb and the electronic circuit 25C can be suppressed. Further, in the semiconductor device of FIG. 11, the performance of the circuit can be improved by electrically connecting the passive element in the vicinity of the electronic circuit 25C instead of providing the passive element outside the semiconductor device.

According to the third embodiment, the passive circuit 13Cb is formed on the circuit board 1C, and the electronic circuit 25C is formed on the circuit board 2C. In the circuit board 1C, a circuit portion including an active element may be formed, or a circuit portion including a passive element and an active element may be formed. In the circuit board 2C, a circuit portion including a passive element may be formed, or a circuit portion including a passive element and an active element may be formed. These circuit portions are electrically connected to each other over the circuit boards 1C and 2C.

Fourth embodiment.
In the first embodiment, the case where the semiconductor device includes one electronic circuit and one shield structure has been described. In the fourth embodiment, a case where the semiconductor device includes a plurality of electronic circuits and a plurality of shield structures stacked on each other will be described.

FIG. 17 is a cross-sectional view showing the configuration of the semiconductor device according to the fourth embodiment. The semiconductor device of FIG. 17 includes a circuit board 3 in addition to the semiconductor device of FIG. The circuit boards 2 and 3 are stacked so that the lower surface of the circuit board 2 and the upper surface of the circuit board 3 face each other, and are electrically and mechanically connected to each other. The circuit boards 1 to 3 are fixed to the package substrate 5 on the lower surface of the circuit board 3 by, for example, bonding.

The circuit board 3 includes a semiconductor substrate 31, a multilayer wiring 32, a shield conductor 33, a plurality of via conductors 34, and an electronic circuit 35. These components of the circuit board 3 are configured in the same manner as the corresponding components of the circuit board 2.

The circuit boards 2 and 3 are stacked so that the lower surface of the circuit board 2 and the upper surface of the circuit board 3 face each other via the plurality of bumps 4. The shield conductor 23 is electrically connected to the via conductor 34 via the bump 4. As a result, the shield conductor 23, the bump 4, the via conductor 34, and the shield conductor 33 are electrically connected to each other. Therefore, the via conductor 24 and the shield conductor 13 of the circuit board 3 have the same potential as the shield conductor 23 and the like.

Between the circuit boards 2 and 3, the portion other than the bump 4 is filled with an adhesive or other sealing material (underfill). As a result, the circuit boards 2 and 3 are mechanically connected to each other.

By stacking the circuit boards 2 and 3, the electronic circuit 35 is located between the shield conductors 23 and 33. Further, the plurality of via conductors 34 and the plurality of bumps 4 are formed so as to electrically connect the shield conductors 23 and 33 to each other and to surround the electronic circuit 35 with a predetermined distance from each other. Therefore, the electronic circuit 35 is surrounded by a shield structure including shield conductors 23 and 33, bumps 4, and via conductors 34.

According to the semiconductor device of FIG. 17, the electronic circuit 25 is surrounded by a shield structure including shield conductors 13 and 23, bumps 4, and via conductors 24, and shield conductors 23 and 33, bumps 4, and via conductors 34 are further formed. The electronic circuit 35 is surrounded by a shield structure including the shield structure. By surrounding the electronic circuits 25 and 35 with a separate shield structure, it is possible to reduce the adverse effect of electromagnetic noise generated on one of the electronic circuits 25 and 35 on the other.

In a fourth embodiment, the semiconductor device may include a plurality of electronic circuits stacked on each other and three or more shield structures. The semiconductor device includes a first and a second circuit board, and includes at least three circuit boards stacked on each other. Each circuit board has first and second planes parallel to each other. The first circuit board comprises a first shield conductor formed parallel to the first and second surfaces of the first circuit board. The second circuit board comprises a second shield conductor formed parallel to the first and second surfaces of the second circuit board. The semiconductor device includes a plurality of shield conductor pairs including first and second shield conductors each formed on a pair of different circuit boards. At least two electronic circuits formed on at least two of the at least three circuit boards so that the at least three circuit boards are located between the first and second shield conductors of each shield conductor pair. To prepare for. The first shield conductor of one of a pair of adjacent electronic circuits is integrated with the second shield conductor of the other of a pair of adjacent electronic circuits. A semiconductor device has a plurality of vias formed on a plurality of circuit boards so as to electrically connect the first and second shield conductors to each other and to surround an electronic circuit at a predetermined distance from each other. Equipped with a conductor. This encloses the different electronics with a separate shield structure.

It is not necessary that the shield conductors having a plurality of shield structures stacked on each other are integrated with each other. In this case, the pair of shield conductors facing each other between the pair of shield structures adjacent to each other may be electrically connected to each other.

Fifth embodiment.
In the first embodiment, the case where the semiconductor device includes one electronic circuit and one shield structure has been described. In a fifth embodiment, a case where one shield structure surrounds a plurality of electronic circuits will be described.

FIG. 18 is a cross-sectional view showing the configuration of the semiconductor device according to the fifth embodiment. The semiconductor device of FIG. 18 includes a circuit board 2CA instead of the circuit board 2C of FIG. 11, and further includes a circuit board 3C. The circuit boards 2CA and 3C are stacked so that the lower surface of the circuit board 2CA and the upper surface of the circuit board 3C face each other, and are electrically and mechanically connected to each other. The circuit boards 1C, 2CA, and 3C are fixed to the package substrate 5 on the lower surface of the circuit board 3C, for example, by adhesion or the like.

The circuit board 2CA includes a plurality of pad conductors 23Ca and a passive circuit 23Cb in place of the shield conductor 23 of the circuit board 2C of FIG. Each pad conductor 23Ca and the passive circuit 23Cb are configured in the same manner as each pad conductor 13Ca and the passive circuit 13Cb of the circuit board 1C.

The circuit board 3C includes a semiconductor substrate 31, a multilayer wiring 32, a shield conductor 33, a plurality of via conductors 34, and an electronic circuit 35C. These components of the circuit board 3C are configured in the same manner as the corresponding components of the circuit board 2C of FIG.

FIG. 19 is a diagram showing a passive circuit 13Cb, an electronic circuit 25C, a passive circuit 23Cb, and an electronic circuit 35C of the semiconductor device of FIG. 18 by an equivalent circuit. The example of FIG. 19 shows a case where the passive circuits 13Cb and 23Cb include a passive element (for example, a capacitor) and the electronic circuits 25C and 35C include an active element (for example, an operational amplifier and a switching element). Similar to the semiconductor device of FIG. 11, the passive circuit 13Cb and the electronic circuit 25C operate as an integrated electronic circuit. Further, the passive circuit 23Cb and the electronic circuit 35C are electrically connected to each other over the circuit boards 2CA and 3C via the bump 4. As a result, the passive circuit 23Cb and the electronic circuit 35C operate as an integrated electronic circuit. In other words, the electronic circuit 35C functions as the first circuit part of the integrated electronic circuit, and the passive circuit 23Cb functions as the second circuit part of the integrated electronic circuit.

According to the semiconductor device of FIG. 18, the passive circuit 13Cb and the electronic circuit 25C are surrounded by the shield structure including the shield conductors 12C and 33, the bumps 4, and the via conductors 14c, 24, and 34, and further, the passive circuit 23Cb and the passive circuit 23Cb. It surrounds the electronic circuit 35C. As a result, the degree of freedom in layout can be improved by surrounding a plurality of electronic circuits with one shield structure.

Further, according to the semiconductor device of FIG. 18, the passive circuit 13Cb and the electronic circuit 25C are operated as an integrated electronic circuit, and the passive circuit 23Cb and the electronic circuit 35C are operated as an integrated electronic circuit. It can bring about the same effect as described in.

FIG. 20 is a cross-sectional view showing the configuration of the semiconductor device according to the modified example of the fifth embodiment. In the semiconductor device of FIG. 18, the case where all the electronic circuits are formed over two circuit boards adjacent to each other has been described, but the configuration of each electronic circuit is not limited to this. The semiconductor device of FIG. 20 includes circuit boards 1 and 2CB in place of the circuit boards 1C and 2CA of FIG. The circuit board 1 of FIG. 20 is configured in the same manner as the circuit board 1 of FIG. The circuit board 2CB includes a plurality of pad conductors 23Ca and a passive circuit 23Cb in place of the shield conductor 23 of the circuit board 2 of FIG. Each pad conductor 23Ca and passive circuit 23Cb of FIG. 20 are configured similarly to the corresponding components of FIG.

FIG. 21 is a diagram showing the passive circuit 23Cb and the electronic circuit 35C of the semiconductor device of FIG. 20 by an equivalent circuit. The electronic circuit 25 of FIG. 21 operates in the same manner as the electronic circuit 25 of FIG. On the other hand, the passive circuit 13Cb and the electronic circuit 25C operate as an integrated electronic circuit like the semiconductor device of FIG.

According to the semiconductor device of FIG. 20, one shield structure surrounds electronic circuits having various configurations, so that the degree of freedom in layout can be improved. A part of the plurality of electronic circuits surrounded by the shield structure may be formed on one circuit board, and the other part may be formed over two circuit boards adjacent to each other. All of the plurality of electronic circuits surrounded by the shield structure may be formed on one circuit board.

In a fifth embodiment, one shielded structure may surround three or more electronic circuits. The semiconductor device includes a first and a second circuit board, and includes at least three circuit boards stacked on each other. Each circuit board has first and second planes parallel to each other. The first circuit board comprises a first shield conductor formed parallel to the first and second surfaces of the first circuit board. The second circuit board includes a second shield conductor formed parallel to the first and second surfaces of the second circuit board. The semiconductor device comprises at least one third circuit board provided between the first and second circuit boards. The first to third circuit boards include a plurality of electronic circuits formed so as to be located between the first and second shield conductors. A semiconductor device has a plurality of vias formed on a plurality of circuit boards so as to electrically connect the first and second shield conductors to each other and to surround an electronic circuit at a predetermined distance from each other. Equipped with a conductor. Thereby, one shield structure can surround three or more electronic circuits.

The configuration according to the fourth embodiment and the configuration according to the fifth embodiment may be combined. That is, a plurality of shield structures stacked on each other may be provided, and each shield structure may surround a plurality of electronic circuits.

The semiconductor device according to each aspect of the present invention is effective for processing signals including confidential information, and is also effective for noise countermeasures for satisfying electromagnetic compatibility.

1,1A to 1C, 2,2A to 2C, 2CA, 2CB, 3,3C ... Circuit board,
4 ... bump,
5 ... Package board,
6 ... Pad conductor,
7 ... Bonding wire,
11 ... Semiconductor substrate,
12a ... Pad conductor,
12C ... Shield conductor,
13, 13A, 13Ba, 13Bb ... Shield conductor,
13Ca ... Pad conductor,
13Cb ... Passive circuit,
13Cc ... Pad conductor,
14a-14c ... Via conductor,
21 ... Semiconductor substrate,
22 ... Multi-layer wiring,
22a ... Wiring layer,
22aa ... Wiring conductor,
22ab ... Insulating dielectric,
22b ... Dielectric layer,
22c ... Pad conductor,
23, 23A, 23Ba, 23Bb ... Shield conductor,
23Ca ... Pad conductor,
23Cb ... Passive circuit,
24 ... Via conductor,
25, 25C ... Electronic circuit,
25a ... Circuit element,
31 ... Semiconductor substrate,
32 ... Multi-layer wiring,
33 ... Shield conductor,
34 ... Via conductor,
35, 35C ... Electronic circuit.

Claims (7)

A semiconductor device including a first and second circuit boards and comprising a plurality of circuit boards stacked on each other.
Each of the circuit boards has first and second surfaces parallel to each other.
The first circuit board comprises a first shield conductor formed parallel to the first and second surfaces of the first circuit board.
The second circuit board comprises a second shield conductor formed parallel to the first and second surfaces of the second circuit board.
At least one of the plurality of circuit boards comprises at least one electronic circuit formed so as to be located between the first and second shield conductors.
The semiconductor device is formed on the plurality of circuit boards so as to electrically connect the first and second shield conductors to each other and to surround the electronic circuit with a predetermined distance from each other. Equipped with multiple via conductors
The first shield conductor includes third and fourth shield conductors that are not electrically connected to each other.
The second shield conductor includes fifth and sixth shield conductors that are not electrically connected to each other.
The third and fifth shield conductors and the plurality of via conductors that electrically connect the third and fifth shield conductors to each other are electrically connected to a first power supply terminal to which a first potential is applied. Connected to
A second potential different from the first potential is applied to the fourth and sixth shield conductors and the plurality of via conductors that electrically connect the fourth and sixth shield conductors to each other. Electrically connected to the second power terminal,
Semiconductor device. The first and second shield conductors were formed in a solid, mesh-like, or striped shape.
The semiconductor device according to claim 1. The first and second shield conductors and the plurality of via conductors are electrically connected to a ground terminal or a power supply terminal.
The semiconductor device according to claim 1 or 2. The electronic circuit is
A first circuit portion formed on one of a pair of circuit boards adjacent to each other,
Including a second circuit portion formed on the other side of the pair of circuit boards adjacent to each other.
The first and second circuit portions are electrically connected to each other.
The semiconductor device according to any one of claims 1 to 3 . The first circuit portion includes an active element.
The second circuit portion comprises a passive element.
The semiconductor device according to claim 4 . The semiconductor device comprises at least one third circuit board provided between the first and second circuit boards.
The first to third circuit boards include a plurality of electronic circuits formed so as to be located between the first and second shield conductors .
The semiconductor device according to any one of claims 1 to 5 . The semiconductor device is
At least three circuit boards and
It comprises a plurality of shield conductor pairs including first and second shield conductors respectively formed on a pair of different circuit boards.
The at least two circuit boards are formed on at least two of the at least three circuit boards so that the at least three circuit boards are located between the first and second shield conductors of each shield conductor pair. Equipped with an electronic circuit
The first shield conductor of one of a pair of adjacent electronic circuits is integrated with the second shield conductor of the other of the pair of electronic circuits adjacent to each other.
The semiconductor device according to any one of claims 1 to 6 .

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