JP6975207B2 - Signal measuring device and its clock synchronization method - Google Patents

Description

The present invention relates to a signal measuring device for measuring the characteristics and state of a received signal.

As a signal measuring device for measuring the characteristics and state of a received signal, for example, there is a signal measuring device for measuring the propagation state of a radio wave of a base station of a mobile communication system.

In the 5th generation mobile communication system (hereinafter, also referred to as "5G"), high frequency accuracy and frequency stability are required in order to measure the measured signal of the frequency in the GHz range or the millimeter wave band from several hundred MHz. ..

Further, in order to obtain an accurate measurement result, it is necessary to synchronize the frequency of the signal to be measured with the signal measuring device. Therefore, it is desirable to use a signal measuring device or an OCXO (Oven Controlled X'tal Oscillator) that controls frequency stability with respect to the ambient temperature as the internal clock.

Patent Document 1 describes an OCXO used for a device that requires high frequency accuracy, and a measuring device using the OCXO.

Japanese Unexamined Patent Publication No. 7-12935

There is a synchronization method by GPS (Global Positioning System) for field evaluation, but when it is used indoors where GPS radio waves do not reach, the accuracy and stability of the internal clock becomes a problem.

OCXO has a problem that the battery life is shortened in a signal measuring device driven by a battery because the measurement is performed in the field due to the increase in power consumption due to the electric power for heating the oven.

Further, there is a problem that a waiting time for a warm-up time from heating the oven to stabilizing the temperature is required, and measurement cannot be started immediately on site.

In addition, a configuration that uses OCXO, a configuration that uses a reference oscillator with high accuracy and high stability, and a configuration that receives GPS signals and uses them as reference signals are difficult to increase costs, increase power consumption, and reduce size and weight. , Etc.

Therefore, the present invention synchronizes the clocks of the source of the measured signal and the signal measuring device with the signal to be measured, and can obtain an accurate measurement result without incurring an increase in cost or power consumption. Is intended to provide.

The signal measuring device of the present invention is a signal measuring device that measures the characteristics and state of a received signal, and is an error in the clock frequency between the signal transmission source and the signal measuring device from a predetermined signal pattern included in the received signal. The frequency error calculation unit includes a frequency error calculation unit for calculating the above and a clock frequency change unit for changing the clock frequency of the internal clock based on the clock frequency error, and the frequency error calculation unit has different SS / PBCH blocks having the same NR. a shall be calculated clock frequency error between the signal measuring device and the signal source from the difference in phase DMRS disposed PBCH symbol positions.

With this configuration, the clock frequency error between the signal source and the signal measuring device is calculated from the phase difference of the DMRS arranged in the PBCH at different symbol positions of the SS / PBCH block having the same NR contained in the received signal. The clock frequency of the internal clock is changed based on the clock frequency error. Therefore, accurate measurement results can be obtained without increasing the cost and power consumption.

Further, the clock synchronization method of the present invention is a clock synchronization method of a signal measuring device for measuring the characteristics and state of a received signal, and is a signal transmission source and the signal measuring device based on a predetermined signal pattern included in the received signal. The step of calculating the error of the clock frequency with and the step of changing the clock frequency of the internal clock based on the error of the clock frequency is provided , and the step of calculating the error of the clock frequency is SS / with the same NR. a step der shall of calculating an error of the clock frequency of the signal measuring device and the signal source from the difference in phase DMRS disposed PBCH of different symbol positions PBCH block.

With this configuration, the clock frequency error between the signal source and the signal measuring device is calculated from the phase difference of the DMRS arranged in the PBCH at different symbol positions of the SS / PBCH block having the same NR contained in the received signal. The clock frequency of the internal clock is changed based on the clock frequency error. Therefore, accurate measurement results can be obtained without increasing the cost and power consumption.

INDUSTRIAL APPLICABILITY The present invention can provide a signal measuring device capable of obtaining an accurate measurement result without causing an increase in cost and power consumption.

FIG. 1 is a block diagram of a signal measuring device according to an embodiment of the present invention. FIG. 2 is a block diagram of a wireless signal processing unit of the signal measuring device according to the embodiment of the present invention. FIG. 3 is a diagram showing a method of calculating the frequency error angle of the signal measuring device according to the embodiment of the present invention. FIG. 4 is a diagram showing an example of a frequency error angle of the signal measuring device according to the embodiment of the present invention.

Hereinafter, the signal measuring device according to the embodiment of the present invention will be described in detail with reference to the drawings.

In FIG. 1, the signal measuring device 1 according to the embodiment of the present invention includes a radio signal processing unit 10, a radio signal measuring unit 11, a user interface unit 12, and a control unit 13.

The radio signal processing unit 10 outputs the radio signal received from the base station 2 via the antenna 16 to the radio signal measuring unit 11 by amplification or frequency conversion.

The radio signal measuring unit 11 is connected to the radio signal processing unit 10, demodulates and decodes the radio signal output by the radio signal processing unit 10, and also performs SS-RSRP (Synchronization Signal-Reference Signal Received Power) and SS-SIR. (Synchronization Signal-Signal to Interference Ratio), SS-RSRQ (Synchronization Signal-Reference Signal Received Quality), RSSI (Received Signal Strength Indicator), delay profile, etc. are measured and the measurement results are output to the control unit 13. ing. The control unit 13 stores the measurement result from the radio signal measurement unit 11 in association with time information and the like in a hard disk or the like, displays and outputs it to the user interface unit 12 at the request of the user, or outputs it to a file as a log. It is designed to do.

The radio signal measuring unit 11 is adapted to input a clock signal from a GPS (Global Positioning System) receiving unit 14 or an internal clock 15. The radio signal measuring unit 11 measures the reception timing of the radio signal based on the PPS (Pulse Per Second: signal having a cycle of 1 second) from the GPS receiving unit 14 or the clock signal from the internal clock 15. The GPS signal may be input from the outside.

The internal clock 15 changes the clock frequency according to the voltage of the signal output by the wireless signal processing unit 10.

The user interface unit 12 includes an input unit 121 that receives an operation input from the user, and a display unit 122 that displays a measurement parameter setting screen, a measurement result of the wireless signal measurement unit 11, and the like. The input unit 121 is composed of a touch pad, a keyboard, push buttons, a rotary knob, and the like. The display unit 122 is configured by a liquid crystal display device or the like.

The control unit 13 includes a CPU (Central Processing Unit) (not shown), a RAM (Random Access Memory), a ROM (Read Only Memory), a hard disk device, and a computer unit including an input / output port.

The ROM and the hard disk device of the computer unit store various control constants, various maps, and the like, as well as a program for causing the computer unit to function as the control unit 13. That is, when the CPU executes the program stored in the ROM and the hard disk device, the computer unit functions as the control unit 13. The hard disk device may be a CF (Compact Flash) card or the like using a flash memory.

A wireless signal measurement unit 11 and a user interface unit 12 are connected to the input / output port of the control unit 13, and the control unit 13 and each unit can transmit and receive signals.

In the present embodiment, the radio signal measuring unit 11 is composed of a processor such as a DSP (Digital Signal Processor) programmed to execute each process. Further, the wireless signal processing unit 10 is composed of a communication module.

In such a signal measuring device 1, for example, the control unit 13 causes the wireless signal measuring unit 11 to measure a radio signal having a frequency set by an operation input to the input unit 121 for a setting screen displayed on the display unit 122. Let me do it.

The control unit 13 causes the input unit 121 to input the center frequency, frequency bandwidth, number of signals to be measured, and the like of the wireless signal to be measured by the setting screen displayed on the display unit 122. A plurality of center frequencies of the wireless signal to be measured can be set.

The control unit 13 notifies the radio signal measurement unit 11 of the setting information input by the input unit 121 to measure the radio signal.

When the radio signal measuring unit 11 is notified of the setting information from the control unit 13, the radio signal processing unit 10 is notified of the notified center frequency and frequency bandwidth, and the radio signal having the center frequency and frequency bandwidth is transmitted. Receive.

When the radio signal processing unit 10 is notified of the center frequency and frequency bandwidth from the radio signal measurement unit 11, the radio signal processing unit 10 receives the radio signal having the center frequency and frequency bandwidth, and performs amplification and frequency conversion to perform the radio signal measurement unit 10. Output to 11.

The radio signal measurement unit 11 demodulates and decodes the radio signal output by the radio signal processing unit 10, measures SS-RSRP, SS-SIR, SS-RSRQ, RSSI, delay profile, etc., and controls the measurement result. Output to unit 13.

The control unit 13 creates an image to be displayed on the display unit 122 according to the measurement result display type selected by the operation input of the input unit 121 based on the measurement result output by the wireless signal measurement unit 11, and the display unit 122. To display.

In the present embodiment, when measuring a radio signal of 5G NR (New Radio technology), the radio signal processing unit 10 detects an error in the clock frequency between the base station 2 and the signal measuring device 1, and the base station 2 The signal measurement process is started after the clock frequency of the signal measuring device 1 is made to follow the clock frequency of.

The radio signal processing unit 10 detects an error in the clock frequency by a functional block as shown in FIG. 2, and makes the clock frequency follow.

In FIG. 2, the radio signal processing unit 10 includes a frequency error angle calculation unit 101 as a frequency error calculation unit and a D / A converter 102 as a clock frequency change unit.

The frequency error angle calculation unit 101 calculates a frequency error angle indicating a frequency deviation between the clock frequency of the base station 2 and the clock frequency of the signal measuring device 1.

The frequency error angle calculation unit 101 obtains the frequency error angle from, for example, a symbol in which DMRS (DeModulation Reference Signals) of the SS (Synchronization Signals) / PBCH (Physical Broadcast CHannel) block as a synchronization signal is arranged. However, the DMRS symbol placed in NR-SSS (New Radio-Secondary Synchronization Signals) is excluded.

The frequency error angle calculation unit 101 uses, for example, the phase transition amount between symbols in which DMRSs having different timings are arranged in SS / PBCH block units as the frequency error angle, and the average value of the frequency error angles of all SS / PBCH blocks. Is the frequency error angle between the base station 2 and the signal measuring device 1.

The frequency error angle calculation unit 101 calculates the frequency error angle in SS / PBCH block units, for example, from the correlation result between the ideal DMRS pattern and the received signal.

As shown in FIG. 3, the frequency error angle calculation unit 101 obtains, for example, the phase difference (phase transition amount) of the DMRSs arranged in the PBCHs at different symbol positions of the same SS / PBCH block as the frequency error angle.

The frequency error angle calculation unit 101 obtains, for example, the average value of the frequency error angles of SS / PBCH blocks having an SS Block Index of 0 to 7, and uses this as the frequency error angle of the received signal.

The frequency error angle calculation unit 101 outputs a value obtained by subtracting or adding a value corresponding to the obtained frequency error angle from the current value to the D / A converter 102.

The D / A converter 102 outputs a voltage signal corresponding to the output value of the frequency error angle calculation unit 101 to the internal clock 15.

The internal clock 15 changes the clock frequency according to the voltage of the signal output by the D / A converter 102.

The clock synchronization process by the signal measuring device according to the present embodiment configured as described above will be described.

For example, assuming that the D / A converter 102 can change the voltage of the output signal in 2.5 V width in 4095 steps according to the input value, the output voltage is changed by 1 change of the input value.
2.5 / 4095 [V / LSB] = 0.61 [mV / LSB]
And changes by 0.61 [mV].

Assuming that the frequency variable range of the crystal oscillator of the internal clock 15 is ± 5 to 12 ppm / V (Vc = 1.4 ± 1.0) and the frequency that changes at 1 ppm is 19.2 MHz, the input value of the D / A converter 102 changes by 1. As for the clock frequency, assuming that the frequency variable range of the crystal oscillator is 8 ppm,
19.2 [MHz] x 8 [ppm] x 0.61 [mV / LSB] = 0.0937 [Hz]
And changes by 0.0937 [Hz].

Assuming that the sampling period of the received signal is 30.72 MHz and the subcarrier interval of the received signal is 30 kHz, the number of samples between the symbols of DMRS is 2192. As shown in FIG. 4, when the frequency error angle is calculated with a value of 14 bit resolution (16384) for one cycle of 360 degrees, if the value of the frequency error angle is different by one,
30.72 [MHz] / 2192/16384 = 0.85538 [Hz]
This means that the clock frequency is off by 0.85538 [Hz].

From this, the amount of change in the input value from the frequency error angle to the D / A converter 102 is
(Frequency error) × (Crystal oscillation frequency / Carrier frequency) / (1LSB frequency resolution of D / A converter 102)
= (Frequency error angle conversion value x 0.85538 [Hz]) x (19.2 [MHz] / f) /0.0937 [Hz]
Will be. Note that f is a carrier frequency.

For example, as shown by A in FIG. 4, when the frequency error angle is an error in the positive direction, assuming that the carrier wave fraction is 2149 MHz and the converted value of the frequency error angle is 100,
100 × (0.85538 × 19.2 / 2140 / 0.0937) = 8.190 = 8 [LSB] (decimal point, rounded)
Therefore, the amount of change in the input value to the D / A converter 102 is +8.

Further, as shown by B in FIG. 4, when the converted value of the frequency error angle is 8192 or more, the frequency error angle becomes an error in the negative direction, and the converted value of the frequency error angle is 16284.
-(16248-16384) × (0.85538 × 19.2 / 2140 / 0.0937) = 8.190 = 8 [LSB]
Therefore, the amount of change in the input value to the D / A converter 102 is −8.

As described above, in the present embodiment, the clock frequency error between the base station 2 and the signal measuring device 1 is calculated from the DMRS pattern of the SS / PBCH block included in the received signal, and the clock frequency error is calculated based on the clock frequency error. The frequency of the internal clock 15 is changed by the D / A converter 102.

As a result, the clocks of the base station 2 and the signal measuring device 1 are synchronized by the measured signal, and accurate measurement results can be obtained without incurring an increase in cost or power consumption.

Further, the clock frequency error between the base station 2 and the signal measuring device 1 is calculated from the correlation result between the received signal and the ideal DMRS pattern.

Thereby, the error of the clock frequency between the base station 2 and the signal measuring device 1 can be easily calculated.

Further, the phase difference (phase transition amount) of DMRS arranged in PBCH at different symbol positions of the same SS / PBCH block is obtained as a frequency error angle, and the frequency error angle of SS / PBCH blocks having an SS Block Index of 0 to 7 is obtained. The average value of is calculated and used as the frequency error angle of the received signal.

As a result, the error in the clock frequency between the base station 2 and the signal measuring device 1 can be calculated with high accuracy.

Although embodiments of the invention have been disclosed, it will be apparent to those skilled in the art that modifications may be made without departing from the scope of the invention. All such modifications and equivalents are intended to be included in the following claims.

1 Signal measuring device 2 Base station (signal transmitter)
10 Wireless signal processing unit 15 Internal clock 101 Frequency error angle calculation unit (Frequency error calculation unit)
102 D / A converter (clock frequency changer)

Claims (2)

A signal measuring device (1) that measures the characteristics and state of received signals.
A frequency error calculation unit (101) that calculates an error in the clock frequency between the signal transmission source (2) and the signal measuring device from a predetermined signal pattern included in the received signal.
A clock frequency changing unit (102) that changes the clock frequency of the internal clock (15) based on the clock frequency error is provided .
The frequency error calculating unit, the same SS / PBCH block different symbol positions calculated to that signal a clock frequency error from the difference between the phase of the deployed DMRS the PBCH and the signal source and the signal measuring device of the NR measuring device. It is a clock synchronization method of the signal measuring device (1) that measures the characteristics and state of the received signal.
A step of calculating an error in the clock frequency between the signal transmission source (2) and the signal measuring device from a predetermined signal pattern included in the received signal, and
A step of changing the clock frequency of the internal clock (15) based on the clock frequency error is provided .
The step of calculating the clock frequency error is to obtain the clock frequency error between the signal source and the signal measuring device from the phase difference of the DMRS arranged in the PBCH at different symbol positions of the SS / PBCH block having the same NR. step der Ru clock synchronization method of calculating.

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