JP6974679B2 - Photoelectric conversion element and solid-state image sensor - Google Patents

Description

In the present invention, a photoelectric conversion element that converts an optical signal into a signal charge consisting of electrons or holes (holes), and a photoelectric conversion element or a pixel having a structure equivalent to the photoelectric conversion element are made one-dimensional or two-dimensional. The present invention relates to an arranged solid-state image sensor.

In the optical time-of-flight type (TOF type) distance sensor that acquires a distance image using the flight time of light, the potential directly under the gate electrode is controlled in the vertical direction (vertical direction) by using a MOS structure. For example, an n-type charge generation embedding region, a charge transport embedding region, a charge readout embedding region embedded on a p-type semiconductor layer, an insulating film covering the above, and an insulating film arranged on the insulating film. It is equipped with a transfer electrode that transfers the signal charge to the charge transport embedding region and a read gate electrode that is arranged on the insulating film and transfers the signal charge to the charge readout embedding region, and emits pulsed light in the charge generation embedding region. A CMOS ranging element that receives light and photoelectrically converts an optical signal into signal charge in the semiconductor layer directly under the charge generation embedded region, and measures the distance from the charge distribution ratio stored in the charge transfer embedded region to the object. A TOF type image sensor using this has been proposed (see Patent Document 1).

In these CMOS ranging elements and TOF type image sensors using the same, there is a concern about the problem of noise and dark current generation due to interface defects and interface states directly under the transfer electrode. Further, when a transfer electrode as described in Patent Document 1 is used, it is difficult to control the potential gradient over a long distance, and it is practically possible to make the electric field substantially constant over a long distance of the charge transfer channel. It was impossible. For this reason, in a photoelectric conversion element such as a distance measuring element having a long charge transfer channel, carriers have stopped in the middle of the charge transfer channel, which causes a problem that it is difficult to obtain the expected performance.

In recent years, the field of activity of time-resolved image sensors has expanded further in the world of biomedical. Fluorescence lifetime microspectroscopy (FLIM), which measures the time during which fluorescence decays (fluorescence lifetime) by measuring the intensity of fluorescence generated by irradiating intracellular molecules with excitation light, in a method using a time-resolved image sensor. There is. By applying this FLIM, it can be expected to have a great impact on the fields of medical treatment and preventive medicine.

The present inventors have already provided a 4-tap lateral electric field control type photoelectric conversion element capable of acquiring continuous time-resolved components with low noise in four short-time time windows while maintaining a high signal-to-noise ratio (SN ratio). Proposed (see Patent Document 2). In the photoelectric conversion element disclosed in Patent Document 2, the charge storage regions provided at each of the four target positions with respect to the center of the light receiving region and the electric field control provided on both sides of the path leading to the respective charge storage regions. A pair of electrodes (gate electrodes) is provided, and the transfer destinations of the charges generated by the photoelectric conversion are sequentially set in the first to fourth charge storage regions and transported. One time window is sub-nanosecond, and 3 to 4 time windows are measured at the same time with a single shot, and then the 3 to 4 time windows are delayed as a whole to measure the measurement time range immediately after the first time window. It is possible to realize the time resolution of sub-nanoseconds and the measurement time range of several nanoseconds required for the fluorescence lifetime measurement by performing the measurements and connecting them several times.

According to the technique of Patent Document 2, it is easy to control the potential distribution for making the electric field almost constant over a long distance of the charge transfer channel, and the signal charge is symmetric in a plurality of regions in the long charge transfer channel. A photoelectric conversion element that can be transported at high speed and can avoid the problems of noise and dark current generation caused by interface defects and interface states at the interface of the semiconductor surface and the problem of decrease in transportation speed, and the photoelectric conversion element of this photoelectric conversion element. It is possible to provide a solid-state imaging device having a plurality of arrangements with low noise, high resolution, and a high response speed. However, the 4-tap photoelectric conversion element has a problem that only 3 or 4 components out of a plurality of fluorescence time decomposition components can be acquired in the case of a single shot. Further, when acquiring by repeating a single shot, there is a problem that the total measurement time becomes long.

International Publication No. 2007/11926 Pamphlet International Publication No. 2015/118884 Pamphlet

In view of the above problems, it is an object of the present invention to provide a photoelectric conversion element capable of shortening the total measurement time and a solid-state image pickup device using the photoelectric conversion element.

In order to achieve the above object, the first aspect of the present invention is (a) an embedded photo composed of a first conductive type element forming layer and a second conductive type surface embedded region embedded in the upper part of the element forming layer. A second conductive type with a higher impurity density than the element forming layer, which is provided at five or more positions surrounding the imaging region including the diode and (b) the light receiving region defined in the center of the imaging region. In a position surrounding the plurality of charge reading regions, (c) a plurality of second conductive type charge transfer channels extending from the light receiving region to the plurality of charge reading regions by independent paths, and (d) the light receiving region. The gist is that the photoelectric conversion element includes a plurality of electric field control electrodes arranged in pairs on both sides of each of the plurality of charge transfer channels. The photoelectric conversion element according to the first aspect periodically and sequentially applies electric field control pulses having different phases to each of a plurality of electric field control electrodes, and sequentially applies depletion potentials of a surface-embedded region and a plurality of charge transfer channels. By changing it, it is controlled so that the movement destination of the large number of carriers generated in the surface embedded region is sequentially set in one of the plurality of charge reading regions.

A second aspect of the present invention is a solid-state image pickup device in which the photoelectric conversion element according to the first aspect is a pixel and a plurality of pixels are arranged on the same semiconductor chip. In each of the pixels constituting the solid-state imaging device according to the second aspect, electric field control pulses having different phases from each other are periodically and sequentially applied to a plurality of electric field control electrodes, and a surface-embedded region and a plurality of charge transfer channels are applied. By sequentially changing the depletion potential of, the movement destination of a large number of carriers generated in the surface-embedded region is controlled to be sequentially set to one of a plurality of charge reading regions.

According to the present invention, it is possible to provide a photoelectric conversion element capable of shortening the total measurement time and a solid-state image pickup device using the photoelectric conversion element.

It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on 1st Embodiment of this invention. It is a schematic cross-sectional view explaining the schematic structure of the photoelectric conversion element which concerns on 1st Embodiment seen from the AA direction of FIG. It is a timing diagram explaining the operation of the photoelectric conversion element which concerns on 1st Embodiment of this invention. It is a timing diagram explaining the circuit which shapes the gate signal of the photoelectric conversion element which concerns on 1st Embodiment of this invention. It is a schematic plan view (top view) explaining the operation of the photoelectric conversion element which concerns on 1st Embodiment of this invention. It is a figure which shows the potential distribution of the lower end part (bottom part) of the conduction band of the photoelectric conversion element which concerns on the modification of 1st Embodiment seen from the BB direction of FIG. It is a figure which shows the potential distribution of the lower end part (bottom part) of the conduction band of the photoelectric conversion element which concerns on the modification of 1st Embodiment seen from the CC direction of FIG. It is a schematic plan view explaining the outline of the layout on the semiconductor chip of the solid-state image pickup apparatus which concerns on 1st Embodiment of this invention. It is a schematic plan view explaining the outline of the internal structure of the pixel used in the solid-state image pickup apparatus shown in FIG. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on 1st modification of 1st Embodiment of this invention. It is a schematic cross-sectional view explaining the schematic structure of the photoelectric conversion element which concerns on the 1st modification of 1st Embodiment seen from the DD direction of FIG. It is a figure which shows the potential distribution of the lower end part (bottom part) of the conduction band of the photoelectric conversion element which concerns on the 1st modification of 1st Embodiment seen from the DD direction of FIG. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on the 2nd modification of 1st Embodiment of this invention. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on the 3rd modification of 1st Embodiment of this invention. It is a schematic cross-sectional view explaining the schematic structure of the photoelectric conversion element which concerns on the 3rd modification of 1st Embodiment seen from the EE direction of FIG. It is a timing diagram explaining the operation of the photoelectric conversion element which concerns on the 3rd modification of 1st Embodiment of this invention. FIG. 17A shows the potential distribution of the lower end (bottom) of the conduction band at the time of charge transfer of the photoelectric conversion element according to the third modification of the first embodiment as viewed from the EE direction of FIG. 17 (b) is a diagram showing the potential distribution of the lower end (bottom) of the conduction band of the photoelectric conversion element according to the modification of the first embodiment as viewed from the FF direction of FIG. be. FIG. 18A shows the lower end (bottom) of the conduction band of the photoelectric conversion element according to the third modification of the first embodiment as viewed from the EE direction of FIG. 14 when the background light charge is discharged. It is a figure which shows the potential distribution, and FIG. It is a figure which shows. It is a schematic plan view explaining the outline of the internal structure of the pixel used in the solid-state image pickup apparatus which concerns on the 3rd modification of 1st Embodiment of this invention. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on the 4th modification of 1st Embodiment of this invention. The isopotential lines in the XY planes seen from above the imaging region of the photoelectric conversion element according to the fourth modification of the first embodiment, and the electron charge transport path set by the potential distribution of the equipotential lines. It is a figure which shows. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on 2nd Embodiment of this invention. 22 is a schematic cross-sectional view illustrating the schematic structure of the photoelectric conversion element according to the second embodiment as viewed from the GG direction of FIG. 22. 22 is a schematic cross-sectional view illustrating the schematic structure of the photoelectric conversion element according to the second embodiment as viewed from the I-I direction of FIG. 22. 25 (a) is a diagram showing the potential distribution of the lower end (bottom) of the conduction band of the photoelectric conversion element according to the second embodiment seen from the GG direction of FIG. 22, and FIG. 25 (b) is a diagram. 22 is a diagram showing the potential distribution of the lower end (bottom) of the conduction band of the photoelectric conversion element according to the second embodiment as viewed from the HH direction of FIG. 22, and FIG. 25 (c) is a diagram showing I- of FIG. 22. It is a figure which shows the potential distribution of the lower end part (bottom part) of the conduction band of the photoelectric conversion element which concerns on 2nd Embodiment seen from the I direction. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on 1st modification of 2nd Embodiment of this invention. The equipotential lines in the XY planes seen from above the imaging region of the photoelectric conversion element according to the first modification of the second embodiment and the electron charge transport path set by the potential distribution of the equipotential lines. It is a figure which shows. It is a figure which shows the part of the isobaric line of FIG. 27 enlarged. It is a figure which shows the potential distribution of the lower end part (bottom part) of the conduction band of the photoelectric conversion element which concerns on the 1st modification of 2nd Embodiment by the 3D mesh structure. It is a schematic cross-sectional view explaining the schematic structure of the photoelectric conversion element which concerns on the 2nd modification of the 2nd Embodiment of this invention. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on the 3rd modification of the 2nd Embodiment of this invention. It is a schematic plan view (top view) explaining the outline of the photoelectric conversion element which concerns on the 4th modification of the 2nd Embodiment of this invention.

Next, the first and second embodiments of the present invention will be described with reference to the drawings. In the description of the drawings below, the same or similar parts are designated by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the plane dimensions, the ratio of the thickness of each layer, etc. are different from the actual ones. Therefore, the specific thickness and dimensions should be determined in consideration of the following explanation. In addition, it goes without saying that parts having different dimensional relationships and ratios are included between the drawings.

Further, the first and second embodiments shown below exemplify devices and methods for embodying the technical idea of the present invention, and the technical idea of the present invention is based on the material of a component. The shape, structure, arrangement, etc. are not specified to the following. The technical idea of the present invention may be modified in various ways within the technical scope specified by the claims described in the claims. Further, the directions of "left and right" and "up and down" in the following description are merely definitions for convenience of explanation, and do not limit the technical idea of the present invention. So, for example, if you rotate the paper 90 degrees, "left and right" and "up and down" are read interchangeably, and if you rotate the paper 180 degrees, "left" becomes "right" and "right" becomes "left". Of course it will be.

Further, in the drawings, it is obvious to those skilled in the art that the region or layer labeled with n or p means a member or a component made of a semiconductor such as a semiconductor region or a semiconductor layer. Further, the + superscript attached to n or p in the drawing means that the semiconductor region has a relatively high impurity density as compared with the semiconductor region to which + is not added, and n or p. The-superscript attached to the upper right of is a semiconductor region with a relatively low impurity density compared to the semiconductor region not marked with-. Further, ^{even if the same notation such as n +} and n ⁺ is used, it does not necessarily indicate that the impurity densities are the same.

<First Embodiment>
(Structure of photoelectric conversion element)
As shown in the plan view of FIG. 1 and the cross-sectional view of FIG. 2, the photoelectric conversion element according to the first embodiment of the present invention is the element forming layer 2 and the element forming layer 2 of the first conductive type (p type). A second conductive type (n-type) surface-embedded region 3 embedded in a part of the upper part, a p-type high-impurity density potential hill setting portion 7 provided in the center of the surface-embedded region 3, and surface embedding. An imaging region (2,3,5,7) including a p-type pinning layer 5 provided in contact with the surface of the region 3 and an insulating film provided on the imaging region (2,3,5,7). 9 and the eight positions symmetrical with respect to the center position of the light receiving region PD are provided so as to surround the light receiving region PD defined in the central portion of the imaging region (2, 3, 5, 7) at a distance from each other. N-type first charge storage region SD1, second charge storage region SD2, third charge storage region SD3, ..., 8th charge storage region SD8, and a light receiving region, which have a higher impurity density than the element forming layer 2. At a position surrounding the PD, from the center position of the light receiving region PD on the insulating film 9, the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., And the eighth charge storage region SD8, respectively. 1st electric field control electrode G1, 2nd electric field control electrode G2, 3rd electric charge control electrode G3, ..., 8th electric charge control electrode G8 arranged in pairs on both sides of each of the eight charge transfer channels leading to And prepare.

The eight charge transfer channels are two adjacent electric field controls among the eight first electric field control electrodes G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., And the eighth electric field control electrode G8. It is formed by being sandwiched between electrodes. For example, the first charge transfer channel R1 located at the uppermost part in FIG. 1 is a region sandwiched between the eighth electric field control electrode G8 and the first electric field control electrode G1. The second charge transfer channel R2 appearing on the left side of the first charge transfer channel R1 in FIG. 1 is a region sandwiched between the first electric field control electrode G1 and the second electric field control electrode G2. In FIG. 2, a third charge transfer channel R3 and a seventh charge transfer channel R7 appearing horizontally on the same straight line in the left-right direction in FIG. 1 are exemplified.

The photoelectric conversion element according to the first embodiment is shown in FIG. 3 (b) with respect to the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., And the eighth electric field control electrode G8. As shown in FIGS. 6 and 7, electric field control pulses having different phases from each other are periodically and sequentially applied to sequentially change the depletion potential of the surface-embedded region 3 to one of the charge transfer channels. As shown, a potential gradient in which charges are transported is sequentially formed, and the destinations of the majority carriers generated in the surface embedded region 3 are set to the first charge storage region SD1, the second charge storage region SD2, and the third charge. Control is performed so that the storage regions SD3, ..., And the eighth charge storage region SD8 are sequentially set. That is, the photoelectric conversion element according to the first embodiment is the first electric field control electrode G1 and the second electric field control electrode G2, which are eight gates that control the electric field by the electrostatic induction effect in the direction crossing the charge transport path. 8 Along the charge transfer channel of the book, it is moved at high speed by electric field control to perform charge modulation.

As can be seen from the plan view of FIG. 1, the arrangement topology of the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., and the eighth charge storage region SD8 is the center of the light receiving region PD. Eight-fold rotational symmetry is preferred with respect to position, but it does not necessarily have to be accurate eight-fold rotational symmetry. Each of the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., And the seventh charge storage region SD7 shown in FIG. 1 has a large number of carriers generated in the surface embedded region 3. Functions as a signal charge storage region that stores the above as a signal charge, and the eighth charge storage region SD8 functions as a charge discharge region that discharges the background light charge generated in the surface embedded region 3 by the background light.

At the outer ends of the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., and the eighth charge storage region SD8, n-type first charges having a high impurity density are present. A 7-output photoelectric conversion element is realized by providing a read area FD1, a second charge read area FD2, a third charge read area FD3, ..., And an eighth charge read area FD8 in a floating state. In the 7-output photoelectric conversion element according to the first embodiment, the eighth charge read region FD8 functions as a charge discharge region (drain region).

In the photoelectric conversion element according to the first embodiment, the insulating films 9 on both sides of the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., And the eighth charge storage region SD8, respectively. Inside, an auxiliary electrode to which an electric field that promotes charge accumulation in the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., and the eighth charge storage region SD8 is applied. CA11, CA21, CA31, ..., CA81; CA12, CA22, CA32, ..., CA82 are provided, but the auxiliary electrodes CA11, CA21, CA31, ..., CA81; CA12, CA22, CA32, ..., CA82 may be omitted.

As shown in FIG. 1, in the photoelectric conversion element according to the first embodiment, from the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., The eighth charge storage region SD8. , The corresponding first charge read area FD1, the second charge read area FD2, the third charge read area FD3, ..., The eighth charge read area FD8, and eight n-type charge read channels are formed. Auxiliary electrodes CA11, CA21, CA31, ..., CA81; CA12, CA22, CA32, ..., CA82, on both sides of each of the plurality of charge read channels, transfer electrodes TX11, TX21 that perform lateral electric field control. , TX31, ..., TX81; TX12, TX22, TX32, ..., TX82 are arranged in pairs.

For the transfer electrodes TX11, TX21, TX31, ..., TX81; TX12, TX22, TX32, ..., TX82, the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ... ..., Charge transfer pulse that transfers a large number of carriers from the 8th charge storage area SD8 to the corresponding 1st charge read area FD1, 2nd charge read area FD2, 3rd charge read area FD3, ..., 8th charge read area FD8. Are applied all at once, and an electric charge that promotes charge transfer to the first charge read region FD1, the second charge read region FD2, the third charge read region FD3, ..., The eighth charge read region FD8 is applied.

As shown in FIGS. 1 and 2, a shielding plate 11 is further provided above the insulating film 9. A planar pattern of the light receiving region PD is defined in the central portion of the imaging region (2, 3, 5, 7) through the opening of the shielding plate 11, and the light receiving region PD is selectively irradiated with light. .. In the plan view of FIG. 1, a light receiving region PD as an opening of the shielding plate 11 is defined in the central portion of the imaging region (2, 3, 5, 7). The third charge transfer channel R3 and the seventh charge transfer channel R7 are set to be continuous with the light receiving region PD in the horizontal direction (X direction) in the imaging region (2, 3, 5, 7) covered with the shielding plate 11. Is illustrated. Similarly, in the imaging region (2, 3, 5, 7) below the shielding plate 11, the first charge transfer channel R1 and the first charge transfer channel R1 and the first along the vertical direction (Y direction) orthogonal to the horizontal charge transfer channel. 5 The charge transfer channel R5 is set to be continuous with the light receiving region PD.

Further, the fourth charge transfer channel R4 and the eighth charge transfer channel R8 are continuous with the light receiving region PD at the positions on the straight line in the 45 ° direction where y = x when the X direction and the Y direction are used in the Cartesian coordinate system. The second charge transfer channel R2 and the sixth charge transfer channel R6 are set to be continuous with the light receiving region PD at the position on the straight line in the −45 ° direction where y = −x. Therefore, in the plan view of FIG. 1, eight charge transfer channels extending radially outward from the light receiving region PD so that the adjacent charge transfer channels and the central axes form an angle of 45 ° are defined. Then, at the eight ends of the first charge transfer channel R1, the second charge transfer channel R2, the third charge transfer channel R3, ..., And the eighth charge transfer channel R8, the first charge storage region SD1, the second charge, respectively. The storage area SD2, the third charge storage area SD3, ..., The eighth charge storage area SD8 are connected.

(Operation of photoelectric conversion element)
The first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., The eighth electric field control electrode G8 is an electric field control electrode located symmetrically with respect to the central axis of the desired charge transport path. Gate signals of the same magnitude are applied in pairs. For example, when it is desired to transfer the signal charge generated in the light receiving region PD along the seventh charge transfer channel R7 to the seventh charge reading region FD7 via the seventh charge storage region SD7 shown in FIG. , 1st control electrode pair (G2, G3), 2nd control electrode pair (G1, G4), 3rd control electrode pair (G8) with the BB line forming the central axis of the 7th charge transfer channel R7 as the axis of symmetry. , G5) and 4th control electrode pair (G7, G6) are defined, 1st control electrode pair (G2, G3), 2nd control electrode pair (G1, G4), 3rd control electrode pair (G8, G5). And a different level of charge is sequentially applied to the fourth control electrode pair (G7, G6). The maximum width of the regular octagon of the light receiving region PD is about 4.5 μm.

In FIG. 5, a state in which a gate signal of the first potential level L (-1V) is applied to the first control electrode pair (G2, G3) is exemplified. At this time, a gate signal having a second potential level M (0.5 V) higher than the first potential level L is applied to the second control electrode pair (G1, G4). A gate signal of a third potential level H (1.0 V) higher than the second potential level M is applied to the third control electrode pair (G8, G5). A gate signal of a fourth potential level V (2.3 V) higher than the third potential level H is applied to the fourth control electrode pair (G7, G6).

That is, of the first control electrode pair (G2, G3), the second control electrode pair (G1, G4), the third control electrode pair (G8, G5) and the fourth control electrode pair (G7, G6) shown in FIG. In the arrangement, eight electric field controls are sequentially applied from the first control electrode pair (G2, G3) toward the fourth control electrode pair (G7, G6) on the end point side so that the applied potential increases. Four control electrode pairs are configured so as to be vertically symmetrical by the electrodes, and the voltage applied to each of the four control electrode pairs is controlled to different levels.

First control electrode pair (G2, G3), second control electrode pair (G1, G4), third control electrode pair (G8, G5) and fourth control electrode pair (G7) when the seventh charge transfer channel R7 is used. , G6), the different electric field control voltages generated by the shaping circuit from the first electric field control pulse g1, the second electric field control pulse g2, the third electric field control pulse g3, ..., The eighth electric field control pulse g8. By applying each of them and changing the depletion potential of the light receiving region PD and the charge transfer channel by the electrostatic induction effect in the lateral direction, different potential gradients are formed depending on the region as shown in FIGS. 6 and 7. , The moving direction of the signal charge transported along the valley of potential in the imaging region (2, 3, 5, 7) is sequentially controlled.

As shown in FIG. 5, the signal charge generated in the light receiving region PD moves along the potential valley formed so as to orbit around the potential hill setting portion 7 having a high potential for electrons, and the fourth control electrode pair It reaches the inlet of the seventh charge transfer channel R7 defined between (G7, G6). Then, the signal charge generated in the light receiving region PD moves to the seventh charge storage region SD7 via the seventh charge transfer channel R7. At this time, as shown in FIG. 6, the potential for the electrons of the third charge transfer channel R3 defined between the first control electrode pair (G2, G3) is shallow, and the potential for the electrons on the seventh charge transfer channel R7 side is shallow. The deepest, smoothly descending potential gradient is formed by the lateral electrostatic induction effect. Then, by setting the impurity density of the 7th charge storage region SD7 high, as shown in FIG. 6, a potential gradient that descends from the 7th charge transfer channel R7 to the 7th charge storage region SD7 is formed.

That is, in the arrangement of the four control electrode pairs to which the voltage as illustrated in FIG. 5 is applied, the gate to the third charge storage region SD3 continuous with the third charge transfer channel R3 is closed in FIG. The gate to the seventh charge storage region SD7 shows an open potential distribution. FIG. 6 shows that the third charge transfer channel R3 has the shallowest potential for electrons. On the other hand, as shown in FIG. 7, the potentials of the fifth charge transfer channel R5 and the first charge transfer channel R1 with respect to electrons are both deeper than the potential of the third charge transfer channel R3, but that of the seventh charge transfer channel R7. Shallower than the potential. 6 and 7 show the third charge transfer channel R3 and the potential hill setting unit 7, the fifth charge transfer channel R5 and the potential hill setting unit 7, and the first charge transfer channel R1 and the potential hill setting unit 7. It is shown that the valley of the potential is formed by the electrostatic induction effect in the lateral direction so as to go around the potential hill setting portion 7. A gentle potential from the entrance of the third charge transfer channel R3 to the entrance of the second charge transfer channel R2, the entrance of the first charge transfer channel R1, the entrance of the eighth charge transfer channel R8, and the entrance of the seventh charge transfer channel R7. A first potential valley with a gradient is formed by the lateral electrostatic induction effect as a route (charge transport path) above the light receiving region PD. Although not shown in FIG. 5, the seventh charge transfer channel R3 is passed through the entrance of the third charge transfer channel R3, the entrance of the fourth charge transfer channel R4, the entrance of the fifth charge transfer channel R5, and the entrance of the sixth charge transfer channel R6. A second potential valley with a gentle potential gradient leading to the entrance of the charge transfer channel R7 is a transverse electrostatic induction in a topology symmetric to the upper route as the lower route (charge transport path) of the light receiving region PD. Formed by the effect. At this time, the first charge transfer channel R1, the second charge transfer channel R2, the third charge transfer channel R3, the fourth charge transfer channel R4, the fifth charge transfer channel R5, the sixth charge transfer channel R6, and the eighth charge In the transfer channel R8, potential barriers that hinder the movement of electric charges are formed by the lateral electrostatic induction effect.

That is, the gate to the fifth charge storage region SD5 set in the fifth charge transfer channel R5 and the gate to the first charge storage region SD1 set in the first charge transfer channel R1 are both closed. Similarly, for example, when it is desired to transfer the charge to the fifth charge storage region SD5 and the fifth charge read region FD5 using the lowermost fifth charge transfer channel R5 in FIG. 5, the fifth charge transfer channel R5 is used. Along the CC line forming the central axis, the first control electrode pair (G8, G1), the second control electrode pair (G2, G7), the third control electrode pair (G3, G6) and the fourth control electrode pair are newly added. Control electrode pairs (G4, G5) are defined respectively and a predetermined level of charge is distributed.

When it is desired to move the charge to the fifth charge reading region FD5, the first control electrode pair (G8, G1) having the shallowest potential valley depth to the fourth control electrode pair (G4, G5) on the end point side. By controlling the voltage applied to the four control electrode pairs so that the applied potential increases in sequence toward, the potential valley that can move the signal charge to the fifth charge read region FD5 is horizontal static. It can be set by the electric induction effect. Although not shown, in order to efficiently change the depletion potential due to the lateral electrostatic induction effect, the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., The eighth electric field The thickness of the insulating film 9 in the portion directly below the control electrode G8 is thinner than the other portions, and functions as a so-called “gate insulating film”.
Actually, as shown in FIG. 24, the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., the eighth electric field control electrode G8 and the like are embedded inside the insulating film 9. The area directly below the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., And the eighth electric field control electrode G8 is thinner than the other parts.

As shown in FIG. 2, the imaging region (2, 3, 5, 7) shown in FIG. 1 has a p-type element forming layer 2 and an n-type surface embedding embedded in the upper part of the element forming layer 2. A pn junction photodiode is formed by the region 3, and electrons generated as a large number of carriers in the surface embedded region 3 by photoelectric conversion by the pn junction photodiode are transported in the surface embedded region 3 as signal charges. More specifically, in FIG. 1, a part of the p-type element forming layer 2 exposed inside the aperture shown by the broken line defined by the shielding plate 11 and a part of the n-type surface embedded region 3 However, it constitutes an embedded photodiode. In FIG. 1, an octagonal broken line indicates an aperture that is an outer edge portion and an opening portion of the shielding plate 11. A p-type pinning layer 5 is provided in contact with the surface of the surface embedding region 3. As shown in FIG. 2, in the cross-sectional structure of the photoelectric conversion element according to the first embodiment, an imaging region (2, 3, 5, 7) having a three-layer structure is further formed on a p-type semiconductor substrate 1. Therefore, it is actually an example of a four-layer structure.

FIG. 2 illustrates a structure in which the element forming layer 2 is deposited on the p-type semiconductor substrate 1 by epitaxial growth or the like, but even if the element forming layer 2 is provided on the n-type semiconductor substrate 1. I do not care. Further, another layer may be included between the element forming layer 2 and the semiconductor substrate 1 to form a structure having five or more layers. In the pinning layer 5, the density of holes, which are carriers opposite to the signal charge, is the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., Eighth. The electrostatic induction effect due to the voltage applied to the electric field control electrode G8 changes by controlling the charge transport path in the peripheral portion of the light receiving region PD and the depletion potential of the eight charge transfer channels.

Although the insulating film 9 is not shown in the plan view of FIG. 1, the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., And the eighth electric field control electrode G8 are shown in FIG. It can be understood that it is arranged on the insulating film 9. Eight charge transfer channels are defined between the adjacent first electric field control electrode G1, second electric field control electrode G2, third electric field control electrode G3, ..., And eighth electric field control electrode G8. The first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., The eighth electric field control electrode G8 has a surface embedded region 3 functioning as eight charge transfer channels on a plane pattern. The plane pattern is such that they are arranged facing each other along a direction orthogonal to the transport direction of the signal charge, but on the cross-sectional view, the insulating film 9 is placed on the imaging region (2, 3, 5, 7). Are arranged via.

In FIG. 1, the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ... , The eighth electric field control electrode G8 is arranged. As shown in FIG. 3, when the potential applied to the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., And the eighth electric field control electrode G8 is changed, the light receiving region PD is changed. The depletion potential of the constituent surface-embedded region 3 is controlled to form a potential valley that serves as a charge transport path by the electrostatic induction effect in the lateral direction, and the depletion potential of eight charge transfer channels is further controlled. Can be controlled.

Although not shown, the gate electrode of the first signal reading transistor (amplifying transistor) is connected to the first charge reading region FD1 via a contact window provided in the insulating film 9. The drain electrode of the first signal read transistor (amplification transistor) is connected to the power supply VDD, and the source electrode is connected to the drain electrode of the first switching transistor SEL1 for pixel selection. The source electrode of the first switching transistor SEL1 is connected to a vertical signal line, and a control signal SL (i) for selecting a horizontal line is given to the gate electrode from the vertical shift register 23 shown in FIG.

By setting the selection control signal SL (i) to the high (H) level, the first switching transistor SEL1 becomes conductive, and the current corresponding to the potential of the first charge read region FD1 amplified by the first signal read transistor becomes. It flows in the vertical signal line. Further, the source electrode of the first reset transistor RT1 is connected to the first charge read region FD1. The drain electrode of the first reset transistor RT1 is connected to the power supply VDD, and the reset signal RT ₁ (i) is given to the gate electrode of the first reset transistor RT1 from the vertical shift register 23 shown in FIG. The reset signal RT ₁ (i) is set to the high (H) level, and the first reset transistor RT1 discharges the charge accumulated in the first charge read region FD1 to reset the first charge read region FD1.

On the other hand, in the second charge read area FD2, the third charge read area FD3, the fourth charge read area FD4, ..., the seventh charge read area FD7, as in the first charge read area FD1, all of the first signals A second signal read transistor, a third signal read transistor, a fourth signal read transistor, ..., And a seventh signal read transistor, which are equivalent to a read transistor (amplification transistor), are connected. Further, in the second charge read area FD2, the third charge read area FD3, the fourth charge read area FD4, ..., and the seventh charge read area FD7, the second switching transistor SEL2 equivalent to the first switching transistor SEL1 is used. The third switching transistor SEL3, the fourth switching transistor SEL4, ..., the seventh switching transistor SEL7, the second reset transistor RT2, which is equivalent to the first reset transistor RT1, the third reset transistor RT3, the fourth reset transistor RT4, ..., The 7th reset transistor RT7 is connected.

The movement of electrons generated in the light receiving region PD can be freely controlled by the voltage applied to the first electric charge control electrode G1, the second electric potential control electrode G2, the third electric potential control electrode G3, ..., And the eighth electric charge control electrode G8. For this purpose, the depletion potential (depletion potential in the embedded diode) of the charge transfer channel sandwiched between the charge transport path and the pair of opposite electric field control electrodes is configured to fluctuate greatly depending on the voltage applied to the control electrode pair. do it. This can be done by setting the impurity density of the substrate low and selecting the pinning layer 5 for surface hole pinning to have a relatively low impurity density. The change in the concentration of the carrier inside the electric field control electrode and the pinning layer of the photoelectric conversion element is typically described using "first electric field control electrode pairs 41a, 41b" in Patent Document 2 in principle. Since they are equivalent to each other, duplicate explanations will be omitted.

In a normal solid-state imaging device, the pinning layer is a layer that suppresses carrier generation and signal carrier capture on the surface during darkness, and has been conventionally used as a preferable layer for reducing dark current and signal carrier capture. Although it is used, the pinning layer 5 of the photoelectric conversion element according to the first embodiment is not limited to these conventionally known functions, and the depletion potential of the surface embedded region 3 is set to the first electric field control electrodes G1 and the second. It functions as an important layer that greatly changes the voltage of the electric field control electrodes G2, the third electric field control electrodes G3, ..., And the eighth electric field control electrode G8.

By applying gate voltages of different voltage levels to the four pairs of control electrodes as illustrated in FIG. 5, the light incident on the opening (aperture) of the shielding plate 11 is generated in the embedded photodiode region. It is possible to realize a charge modulation element or the like that moves the carriers (electrons) at high speed so as to be distributed to a desired charge transfer channel in eight directions extending from the light receiving region PD.

That is, in the photoelectric conversion element according to the first embodiment, as shown in FIG. 5, seven charge transfer channels out of eight charge transfer channels provided with the central axes at an angle of 45 ° each. Since the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., and the seventh charge storage region SD7 are provided at the ends of the above, the first electric field control electrode G1, By making it possible to apply different gate voltages of the first to fourth potential levels to the second electric field control electrode G2, the third electric field control electrode G3, ..., And the eighth electric field control electrode G8, 7 The signal charge of the carrier (electron) generated in the embedded photodiode region located on the starting point side of the charge transfer channel of the book is used as the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ... ..., The operation of the optical flight time (TOF) type distance sensor that is distributed and moved at high speed can be realized by the electric field control voltage applied to the eighth electric field control electrode G8.

Further, as shown in FIG. 5, a charge discharge region SD8 is provided at the end of the remaining one charge transfer channel among the eight charge transfer channels. Therefore, as shown in FIG. 3, different gate voltages of the first to fourth potential levels are applied to the first electric charge control electrode G1, the second electric charge control electrode G2, the third electric charge control electrode G3, ..., The first. By adding the 8 electric potential control electrode G8, the background light charge generated by the background light generated in the embedded photodiode region is moved at high speed to the entrance of the remaining one charge transfer channel, and the background light charge is transferred to the charge discharge region SD8. Can be discharged.

Since the gate electrode of the first signal read transistor (amplification transistor) is connected to the first charge read region FD1, the first signal is generated by the voltage corresponding to the amount of charge transported to the first charge read region FD1. The output amplified by the read transistor (amplification transistor) is output to the outside via the first switching transistor SEL1. Similarly, since the gate electrode of the second signal read transistor (amplification transistor) is connected to the second charge read region FD2, the voltage corresponding to the amount of charge transported to the second charge read region FD2 causes the second charge. The output amplified by the two-signal read transistor (amplification transistor) is output to the outside via the second switching transistor.

For example, in the application to the TOF type distance sensor, the light source provided in the TOF distance sensor repeatedly irradiates the object with light as a pulse signal, and measures the _{delay time Td required for the round trip of the light reflected by the object.} do it. That is, in the application to the TOF distance sensor, as described above, the first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., The eighth electric field control electrode G8 are shown in FIG. First electric field control pulse g1, second electric field control pulse g2, third electric field control pulse g3, ..., Eighth electric field control pulse g8 having different phases as shown in The operation of sequentially applying the electric field is synchronized with the repetition period of the optical pulse of the output light, and the delay time _Td is measured by repeating the operation periodically. For the measurement of the delay time T _d, it can be used the same principle as "measurement of the delay time T _d" in Patent Document 2.

The photoelectric conversion element according to the first embodiment is operated by using pulsed light having a relatively narrow duty. As shown in FIG. 3, during the period in which the light pulse of the incoming light is received and the charge modulated by the photoelectric conversion element is accumulated, the first electric field control pulse g1, the second electric field control pulse g2, and the third electric field control pulse g3 , ..., The eighth electric field control pulse g8 is shaped by a shaping circuit to generate four output levels of first potential level L, second potential level M, third potential level H, and fourth potential level V, respectively. Then, eight gate signals are periodically applied and operated as shown in FIG.

A four-stage output level signal can be realized by combining, for example, a logic circuit as shown in FIG. In FIG. 4, among the first electric field control pulse g1, the second electric field control pulse g2, the third electric field control pulse g3, ..., The eighth electric field control pulse g8, and the second electric field control pulse g2 from the clock. A third electric field control pulse g3, a seventh electric field control pulse g7 and an eighth electric field control pulse g8, a third electric field control pulse g3 and a fourth electric field control pulse g4, a sixth electric field control pulse g6 and a seventh electric field control pulse g7. Each pair is paired, and the input from each pair is input to each of the four two-input AND circuits. Further, as shown in FIG. 4, the outputs of the two 2-input AND circuits on the upper stage side are input to the first two-input OR circuit arranged on the upper stage side, and the outputs of the two two-input AND circuits on the lower stage side are on the lower stage side. It is input to the second 2 input OR circuit arranged in. Then, the outputs of the two 2-input OR circuits are input to the NOR circuit. Then, the outputs of the two 2-input OR circuits are directly input to the two 1.0V input terminals of the selection circuit 15, and at the same time, the outputs of the NOR circuit are input to the -1.0V input terminals of the selection circuit 15 to perform waveform shaping. doing. It is possible to generate a gate signal to be input to the first electric field control electrode G1 via the selection circuit 15 shown in FIG. A logic circuit configuration similar to that of the gate signal input to the second electric field control electrode G2, the third electric field control electrode G3, the fourth electric field control electrode G4, ..., The eighth electric field control electrode G8 shown in FIG. 3B. It can be generated with.

As described above, according to the photoelectric conversion element according to the first embodiment, the potential under the gate electrode is controlled in the vertical direction (vertical direction) by using the conventional MOS structure, as compared with the case where the potential is controlled in the horizontal direction (charge transfer). Since the electric field control by the electrostatic induction effect (perpendicular to the channel) is used, the signal charge is transported at high speed while maintaining the symmetry by making the electric field almost constant over a long distance of the charge transfer channel. .. Further, according to the photoelectric conversion element according to the first embodiment, a light receiving region PD having a substantially octagonal shape in a plane pattern is provided, and eight charge transfer channels whose central axes extend radially from the center of the light receiving region PD are provided. It is formed. Since the eight charge transfer channels are all formed symmetrically with the same shape, the total measurement time can be shortened, and the eight taps can achieve both a wide light receiving area PD and high-speed charge transfer. A type lateral electric field control type photoelectric conversion element can be provided.

Since the light receiving region PD can be increased in this way, the sensitivity can be increased and the fluorescence lifetime can be measured with high accuracy. Moreover, if the increased sensitivity is used to reduce the number of integrations, the measurement time can be shortened even in the case of the same fluorescence emission as in the past. In addition, the time resolution of the fluorescence lifetime can be improved by faster charge transfer. Therefore, the fluorescence lifetime can be measured at higher speed and with higher accuracy. That is, when the photoelectric conversion element according to the first embodiment is applied to the TOF distance sensor, the length of the charge transfer channel can be made longer than that of the CMOS type TOF distance image sensor using the conventional embedded photodiode. Therefore, the substantial aperture ratio of the aperture is improved, and high sensitivity can be achieved.

Furthermore, in the structure in which the potential directly under the gate electrode is controlled in the vertical direction using the conventional MOS structure, there are noises and dark currents due to interface defects, interface states, etc. at the interface between the gate oxide film and the silicon surface. However, according to the photoelectric conversion element according to the first embodiment, since the electric current control by the electrostatic induction effect in the lateral direction is used, it is caused by the interface defect and the interface state at the interface between the gate oxide film and the silicon surface. The problem of noise and dark current generation and the problem of slow transportation speed can be avoided.

Further, according to the photoelectric conversion element according to the first embodiment, the first charge storage regions SD1 and the second are located at the ends of seven of the eight charge transfer channels extending radially from the center position of the light receiving region PD. The signal charges are sequentially distributed and transported at high speed to the charge storage region SD2, the third charge storage region SD3, ..., and the seventh charge storage region SD7, and the end of the remaining one of the eight charge transport paths. Since it is possible to discharge the background light charge depending on the background light to the charge discharge region located in, it is not limited to the TOF distance sensor, but it can be applied to the observation of physical phenomena in which the same phenomenon is repeated in a very short time. Can be done. For example, if the photoelectric conversion element according to the first embodiment is applied as an element for measuring the life of a fluorescent substance, the electric field is made substantially constant over a long distance of the charge transfer channel, and the signal charge is transported at high speed. Therefore, more accurate measurement can be realized.

-Solid image sensor-
The photoelectric conversion element according to the first embodiment is applicable to a pixel X _ij of the solid-state imaging device (light time of flight range image sensor), by applying to the pixel X _ij of the solid-state imaging device, for each pixel X _ij Internally, high-speed signal charge transfer is possible. FIG. 8 is a configuration example of a solid-state image pickup device in which the photoelectric conversion element according to the first embodiment is a pixel X _ij and a _{plurality of the pixels X ij} are arranged in a matrix.

Inside the 7-output photoelectric conversion element, the first electric field control pulse g1, the second electric field control pulse g2, and the third are output from the lateral electric charge control type (LEF) charge modulation driver 24 by using the embedded photodiode structure. The first electric charge control electrodes G1, the second electric charge control electrodes G2, and the second electric charge control voltages generated by the shaping circuit from the electric charge control pulses g3, ... 3 By sequentially applying to the electric field control electrodes G3, ..., 8th electric field control electrode G8, the depletion potentials of the charge transport path and the eight charge transfer channels are sequentially changed by the electrostatic induction effect due to the lateral electric charge. Then, the signal charges are transported at high speed in the selected charge transfer channel, and sequentially, the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., The seventh charge storage region. It can be accumulated in SD7 and the background light charge can be discharged to the eighth charge storage region SD8 forming the charge discharge region.

As shown in FIG. 9, the first charge read area FD1, the second charge read area FD2, the third charge read area FD3, ..., And the seventh charge read area FD7, which are the output terminals of the 7-output photoelectric conversion element, are pixels. It _{is connected to the gate of the source follower amplifier in the pixel of X ij} , and the signal is read out to the peripheral read circuit by the active pixel type circuit.

As shown in FIG. 9, the nodes of the first charge read area FD1, the second charge read area FD2, the third charge read area FD3, ..., And the seventh charge read area FD7 of the 7-output photoelectric conversion element are The first reset transistor RT1, the second reset transistor RT2, the third reset transistor RT3, ..., The seventh reset transistor RT7 are also connected, and after reading, the first charge read area FD1 and the second charge of the 7-output photoelectric conversion element. Read area FD2, 3rd charge read area FD3, ..., 7th charge read area FD7 resets the charge. This operation is also used for noise cancellation.

To show an example of the case where the solid-state image sensor according to the first embodiment of the present invention is configured as an optical flight time-distance image sensor, as shown in FIG. 8, a pixel array unit and a peripheral circuit unit (21, 22, 23, 24) are shown. ) Can be arranged on the same semiconductor chip and shown as an integrated structure. _{Pixel array unit For example, the pixel X ij} (i = 1 to n; j = 1 to m: n, m are integers, respectively) shown in FIG. 9 can be defined as a rectangular area. Many can be arranged in a two-dimensional matrix. On the lower side of the pixel array section, the pixel rows X _11, X _12, ... X _1m ; X _21, X _22, ... X _2m ; ... X _n1, X _n2, ... ... A column parallel folding integral / cyclic A / D converter 22 and a horizontal shift register 21 connected to the column parallel folding integral / cyclic A / D converter 22 are provided along the _{X nm direction.} On the left side of the pixel array section, the pixel sequences X ₁₁ , X _21, ……, X _n1 ; X ₁₂ , X _22, ……, X _n2 ; ……; X _1m , X shown in the vertical direction in FIG. A vertical shift register 23 is provided along the _{2 m,} ..., X _{nm direction.} A timing generation circuit (not shown) is connected to the vertical shift register 23 and the horizontal shift register 21. In the solid-state image sensor according to the first embodiment, a signal is read out to a column parallel folding integral / cyclic A / D converter 22 provided at the lower side of the pixel array portion to perform A / D conversion, and further noise cancellation is performed. .. As a result, the signal level due to the optical charge is extracted, and a signal in which fixed pattern noise and a part of temporal random noise (reset noise) are canceled is obtained.

As described above, in the solid-state image pickup device according to the first embodiment, the photoelectric conversion element according to the first embodiment is used as the _{pixel X ij.} Then, as compared with the case where the unit pixel of the method of controlling the potential directly under the gate electrode in the vertical direction (direction perpendicular to the surface of the semiconductor substrate) using the conventional MOS structure is used, the solid-state imaging device according to the first embodiment is used. Since each pixel X _ij uses electric field control by the electrostatic induction effect in the lateral direction (direction parallel to the surface of the semiconductor substrate and orthogonal to the charge transfer direction), the 7-output photoelectric conversion element constituting _{each pixel X ij} Within each of the above, the electric field can be made almost constant over a long distance along the charge transport path. _{Therefore, by operating the 7-output photoelectric conversion element in the pixel X ij} with the timing chart illustrated in FIG. 3 (b), the total measurement time can be shortened and the signal charge can be transferred at high speed.

Further, in the structure using the unit pixel of the method of controlling the potential directly under the gate electrode in the vertical direction by using the conventional MOS structure, it is caused by the interface defect and the interface state at the interface between the gate oxide film and the silicon surface. Although there was noise and dark current, according to the solid-state imaging device according to the first embodiment, each of _{the seven output photoelectric conversion elements constituting each pixel X ij} uses electric field control by a lateral electrostatic induction effect. Therefore, inside the 7-output photoelectric conversion element that constitutes each pixel X _ij , there is a problem of noise and dark current generation due to interface defects and interface states at the interface between the gate oxide film and the silicon surface, and the transfer speed. It is possible to realize a solid-state imaging device with low noise, high resolution, and fast response speed by avoiding the problem of deterioration.

Further, according to the solid-state imaging device according to the first embodiment, seven ends of eight charge transfer channels extending radially from the center position of the light receiving region PD of the seven-output photoelectric conversion element constituting _{each pixel X ij.} Signal charges can be sequentially and rapidly transferred to the first charge storage area SD1, the second charge storage area SD2, the third charge storage area SD3, ..., and the seventh charge storage area SD7 located in the unit. Therefore, it is not limited to the two-dimensional TOF distance sensor, and it can be applied to the observation of a physical phenomenon in which the same phenomenon is repeated in an extremely short time, and a two-dimensional image can be captured with a short total measurement time. In particular, if the solid-state image sensor according to the first embodiment is applied as an element for measuring the life of a fluorescent substance, the electric field is made substantially constant over a long distance in the charge transfer direction, and the signal charge is transferred at high speed. Therefore, it is possible to capture a highly accurate two-dimensional image by shortening the measurement time of the life of the fluorescent substance.

(First modification of the first embodiment)
Unlike the photoelectric conversion element according to the first modification of the first embodiment of the present invention shown in FIGS. 10 and 11, it is not necessary to provide the potential hill setting portion 7 composed ^{of the p + region inside the light receiving region PD.} , The photoelectric conversion element according to the present invention can be realized. Also in the photoelectric conversion element according to the first modification of the first embodiment, four pairs of control electrodes are formed along the central axis of the desired charge transfer channel, as in the case of the photoelectric conversion element shown in FIG. Then, each control electrode pair can be operated by periodically applying a gate signal having four output levels. Similar to the photoelectric conversion element shown in FIGS. 1 to 9, the photoelectric conversion element according to the first modification of the first embodiment can achieve both a wide light receiving region PD and high-speed transfer at the same time.

However, in the case of the first modification, as illustrated in the case of charge transfer to the seventh charge storage region SD7 in FIG. 12, in the transition portion from the seventh charge transfer channel R7 to the seventh charge storage region SD7, A slightly flat potential region may be formed. Therefore, as shown in the potential diagram of FIG. 6, the photoelectric conversion element shown in FIG. 1 is more advantageous because a flat potential region is not formed between the charge transport path for moving electrons and the charge storage region.

(Second variant of the first embodiment)
In the case of the photoelectric conversion element shown in FIG. 1, four pairs of control electrodes were formed by eight electric field control electrodes to control the movement of electrons to eight charge transfer channels. However, as in the photoelectric conversion element according to the second modification of the first embodiment of the present invention shown in FIG. 13, a number of electric field control electrodes larger than the number of charge transfer channels is provided to control the movement of electrons. May be good.

FIG. 13 illustrates a case where eight pairs of control electrodes are formed by 16 electric field control electrodes G1a, G2a, G3a, ..., G8a; G1b, G2b, G3b, ..., G8b. A first charge transfer channel R1 is defined between the electric field control electrode G8a and the electric field control electrode G1b. Further, a second charge transfer channel R2 is defined between the electric field control electrode G1a and the electric field control electrode G2b, and a third charge transfer channel R3 is defined between the electric field control electrode G2a and the electric field control electrode G3b. A fourth charge transfer channel R4 is defined between the electric field control electrodes G4b. Then, the fifth charge transfer channel R5 is located between the electric field control electrode G4a and the electric field control electrode G5b, the sixth charge transfer channel R6 is located between the electric field control electrode G5a and the electric field control electrode G6b, and the electric charge control electrode G6a and the electric field control electrode are connected. A seventh charge transfer channel R4 is defined between G7b, and an eighth charge transfer channel R8 is defined between the electric field control electrode G7a and the electric field control electrode G8b. In the case of the photoelectric conversion element according to the second modification of the first embodiment, eight pairs of control electrodes are formed along the central axis of the desired charge transfer channel, as in the case of the photoelectric conversion element shown in FIG. Then, the adjacent electric field control electrodes distributed in the eight pairs of control electrodes are set to the same potential, and the gate signal of the output level of four stages is shown for each control electrode pair in the timing chart illustrated in FIG. 3 (b). According to the above, by periodically applying the voltage, the photoelectric conversion elements shown in FIGS. 1 to 9 can be operated in the same manner, and the total measurement time can be shortened. Furthermore, 8 independent control electrode pairs are selected for each of the 16 electric field control electrodes G1a, G2a, G3a, ..., G8a; G1b, G2b, G3b, ..., G8b, and the output level is 8 steps. By periodically applying the gate signal of the above to the timing chart illustrated in FIG. 3 (b), the potential distribution of the charge transport path formed in the peripheral portion of the light receiving region PD becomes smoother. The transport of signal charges in the light receiving region PD can be speeded up. Therefore, by using a gate signal with eight output levels, the total measurement time is shorter than that of the photoelectric conversion elements shown in FIGS. 1 to 9, and a wider light receiving area PD and higher speed transfer can be achieved. realizable.

(Third variant of the first embodiment)
As in the third modification of the first embodiment of the present invention shown in FIG. 14, in the upper part of the surface embedded region 3, the first charge storage region SD1, the second charge storage region SD2, and the third charge storage region SD3 , ..., If the charge discharge region (drain region) D0 is provided at a position separated from the eighth charge storage region SD8, the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ... ..., an 8-output photoelectric conversion element using all of the 8th charge storage region SD8 can be realized.

As shown in FIG. 15, the charge discharge region D0 is an n-type semiconductor region having a high impurity density provided in the center of the upper part of the surface embedding region 3 slightly separated from the surface embedding region 3. The charge discharge electrode TD0 is an electrode having an insulating gate structure provided in a ring shape with a planar pattern on the upper portion of the insulating film 9 between the charge discharge region D0 and the surface embedded region 3 so as to surround the charge discharge region D0. be.

As shown in FIG. 16, during the storage period, the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., And the eighth charge storage region SD8 are shown in FIG. 3 (b). As in the case shown in the above, signals of four output levels are sequentially given. After the period in which the fourth potential level V (2.3 V) is applied to the seventh charge storage region SD7 and the eighth charge storage region SD8, the fourth potential is applied to the eighth charge storage region SD8 and the first charge storage region SD1. The charge discharge electrode TD0 is turned on during the drain period before the arrival of the period in which the level V (2.3 V) is applied.

FIG. 17 illustrates the potential in the case of charge transfer to the seventh charge storage region SD7. That is, when the charge discharge electrode TD0 is in the off state, as shown in FIG. 17A, the gate of the 7th charge transfer channel R7 opens and the charge moves to the 7th charge storage region SD7. On the other hand, the gates of other charge transfer channels such as the fifth charge transfer channel R5 and the first charge transfer channel R1 exemplified in FIG. 17B are closed, and the transfer of charge to each charge storage region is It is inhibited and the charge is urged to move to the seventh charge storage region SD7.

On the other hand, FIG. 18 illustrates the potential distribution when the background light charge is discharged, that is, when the charge discharge electrode TD0 is on. As shown in FIGS. 18A and 18B, all the charges of the first charge transfer channel R1, the second charge transfer channel R2, the third charge transfer channel R3, ..., And the eighth charge transfer channel R8. The gate of the transfer channel is closed, the transfer of charge to each charge storage region is hindered, and the charge moves only to the charge discharge region D0.

FIG. 19 illustrates the internal structure of a solid-state image pickup device using a photoelectric conversion element according to a third modification of the first embodiment. The difference from the case of the solid-state imaging device shown in FIG. 4 is that the signals from the charge modulation driver 24 to the eighth electric field control electrode G8 and the charge discharge electrode TD0 are separately input, and that the photoelectric conversion element is used. The number of output terminals is increased by one due to the eighth charge storage region SD8.

The eighth charge storage region SD8 includes a first charge storage region SD1, a second charge storage region SD2, a third charge storage region SD3, ... A switching transistor and an eighth reset transistor are connected to each other to realize an eight-output photoelectric conversion element. Similar to the photoelectric conversion elements shown in FIGS. 1 to 9, the photoelectric conversion element according to the third modification of the first embodiment also has a short total measurement time and can achieve both a wide light receiving region PD and high-speed transfer. Can produce the effect.

(Fourth modification of the first embodiment)
Eight gates outside each electric field control electrode between adjacent charge transfer channels at the top of the surface-embedded region 3, as in the fourth variant of the first embodiment of the invention shown in FIG. An 8-output photoelectric conversion element can be realized even if the lower charge discharge regions GD1, GD2, GD3, ..., GD8 are provided. The charge discharge region under the gate GD1, GD2, GD3, ..., GD8 is a charge discharge region for discharging the charge leaked under the gate when the charge is transferred to the charge transfer channel. FIG. 21 shows the results of a simulation performed using the layout structure of the 8-output photoelectric conversion element shown in FIG.

In FIG. 21, in the case of charge transfer to the seventh charge storage region SD7, the charge transport path of electrons moving around the potential hill setting unit 7 from the upper side and the lower side, respectively, is illustrated by a thick broken line. Has been done. From the isobaric line of potential shown in FIG. 21, the potential change of the potential valley, which is the charge transport path for electrons set around the potential hill setting unit 7, is smooth and efficient, and goes to the 7th charge storage region SD7. It can be seen that the charge can be transferred. Similar to the photoelectric conversion element shown in FIGS. 1 to 9, the photoelectric conversion element according to the fourth modification of the first embodiment also smoothes the potential change of the potential valley, and the total measurement time is short and wide. It is possible to achieve the effect that both the light receiving area PD and high-speed transfer can be achieved.

<Second Embodiment>
(Structure of photoelectric conversion element)
As shown in the plan view of FIG. 22 and the cross-sectional views of FIGS. 23 and 24, the photoelectric conversion element according to the second embodiment of the present invention is embedded in the upper part of the p-type element forming layer 2 and the element forming layer 2. The n-type surface embedding region 3 and the n-type guide region 13 having a higher impurity density than the donut-shaped surface embedding region 3 in a planar pattern provided around the surface embedding region 3 and the surface. An imaging region (2,3,5,7) including a p-type pinning layer 5 provided in contact with the surface of the embedded region 3 and an imaging region (2,3,5,7). N-type with a higher impurity density than the element forming layer 2 provided so as to surround the insulating film 9 and the light receiving region PD defined in the central portion of the imaging region (2, 3, 5, 7). The first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., And the eighth charge storage region SD8 are provided. The first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., The eighth charge storage region SD8 are arranged at eight positions symmetrical with respect to the center position of the light receiving region PD. .. Then, at a position surrounding the light receiving region PD, the first charge storage region SD1, the second charge storage region SD2, the third charge storage region SD3, ..., The eighth charge storage from the center position of the light receiving region PD on the insulating film 9. The first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., The eighth electric field control are paired on both sides of each of the eight charge transfer channels leading to each of the regions SD8. The electrode G8 is arranged.

The photoelectric conversion element according to the second embodiment does not have the potential hill setting unit 7 like the photoelectric conversion element according to the first embodiment, but instead has a donut-shaped (ring-shaped) guide region 13 as a light receiving region PD. Prepare for the surrounding area. That is, the light receiving region PD of the photoelectric conversion element according to the second embodiment includes an inner regular octagonal surface embedded region 3 and an outer donut-shaped (ring-shaped) guide region 13, so that the impurity density has two stages. It is different from the photoelectric conversion element according to the first embodiment in that it changes to. Since the other structures of the photoelectric conversion element according to the second embodiment are equivalent to the members having the same name in the first embodiment, duplicate description will be omitted.

In FIG. 25, when the first potential level L = −1.0V, the second potential level M = 0.0V, the third potential level H = 1.5V, and the fourth potential level V = 2.3V, The potential at the time of charge transfer to the seventh charge storage region SD7 is exemplified. As shown in FIG. 25 (a), the gate of the seventh charge transfer channel R7 is opened, and the charge is transferred to the seventh charge storage region SD7. The transfer time at this time was 0.26 ns. Further, as shown in FIG. 25 (b), a barrier that hinders the transfer of electrons is formed at the position of the eighth charge transfer channel R8. In the broken line circle with J, the part slightly protruding upward is shown as a barrier. Further, in FIG. 25 (c), the potential under the fourth electric field control electrode G4 and the eighth electric field control electrode G8 is exemplified.

According to the photoelectric conversion element according to the second embodiment, the potential directly under the gate electrode is controlled in the vertical direction (vertical direction) by using the conventional MOS structure, and the potential is in the horizontal direction (perpendicular to the charge transfer channel). Since the electric field control by the electrostatic induction effect of is used, the electric field is made almost constant over a long distance of the charge transfer channel, and the signal charge is transported at high speed while maintaining the symmetry. Further, according to the photoelectric conversion element according to the second embodiment, a light receiving region PD having a substantially octagonal shape in a plane pattern is provided, and eight charge transfer channels whose central axes extend radially from the center of the light receiving region PD are provided. It is formed. Since all of the eight charge transfer channels have the same shape and are symmetrically formed, the total measurement time can be shortened and a wide range of light reception can be received, as in the case of the photoelectric conversion element according to the first embodiment. It is possible to provide an 8-tap type lateral electric field control type photoelectric conversion element capable of achieving both region PD and high-speed charge transfer. Other effects of the photoelectric conversion element according to the second embodiment are the same as those of the photoelectric conversion element according to the first embodiment. Further, as in the case of the photoelectric conversion element according to the first embodiment, the solid-state image pickup device can be realized by using the photoelectric conversion element according to the second embodiment.

(First modification of the second embodiment)
In the photoelectric conversion element according to the first modification of the second embodiment, as shown in FIG. 26, the light receiving region PD has a surface embedded region 3 inside and a donut-shaped guide region 13 outside the surface embedded region 3. The first electric field control electrode G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., The subgate charge discharge region GD1, GD2, GD3, ... ..., It is a configuration including GD8. That is, the photoelectric conversion element according to the first modification of the second embodiment has the structure of the photoelectric conversion element having the guide region 13 having the n-type high impurity density shown in FIG. 22, and the first electric field control shown in FIG. 20. A structure having eight subgate charge discharge regions GD1, GD2, GD3, ..., GD8 outside the electrodes G1, the second electric field control electrode G2, the third electric field control electrode G3, ..., and the eighth electric field control electrode G8. Corresponds to the configuration that combines. Under-gate charge discharge regions GD1, GD2, GD3, ..., GD8 have eight radial charge transfer channels, similar to the planar layout shown in FIG. 20, in the longitudinal direction of the adjacent charge transfer channels. It is provided at the position where it is sandwiched. FIG. 27 shows the equipotential lines of the entire XY plane when a simulation of transferring electrons to the seventh charge storage region SD7 is performed using the layout structure of the 8-output photoelectric conversion element.

In FIG. 27, the locus of the signal charge generated by the photoelectric conversion at the position near the third charge transfer channel R3 in the light receiving region PD is transferred almost horizontally toward the seventh charge storage region SD7 in the right direction. , The locus of the signal charge generated at the position closer to the eighth charge transfer channel R8 is transferred diagonally downward in an arc shape toward the seventh charge storage region SD7. Further, FIG. 28 is an enlarged view of the region above the equipotential lines shown in FIG. 27. That is, also in FIG. 28, the left side is the potential distribution including the third charge storage region SD3 of the third charge transfer channel R3, and the right side is the potential distribution including the seventh charge storage region SD7 of the seventh charge transfer channel R7. Further, the upper side of the center of FIG. 28 is the potential distribution of the first charge transfer channel R1.

As shown in FIG. 28, the deepest potential is formed in the seventh charge storage region SD7. Further, FIG. 29 schematically shows the potential states around the fifth electric field control electrode G5, the sixth electric field control electrode G6, and the seventh electric field control electrode G7 arranged on the lower right side of FIGS. 26 and 27. As shown in the potential profile of the three-dimensional mesh structure of FIG. 29, the potential in the valley region between the sixth electric field control electrode G6 and the seventh electric field control electrode G7 defining the seventh charge transfer channel R7 is the highest in the whole. deep. Similar to the photoelectric conversion elements shown in FIGS. 22 to 25, the photoelectric conversion element according to the first modification of the second embodiment also has a short total measurement time, and can achieve both a wide light receiving region PD and high-speed transfer. Can produce the effect.

(Second variant of the second embodiment)
As a solid-state image pickup device using the photoelectric conversion element according to the second embodiment, as shown in FIG. 30, a microlens 17 that converges light from an object and causes it to enter the light receiving region PD on the upper side of the shielding plate 11. May be provided. By injecting light through the microlens 17, the aperture ratio can be improved, so that the sensitivity of the solid-state image sensor can be increased.

Similar to the photoelectric conversion elements shown in FIGS. 22 to 25, the photoelectric conversion element according to the second modification of the second embodiment also has a short total measurement time, and can achieve both a wide light receiving region PD and high-speed transfer. Can produce the effect. The microlens is not limited to the single-layer structure as illustrated in FIG. 30, and can be further miniaturized by combining it with a photoelectric conversion element having a composite structure of two or more stages.

(Third variant of the second embodiment)
FIGS. 1 to 30 illustrate an 8-tap lateral electric field control type photoelectric conversion element, but the present invention is not limited to this, and the present invention provides charge transfer channels separated from the light receiving region PD at five or more positions. Can be done. In FIG. 31, a surface-embedded region 3a having a substantially regular pentagon inside and a donut-shaped guide region 13a having a substantially regular pentagonal outer edge provided on the outside of the surface-embedded region 3a are provided in a planar pattern. Further, a 5-tap lateral electric field control type photoelectric conversion element according to a third modification of the second embodiment is exemplified.

Also in the photoelectric conversion element according to the third modification of the second embodiment, the first charge storage region SD1 and the second charge storage region SD2 are the same as in the case of the respective photoelectric conversion elements described with reference to FIGS. 1 to 30. A 4-output photoelectric conversion element can be realized by using one charge storage region of the third charge storage region SD3, ..., And the fifth charge storage region SD5 as the charge discharge region. Similar to the photoelectric conversion elements shown in FIGS. 22 to 25, the 4-output photoelectric conversion element according to the third modification of the second embodiment also has a short total measurement time, a wide light receiving area PD, and high-speed transfer. The effect of being compatible can be achieved.

(Fourth variant of the second embodiment)
In the photoelectric conversion element according to the fourth modification of the second embodiment shown in FIG. 32, 16 electric field control electrodes G1a, G2a, G3a, ... , G8a; G1b, G2b, G3b, ..., G8b. A first charge transfer channel R1 is defined between the electric field control electrode G8a and the electric field control electrode G1b. Further, a second charge transfer channel R2 is defined between the electric field control electrode G1a and the electric field control electrode G2b, and a third charge transfer channel R3 is defined between the electric field control electrode G2a and the electric field control electrode G3b. A fourth charge transfer channel R4 is defined between the electric field control electrodes G4b. Then, the fifth charge transfer channel R5 is located between the electric field control electrode G4a and the electric field control electrode G5b, the sixth charge transfer channel R6 is located between the electric field control electrode G5a and the electric field control electrode G6b, and the electric charge control electrode G6a and the electric field control electrode are connected. A seventh charge transfer channel R4 is defined between G7b, and an eighth charge transfer channel R8 is defined between the electric field control electrode G7a and the electric field control electrode G8b. In the photoelectric conversion element according to the fourth modification of the second embodiment, as shown in FIG. 32, a first charge discharge electrode is provided with a gap between the adjacent electric field control electrodes G1b and the electric field control electrode G1a. TD1 is arranged. Further, the second charge discharge electrode TD2 is arranged between the adjacent electric field control electrodes G2b and the electric field control electrode G2a with a gap between them, and the third charge discharge electrode is arranged between the adjacent electric field control electrodes G3b and the electric field control electrode G3a. The TD3 is arranged, and the fourth charge discharge electrode TD4 is arranged between the adjacent electric field control electrodes G4b and the electric field control electrode G4a. Then, the fifth charge discharge electrode TD5 is placed between the adjacent electric field control electrodes G5b and the electric field control electrode G5a, and the sixth charge discharge electrode TD6 is placed between the adjacent electric field control electrodes G6b and the electric field control electrode G6a. A seventh charge discharge electrode TD7 is arranged between the electrodes G7b and the electric field control electrode G7a, and an eighth charge discharge electrode TD8 is arranged between the adjacent electric field control electrodes G8b and the electric field control electrode G8a.

The first charge discharge region RD1 is arranged at the radial outer end of the first charge discharge electrode TD1 between the adjacent electric field control electrodes G1b and the electric field control electrode G1a in the radial extension direction. Further, the second charge discharge region RD2 is arranged at the radial outer end of the second charge discharge electrode TD2 between the adjacent electric field control electrodes G2b and the radial extension direction of the electric field control electrodes G2a, and the adjacent electric charge discharge regions G3b and the electric field are arranged. The third charge discharge region RD3 is arranged at the radial outer end of the third charge discharge electrode TD3 between the radial extension directions of the control electrode G3a, and is between the adjacent electric charge control electrodes G4b and the electric field control electrode G4a in the radial extension direction. The fourth charge discharge region RD4 is arranged at the radial outer end of the fourth charge discharge electrode TD4. Then, the fifth charge discharge region RD5 is located at the radial outer end of the fifth charge discharge electrode TD5 between the adjacent electric field control electrodes G5b and the electric field control electrode G5a in the radial extension direction, and the electric charge control electrode G6b and the adjacent electric charge discharge regions G6b are controlled by electric charges. The sixth charge discharge region RD6 is located at the radial outer end of the sixth charge discharge electrode TD6 between the radial extension directions of the electrodes G6a, and the seventh charge discharge region RD6 is located between the adjacent electric field control electrodes G7b and the electric field control electrode G7a in the radial extension direction. The seventh charge discharge region RD7 is located at the radial outer end of the charge discharge electrode TD7, and the seventh charge discharge region RD7 is located at the radial outer end of the eighth charge discharge electrode TD8 between the adjacent electric field control electrodes G8b and the radial extension direction of the electric charge discharge electrode G8a. The eighth charge discharge region RD8 is arranged.

By applying voltage to each of the 16 electric field control electrodes G1a, G2a, G3a, ..., G8a; G1b, G2b, G3b, ..., G8b, the eight charge transfer channels R1, R2, R3 ... , The opening and closing of the gate of R8 is controlled. That is, the photoelectric conversion element according to the fourth modification of the second embodiment has 16 electric field control electrodes G1a, as in the case of the photoelectric conversion element according to the second modification of the first embodiment illustrated in FIG. Since G2a, G3a, ..., G8a; G1b, G2b, G3b, ..., G8b are provided, eight pairs of control electrode pairs are selected, and charge transfer channels R1, R2, R3, ..., R8 are selected. The background light charge can be discharged at a desired timing by the eight charge discharge electrodes TD1, TD2, TD3, ..., TD8 that individually control the discharge of the background light charge. .. Similar to the photoelectric conversion elements shown in FIGS. 22 to 25, the photoelectric conversion element according to the fourth modification of the second embodiment also has a short total measurement time, and can achieve both a wide light receiving region PD and high-speed transfer. Can produce the effect.

(Other embodiments)
As mentioned above, the invention has been described by the first and second embodiments of the invention, but the statements and drawings that form part of this disclosure should not be understood as limiting the invention. This disclosure will reveal to those skilled in the art various alternative embodiments, examples and operational techniques.

In the description of the first and second embodiments of the present invention described above, the first conductive type is described as p type and the second conductive type is described as n type, but the first conductive type is referred to as n type and the second conductive type is referred to as n type. It can be easily understood that the same effect can be obtained by reversing the electrical polarity of the p-type.

In the description of the first and second embodiments, the signal charges to be processed such as transportation and storage are electrons, and in the potential diagram, the downward direction (depth direction) of the figure is the positive direction of the potential (potential). However, when the electrical polarity is reversed, the charged charge to be processed is holes, so the potential shape indicating the potential barrier, potential valley, potential well, etc. in the photoelectric conversion element is in the downward direction in the figure. (Depth direction) is expressed as the negative direction of the potential.

Further, the semiconductor material constituting the semiconductor region in which the charge transport path and the charge transfer channel of the present invention are defined is not limited to silicon (Si). In particular, in the case of a compound semiconductor, interface defects and interface levels at the interface between the surface of the compound semiconductor and the insulating film become problems, so the potential in the semiconductor is controlled by using the lateral electrostatic induction effect of the present invention. Since the method can avoid the influence of interface defects and interface states, even in photoelectric conversion elements and solid-state imaging devices using various compound semiconductors such as III-V group compound semiconductors and II-VI group compound semiconductors. The structures and technical ideas of the photoelectric conversion element and the solid-state image pickup apparatus exemplified in the first and second embodiments are important techniques.

As already described, in the photoelectric conversion element of FIGS. 1 to 31, a structure including auxiliary electrodes CA11, CA21, CA31, ..., CA81; CA12, CA22, CA32, ..., CA82 has been exemplified. However, it should be noted that these may not be the essential configurations of the present invention depending on the purpose of application of the photoelectric conversion element and the like. Further, the partial structures included in the photoelectric conversion elements shown in FIGS. 1 to 31 may be combined with each other. As described above, the present invention includes various embodiments not described above, and the technical scope of the present invention is defined only by the matters specifying the invention relating to the reasonable claims from the above description. It is a thing.

1 Semiconductor substrate 2 Element forming layer 3, 3a Surface embedded region 5 Pinning layer 7 Potential hill setting part 9 Insulation film 13, 13an ⁺ region 11 Shielding plate 15 Selection circuit 17 Microlens 21 Horizontal shift register 22 Column parallel folding integration / Circuit type A / D converter 23 Vertical shift register 24 Charge modulation driver CA11, CA21, CA31, ..., CA81 Auxiliary electrode CA12, CA22, CA32, ..., CA82 Auxiliary electrode TX11, TX21, TX31, ..., TX81 Transfer Electrodes TX12, TX22, TX32, ..., TX82 Transfer electrodes FD1 to FD8 1st charge read region to 8th charge read region G1 to G8 1st electric charge control electrode to 8th electric charge control electrode SD1 to SD8 1st charge storage region Eighth charge storage area (charge discharge area)
RT1 to RT8 1st reset transistor to 8th reset transistor SEL1 to SEL8 1st switching transistor to 8th switching transistor D0, RD1 to RD8 Charge discharge region TD0, TD1 to TD8 Charge discharge electrode X _ij pixel

Claims (14)

An imaging region including an embedded photodiode composed of a first conductive type element forming layer and a second conductive type surface embedded region embedded in the upper part of the element forming layer.
A plurality of second conductive type charge reading regions having a higher impurity density than the element forming layer, which are provided at five or more positions surrounding the light receiving region defined in the central portion of the imaging region and separated from each other.
A plurality of second conductive type charge transfer channels arranged radially so as to reach from the light receiving region to each of the plurality of charge reading regions by independent paths.
At a position surrounding the light receiving region, a pair of charge transfer channels are arranged on both sides of each of the plurality of charge transfer channels, and each of the paired electrodes is a common electrode for charge transfer channels adjacent to each other in the radial arrangement. With multiple electric field control electrodes that function as
By periodically and sequentially applying electric field control pulses having different phases to each of the plurality of electric field control electrodes, the depletion potentials of the surface-embedded region and the plurality of charge transfer channels are sequentially changed. , A photoelectric conversion element characterized in that the movement destination of a large number of carriers generated in the surface embedded region is controlled to be sequentially set in any one of the plurality of charge reading regions. An imaging region including an embedded photodiode composed of a first conductive type element forming layer and a second conductive type surface embedded region embedded in the upper part of the element forming layer.
A plurality of second conductive type charge reading regions having a higher impurity density than the element forming layer, which are provided at five or more positions surrounding the light receiving region defined in the central portion of the imaging region and separated from each other.
A plurality of second conductive type charge transfer channels extending from the light receiving region to each of the plurality of charge reading regions by independent paths.
A plurality of electric field control electrodes arranged in pairs on both sides of each of the plurality of charge transfer channels at a position surrounding the light receiving region.
Between the plurality of charge transfer channels and the charge read region, a plurality of second conductive type charge storage regions having a higher impurity density than the element forming layer and a lower impurity density than the charge read region. ,
A plurality of second conductive type charge read channels extending from the plurality of charge storage regions to the corresponding charge read regions.
A plurality of transfer electrodes arranged in each of the plurality of charge reading channels are provided, and electric field control pulses having different phases from each other are periodically and sequentially applied to the plurality of electric field control electrodes, and the surface-embedded region is formed. and by sequentially changing the depletion potential of said plurality of charge transfer channels, sequentially sets the destination of the multi-number of carriers generated in the surface buried region to one of said plurality of charge storage regions, wherein A photoelectric conversion element characterized in that charge transfer pulses for transferring a large number of carriers are simultaneously applied to a plurality of transfer electrodes from the plurality of charge storage regions to the corresponding charge read regions. The photoelectric conversion element according to claim 2, wherein the plurality of transfer electrodes are arranged in pairs on both sides of each of the plurality of charge reading channels to perform lateral electric field control. 2. The photoelectric conversion element according to the above. Each of the (n-1) charge storage regions among the plurality of charge storage regions accumulates a large number of carriers generated in the surface-embedded region as signal charges.
The photoelectric conversion element according to claim 4, wherein the remaining one charge reading region discharges the background light charge generated in the surface embedded region by the background light. A second conductive type charge discharge region having a higher impurity density than the element forming layer, which is arranged at a position surrounding the light receiving region and separated from each of the plurality of charge storage regions, is further provided.
The photoelectric conversion element according to claim 4, wherein each of the n charge storage regions stores a large number of carriers generated in the surface-embedded region as signal charges. The photoelectric conversion element according to any one of claims 1 to 6, further comprising a first conductive type potential hill setting portion surrounded by the surface embedded region in the center of the light receiving region. Claims 1 to 6 further include a second conductive type guide region in which the light receiving region is provided so as to surround the periphery of the surface embedded region and has a higher impurity density than the surface embedded region. The photoelectric conversion element according to any one of the above items. An imaging region including an embedded photodiode composed of a first conductive type element forming layer and a second conductive type surface embedded region embedded in the upper part of the element forming layer.
A plurality of second conductive type charge reading regions having a higher impurity density than the element forming layer, which are provided at five or more positions surrounding the light receiving region defined in the central portion of the imaging region and separated from each other.
A plurality of second conductive type charge transfer channels arranged radially so as to reach from the light receiving region to each of the plurality of charge reading regions by independent paths.
At a position surrounding the light receiving region, a pair of charge transfer channels are arranged on both sides of each of the plurality of charge transfer channels, and each of the paired electrodes is a common electrode for charge transfer channels adjacent to each other in the radial arrangement. With multiple electric field control electrodes that function as
A plurality of pixels comprising are arranged on the same semiconductor chip,
In each of the pixels, electric field control pulses having different phases are periodically and sequentially applied to the plurality of electric field control electrodes, and the depletion potentials of the surface-embedded region and the plurality of charge transfer channels are sequentially changed. A solid-state imaging device characterized by controlling the movement destinations of a large number of carriers generated in the surface-embedded region so as to be sequentially set in any of the plurality of charge reading regions. An imaging region including an embedded photodiode composed of a first conductive type element forming layer and a second conductive type surface embedded region embedded in the upper part of the element forming layer.
A plurality of second conductive type charge reading regions having a higher impurity density than the element forming layer, which are provided at five or more positions surrounding the light receiving region defined in the central portion of the imaging region and separated from each other.
A plurality of second conductive type charge transfer channels extending from the light receiving region to each of the plurality of charge reading regions by independent paths.
A plurality of electric field control electrodes arranged in pairs on both sides of each of the plurality of charge transfer channels at a position surrounding the light receiving region.
Between the plurality of charge transfer channels and the charge read region, a plurality of second conductive type charge storage regions having a higher impurity density than the element forming layer and a lower impurity density than the charge read region. ,
A plurality of second conductive type charge read channels extending from the plurality of charge storage regions to the corresponding charge read regions.
A plurality of pixels having a plurality of transfer electrodes arranged in each of the plurality of charge reading channels are arranged on the same semiconductor chip.
In each of the pixels, electric field control pulses having different phases are periodically and sequentially applied to the plurality of electric field control electrodes, and the depletion potentials of the surface-embedded region and the plurality of charge transfer channels are sequentially changed. By letting
Sequentially sets the destination of the multi-number of carriers generated in the surface buried region to one of said plurality of charge storage regions, wherein for multiple transfer electrodes, corresponding from said plurality of charge storage regions A solid-state image sensor, characterized in that charge transfer pulses for transferring a large number of carriers are simultaneously applied to the charge read region. In each of the pixels
The solid-state image pickup device according to claim 10, wherein the plurality of transfer electrodes are arranged in pairs on both sides of each of the plurality of charge reading channels to perform lateral electric field control. When the number of the five or more charge storage regions constituting the pixel is n, the arrangement topology of the plurality of charge storage regions is characterized by n rotational symmetry with respect to the center position of the light receiving region. The solid-state imaging device according to claim 10 or 11. In each of the pixels
Each of the (n-1) charge storage regions among the plurality of charge storage regions accumulates a large number of carriers generated in the surface-embedded region as signal charges.
The solid-state image sensor according to claim 12, wherein the remaining one charge storage region discharges the background light charge generated in the surface-embedded region by the background light. In each of the pixels
A second conductive type charge discharge region having a higher impurity density than the element forming layer, which is arranged at a position surrounding the light receiving region and separated from each of the plurality of charge storage regions, is further provided.
The solid-state image sensor according to claim 12, wherein each of the n charge storage regions stores a large number of carriers generated in the surface-embedded region as signal charges.

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