JP6965714B2 - Gate drive circuit - Google Patents

Description

The present invention relates to a gate drive circuit of a semiconductor element for a pulse power supply and its structure.

As a pulse width modulation type pulse power supply with high speed and high voltage output, a circuit method using PFL (pulse forming line), PFN (pulse forming circuit), or bloom line can be considered. In particular, a method of directly supplying power to the load with a switch or the like is used as a method in which a short pulse width output of up to several hundred nsec is required and the pulse width can be easily modulated with a short rise / fall time of several tens of nsec. It is valid.

Japanese Unexamined Patent Publication No. 2013-9216 JP-A-2010-193649

An IGBT (Insulated Gate Bipolar Transistor) type semiconductor switch may be applied as a pulse power switch (Patent Documents 1 and 2). Since this switch operating in several tens of kV class and several tens of nsec is not a single unit, it is common to use a plurality of discrete semiconductor elements connected in series to the power supply.

When a plurality of drive voltages are output from a gate drive circuit using a discrete type semiconductor element, if the element is driven directly by a pulse transformer and a voltage adjustment circuit, an equivalent circuit is caused by the winding structure of the pulse transformer. Inductance and capacitance may differ. Therefore, the rise time of the gate changes, which affects the voltage sharing. Then, depending on this situation, an overvoltage may be applied to one element, and it is assumed that the element may be damaged.

In view of the above circumstances, the present invention aims to shorten the gate rise time by further reducing the leakage inductance while reducing the coupling capacitance between windings in a pulse width modulation type pulse power supply with high speed and high voltage output. That is the issue.

Therefore, one aspect of the present invention is a pulse transformer type gate drive circuit in a pulse power supply, which is a substrate of the gate drive circuit mounted on the pulse power supply and a primary side electric wire of the pulse transformer mounted on the substrate. It is provided with a core through which the wire is inserted and a secondary side electric wire of the pulse transformer which is mounted on the substrate and wound around the core in a state where the strands are loosened into a plurality of bundles.

One aspect of the present invention is a pulse transformer type gate drive circuit in a pulse power supply, in which a substrate of the gate drive circuit mounted on the pulse power supply and a primary side electric wire of the pulse transformer are inserted while being mounted on the substrate. The core is mounted on the substrate, and the secondary side electric wire of the pulse transformer is wound around the core in a state where the wire is formed in a plurality of turns.

In one aspect of the present invention, in the gate drive circuit, the primary side electric wire is covered with a bellows-shaped insulating tube.

In one aspect of the present invention, in the gate drive circuit, a plurality of the substrates are mounted in series with the pulse power supply.

According to the above invention, in the pulse power supply, the leakage inductance can be further reduced while reducing the coupling capacitance between the windings, and the gate rise time can be shortened.

(A) A front view of a mode example of a winding of a gate drive circuit according to the first embodiment of the present invention, (b) a side view of the mode example, and (c) an enlarged front view of the mode example. (A) A front view of a mode example of a winding of a gate drive circuit according to the second embodiment of the present invention, (b) a side view of the mode example, and (c) an enlarged front view of the mode example. (A) A front view of a mode example of a winding of a gate drive circuit according to the third embodiment of the present invention, (b) a side view of the mode example, and (c) an enlarged front view of the mode example. (A) A front view of a mode example of a winding of a gate drive circuit according to the fourth embodiment of the present invention, (b) a side view of the mode example, and (c) an enlarged front view of the mode example. An example of a pulse width modulation type pulse power supply circuit. The timing chart of the switches SW1 and SW2 of the pulse power supply circuit of FIG. An example of a pulse transformer in which a plurality of gate drive circuits are mounted in series. An example of the mode of the gate drive circuit of FIG. Equivalent circuit of pulse transformer. An example of the mode of the secondary side electric wire wound around the core of the pulse transformer.

An embodiment of the present invention will be described below with reference to the drawings.

[Embodiment 1]
In the description of the embodiment of the present invention, the configuration of the power supply circuit which is the premise of the present invention will be described.

In the pulse width modulation type pulse power supply circuit 5 shown in FIG. 5, a capacitor C is inserted when power is supplied from the outside by a DC power supply or the like and a voltage drop is considered due to the responsiveness of the DC power supply. The resistors R1 and R2 are inserted to prevent ringing caused by L (drifting inductance) between the power supply and the load and the load.

In the pulse power supply circuit 5, when the influence of ringing can be ignored, or when an overvoltage is generated due to ringing and the element is not damaged, it is not necessary to mount the resistors R1 and R2. If the load is a resistive load, the resistor R2 and switch SW2 are unnecessary, but if energy remains on the load load side such as a capacitive load and you want to lower the voltage, the resistor R2 and switch SW2 are required. Become.

An operation example of the switches SW1 and SW2 of the pulse power supply circuit 5 will be described with reference to the timing chart of FIG.

When it is desired to supply energy to the load load and raise the voltage on the load load side, the switch SW1 is turned on and the switch SW2 is turned off. After that, when it is desired to lower the voltage on the load load side, the switch SW1 is turned off, the switch SW2 is turned on, and the voltage is lowered.

When the pulse power supply circuit 5 is mainly used for plasma generation, a discrete type semiconductor element is applied as a switch used for SW1 and SW2. When the gate drive circuit 1 to which this semiconductor element is applied is connected in series as in the drive circuit 7 illustrated in FIG. 7 and operated as a switch, there are various methods, but each SW is directly simultaneously connected by a pulse transformer. There is a method to turn it on.

When driving a semiconductor element such as a SiC element, a positive voltage is applied between the gate Q and the source S of the semiconductor element. In order to obtain a high-speed high-voltage pulse output, it is necessary to shorten the on-time of the semiconductor element, and one of the methods is to shorten the rise time of the gate.

FIG. 8 shows a circuit configuration example of the pulse transformer type gate drive circuit 8 which is a specific embodiment of the gate drive circuit 1. A current is passed through the transformer primary side 1T, and the gate voltage is raised by the current i flowing through the transformer secondary side 5T. The rise of the current i depends on the leakage inductance and the coupling capacitance generated in the pulse transformer PT1, and is almost determined by the configuration and structure of the transformer. The equivalent circuit of the pulse transformer is shown in FIG. 9, and the relationship between the leakage inductance, the coupling capacitance and the gate rise time is shown in the following equation (1).

Tr ＝ k ・ √ (Cw ・ Ll)… (1)
In the formula (1), Tr: rise time, k: constant, Cw: coupling capacitance, Ll: leakage inductance (primary side / secondary side combined value).

Further, if the configuration and structure of the transformer vary, the gate rise time of each stage in the drive circuit 7 of FIG. 7 is affected, and in some cases, the voltage sharing is broken.

Therefore, the transformer structure of the gate drive circuit 1 in the pulse power supply of the first embodiment shown in FIG. 1 reduces the coupling capacitance Cw of the equation (1) and further reduces the leakage inductance Ll to reduce the gate rise time Tr. Try to shorten.

That is, the gate drive circuit 1 includes a substrate 10, a secondary side electric wire 12, and a core 13 of the gate drive circuit 1 mounted in series on a pulse power supply.

While the core 13 is mounted on the substrate 10, the primary side electric wire 11 of the pulse transformer (PT1 in the example of FIG. 8) is inserted.

The secondary side electric wire 12 is mounted on the substrate 10 while being wound around the core 13 in a state where the strands are loosened into a plurality of bundles. Specifically, as illustrated in FIG. 10, each wire is wound around the core 13 of the substrate 10 of the gate drive circuit 1 in a state where the insulated litz wire is loosened. The leakage flux of the core 13 is reduced.

In the embodiment illustrated in FIG. 1, ten boards 10 of the gate drive circuit 1 are connected in series, and the primary side electric wire on the transformer primary side is inserted into the hole 101 of the board 10 of the core 13 on the board 10. It is located in the center. The winding mode is assumed to be primary side: 1 turn, secondary side: 3 turns (the number of paras is the number of strands of litz wire).

In the pulse power supply circuit 5 that generates high speed and high voltage, the switch used for SW1 and SW2 needs to be a high speed and high withstand voltage switch. As a switch used for SW1 and SW2, a discrete type semiconductor device is generally connected in series and used.

Then, when the switches are connected in series and operated, there is a method of controlling the switch SW by using a pulse transformer in the gate drive circuit. In order to operate the switch SW at high speed, it is necessary to make the rise time of the gate drive circuit faster.

According to the embodiment of the first embodiment described above, the leakage flux of the core 13 is reduced and the leakage inductance is further reduced by using the embodiment of FIG. 1 described above. Further, depending on the part of the gate drive circuit 1 connected in series, a high voltage is applied between the primary and secondary, but the space distance between the primary and secondary is secured, so that dielectric breakdown can be prevented and the coupling capacitance can be reduced. It will be effective. Therefore, according to this aspect, the values of both the leakage inductance Ll and the coupling capacitance Cw of the equation (1) are reduced, and the gate rise time Tr is effectively shortened.

[Embodiment 2]
Similar to the first embodiment, the transformer structure of the gate drive circuit 1 of the present embodiment shown in FIG. 2 is a litz wire in which the secondary wire 12 on the secondary side of the transformer is insulated from each other. By winding around the core 13 on the substrate 10 in a loosened state, the leakage flux from the core 13 is reduced.

In particular, in this embodiment, when the amount of current on the primary side is large and the wire of the primary side electric wire 11 becomes thick or the inner diameter of the core becomes small, in order to secure an insulation distance, the primary side in the embodiment 1 The wire of the electric wire 11 is covered with a bellows-shaped insulating tube 14. The winding mode illustrated in the figure assumes that the primary side: 1 turn and the secondary side: 3 turns (the number of paras is the number of strands of litz wire).

When the distance between the primary and secondary is short, there is a concern about dielectric breakdown when a high voltage is applied between the primary and secondary depending on the part of the series connection. On the other hand, in the embodiment of the second embodiment, the space distance between the primary and the secondary is secured by the concave-convex structure of the insulating tube 14 as compared with the embodiment of the first embodiment, so that even if a high voltage is applied. Dielectric breakdown can be prevented.

In this embodiment, the wire distance between the primary and secondary sides is short and the coupling capacitance is large, but the leakage inductance is reduced as in the first embodiment, so that the gate rise time is not affected.

[Embodiment 3]
The transformer structure of the gate drive circuit 1 of the third embodiment shown in FIG. 3 further reduces the variation in the gate voltage rise time of each stage at the time of series connection, and eliminates the difference between the leakage inductance and the coupling capacitance. Suppresses variation in the gate rise time of the stage.

The transformer structure of the third embodiment is the transformer structure of the first embodiment, except that the secondary wire 12 is wound around the core 13 in a state where the wire mounted on the substrate 10 is formed in a plurality of turns. It has the same aspect as. The secondary side electric wires 12 are mounted on a predetermined pattern of the substrate 10, and the intervals are secured so as not to cause contact conduction in consideration of withstand voltage.

Similar to the first embodiment, a plurality of boards 10 of the gate drive circuit 1 are connected in series, and the primary side electric wire 11 of the pulse transformer is inserted into the hole 101 of the board 10 and is the center of the core 13 on the board 10. It is located in. The winding mode is assumed to be primary side: 1 turn, secondary side: 2 turns (number of paras is 3).

By adopting the above-described third embodiment, the leakage inductance can be reduced. Further, even if a high voltage is applied between the primary and secondary, the spatial distance can be secured and dielectric breakdown can be prevented as in the second embodiment. Further, the coupling capacitance can be reduced by the distance, and the values of both L and C in the above formula (1) can be reduced, which is effective in shortening the gate rise time.

In the method of the first embodiment, the leakage inductance varies depending on the winding state, and when the series operation is performed, the gate rising voltage of each stage may vary. The winding position is fixed for both the side electric wire 11 and the secondary side electric wire 12. As a result, the variation can be reduced as compared with Example 1.

[Embodiment 4]
In the embodiment of the fourth embodiment shown in FIG. 4, as the secondary side electric wire 12 on the secondary side of the transformer, a wire formed by forming is used as in the third embodiment, and the substrate 10 is determined. It is mounted on the pattern of, and the interval is secured so that contact conduction does not occur in consideration of withstand voltage.

Further, when the amount of current on the primary side is large and the wire of the primary side electric wire 11 becomes thick or the inner diameter of the core 13 becomes small, in order to secure the insulation distance, in the embodiment of the third embodiment, the primary side electric wire 11 The wire is covered with the insulating tube 14. The winding mode illustrated in the figure assumes a primary side: 1 turn and a secondary side: 2 turns (the number of paras is 3).

When the distance between the primary side and the secondary side is short, there is a concern about dielectric breakdown when a high voltage is applied between the primary side and the secondary side depending on the part of the series connection. On the other hand, in the embodiment of the fourth embodiment, the space distance between the primary and the secondary is secured by the concave-convex structure of the insulating tube 14 as compared with the embodiment of the third embodiment, so that even if a high voltage is applied. Dielectric breakdown can be prevented.

Further, in the embodiment of the second embodiment, the leakage inductance varies depending on the winding state, and when the series operation is performed, the gate rising voltage of each stage may vary. However, the embodiment of the fourth embodiment is adopted. As a result, the winding positions of both the primary side electric wire 11 and the secondary side electric wire 12 are fixed. As a result, the variation can be reduced as compared with the embodiment of the second embodiment.

The present invention is not limited to the embodiments described above, and can be implemented in various embodiments within the scope of the claims of the present invention.

1 ... Gate drive circuit 10 ... Board, 101 ... Hole 11 ... Primary wire 12 ... Secondary wire 13 ... Core

Claims (2)

A gate drive circuit that supplies drive signals to the gates of semiconductor elements that make up a pulse power supply.
The board of the gate drive circuit mounted on the pulse power supply and
While mounted on this board, the core through which the primary side wire of the pulse transformer is inserted,
The secondary side electric wire of the pulse transformer, which is mounted on the substrate and wound around the core in a state where the strands are loosened into a plurality of strands,
A bellows-shaped insulating tube that covers the primary wire and
A gate drive circuit characterized by being equipped with. The gate drive circuit according to claim 1 , wherein the primary side electric wires of the respective pulse transformers of the plurality of substrates are connected in series.

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