JP6934821B2 - Pachinko machine - Google Patents

Description

The present invention relates to a gaming machine such as a pachislot machine.

Conventionally, it is detected that a plurality of reels in which a plurality of symbols are arranged on each surface, a game medal, a coin, etc. (hereinafter referred to as "game medium") are inserted, and the start lever is operated by the player. Detects that the start switch that requests the start of rotation of a plurality of reels and the stop button provided corresponding to each of the plurality of reels have been pressed by the player, and requests that the rotation of the corresponding reel be stopped. A stop switch that outputs a signal, a stepping motor that is provided corresponding to each of a plurality of reels and transmits each driving force to each reel, and a stepping motor based on the signals output by the start switch and the stop switch. It is equipped with a reel control device that controls the operation of each reel and rotates and stops each reel, and when it detects that the start lever has been operated, a lottery is performed based on a random number value, and the result of this lottery (hereinafter, "" There is known a so-called pachislot game machine that stops the rotation of the reel based on the "internal winning combination") and the timing at which it is detected that the stop button has been operated.

Patent Document 1 proposes a game machine of this type in which a decorative drive board controls a stepping motor by passing a drive current through the stepping motor based on serial drive data from a peripheral control board.

Japanese Unexamined Patent Publication No. 2017-131693

In such a conventional game machine, a stepping motor for driving a reel or a movable accessory is arranged in the housing of the game machine at a position away from the control board, and the drive board and the motor are connected by a harness. When the static electricity generated in the game machine flies to the harness, a surge voltage due to static electricity is generated at the output terminal of the driver circuit that outputs the drive current, and the surge voltage may flow back into the driver circuit and destroy the internal elements. be.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of protecting an internal element of a driver circuit from a surge voltage.

The gaming machine according to the present invention
Movable part (movable accessory 85) and
A drive unit (motor 142) for driving the movable unit and
A drive output unit (panel relay board 83) that outputs a drive current to drive the drive unit, and
A control unit (sub-control board 72) for outputting drive data for controlling the drive unit is provided.
The drive output unit
A driver circuit (driver IC 141) for driving and controlling the drive unit, and
To operate the driver circuit, the power supply line and ground line,
It has a plurality of first overvoltage prevention elements (Z31 to Z34) and a second overvoltage prevention element (Z35) having two terminals for preventing overvoltage.
The driver circuit
A plurality of output terminals (AOUT1, AOUT2, BOUT1, BOUT2) for outputting a drive current to the drive unit, and
A power supply terminal (VCC) connected to the power supply line and
A ground terminal (GND) connected to the ground line and
A reset terminal (RESET) for inputting a reset signal,
It has a sleep terminal (SLEEP) for inputting a sleep signal, and has.
One terminal of the plurality of first overvoltage prevention elements is connected to the plurality of output terminals of the driver circuit.
The other terminal of the plurality of first overvoltage protection elements is connected to the ground line.
One terminal of the second overvoltage prevention element is connected to the reset terminal and the sleep terminal of the driver circuit.
The other terminal of the excess voltage prevention element has a configuration in which it is connected to the ground line.

With this configuration, the gaming machine according to the present invention provides surges at each output terminal of the driver circuit by providing an overvoltage prevention element at each output terminal of the driver circuit for driving and controlling the drive unit for driving the movable portion. When a voltage is generated, the internal element of the driver circuit can be protected from the surge voltage in order to prevent the surge current due to the surge voltage from flowing back to the driver circuit.

Further, in the gaming machine according to the present invention, since the reset terminal and the sleep terminal of the driver circuit are connected to the ground line via the overvoltage prevention element, when a surge voltage is generated in the reset terminal or the sleep terminal of the driver circuit. The internal elements of the driver circuit can be protected from surge voltage.

Further, in the gaming machine according to the present invention, since the reset terminal and the sleep terminal of the driver circuit are connected to the ground line via the overvoltage prevention element, the driver circuit may be reset or put into a sleep state due to the influence of noise. Can be prevented.

In the gaming machine according to the present invention,
The first overvoltage prevention element and the second overvoltage prevention element may be configured by a voltage-dependent resistor, and the resistance value may decrease when an overvoltage occurs.

With this configuration, in the gaming machine according to the present invention, when a surge voltage is generated at the output terminal, the reset terminal or the sleep terminal of the driver circuit, the resistance value of the overvoltage protection element is lowered, and the resistance value of the overvoltage protection element is lowered, and the resistance value of the overvoltage protection element is lowered through the overvoltage protection element. Since the current flows through the ground line, the internal element of the driver circuit can be protected from the surge voltage.

According to the present invention, it is possible to provide a gaming machine capable of protecting the internal element of the driver circuit from a surge voltage.

It is a front perspective view of the gaming machine which concerns on embodiment of this invention. It is a back side perspective view of the gaming machine which concerns on embodiment of this invention. It is a front view of the gaming machine which concerns on embodiment of this invention. It is a front view of the gaming machine when the upper door mechanism and the lower door mechanism which concerns on embodiment of this invention are opened. It is an exploded perspective view of the gaming machine which concerns on embodiment of this invention. It is a vertical cross-sectional view which cut | cut the display unit of the gaming machine which concerns on embodiment of this invention in the direction orthogonal to the left-right direction. It is a figure which shows the relationship between the irradiation range of the light projected from the projector of the gaming machine which concerns on embodiment of this invention, and the main screen. It is a front view of the upper door mechanism of the gaming machine which concerns on embodiment of this invention. It is a figure which shows the movable accessory of the gaming machine which concerns on embodiment of this invention. It is a figure which shows the state which the movable accessory of the gaming machine which concerns on embodiment of this invention has moved. It is a front view of the enclosure unit of the gaming machine which concerns on embodiment of this invention. It is a top view of the enclosure unit of the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the electric structure of the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the substrate on the main control side in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the optical communication reception connector in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the main control board in the gaming machine which concerns on embodiment of this invention. It is a graph which shows the current-voltage characteristic of the 1st varistor provided in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the main relay board in the gaming machine which concerns on embodiment of this invention. It is a graph which shows the frequency-impedance characteristic of the 1st ferrite bead provided in the gaming machine which concerns on embodiment of this invention. It is a graph which shows the insertion loss frequency characteristic of the 1st penetration type T type 3 terminal filter provided in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the auxiliary relay board in the gaming machine which concerns on embodiment of this invention, in particular, the connector for optical communication reception and its peripheral circuit. It is a graph which shows the insertion loss frequency characteristic of the 2nd penetration type T type 3 terminal filter provided in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the panel relay board in the gaming machine which concerns on embodiment of this invention. It is a graph which shows the current-voltage characteristic of the 2nd varistor provided in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the auxiliary relay board in the gaming machine which concerns on embodiment of this invention, particularly the buffer IC for an operation switch and its peripheral circuit. It is a block diagram which shows the 1st modification of the structure of the auxiliary relay board in the gaming machine which concerns on embodiment of this invention, in particular, the buffer IC for an operation switch and the peripheral circuit thereof. It is a block diagram which shows the 2nd modification of the structure of the auxiliary relay board in the gaming machine which concerns on embodiment of this invention, in particular, the buffer IC for an operation switch and the peripheral circuit thereof. It is a block diagram which shows the structure of the amplifier board in the gaming machine which concerns on embodiment of this invention. It is a graph which shows the frequency-impedance characteristic of the 2nd ferrite bead provided in the gaming machine which concerns on embodiment of this invention. It is a flowchart which shows the enclosure mixing process of the gaming machine which concerns on embodiment of this invention. It is 1st conceptual diagram for demonstrating the operation of the enclosure mixing process of the gaming machine which concerns on embodiment of this invention. It is a 2nd conceptual diagram for demonstrating the operation of the enclosure mixing process of the gaming machine which concerns on embodiment of this invention. It is a 3rd conceptual diagram for demonstrating the operation of the enclosure mixing process of the gaming machine which concerns on embodiment of this invention. It is a 4th conceptual diagram for demonstrating the operation of the enclosure mixing process of the gaming machine which concerns on embodiment of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

First, the configuration will be described. As shown in FIGS. 1 to 5, the gaming machine 1 is a so-called pachislot machine. The gaming machine 1 can be played using coins, medals, gaming balls, tokens, and other gaming media such as cards that are given or given to the player and that store game value information. , In the following, it will be described assuming that a medal is used.

In the following description, the side (direction) from the gaming machine 1 toward the player is referred to as the front side (front direction) of the gaming machine 1, and the side opposite to the front side is referred to as the rear side (rear direction, depth direction). The right side and the left side when viewed from the player are referred to as the right side (right direction) and the left side (left direction) of the gaming machine 1, respectively. Further, the direction including the front side and the rear side is referred to as a front-rear direction or a thickness direction, and the direction including the right side and the left side is referred to as a left-right direction or a width direction. The direction orthogonal to the front-rear direction (thickness direction) and the left-right direction (width direction) is referred to as a vertical direction or a height direction.

As shown in FIGS. 1 and 2, the appearance of the gaming machine 1 is composed of a rectangular box-shaped housing 2. The housing 2 is a metal cabinet G having a rectangular opening on the front side as the main body of the gaming machine, an upper door mechanism UD arranged in the upper part of the front surface of the cabinet G, and a lower part arranged in the lower part of the front surface of the cabinet G. It has a door mechanism DD.

Further, the upper surface wall G4 of the cabinet G is formed with two openings G41 penetrating in the vertical direction at predetermined intervals in the horizontal direction. Then, a wooden plate member G42 is attached to the upper surface wall G4 so as to close each of the two openings G41.

As shown in FIGS. 3 and 4, the upper door mechanism UD and the lower door mechanism DD are formed so as to correspond to the shape and size of the opening of the cabinet G. The upper door mechanism UD and the lower door mechanism DD are provided so as to be able to close the upper part and the lower part of the opening in the cabinet G. The upper door mechanism UD has an upper display window UD1 in the center. The upper display window UD1 is provided with a transparent panel UD11 that transmits light. Further, an upper left speaker UD25L and an upper right speaker UD25R are provided above the upper door mechanism UD.

The lower door mechanism DD is provided with a main display window DD4 formed as a rectangular opening in a substantially central portion of the upper portion. A reel unit RU attached from the inside of the cabinet G is mounted on the back surface side of the main display window DD4. Further, a main control board 71 is attached to the back surface of the reel unit RU.

The reel unit RU is mainly composed of three reels RL (left reel), RC (middle reel), and RR (right reel) in which a plurality of types of symbols are drawn on the outer peripheral surface of each reel. These reels RL, RC, and RR are arranged in a parallel state (horizontally in a row) so that each of them can rotate at a constant speed in the vertical direction. For the reels RL, RC, and RR, the operation of each reel RL, RC, and RR and the symbols drawn on each reel RL, RC, and RR can be visually recognized through the main display window DD4.

A transparent panel made of a rectangular acrylic plate or the like is attached and fixed to the surface of the main display window DD4 so that a player or the like cannot touch the reel unit RU. Below the main display window DD4, first, second, and third pedestals DD2a, DD2b, and DD2c on a substantially horizontal plane are formed. The first pedestal portion DD2a located on the right side of the main display window DD4 is provided with a medal insertion slot DD5 for inserting medals. The medal insertion slot DD5 is an opening into which medals are inserted by the player. The medals inserted from the medal slot DD5 are credited or bet on the game.

The second pedestal portion DD2b located on the left side of the main display window DD4 is provided with a maximum BET button DD8 (also referred to as a MAXBET button) as an effective line setting means for betting a credited medal. When the maximum BET button DD8 is pressed, "3" is selected as the number of medals to be inserted.

On the front side of the maximum BET button DD8, a start lever DD6 is provided to rotate and drive the reels RL, RC, and RR by the operation of the player and to start the variable display of the symbol in the main display window DD4. The start lever DD6 is tiltably attached within a predetermined angle range.

On the right side of the start lever DD6 and on the front side of the third pedestal portion DD2c, there are three stop buttons for stopping the rotation of the three reels RL, RC, and RR by the player's pressing operation (stop operation). DD7L, DD7C, and DD7R are provided.

A C / P button (not shown) is provided in the vicinity of the maximum BET button DD8. The C / P button switches the credit / payout of medals won by the player in the game by a push button operation. In the state where payout is selected by switching the C / P button (non-credit state), medals are paid out from the medal payout outlet DD14 (cancellation shoot) provided in the coin guard plate portion on the lower side of the lower door mechanism DD. The medals that have been paid out are stored in the medal receiving unit DD15.

A waist panel DD18 (lumbar light guide plate) is arranged on the lower side of the start lever DD6 and the stop buttons DD7L, DD7C, and DD7R. The waist panel DD18 is configured as a decorative panel using an acrylic plate or the like. On the waist panel DD18, a name representing the model of the gaming machine 1 and various patterns are displayed.

Further, a lower right speaker DD25R is provided on the right side of the medal payout outlet DD14. On the other hand, a lower left woofer DD25L is provided on the left side of the medal payout outlet DD14. Further, on the right side of the lower left woofer DD25L, an opening 22A communicating with the outlet 22a (see FIG. 11) of the bass reflex port 22 of the enclosure unit 20, which will be described later, is provided.

The enclosure unit 20 (see FIG. 4) includes an enclosure (housing) 21 attached to the back side of the lower door mechanism DD, and a lower left woofer DD25L housed in the enclosure 21. The lower right speaker DD25R and the lower left woofer DD25L notify the player of various information about the game by sounds such as voice and music. Details of the enclosure unit 20 will be described later.

Further, a sub display device DD19 is arranged on the left side of the main display window DD4. The sub-display device DD19 displays, for example, the number of medals paid out and the number of remaining medals credited when a prize is established. Normally, the maximum number of medals credited to the gaming machine 1 is 50, so the number of credits of 50 or less is displayed. In the state where the maximum number of 50 medals is credited, the inserted medals are paid out as they are from the medal payout outlet DD14. Further, the sub display device DD19 may have a touch panel on the front surface.

An operation unit 150 is arranged above the sub-display device DD19. The operation unit 150 includes a LEFT button 152, a RIGHT button 153, an UP button 154, a DOWN button 155, and an ENTER button 156, and receives various operations from the player. Further, a PUSH button 157 is arranged on the right side of the main display window DD4. The PUSH button 157 is operated by the player in association with the production related to the game.

As shown in FIG. 4, in the cabinet G, an upper opening G101 that opens forward is formed on the upper side across the intermediate support plate G1, and opens downward and forward on the intermediate support plate G1. The lower opening G102 is formed. The inside of the cabinet G is divided into an upper space and a lower space with an intermediate support plate G1 interposed therebetween, that is, the intermediate support plate G1 functions as a partition plate for partitioning the inside of the cabinet G into an upper space and a lower space. There is. The upper space is a space behind the upper door mechanism UD in the cabinet G, and accommodates the display unit A and the like. The lower space is a space behind the lower door mechanism DD in the cabinet G, and is a reel unit RU, a main control board 71 that controls the operation of the entire gaming machine 1, and a sub control board 72 (see FIG. 13). Etc. are housed. The main control board 71 constitutes a circuit (main control circuit) that controls the main flow of the game in the gaming machine 1, such as determining the internal winning combination, rotating and stopping the reels RL, RC, and RR, and determining whether or not a prize has been won. do. The sub-control board 72 constitutes a circuit (sub-control circuit) that controls the execution of an effect by displaying an image or the like.

Further, the upper door mechanism UD can close or open the upper opening G101, and constitutes the opening / closing member of the present invention. The lower opening G102 can be closed or opened by the lower door mechanism DD.

(Display unit A)
As shown in FIG. 5, the display unit A is interchangeably placed on the intermediate support plate G1 in the cabinet G. The display unit A is a so-called projection mapping device having an irradiation unit B that emits irradiation light for displaying an image and a screen device C that causes an image to appear when the irradiation light from the irradiation unit B is irradiated. ..

Here, the projection mapping device is for projecting an image on the surface of a three-dimensional object such as a structure or a natural object, and for example, the position (projection distance or angle) of an accessory which is a screen described later. Etc.) and by projecting an image according to the effect information generated based on the shape, it is possible to produce an advanced and powerful effect.

As shown in FIG. 5, the display unit A has a housing A1 having an opening formed in the front. The housing A1 is composed of a projector cover B1 forming an upper portion of the irradiation unit B and a projector housing C10 provided with a mirror mechanism B3. The projector housing C10 has a box shape having a bottom plate C1, a right side plate C2, a left side plate C3, and a back plate C4. The projector cover B1 is replaceably attached to the upper surface of the projector housing C10.

(Display unit A: Irradiation unit B)
As shown in FIG. 6, the irradiation unit B has a projector device B2 that emits irradiation light downward. Since light including images and videos including still images and moving images is projected from the projector device B2, for convenience of explanation, the image projected from the projector device B2 will be unified into an “image”.

(Display unit A: Irradiation unit B: Projector device B2)
As shown in FIG. 6, the projector device B2 is attached to the projector cover B1 and arranged at the rear portion in the cabinet G (see FIG. 4). The projector cover B1 is attached to the right side plate C2 and the left side plate C3 of the projector housing C10, and has an upper cover 171 and a lower cover 172.

A lens unit and an optical mechanism (not shown) are provided inside the projector cover B1.

The lens unit is arranged so as to emit the irradiation light emitted from a plurality of LED light sources of the optical mechanism and reflected by the DMD (Digital Micromirror Device) toward the lower mirror mechanism B3 via a lens or the like.

A mirror mechanism B3 is arranged below the projector device B2 (the emission direction of the irradiation light). The mirror mechanism B3 includes a mirror holder 173, an optical mirror 174 supported by the mirror holder 173, and a mirror holder bracket 175 that supports the mirror holder 173 and the optical mirror 174. The mirror holder bracket 175 is fixed to the bottom plate C1 of the projector housing C10. The light emitted downward from the projector device B2 is reflected forward by the optical mirror 174.

(Upper door mechanism UD and screen device C)
As shown in FIG. 6, the upper door mechanism UD has a front panel 180 and a back panel 181. A screen device C is attached to the front surface of the front panel 180. The screen device C faces the player, and an optical mirror 174 and a projector device B2 are installed behind the screen device C.

The screen device C includes a main screen 182 and a projection sheet 183 attached in close contact with the back surface of the main screen 182. The main screen 182 is mainly made of a resin such as a translucent acrylic plate or a glass plate, and is formed so as to have an even thickness over the entire surface.

The projection sheet 183 is a transmissive screen that is displayed by projecting an image from the rear, and the incident surface on the back side on which the light projected from the projector device B2 is incident and the light incident on the incident surface are combined. It has a display surface on the front side on which an image is projected by being transmitted.

The projection sheet 183 is formed of, for example, a transparent glass plate, an acrylic plate, or a resin film as a main material so as to have an even thickness over the entire surface, and is milky white, translucent, or translucent when not projected. It has a gray color.

When the light projected from the projector device B2 is incident on the incident surface (front surface) of the projection sheet 183, an image related to the game (front surface) of the projection sheet 183 (front surface). Images including still images and moving images) are displayed.

Since the main screen 182 is formed transparently and there is no structure in front of the main screen 182 that blocks the player's field of view, when an image is displayed on the projection sheet 183, the image is displayed from the player. It becomes visible.

FIG. 7 is a diagram showing the relationship between the irradiation range of the light projected from the projector device B2 and the screen device C on the upper door mechanism UD side. In FIG. 7, the display surface of the screen device C on the upper door mechanism UD side is shaded. The irradiation range of the light projected from the projector device B2 is wider than that of the screen device C.

Specifically, the light projected from the projector device B2 is incident on the entire surface of the screen device C (the area shown by shading) and passes through the peripheral area of the screen device C on the upper door mechanism UD side. In FIG. 7, the peripheral region of the screen device C in the irradiation range of the light projected from the projector device B2 is shown by diagonal lines.

As shown in FIG. 8, a decorative member 197 having an opening is provided in the upper center of the upper door mechanism UD. An illumination panel (hereinafter, simply referred to as a light guide panel) 198 is attached to the decorative member 197 so as to close the opening.

As shown in FIG. 9, a pattern 198a imitating a face is formed on the light guide panel 198. Specifically, unevenness is formed on the light guide panel 198 so as to draw a pattern 198a, and when the light guide panel 198 is irradiated with light, the light is reflected on the unevenness and the pattern 198a emerges. ing.

A protrusion 198A projecting rearward is formed at the upper end of the light guide panel 198, and an LED (not shown) is arranged so as to face the tip of the protrusion 198A. The light emitted from the LED is incident on the protruding portion 198A of the light guide panel 198, faces forward, and then is reflected downward at the upper end of the light guide panel 198 to move downward or sideways in the light guide panel 198. Be guided. At this time, the light guided downward or sideways in the light guide panel 198 is reflected by the unevenness, and the pattern 198a emerges. As a result, the pattern 198a can be visually recognized from the front.

Further, the light guide panel 198 has a specific area 198b in a part of the pattern 198a, and a movable accessory 85 is arranged on the back surface of the specific area 198b. The movable accessory 85 has the shape of an eyeball and is configured to be movable in the left-right direction. The movable accessory 85 is moved in the left-right direction by a motor for an accessory (not shown) via a mechanism that converts a rotational motion into a linear motion, such as a rack and pinion mechanism. FIG. 10 is a diagram showing a state in which the movable accessory 85 has moved to the left.

(Enclosure unit)
As shown in FIGS. 11 and 12, the enclosure unit 20 includes an enclosure (housing) 21 and a lower left woofer DD25L, and the enclosure 21 has a tubular structure that communicates the inside and the outside of the enclosure 21. The bass reflex port 22 is provided.

The enclosure unit 20 of the present embodiment is a so-called bass reflex type woofer device that enhances the volume of the bass range by utilizing the sound radiated from the lower left woofer DD25L to the back side.

The lower left woofer DD25L has a diaphragm 25a, and by vibrating the diaphragm 25a in response to an acoustic signal input from a signal processing device such as an amplifier, the sound corresponding to the acoustic signal is emitted. ing.

The bass reflex port 22 has an outlet 22a opened in front of the enclosure 21 and an inlet 22b opened inside the enclosure 21. The bass reflex port 22 radiates the low-pitched acoustic component of the sound radiated from the lower left woofer DD25L to the back side by enhancing it by Helmholtz resonance.

As described above, in the enclosure unit 20 of the present embodiment, the sound wave emitted from the lower left woofer DD25L to the front side and the sound wave emitted from the lower left woofer DD25L to the rear side and emitted to the outside via the bass reflex port 22 Is in phase, so it is possible to emit a sound with enhanced bass and a sense of realism.

Here, the sound wave emitted from the lower left woofer DD25L is a compressional wave due to air vibration. Therefore, in the enclosure unit 20 of the present embodiment, the pressure inside the enclosure 21 fluctuates due to the sound waves emitted from the lower left woofer DD25L.

In the enclosure unit 20 of the present embodiment, the wind can be blown out from the outlet 22a of the bass reflex port 22 by utilizing the pressure fluctuation inside the enclosure described above. The wind sent out from the outlet 22a of the bass reflex port 22 is sent out to the front of the gaming machine 1 from the opening 22A that opens toward the inside of the medal receiving portion DD15. As a result, the player can experience the effect of the wind in addition to the sound emitted from the lower left woofer DD25L.

[Electrical configuration of gaming machine 1]
Hereinafter, the electrical configuration of the gaming machine 1 will be described with reference to FIGS. 13 to 29.

As shown in FIG. 13, the gaming machine 1 has a main control board 71 arranged in the reel unit RU and a sub control board 72 arranged in the cabinet G. The main control board 71 controls the gaming operation of the gaming machine 1. The sub-control board 72 controls the effect.

On the main control board 71, a left reel relay terminal board 51L, a middle reel relay terminal board 51C, a right reel relay terminal board 51R, a setting key type switch 52, and a cabinet relay board 53 are electrically connected by a harness or the like. It is connected to the.

The left reel relay terminal plate 51L, the middle reel relay terminal plate 51C, and the right reel relay terminal plate 51R are arranged inside the reel main bodies of the reels RL, RC, and RR, respectively. The left reel relay terminal plate 51L, the middle reel relay terminal plate 51C, and the right reel relay terminal plate 51R each have a two-phase excitation type stepping motor.

Each stepping motor changes the symbol by rotating each reel RL, RC, RR based on the establishment of a predetermined start condition, that is, the operation of the start lever DD6 by the player (start operation). The setting key type switch 52 detects an operation for changing the set value of the gaming machine 1 and confirming the setting value of the gaming machine 1.

The external centralized terminal plate 56, the hopper device HP, and the auxiliary storage switch 57 are electrically connected to the cabinet relay board 53 by a harness or the like. The cabinet relay board 53 relays signals input / output between the main control board 71, the external centralized terminal board 56, the hopper device HP, and the auxiliary storage switch 57. That is, the external centralized terminal board 56, the hopper device HP, and the auxiliary storage switch 57 are connected to the main control board 71 via the cabinet relay board 53.

The external centralized terminal plate 56 is attached to the cabinet G and is provided to output signals such as a medal insertion signal, a medal payout signal, external signals 1 to 4, and a security signal to the outside of the gaming machine 1.

The auxiliary storage switch 57 penetrates the medal auxiliary storage (not shown). The auxiliary storage switch 57 detects whether or not the medal auxiliary storage is full of medals.

The door relay board 54 includes a selector 46, a door open / close monitoring switch 61, a BET switch 62, a checkout switch 63, a start switch 64, and a stop switch board 65, which are connected to the medal slot DD5 and arranged behind the lower door mechanism DD. The game operation display board 66, the reset switch 67, and the main relay board 55 are electrically connected by a harness or the like.

That is, the selector 46, the door open / close monitoring switch 61, the BET switch 62, the settlement switch 63, the start switch 64, the stop switch board 65, the game operation display board 66, and the reset switch 67 pass through the door relay board 54 and the main relay board 55. Is connected to the main control board 71.

The selector 46 detects that the medal has passed through the inside, and outputs the detection result to the main control board 71. Further, the selector 46 ejects the medals inserted into the medal insertion slot DD5 to the medal payout outlet DD14 under the control of the main control board 71. The door open / close monitoring switch 61 outputs a security signal for notifying the opening / closing of the upper door mechanism UD and the lower door mechanism DD to the outside of the gaming machine 1.

The BET switch 62 detects that the MAX bet button DD8 and the 1-bet button have been pressed by the player, and outputs the detection result to the main control board 71.

The settlement switch 63 detects that the settlement button has been pressed by the player, and outputs the detection result to the main control board 71. The start switch 64 detects that the start lever DD6 has been operated by the player (start operation), and outputs the detection result to the main control board 71.

The stop switch board 65 is a board that constitutes a circuit for stopping a rotating reel and a circuit for displaying a stoptable reel by an LED or the like. The stop switch board 65 is provided with stop switches (not shown) corresponding to the three reels RL, RC, and RR.

The stop switch detects a stop operation for stopping the rotation of the reels RL, RC, and RR, that is, that each of the stop buttons DD7L, DD7C, and DD7R is pressed by the player.

The game operation display board 66 displays information on the game such as the number of medals bet, the number of medals to be paid out when a prize is established, the number of remaining medals credited, the operating state of the re-game, and the waiting state of the game (not shown). Display on etc. The reset switch 67 detects an operation of a reset button (not shown) for changing the setting of the gaming machine 1 and confirming the setting of the gaming machine 1.

The main relay board 55 relays a signal between the main control board 71 and the door relay board 54. The main relay board 55 is connected to the main control board 71 by a serial bus. In the present embodiment, the main relay board 55 is connected to the main control board 71 by an I2C (Inter-Integrated Circuit) bus using the main control board 71 as a master. Further, as will be described later with reference to FIG. 14, bidirectional (two) optical fibers are interposed between the main control board 71 and the main relay board 55.

The sub-relay board 69 is connected to the sub-control board 72 by BtoB (Board to Board), and relays the wiring connecting the sub-control board 72 and the main control board 71. Further, the sub-relay board 69 relays the wiring connecting the sub-control board 72 and the plurality of boards arranged around the sub-control board 72 and the input / output device.

Specifically, the sub-relay board 69 includes an amplifier board 81, an LED board 82, a panel relay board 83, a 24h door open / close monitoring unit 74, an operation switch 271, an upper right speaker UD25R, and an upper left speaker. The UD25L, the lower right speaker DD25R, and the touch panel 84 are electrically connected by a harness or the like.

The sub-control board 72 is connected via the sub-relay board 69 by unidirectional pacing-synchronous (also referred to as “asynchronous”) serial communication from the main control board 71 to the sub-control board 72. Further, as will be described later with reference to FIG. 14, a unidirectional (one) optical fiber is interposed between the main control board 71 and the sub-relay board 69.

The amplifier board 81 outputs an electric signal representing voice to the lower left woofer DD25L provided in the enclosure unit 20. The LED board 82 causes the LEDs included in the LED group 75 to emit light according to the effect executed by the control of the sub-control board 72, and displays the blinking pattern. The LED substrate 82 includes a waist panel LED substrate and the like.

The LED group 75 includes a reel back lamp (not shown) and the like which are arranged to irradiate the symbol trains drawn on the reels RL, RC, and RR, and are composed of a plurality of full-color LEDs.

In the 24h door opening / closing monitoring unit 74, a sensor (not shown) for detecting the opening / closing of the lower door mechanism DD is attached to the frame of the lower door mechanism DD, and based on the state of the sensor (for example, when the sensor is on). If there is, it is closed, if it is off, it is opened), and the history of opening and closing the lower door mechanism DD is saved.

Further, when the lower door mechanism DD is opened, the 24h door open / close monitoring unit 74 sends a signal to the effect that the lower door mechanism DD is opened in order to display an error on the main display device B2 and the sub display device DD19. Output to the control board 72.

Due to the door opening / closing structure of the game machine 1, the upper door mechanism UD is locked with the lower door mechanism DD closed so that the upper door mechanism UD cannot be opened unless the lower door mechanism DD is always opened. Therefore, the sensor that detects the opening and closing of the door is not installed.

The panel relay board 83 is configured to drive the movable accessory 85 in response to control by the sub-control board 72. The operation switch 271 includes each button (LEFT button 152, RIGHT button 153, UP button 154, DOWN button 155, ENTER button 156) of the operation unit 150 (see FIG. 3) for making settings related to the effect, and the PUSH button 157. (See FIG. 25) and the operation is detected.

Further, although not shown, the panel relay board 83 is connected to a bidirectional speed-synchronization type serial line for the sub-control board 72 to control the projector B2, and this serial line is connected to the projector B2. ing.

In addition to the sub-relay board 69, the sub-ROM board 76 and the graphic board 73 are connected to the sub-control board 72. The sub ROM board 76 stores a control program executed by the sub control board 72, and image (image), sound, light (LED group 75), and communication data for staging.

The image relay board 77 converts and relays the image signals transmitted from the sub-control board 72 to the projector device B2 and the sub-display device DD19 as the main display device according to the signal standard of each display device.

An image signal is transmitted from the image relay board 77 to the projector device B2 by differential transmission compliant with LVDS (Low voltage differential signaling). Further, a unidirectional (one) optical fiber is interposed between the image relay board 77 and the projector device B2.

That is, the image relay board 77 converts the differential signal representing the image into an optical signal and transmits it to the projector device B2, and the projector device B2 converts the received optical signal into a differential signal and converts the differential signal. Project the image represented by the signal.

In this embodiment, an example in which the projector device B2 is applied as the main display device will be described, but another display device such as a liquid crystal display device or an organic EL display device may be applied as the main display device.

When another display device such as a liquid crystal display device or an organic EL display device is applied as the main display device, the image relay board 77 is configured to transmit an image signal in a manner according to the standard of the main display device. NS. Further, it is not always necessary to interpose an optical fiber between the image relay board 77 and the main display device.

The sub relay board 69 and the sub control board 72, the sub control board 72 and the sub ROM board 76, the sub control board 72 and the graphic board 73, and the graphic board 73 and the image relay board 77 are connected by a board-to-board connector, respectively. ing. The sub-control board 72 acquires the control program and image, audio, optical, and communication data for staging from the sub-ROM board 76 in accordance with Serial ATA (Advanced Technology Attachment).

The gaming machine 1 has a power supply unit 44. The power supply unit 44 is composed of a regulated power supply circuit that generates a DC voltage of 12 V and a DC voltage of 24 V from a commercial power supply (AC100 V) supplied when the power switch 44a is turned on.

A DC voltage of 12 V is supplied to the cabinet relay board 53 and the sub-relay board 69. A DC voltage of 24 V is supplied to the amplifier board 81. A DC voltage of 12 V supplied to the cabinet relay board 53 or the sub-relay board 69 is supplied to the other boards. Therefore, in FIG. 13, the power supply lines of other substrates are not shown.

[Board on the main control side]
Hereinafter, the substrate on the main control side will be described in detail with reference to FIGS. 14 to 20.

As shown in FIG. 14, the main control board 71 includes an optical communication reception connector 91, an optical communication transmission connector 92, a port input / output IC 93, a microprocessor 94, a communication IC 95, and an optical communication transmission connector 96. And a power management circuit 97, and a buffer IC 98.

The optical communication reception connector 91 converts an optical signal transmitted from the main relay board 55 via an optical fiber into an electric signal. The optical communication reception connector 91 transmits the converted electric signal to the port input / output IC 93 via the I2C bus.

As shown in FIG. 15, the optical communication reception connector 91 includes an optical device, a port to which an optical fiber can be connected, a power supply terminal VCS to which a drive voltage is supplied, a ground terminal diode, an output terminal VO, and the like. It has a pull-up terminal RL, a photodiode PD, a transimpedance amplifier TIA, a shotkey clamp transistor Tr, and a pull-up resistor R.

When light is input from the optical fiber in the optical communication reception connector 91, a current flows from the photodiode PD by the input light. The current flowing from the photodiode PD is converted into a voltage by the transimpedance amplifier TIA. The converted voltage is amplified by the Schottky clamp transistor Tr. The voltage-amplified electric signal is output from the output terminal VO. The output terminal VO is pulled up by being connected to the pull-up terminal RL.

In FIG. 14, the optical communication transmission connector 92 converts an electric signal transmitted from the port input / output IC 93 via the I2C bus into an optical signal. The optical communication transmission connector 92 transmits the converted optical signal to the main relay board 55 via an optical fiber.

The optical communication transmission connector 92 has a port to which an optical fiber can be connected and a photodiode. In the optical communication transmission connector 92, the light emitted from the photodiode is incident on the optical fiber due to the current flowing through the photodiode.

The port input / output IC 93 is configured by, for example, an ASIC (Application Specific Integrated Circuit), and is connected to input / output terminals IO0 to IO15, a serial output terminal OPT01, a serial input terminal OPT11, and a bus including an address bus and a data bus. It has a bus I / F and a reset terminal SET.

The port input / output IC 93 executes input / output of control signals via input / output terminals IO0 to IO15, communication via serial output terminal OPT01 and serial input terminal OPT11, and communication via bus I / F. It has each driver circuit of.

Each input / output terminal IO0 to IO15 is connected to the cabinet relay board 53. Each input / output terminal IO0 to IO15 is set with an input / output mode (that is, IN or OUT) according to the connected device.

For example, IN is set as an input / output mode for the input / output terminals for signals input from the auxiliary storage switch 57 via the cabinet relay board 53. Further, OUT is set as an input / output mode for the input / output terminals for the signals output to the external centralized terminal board 56 via the cabinet relay board 53.

An electric signal transmitted from the optical communication reception connector 91 via the I2C bus, that is, serial data is input to the serial input terminal OPT11. From the serial output terminal OPT01, an electric signal transmitted to the optical communication transmission connector 92 via the I2C bus, that is, serial data is output.

The bus I / F is connected to the microprocessor 94 and the buffer IC 98 by a bus. The reset terminal RESET is connected to the microprocessor 94. When a reset signal is input to the reset terminal SET, the port input / output IC 93 initializes the serial communication driver circuits of the serial output terminal OPT01 and the serial input terminal OPT11, and inputs / output modes of the input / output terminals IO0 to IO15. Execute initialization processing such as resetting.

The port input / output IC 93 transmits data received by the serial input terminal OPT11 and data representing various signals input from the terminals of the input / output terminals IO0 to IO15 whose input / output mode is set to IN via the bus I / F. The data output from the microprocessor 94 is transmitted from the serial output terminal OPT01 via the bus I / F, and the input / output mode of the input / output terminals IO0 to IO15 is set to OUT. Outputs various signals from the terminal.

The microprocessor 94 has a main CPU, a main ROM, and a main RAM (not shown). The main ROM (second storage means) stores a control program executed by the main CPU, a data table, data for transmitting various control commands (commands) to the sub-control board 72, and the like. The main RAM (first storage means) is composed of SRAM (Static RAM), and is provided with a storage area for storing various data used by the control program.

The microprocessor 94 has an external bus I / F to which the bus is connected, an output terminal TX1 for transmitting a command to the sub-control board 72, and a reset signal output terminal XRST0 for outputting a reset signal to the port input / output IC 93. It has a reset terminal XSRST to which a reset signal is input and an interrupt terminal XINT to which an interrupt signal is input.

Detection data of various sensors and various switches are input to the microprocessor 94 from the external bus I / F. The microprocessor 94 generates a control signal for advancing the game, a state signal representing the state of the game, and a command based on the input detection data.

The microprocessor 94 controls various control objects by outputting a control signal and a state signal from the external bus I / F. Further, the microprocessor 94 outputs a signal representing a command from the output terminal TX1 by a pace-synchronized serial communication.

The reset terminal XSRST is connected to a power management circuit 97 that monitors the drive voltage of the main control board 71. When a reset signal is input to the reset terminal XSRST, the microprocessor 94 executes a power failure recovery process and outputs a reset signal from the reset signal output terminal XRST0.

In the power recovery processing, the microprocessor 94 performs, for example, initialization of the main CPU, check processing of the consistency of the main RAM by a checksum, and the like.

The interrupt terminal XINT is connected to the power management circuit 97. When an interrupt signal is input to the interrupt terminal XINT, the microprocessor 94 executes a preparatory process for executing a power failure recovery process. Specifically, the microprocessor 94 creates a checksum to be used in the consistency check process of the main RAM and stores it in the main RAM.

The communication IC 95 executes security processing such as encryption and redundant coding on the command represented by the signal output from the output terminal TX1 of the microprocessor 94, and adjusts the signal representing the command to which the security processing has been performed. Output to the optical communication transmission connector 96 by synchronous serial communication.

The optical communication transmission connector 96 converts the signal output from the communication IC 95 into an optical signal and transmits it to the sub-relay board 69 via an optical fiber. The optical communication transmission connector 96 is configured in the same manner as the optical communication transmission connector 92.

The buffer IC 98 is connected to the microprocessor 94 via a bus, and is connected to the left reel relay terminal plate 51L, the middle reel relay terminal plate 51C, and the right reel relay terminal plate 51R via a harness. The buffer IC 98 buffers control signals input and output between the microprocessor 94 and the left reel relay terminal plate 51L, the middle reel relay terminal plate 51C, and the right reel relay terminal plate 51R.

The main relay board 55 includes an optical communication reception connector 101, an optical communication transmission connector 102, a port input / output IC 103, and a power supply management circuit 107.

The optical communication reception connector 101 converts an optical signal received from the main control board 71 via an optical fiber into an electric signal. The optical communication reception connector 101 transmits the converted electric signal to the port input / output IC 103 via the I2C bus. The optical communication reception connector 101 is configured in the same manner as the optical communication reception connector 91.

The optical communication transmission connector 102 converts an electric signal received from the port input / output IC 103 via the I2C bus into an optical signal. The optical communication transmission connector 102 transmits the converted optical signal to the main control board 71 via an optical fiber. The optical communication transmission connector 102 is configured in the same manner as the optical communication transmission connector 92.

The sub-relay board 69 has an optical communication reception connector 131 (see FIG. 21) configured in the same manner as the optical communication reception connector 91, and is transmitted from the optical communication transmission connector 102 by the optical communication reception connector. Receive an optical signal.

The port input / output IC 103 is composed of, for example, an ASIC, and has input / output terminals IO0 to IO15, a serial output terminal OPT01, a serial input terminal OPT11, and a reset terminal RESET.

The port input / output IC 103 has each driver circuit for executing input / output of a control signal via the input / output terminals IO0 to IO15 and communication via the serial output terminal OPT01 and the serial input terminal OPT11.

Each input / output terminal IO0 to IO15 is connected to the door relay board 54. Each input / output terminal IO0 to IO15 is set with an input / output mode (that is, IN or OUT) according to the connected device.

For example, OUT is set as an input / output mode for the input / output terminals for signals output to the 7-segment display via the door relay board 54. Further, IN is set as an input / output mode for the input / output terminals for signals input from the start switch 64 via the door relay board 54.

The serial input terminal OPT 11 is input with an electric signal, that is, serial data, transmitted from the optical communication reception connector 101 by serial communication in a pace-synchronized manner. From the serial output terminal OPT01, an electric signal, that is, serial data, to be transmitted by the serial communication of the pace synchronization method is transmitted to the optical communication transmission connector 101.

The reset terminal RESET is connected to a power management circuit 107 that monitors the drive voltage of the main relay board 55. When the reset signal is input to the reset terminal SET, the port input / output IC 103 initializes the serial communication driver circuits of the serial output terminal OPT01 and the serial input terminal OPT11, and inputs / output modes of the respective input / output terminals IO0 to IO15. Execute initialization processing such as resetting.

The port input / output IC 103 transmits data by serial communication by the serial output terminal OPT01 based on the data represented by various signals input to the terminals whose input / output mode is set to IN among the input / output terminals IO0 to IO15. Based on the data received by serial communication from the serial input terminal OPT11, various signals are output from the input / output terminals IO0 to IO15 whose input / output mode is set to OUT.

<Main control board>
As shown in FIG. 16, the main control board 71 has a clock pulse generation circuit 110 and a power supply circuit 111 in addition to the microprocessor 94 and the power supply management circuit 97 shown in FIG.

The clock pulse generation circuit 110 is composed of a crystal oscillator and a frequency divider, and supplies a clock to a circuit that requires a clock, such as a microprocessor 94 and a port input / output IC 93.

Although not shown, a clock pulse generation circuit similar to the clock pulse generation circuit 110 is separately provided on the main relay board 55 to supply the clock to the port input / output IC 103.

Similarly, a clock pulse generation circuit similar to the clock pulse generation circuit 110 is separately provided on another substrate having a circuit that requires a clock. Since each clock pulse generating circuit becomes a source of noise, the clock is not supplied across the substrate.

The power supply circuit 111 transforms the 12V DC voltage supplied from the power supply unit 44 into a 5V DC voltage, and supplies drive voltage for operating the microprocessor 94, and other parts of the main control board 71. A DC voltage of 5V is supplied as a power supply voltage to the power supply terminal of.

The microprocessor 94 has a voltage supply terminal VBB for supplying a voltage for maintaining the data stored in the built-in main RAM. The power supply voltage supplied from the power supply circuit 111 is connected to the voltage supply terminal VBB via the rectifying element D1.

The rectifying element D1 has a Schottky barrier created by joining a metal and a semiconductor. In the present embodiment, the rectifying element D1 is composed of a diode.

Further, an electrolytic capacitor B1 is connected to the voltage supply terminal VBB via a harness (not shown) as a power supply unit that supplies a voltage to the voltage supply terminal VBB even when the voltage is not supplied from the power supply circuit 111. There is. The capacitance of the electrolytic capacitor B1 in this embodiment is 0.22 μF.

Although FIG. 16 shows an example in which the electrolytic capacitor B1 is provided on the cabinet relay board 53, the electrolytic capacitor B1 may be provided on the main control board 71, the main relay board 55, or the power supply unit 44.

When the voltage is supplied from the power supply circuit 111, the rectifying element D1 supplies the voltage supplied from the power supply circuit 111 to the voltage supply terminal VBB and the electrolytic capacitor B1, and the electrolytic capacitor B1 supplies the supplied voltage. Store electricity.

When the voltage is not supplied from the power supply circuit 111, the rectifying element D1 supplies a voltage from the electrolytic capacitor B1 to the voltage supply terminal VBB, and various electronic components provided on the main control board 71 from the electrolytic capacitor B1 ( That is, the supply of voltage to the power supply line VCC) provided on the main control board 71 is restricted by the shot key barrier.

As described above, the voltage supply terminal VBB may be affected by noise or surge voltage by supplying the voltage to the voltage supply terminal VBB even during the power failure. Therefore, as described below, the gaming machine 1 protects the main RAM from noise and surge voltage by the filter elements C1 and Z1 and suppresses the occurrence of malfunction. The surge voltage is a "large wave voltage" that momentarily exceeds a steady state in an electric circuit or the like, and is also referred to as an "overvoltage" or an "abnormal voltage" below.

Filter elements C1 and Z1 are provided in parallel between the voltage supply terminal VBB and the ground. The filter element C1 is composed of a passive element that accumulates and discharges electric charges. In the present embodiment, the filter element C1 is composed of a capacitor having a capacitance of 0.1 μF.

The filter element Z1 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to the ground. In the present embodiment, the filter element Z1 is composed of a varistor having a nominal varistor voltage of 18 V0.1 mA showing a current-voltage characteristic in FIG. In the present embodiment, the power supply regulating means for regulating the supply destination of the power supply voltage supplied by the electrolytic capacitor B1 by the filter elements C1 and Z1 and the rectifying element D1 is configured.

The power supply management circuit 97 includes a power supply management IC 112 and a voltage dividing circuit 113. The power supply management IC 112 outputs a power supply terminal VCS for operating the power supply management IC 112, a ground terminal GND, voltage monitoring terminals VSB and VSC, a reset signal output terminal RESET for outputting a reset signal, and an interrupt signal. It has an interrupt signal output terminal OUT for the operation.

A DC voltage of 5 V is supplied as a power supply voltage to the power supply terminal VCS of the power supply management IC 112. The ground terminal GND is connected to the ground. A DC voltage of 5V transformed by the power supply circuit 111 is supplied to the voltage monitoring terminal VSB. At the voltage monitoring terminal VSC, the 12V DC voltage before being transformed by the power supply circuit 111 is 1.6V by a voltage dividing circuit 113 consisting of two resistors connected in series between the 12V DC voltage and the ground line. It is divided into DC voltage and supplied.

When the voltage of the voltage input terminal VSB becomes equal to or higher than the first reference voltage (set value of 4V or more and 4.5V or less), the power management circuit 97 is connected to the power management IC 112 from the reset signal output terminal RESET to the microprocessor 94. A reset signal is output to the reset terminal XSRST of. Therefore, the power supply management circuit 97 constitutes a reset output means that outputs a reset signal to the microprocessor 94 when the voltage becomes equal to or higher than the first reference voltage.

In the power supply management circuit 97, when the voltage of the voltage input terminal VSB becomes equal to or higher than the first reference voltage, the reset signal output terminal RESET of the power supply management IC 112 to the reset terminal XSRST of the microprocessor 94 after a certain period of time has elapsed. A reset signal may be output to.

With this configuration, the power supply management circuit 97 supplies the power supply voltage to each part of the main control board 71, and after the state of each part of the main control board 71 is stabilized, the microprocessor 94 is subjected to the power failure recovery process. Can be executed.

Further, in the power supply management circuit 97, the DC voltage of 12 V transformed by the power supply circuit 111 is a second reference voltage (a set value of about 9.25 V, and the DC voltage divided by the voltage divider circuit 113 is about 1.23 V. ) In the following cases, the interrupt signal is output to the interrupt terminal XINT of the microprocessor 94 via the interrupt signal output terminal OUT of the power management IC 112. Therefore, the power supply management circuit 97 constitutes an interrupt signal output means that outputs an interrupt signal to the microprocessor 94 when the DC voltage of 12 V becomes equal to or less than the second reference voltage.

Filter elements C2 and Z2 are provided in parallel between the power supply terminal VCS and the ground terminal GND of the power supply management IC 112. The filter element C2 is composed of a passive element that accumulates and discharges electric charges. In the present embodiment, the filter element C2 is composed of a capacitor having a capacitance of 0.1 μF.

The filter element Z2 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to the ground. In the present embodiment, the filter element Z2 is composed of a varistor having a nominal varistor voltage of 47 V0.1 mA whose current-voltage characteristic is shown in FIG.

In this way, the filter element Z2 prevents the abnormal voltage from flowing to the power supply terminal VCS when an abnormal voltage is generated by inducing the abnormal voltage to the ground line, the power supply management IC 112 malfunctions, and the reset signal is output from the reset signal output terminal RESET. The output prevents the microprocessor 94 from malfunctioning.

Although not shown, a power management circuit similar to the power management circuit 97 is also mounted on another board such as the main relay board 55. Therefore, the filter elements C2 and Z2 may be similarly provided in the power supply management circuit mounted on another board. However, the capacitance and the nominal varistor voltage of the filter elements C2 and Z2 are adaptively determined for each substrate.

Further, although not shown, a processor similar to the microprocessor 94 is also mounted on another board such as the sub-control board 72. Therefore, the filter elements C1 and Z1 and the rectifying element D1 may be similarly provided on the microprocessor mounted on another substrate. However, the capacitance and the nominal varistor voltage of the filter elements C1 and Z1 are adaptively determined for each substrate.

<Main relay board>
As shown in FIG. 18, a low-pass filter 120 is provided in the data line between the output terminal VO of the optical communication reception connector 101 and the serial input terminal OPT11 of the port input / output IC 103. In the present embodiment, the low-pass filter 120 is composed of a ferrite bead L1 (sixth filter element) provided so as to surround the data line and a capacitor C11 connected to the data line and ground. The ferrite bead L1 has the frequency-impedance characteristic shown in FIG. 19, and suppresses noise in the high frequency band as shown in the graph.

In the data line between the output terminal VO of the optical communication reception connector 101 and the serial input terminal OPT11 of the port input / output IC 103, data is transmitted at a transmission speed belonging to the low to medium frequency band (5 MHz or less). Therefore, the low-pass filter 120 can suppress the noise in the high frequency band generated in the data of the data line.

A power supply line for supplying a power supply voltage is connected to the power supply terminal VCS of the optical communication reception connector 101. The power supply line is provided with filter elements L2 (first filter element) and L3 (second filter element). Each of the filter elements L2 and L3 is configured by coupling two ferrites and a capacitor.

In the present embodiment, the filter element L2 is composed of a through-type T-type 3-terminal filter having a capacitance of 1000 pF. The filter element L3 is composed of a through-type T-type 3-terminal filter having a capacitance of 100 pF.

Filter elements C12 (third filter element), C13 (fourth filter element), and Z11 (fifth filter element) are arranged in parallel between the power supply side of the filter elements L2 and L3 in the power supply line and the ground (ground line). It is provided in. Each of the filter elements C12 and C13 is composed of passive elements that accumulate and release electric charges.

In the present embodiment, the filter element C12 is composed of a capacitor having a capacitance of 0.01 μF, and the filter element C13 is composed of a capacitor having a capacitance of 22 pF.

The filter element Z11 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to the ground. In the present embodiment, the filter element Z11 is composed of a varistor having a nominal varistor voltage of 47 V0.1 mA.

The connection state of each filter element provided in the power supply line of the optical communication reception connector 101 will be described in detail. Each of the filter elements L2 and L3 has a first terminal, a second terminal, and a third terminal. Each of the filter elements C12, C13, and Z11 has a first terminal and a second terminal.

The power supply terminal VCS of the optical communication reception connector 101 is connected to the first terminal of the filter element L2. The second terminal of the filter element L2 is connected to the first terminal of the filter element L3.

The second terminal of the filter element L3, the first terminal of the filter element C12, the first terminal of the filter element C13, and the first terminal of the filter element Z11 are connected to the power supply line. The third terminal of the filter element L2, the third terminal of the filter element L3, the second terminal of the filter element C12, the second terminal of the filter element C13, and the second terminal of the filter element Z11 are connected to the ground line. Has been done.

The filter elements L2 and L3 have the insertion loss frequency characteristic shown in FIG. As shown in FIG. 20, the filter element L2 blocks the band centered on 100 MHz, and the filter element L3 blocks the band centered on 300 MHz. That is, the filter element L2 and the filter element L3 block noise generated in a frequency band between a relatively low frequency band blocked by the filter element C12 and a relatively high frequency band blocked by the filter element C13. do.

Further, in each of the filter elements L2 and L3, since the two ferrites function as resonance suppression components, antiresonance between the filter elements C12 and C13 is suppressed. Therefore, the filter elements L2 and L3 and the filter elements C12 and C13 remove the noise component of the power supply of the optical communication receiving connector 101 over a wide frequency band.

An electrolytic capacitor CP1 is provided in parallel with the filter elements C12, C13, and Z11 between the power supply side of the filter elements L2 and L3 in the power supply line and the ground (ground line).

The electrolytic capacitor CP1 stably supplies a power supply voltage from the power supply line to the power supply terminal VCS of the optical communication reception connector 101 in order to transmit the power failure detection signal to the optical communication reception connector 101 at the time of power failure. It functions as a regulated power supply unit and removes noise in the low and mid range (for example, 10 Hz to 300 kHz). The capacitance of the electrolytic capacitor CP1 in this embodiment is 47 μF.

Similar to the optical communication receiving connector 101, the optical communication receiving connector 91 of the main control board 71 may be provided with a low-pass filter 120, filter elements L2 and L3, and filter elements C12, C13 and Z11. However, the capacitance and the nominal varistor voltage of the filter elements L2, L3, C12, C13, and Z11 are adaptively determined for each substrate.

[Sub-control board]
Hereinafter, the substrate on the sub-control side will be described in detail with reference to FIGS. 21 to 29.

<Sub-relay board (optical communication reception connector and its peripheral circuits)>
As shown in FIG. 21, the sub-relay board 69 has an optical communication receiving connector 131 (light receiving conversion means) and a communication IC 133 (input signal output means). The optical communication reception connector 131 converts an optical signal transmitted from the optical communication transmission connector 96 of the main control board 71 via an optical fiber into an electric signal.

The optical communication reception connector 131 transmits the converted electric signal to the communication IC 133. The optical communication receiving connector 131 has the same configuration as the optical communication receiving connector 91 shown in FIG.

The communication IC 133 executes security verification processing such as decoding of the command represented by the signal output from the output terminal VO of the optical communication reception connector 131 and error detection by the redundant code, and executes the command subjected to the security verification processing. The represented signal is output to the sub-control board 72 by a step-synchronous serial communication.

A Schmitt trigger S1 is provided between the output terminal VO of the optical communication reception connector 131 and the input / output terminal I / O of the communication IC 133. The Schmitt trigger S1 has two threshold values with respect to the input potential of the signal input to the input terminal, the change in which the input potential exceeds the threshold value on the High side (for example, 2.7 V), and the input. The output state is changed with hysteresis in response to a change in the potential below the low threshold value (for example, 1.6 V) and output from the output terminal.

As described above, since the Schmitt trigger S1 is provided between the output terminal VO of the optical communication reception connector 131 and the input / output terminal I / O of the communication IC 133, the output terminal VO of the optical communication reception connector 131 can be used. When the output signal is affected by noise and fluctuates across the center level, a signal in which the influence of noise is suppressed is output from the output terminal of the Schmitt trigger S1, so that a reception error occurs in the communication IC 133. It is prevented from being detected. In this way, the Schmitt trigger S1 functions as a filter for removing noise.

A power supply line for supplying a power supply voltage is connected to the power supply terminal VCS of the optical communication reception connector 131. Filter elements C21 and Z21 are provided in parallel between the power supply line and the ground (ground line). The filter element C21 (third filter element) is composed of a passive element that accumulates and discharges electric charges. In the present embodiment, the filter element C21 is composed of a capacitor having a capacitance of 0.01 μF.

The filter element Z21 (second filter element) is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to ground. It is desirable that the filter element Z21 is arranged in the vicinity of the power supply terminal VCS (for example, less than 1 cm) of the optical communication reception connector 131.

In the present embodiment, the filter element Z21 is composed of a varistor having a nominal varistor voltage of 47 V0.1 mA, and the shorter the distance between the filter element Z21 and the power supply terminal VCS of the optical communication reception connector 131, the abnormal voltage. The inducing effect of inducing the ground to the ground is enhanced.

Further, the power supply line is provided with a filter element FL1 (first filter element). The filter element FL1 is composed of a through-type T-type 3-terminal filter, and ferrite connected to the ground terminal is provided so as to surround the through line. The capacitance of the filter element FL1 in this embodiment is 1000 pF.

The connection state of each filter element provided in the power supply line of the optical communication reception connector 131 will be described in detail. The filter element FL1 has a first terminal, a second terminal, and a third terminal. Each of the filter elements C21 and Z21 has a first terminal and a second terminal.

The power supply terminal VCS of the optical communication reception connector 131 is connected to the first terminal of the filter element FL1. The second terminal of the filter element FL1 is connected to the power supply line. The third terminal of the filter element FL1 is connected to the ground line.

The first terminal of the filter element Z21 and the first terminal of the filter element C21 are connected between the power supply terminal VCS of the optical communication reception connector 131 and the first terminal of the filter element FL1. The second terminal of the filter element Z21 and the second terminal of the filter element C21 are connected to the ground line.

The filter element FL1 has the insertion loss frequency characteristic shown in FIG. As shown in FIG. 22, the filter element FL1 cuts off a band centered on 20 MHz. That is, the filter element FL1 blocks a frequency band lower than the relatively high frequency band blocked by the filter element C21.

Further, in the filter element FL1, since ferrite functions as a resonance suppressing component, anti-resonance with the filter element C21 is suppressed. Therefore, the filter element FL1 and the filter element C21 remove the noise component of the power supply of the optical communication reception connector 131 over a wide frequency band.
Therefore, the operation is stabilized by arranging the filter element Z21, the filter element C21, and the filter element FL1 at the power supply terminal VCS and the power supply line of the optical communication reception connector 131.

<Panel relay board>
As shown in FIG. 23, the panel relay board 83 has a motor 142 for driving the movable accessory 85 and a driver IC 141 for driving the motor 142. The motor 142 is composed of a two-phase excitation type stepping motor, and is rotated by the drive currents of the A-phase, B-phase, A-phase, and B-phase inversion signals.

The driver IC 141 includes the A-phase input terminal APHASE and the B-phase input terminal BPHASE, and the A-phase, B-phase, and A-phase, respectively, in which the A-phase and B-phase timing signals are input from the sub-control board 72 via the sub-relay board 69. It has an A-phase output terminal AOUT1, an anti-A-phase output terminal AOUT2, a B-phase output terminal BOUT1, and an anti-B-phase output terminal BOUT2 for outputting each of the B-phase inversion signals.

A timing signal whose phase is 90 degrees out of phase with that of the A-phase input terminal APHASE is input to the B-phase input terminal BPHASE. When the motor 142 is driven in the forward rotation direction, a timing signal whose phase is 90 degrees behind that of the A-phase input terminal APHASE is input to the B-phase input terminal BPHASE. When the motor 142 is driven in the reverse direction, a timing signal whose phase is 90 degrees ahead of that of the A-phase input terminal APHASE is input to the B-phase input terminal BPHASE.

The driver IC 141 has an A-phase output terminal AOUT1, an anti-A-phase output terminal AOUT2, a B-phase output terminal BOUT1, and an anti-B-phase output terminal based on the timing signals input to the A-phase input terminal APHASE and the B-phase input terminal BPHASE, respectively. Each phase current for driving the motor 142 is output from BOUT2.

Overvoltage prevention element (first overvoltage prevention element) Z31 to Z34 between A-phase output terminal AOUT1, anti-A-phase output terminal AOUT2, B-phase output terminal BOUT1, anti-B-phase output terminal BOUT2 and ground (ground line) Are provided respectively. Each overvoltage prevention element Z31 to Z34 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to ground.

That is, each overvoltage prevention element Z31 to Z34 is composed of a voltage-dependent resistor, and when an overvoltage (including the above-mentioned abnormal voltage and surge voltage) occurs, the resistance value changes, so that the A-phase output terminal AOUT1 , Anti-A phase output terminal AOUT2, B phase output terminal BOUT1, anti-B phase output terminal BOUT2 do not input overvoltage (backflow phenomenon in which electricity flows into the output terminal), so even if an abnormal voltage (overvoltage) occurs The internal circuit of the driver IC 141 will not be destroyed. In the present embodiment, each overvoltage prevention element Z31 to Z34 is composed of a varistor having a nominal varistor voltage of 22V1mA, which shows a current-voltage characteristic in FIG. 24.

The driver IC 141 has a power supply terminal VCS, a ground terminal GND, a reset terminal RESET for resetting the driver IC 141, and a sleep terminal SLEEP for putting the driver IC 141 into a standby state (sleep state).

The reset terminal RESET and the sleep terminal SLEEP are connected to each other and are pulled up to the power supply line (5V) by the resistor R31 (hereinafter, simply referred to as "pull-up").

An overvoltage prevention element (second overvoltage prevention element) Z35 is provided between the reset terminal SETET and the sleep terminal SLEEP and the ground (ground line). It is desirable that the overvoltage prevention element Z35 is arranged in the vicinity (for example, less than 1 cm) of the reset terminal RESET and the sleep terminal SLEEP of the driver IC 141.

By providing the overvoltage prevention element Z35 in this way, when a surge voltage is generated in the signal line of the reset terminal RESET or the sleep terminal SLEEP, the surge voltage is induced to the ground, and the surge voltage is induced in the reset terminal RESET or the sleep terminal SLEEP. Is not input, so that the driver IC 141 is prevented from being reset or entering a standby state. Further, the shorter the distance between the overvoltage prevention element Z35 and the reset terminal RESET or the sleep terminal SLEEP, the higher the surge voltage induction effect.

In the present embodiment, the overvoltage prevention element Z35 is composed of the same varistor as each overvoltage prevention element Z31 to Z34. In the present embodiment, a two-phase excitation type stepping motor is used as the motor for driving the movable accessory 85, but a one- or two-phase excitation type stepping motor or the like may be used.

<Sub-relay board (buffer IC for operation switch and its peripheral circuits)>
As shown in FIG. 25, the sub-relay board 69 has a buffer IC 151 for temporarily storing the detection state of the operation switch 271. The buffer IC 151 is composed of a three-state buffer, constitutes an input port for inputting a signal from the operation switch 271, and changes the state of the input port to a sub CPU (not shown) of the sub control board 72 connected by a local bus. ) Is output.

The operation switch 271 includes a LEFT switch 152s that detects the operating state of the LEFT button 152, a RIGHT switch 153s that detects the operating state of the RIGHT button 153, an UP switch 154s that detects the operating state of the UP button 154, and a DOWN button 155. It has a DOWN switch 155s for detecting the operating state of the ENTER button 156, an ENTER switch 156s for detecting the operating state of the ENTER button 156, and a PUSH switch 157s for detecting the operating state of the PUSH button 157.

Since each switch 152s to 157s is an active low type momentary switch that outputs a ground level signal when each button 152 to 157 is operated (that is, when it is pressed), one end is ground. The other end is connected to the power supply line via R1 to R6 in order to output a power supply level signal when the buttons 152 to 157 are not operated (not shown).

In the present embodiment, an example in which the switches 152s to 157s are configured by push button switches will be described, but the switches 152s to 157s are configured by other switches such as a shield type or a reflection type photo switch. May be done.

The buffer IC 151 has a power supply terminal VCS to which a drive voltage (DC voltage of 3.3 V) is supplied, a ground terminal GND, and input terminals A1 to A8. The LEFT switch 152s pulled up by the resistor R1 is connected to the input terminal A1 via the resistor R7. The RIGHT switch 153s pulled up by the resistor R2 is connected to the input terminal A2 via the resistor R8.

The UP switch 154s pulled up by the resistor R3 is connected to the input terminal A3 via the resistor R9. A DOWN switch 155s pulled up by the resistor R4 is connected to the input terminal A4 via the resistor R10.

An ENTER switch 156s pulled up by the resistor R5 is connected to the input terminal A5 via the resistor R11. A PUSH switch 157s pulled up by the resistor R6 is connected to the input terminal A6 via the resistor R12.

In the present embodiment, the resistors R1 to R6 are pulled up to a power supply line to which a DC voltage of 5 V is supplied, and the resistance value is 4.7 kΩ, and the signal line of the DC voltage of 5 V is 3 The resistance value of each of the resistors R7 to R12 for stepping down to the signal line of the DC voltage of .3 V is 10 kΩ.

Overvoltage prevention elements Z41 to Z46 are provided on the input terminals A1 to A6, respectively. Each overvoltage prevention element Z41 to Z46 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to ground.

That is, each overvoltage prevention element Z41 to Z46 is composed of a voltage-dependent resistor, and when an abnormal voltage (overvoltage, surge voltage, etc.) occurs, the resistance value changes, so that an overvoltage is applied to the input terminals A1 to A6. Since no input is made, the sub CPU (not shown) mounted on the sub-control board 72 connected to the buffer IC 151 by the local bus does not erroneously detect the input state of each switch switch 152s to 157s. In the present embodiment, each of the overvoltage prevention elements Z41 to Z46 is composed of a varistor having a nominal varistor voltage of 27 V1 mA whose current-voltage characteristic is shown in FIG. 24.

By providing the overvoltage prevention elements Z41 to Z46 in this way, the buffer IC 151 is protected from external noise when a surge voltage is generated in the operation switch 271. By providing a Schmitt trigger on the switches 152s to 157s side or the buffer IC 151 side of the resistors R7 to R12, chattering caused by the switches 152s to 157s may be suppressed.

When a Schmitt trigger is provided on each switch 152s to 157s side, an IC driven by a DC voltage of 5V is used, and when a Schmitt trigger is provided on the buffer IC 151 side, an IC driven by a DC voltage of 3.3V is used.

<Modification example of sub-relay board (buffer IC for operation switch and its peripheral circuits)>
In FIG. 25, an example in which the overvoltage prevention elements Z41 to Z46 are provided between the operation switch 271 and the buffer IC 151 is shown, but as shown in FIG. 26, the overvoltage is replaced with the overvoltage prevention elements Z41 to Z46. Preventive elements D71 to D76 may be provided.

Each overvoltage protection element D71 to D76 has a Schottky barrier created by joining a metal and a semiconductor. In the present embodiment, each of the overvoltage prevention elements D71 to D76 is composed of a diode having a high surge withstand voltage resistance.

In the overvoltage prevention element D71, an anode is connected between the resistor R71 and the resistor R72 provided in place of the resistor R7, and a cathode is connected to a 3.3V or 5V DC voltage line for operating the buffer IC 151. There is. In the overvoltage prevention element D72, the anode is connected between the resistor R73 and the resistor R74 provided in place of the resistor R8, and the cathode is connected to the DC voltage line of 3.3 V or 5 V.

In the overvoltage prevention element D73, the anode is connected between the resistor R75 and the resistor R76 provided in place of the resistor R9, and the cathode is connected to the DC voltage line of 3.3 V or 5 V. In the overvoltage prevention element D74, the anode is connected between the resistor R77 and the resistor R78 provided in place of the resistor R10, and the cathode is connected to the DC voltage line of 3.3 V or 5 V.

In the overvoltage prevention element D75, the anode is connected between the resistor R79 and the resistor R80 provided in place of the resistor R11, and the cathode is connected to the DC voltage line of 3.3 V or 5 V. In the overvoltage prevention element D76, the anode is connected between the resistor R81 and the resistor R82 provided in place of the resistor R12, and the cathode is connected to the DC voltage line of 3.3 V or 5 V.

By providing the overvoltage prevention elements D71 to D76 in this way, when a surge voltage is generated in the operation switch 271, the surge voltage becomes 3.3V or 5V due to the rectifying action of the diode (one direction from the anode to the cathode). Since it is guided to the DC voltage line, the buffer IC 151 is protected from external noise.

In this modification, the resistance value of each of the resistors R71 to R82 for stepping down the signal line of the DC voltage of 5 V to the signal line of the DC voltage of 3.3 V is 5 kΩ. However, since the resistance values of the resistors R71 to R82 need only be stepped down from the DC voltage of 5 V to the DC voltage of 3.3 V, any combination (for example, the resistor 71) such that the total of the two resistance values is 10 kΩ is used. 1 kΩ, resistance 72 may be 9 kΩ, etc.).

Further, as another modification, as shown in FIG. 27, overvoltage prevention elements D71 to D76 may be provided in addition to the overvoltage prevention elements Z41 to Z46. With this configuration, when a surge voltage is generated in the operation switch 271, it is guided to the ground via the overvoltage prevention elements Z41 to Z46 according to the frequency and inrush speed of the surge voltage, and the overvoltage prevention element D71. The buffer IC 151 is protected from external noise because it is guided to a 3.3V or 5V DC voltage line via D76.

<Amplifier board>
As shown in FIG. 28, the amplifier board 81 (sound source conversion unit) has a sound IC 161 (sound source conversion means) and a digital amplifier IC 162 (amplification means).

The sound IC 161 converts the format of digital sound data transmitted by serial communication from the sub-relay board 69 into a format that can be received by the digital amplifier IC 162.

The sound IC 161 has a power supply terminal VDD, a ground terminal VSS, a reset terminal PDN, an input terminal RX0, a data output terminal STDO, a clock output terminal LRCK, and a clock output terminal BICK.

The power supply terminal VDD is supplied with a voltage of 3.3 V, which is a voltage of 12 V supplied via the sub-relay board 69, which is stepped down by a power supply circuit (not shown) in the amplifier board 81. A signal representing sound source data is input to the input terminal RX0. A signal representing the sound source data whose format has been converted is output from the data output terminal STDO.

From the clock output terminal LRCK, a clock signal indicating the switching timing between the left channel and the right channel of the sound source data output from the data output terminal STDO is output. The clock output terminal BICK outputs a synchronization clock for sound source data output from the data output terminal STDO.

The amplifier board 81 has an input terminal TXD. A signal representing the sound source data output from the sub-relay board 69 is input to the input terminal TXD. The data line between the input terminal TXD and the input terminal RX0 of the sound IC 161 includes a pull-down resistor R51 connected to the data line and ground, a low-pass filter 163, a filter element FB1 (fourth filter element), and FB2 ( A fifth filter element) and a Schmitt trigger circuit 164 are provided.

In the present embodiment, the resistance value of the pull-down resistor R51 is 1 kΩ. The low-pass filter 163 is composed of a resistor R52 connected in series with the data line and a capacitor C51 (third filter element) connected to the data line and ground.

The resistance value of the resistor R52 is 220Ω, and the capacitance of the capacitor C51 is 100pF. Each of the filter elements FB1 and FB2 is composed of ferrite beads having the frequency-impedance characteristic shown in FIG. 29. That is, each of the filter elements FB1 and FB2 has a characteristic of removing noise in the 100 MHz band, which is a higher frequency band than the sound source data input to the input terminal RX0.

The Schmitt trigger circuit 164 is composed of two Schmitt trigger inverters IC1-1 and IC1-2 connected in series with the data line. Each Schmitt trigger inverter IC1-1 and IC1-2 have two threshold values with respect to the input potential of the signal input to the input terminal, and the input potential is the high side threshold value (for example, 2.7 V). ) And a change in which the input potential is below the threshold value on the Low side (for example, 1.6 V), the output state is changed with hysteresis to output an inverted signal from the output terminal.

One of the Schmitt trigger inverters IC1-1 and IC1-2 functions as a Schmitt trigger circuit, but the other is provided to match the polarities, so that an inverter may be applied instead. Further, the amplifier board 81 may be provided with one Schmitt trigger instead of the Schmitt trigger inverters IC1-1 and IC1-2.

The amplifier board 81 has a reset terminal RESET1. The reset signal output from the sub-relay board 69 is input to the reset terminal SETET1. A filter element Z51 (second filter element), a pull-down resistor R54, a low-pass filter 165, and a Schmitt trigger circuit 166 are provided on the reset line between the reset terminal SETT1 and the reset terminal PDN of the sound IC161. ..

In the present embodiment, the filter element Z51 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage (overvoltage, surge voltage, etc.) to the ground. In the present embodiment, the filter element Z51 is composed of the same varistor as each overvoltage prevention element Z41 to Z46.

By providing the filter element Z51 in the reset line connected to the reset terminal PDN of the sound IC 161 in this way, it is possible to prevent the sound IC 161 from being reset when a surge voltage is generated in the reset line.

The resistance value of the pull-down resistor R54 is 10 kΩ. The low-pass filter 165 is composed of a resistor R55 connected in series with the reset line and a capacitor C52 (first filter element) connected to the reset line and ground. The resistance value of the resistor R55 is 1 kΩ, and the capacitance of the capacitor C52 is 0.01 μF.

The Schmitt trigger circuit 166 is composed of two Schmitt trigger inverters IC1-3 and IC1-4 connected in series with the reset line. Each Schmitt trigger inverter IC1-3 and IC1-4 have two threshold values with respect to the input potential of the signal input to the input terminal, and the input potential is the high side threshold value (for example, 2.7 V). ) And a change in which the input potential is below the threshold value on the Low side (for example, 1.6 V), the output state is changed with hysteresis to output an inverted signal from the output terminal.

One of the Schmitt trigger inverters IC1-3 and IC1-4 functions as a Schmitt trigger circuit, but the other is provided to match the polarity, so that an inverter may be applied instead. Further, the amplifier board 81 may be provided with one Schmitt trigger instead of the Schmitt trigger inverters IC1-3 and IC1-4.

The digital amplifier IC 162 converts the sound source data output from the sound IC 161 into an analog signal, and amplifies the converted analog acoustic signal. The lower left woofer DD25L vibrates the diaphragm 25a (see FIGS. 11 and 12) by the acoustic signal (electrical signal) amplified by the digital amplifier IC162.

The digital amplifier IC 162 includes a power supply terminal VDD, output power supply terminals A and B, a ground terminal VSS, a reset terminal RESET, a data input terminal STDO, a clock input terminal LRCK, a clock input terminal BICK, and an output terminal OUT_A. , OUT_B.

The power supply terminal VDD is supplied with a voltage of 3.3 V, which is a voltage of 12 V supplied via the sub-relay board 69, which is stepped down by a power supply circuit (not shown) in the amplifier board 81. A DC voltage of 24 V is supplied from the power supply unit 44 to the input power supply terminals A and B.

The data input terminal STDO is connected to the data output terminal STDO of the sound IC 161. The clock input terminal LRCK is connected to the clock output terminal LRCK of the sound IC 161. The clock input terminal BICK is connected to the clock output terminal BICK of the sound IC 161. The output terminals OUT_A and OUT_B are connected to the + terminal and the-terminal of the lower left woofer DD25L, respectively.

A filter element Z52, a pull-down resistor R56, and a low-pass filter are provided on the reset line between the reset terminal SETT2 of the amplifier board 81 to which the reset signal transmitted from the sub-relay board 69 is input and the reset terminal SETT of the digital amplifier IC162. A 167, a Schmitt trigger circuit 168, and a filter element C53 are provided.

In the present embodiment, the filter element Z52 is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage, and induces an abnormal voltage to the ground. In the present embodiment, the filter element Z52 is composed of the same varistor as the filter element Z51.

By providing the filter element Z52 on the reset line connected to the reset terminal RESET of the digital amplifier IC 162 in this way, it is possible to prevent the digital amplifier IC 162 from being reset when a surge voltage is generated on the reset line.

The resistance value of the pull-down resistor R54 is 10 kΩ. The low-pass filter 167 is composed of a resistor R57 connected in series with the reset line and a capacitor C54 connected to the reset line and ground. The resistance value of the resistor R57 is 1 kΩ, and the capacitance of the capacitor C54 is 0.01 μF.

The Schmitt trigger circuit 168 is composed of two Schmitt trigger inverters IC1-5 and IC1-6 connected in series with the reset line. The Schmitt trigger inverters IC1-5 and IC1-6 have two threshold values with respect to the input potential of the signal input to the input terminal, and the input potential is the high side threshold value (for example, 2.7 V). The inverted signal is output from the output terminal by changing the output state with hysteresis in response to a change exceeding the above value and a change in the input potential below the threshold value (for example, 1.6 V) on the Low side.

One of the Schmitt trigger inverters IC1-5 and IC1-6 functions as a Schmitt trigger circuit, but the other is provided to match the polarities, so that an inverter may be applied instead.

The filter element C53 is composed of a passive element that accumulates and discharges electric charges. In the present embodiment, the filter element C53 is composed of a capacitor having a capacitance of 1000 pF.

Further, a filter element such as a ferrite bead and a capacitor is also provided for a line connecting the output terminals OUT_A and OUT_B of the digital amplifier IC162 and the + terminal and the-terminal of the lower left woofer DD25L, respectively, but the illustration is omitted.

Further, the digital amplifier IC 162 has a built-in PLL (Phase Locked Loop) circuit (not shown). An external time constant setting circuit (not shown) that determines the time constant of the loop filter constituting this PLL circuit is also provided with filter elements such as ferrite beads and a capacitor, but the illustration is omitted.

[Enclosure mixing process]
See FIG. 30 for an enclosure mixing process executed by a sub CPU (not shown) mounted on the sub control board 72 for sound source data input to the input terminal RX0 of the sound IC 161 of the amplifier board 81 described above. I will explain.

First, in step S1, the sub CPU determines whether or not there is a compressor instruction. In the present embodiment, "yes" or "no" of the compressor instruction is determined based on the effect determined by the sub CPU. Specifically, when executing the effect of generating wind from the bass reflex port 22 of the enclosure unit 20, the sub CPU determines “none” of the compressor instruction and generates wind from the bass reflex port 22 of the enclosure unit 20. When performing an effect that does not allow the compressor to be displayed, the presence or absence of the compressor instruction is determined.

If it is determined in step S1 that there is a compressor instruction (YES), the sub CPU executes the process of step S2. If it is determined that there is no compressor instruction (NO), the sub CPU executes the process of step S5.

In step S2, the sub CPU acquires a threshold for compressor processing. The threshold for compressor processing is preset according to the sound source data and stored in the sub ROM board 76.

The threshold for compressor processing is set with respect to the level (db) of the frequency band in which the diaphragm 25a of the enclosure unit 20 vibrates to generate wind from the bass reflex port 22. After executing the process of step S2, the sub CPU executes the process of step S3.

In step S3, the sub CPU acquires the ratio for compressor processing. The acquisition of the ratio for compressor processing is preset according to the sound source data and stored in the sub ROM board 76. After executing the process of step S3, the sub CPU executes the process of step S4.

In step S4, the sub CPU executes the compressor processing (compression means) based on the threshold for compressor processing acquired in step S2 and the ratio for compressor processing acquired in step S3.

In the compressor processing, the sub CPU compresses the level exceeding the threshold with a ratio (for example, 2: 1) with respect to the frequency component of the level (db) exceeding the threshold among the frequency components of the sound source data. After executing the process of step S4, the sub CPU executes the process of step S9.

In step S5, the sub CPU determines whether or not there is an expander instruction. In the present embodiment, "yes" or "no" of the expander instruction is determined based on the effect determined by the sub CPU.

Specifically, the sub CPU determines “none” of the expander instruction when executing an effect of generating a sound source data level wind from the bass reflex port 22 of the enclosure unit 20, and the bass reflex port of the enclosure unit 20. When performing an effect of generating a wind stronger than the sound source data level from 22, the presence or absence of the expander instruction is determined.

If it is determined in step S5 that there is an expander instruction (YES), the sub CPU executes the process of step S6. If it is determined that there is no expander instruction (NO), the sub CPU executes the process of step S9.

In step S6, the sub CPU acquires a threshold for expander processing. The threshold for expander processing is preset according to the sound source data and stored in the sub ROM board 76.

The threshold for expander processing is set with respect to the level (db) of the frequency band in which the diaphragm 25a of the enclosure unit 20 vibrates to generate wind from the bass reflex port 22. After executing the process of step S6, the sub CPU executes the process of step S7.

In step S7, the sub CPU acquires the ratio for the expander processing. The acquisition of the ratio for the expander processing is preset according to the sound source data and stored in the sub ROM board 76. After executing the process of step S7, the sub CPU executes the process of step S8.

In step S8, the sub CPU executes the expander processing (increasing means) based on the threshold for the expander processing acquired in step S2 and the ratio for the expander processing acquired in step S3.

In the expander processing, the sub CPU amplifies the level exceeding the threshold with a ratio (for example, 1: 2) with respect to the frequency component of the level (db) exceeding the threshold among the frequency components of the sound source data. After executing the process of step S8, the sub CPU executes the process of step S9.

In step S9, the sub CPU executes a sound data output process for outputting sound source data to the amplifier board 81. After executing the process of step S9, the sub CPU ends the enclosure mixing process.

In this way, the sub CPU determines the compressor instruction to "Yes" for the sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20, and performs the compressor processing on the level of the frequency band that generates wind. By compressing with, the effect of not generating wind from the bass reflex port 22 of the enclosure unit 20 is executed.

For example, when the threshold TH is set as shown in FIG. 31, as shown in FIG. 32, the level exceeding the threshold TH of each frequency component of the sound source data is the ratio (for example, 2: 1) due to the compressor processing. Compressed with. As a result, the voice waveform shown in FIG. 34 (a) becomes the voice waveform shown in FIG. 34 (b), and the vibration of the diaphragm 25a is suppressed with respect to the level (db) of the frequency band in which the wind is generated.

Further, the sub CPU determines the compressor instruction to "None" for the sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20, and compresses the level of the frequency band for generating wind by compressor processing. By not allowing the enclosure unit 20, the effect of generating wind from the bass reflex port 22 of the enclosure unit 20 is executed.

Further, the sub-control board 72 determines the expander instruction to "Yes" for the sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20, and extracts the level of the frequency band that generates wind. By amplifying by panda processing, the effect of generating a wind stronger than the sound source data level is executed from the bass reflex port 22 of the enclosure unit 20.

For example, when the threshold TH is set as shown in FIG. 31, as shown in FIG. 33, the level exceeding the threshold TH of each frequency component of the sound source data is the ratio (for example, 1: 2) due to the expander processing. ) Amplifies. As a result, the voice waveform shown in FIG. 34 (a) becomes the voice waveform shown in FIG. 34 (c), and the vibration of the diaphragm 25a is increased with respect to the frequency band in which the wind is generated.

Further, the sub-control board 72 determines the expander instruction to "none" for the sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20, and extracts the level of the frequency band that generates wind. By not amplifying by the panda processing, the effect of generating the wind of the sound source data level from the bass reflex port 22 of the enclosure unit 20 is executed.

Although the example in which the enclosure mixing process described above is executed by the sub CPU mounted on the sub control board 72 has been described, the sound IC 161 mounted on the amplifier board 81 is executed instead of the sub CPU. May be good.

When the sound IC 161 executes the enclosure mixing process, the sound IC 161 has a built-in DSP (Digital Signal Processor), and the DSP reads a program for executing the enclosure mixing process from the sub ROM board 76 and executes the program. Configure to.

Further, in the enclosure mixing process described above, the threshold and ratio for the compressor process and the threshold and ratio for the expander process may be adjustable by the sub CPU mounted on the sub control board 72, and in particular, the effect of the effect. It may be adjustable according to the degree of expectation and the like.

For example, a plurality of thresholds and ratios for compressor processing and thresholds and ratios for expander processing are stored in the sub ROM board 76, and the sub CPU is used to perform a bonus game, an AT game, or the like. The threshold and ratio for compressor processing or the threshold and ratio for expander processing may be selected according to the degree of expectation for winning in a gaming state that is advantageous to the player.

Further, by converting the sound source data stored in the sub ROM board 76 into sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20, the expander processing can be omitted. That is, steps S5 to S8 of the enclosure mixing process described above can be omitted.

On the contrary, the compressor processing can be omitted by converting the sound source data stored in the sub ROM board 76 into sound source data in which wind cannot be generated from the bass reflex port 22 of the enclosure unit 20. That is, steps S1 to S4 of the enclosure mixing process described above can be omitted.

<Various effects>
As described above, the gaming machine 1 according to the embodiment of the present invention has a power supply circuit at a voltage supply terminal VBB to which a power supply voltage for maintaining data stored in the main RAM of the microprocessor 94 is supplied. When the power supply voltage is not supplied from 111, the power supply voltage is supplied from the electrolytic capacitor B1.

Therefore, in the gaming machine 1 according to the embodiment of the present invention, even if the power supply voltage is not supplied from the power supply circuit 111, the power supply voltage for maintaining the data stored in the main RAM is supplied from the electrolytic capacitor B1. Therefore, it is possible to prevent a problem from occurring in the stored contents of the main RAM.

Further, in the gaming machine 1 according to the embodiment of the present invention, since the electrolytic capacitor B1 is connected to the voltage supply terminal VBB of the microprocessor 94 via a harness, the microprocessor 94 and the electrolytic capacitor B1 are connected by separate substrates. Can be configured.

Therefore, the gaming machine 1 according to the embodiment of the present invention can supply the power supply voltage for maintaining the data stored in the main RAM from different boards, so that the circuit of the main control board 71 is changed. The storage capacity of the electrolytic capacitor B1 can be changed according to the device specifications of the game machine 1. Therefore, in the gaming machine 1 according to the embodiment of the present invention, the main control board 71 can be commonly used even for gaming machines having different device specifications.

Further, the gaming machine 1 according to the embodiment of the present invention induces the abnormal voltage to the ground by the filter element Z1 when the power supply voltage for maintaining the data stored in the main RAM becomes an abnormal voltage. Therefore, it is possible to prevent a problem from occurring in the stored contents of the main RAM.

Further, the gaming machine 1 according to the embodiment of the present invention operates the power supply management IC 112 by removing the noise component of the power supply voltage for operating the power supply management IC 112 that manages the power supply of the microprocessor 94 by the filter element C2. In order to prevent the power management IC 112 from malfunctioning and outputting a reset signal from the reset output terminal RESET by inducing the abnormal voltage to the ground by the filter element Z2 when the power supply voltage for this purpose becomes an abnormal voltage. , Can operate stably.

Further, the gaming machine 1 according to the embodiment of the present invention removes noise components of the power supply voltage of the optical communication receiving connector 101 composed of an optical device over a wide frequency band by a plurality of filter elements L2, L3, C12, and C13. By doing so, it is possible to improve the reliability of the signal output from the optical device in order to prevent the optical device from malfunctioning.

Further, in the gaming machine 1 according to the embodiment of the present invention, the ferrite of the filter elements L2 and L3 suppresses the antiresonance between the plurality of filter elements L2, L3, C12 and C13, so that the power supply voltage of the optical device is changed. The noise component can be completely removed over a wide frequency band.

Further, the gaming machine 1 according to the embodiment of the present invention has a low-pass filter 165 and a Schmidt trigger circuit provided in a reset line for resetting the sound IC 161 that converts sound source data input from the input terminal TXD into an electric signal. By removing the noise component input to the reset terminal PDN of the sound IC 161 by the 166, the sound IC 161 is prevented from being reset due to the influence of the noise. Therefore, the gaming machine 1 according to the embodiment of the present invention can prevent the sound quality of the reproduced sound from deteriorating.

Further, in the gaming machine 1 according to the embodiment of the present invention, when the voltage of the reset terminal PDN of the sound IC 161 becomes an abnormal voltage, the abnormal voltage is induced to the ground by the filter element Z51 to reduce the abnormal voltage. It prevents the sound IC 161 from being reset due to the influence. Therefore, the gaming machine 1 according to the embodiment of the present invention can prevent the sound quality of the reproduced sound from deteriorating.

Further, the gaming machine 1 according to the embodiment of the present invention is input to the reset terminal SET of the digital amplifier 162 by the low-pass filter 167 and the Schmitt trigger circuit 168 provided on the reset line for resetting the digital amplifier 162. By removing the noise component, it is possible to prevent the digital amplifier 162 from being reset due to the influence of noise. Therefore, the gaming machine 1 according to the embodiment of the present invention can prevent the sound quality from being deteriorated due to the sound interruption of the reproduced sound or the like.

Further, in the gaming machine 1 according to the embodiment of the present invention, when the voltage of the reset terminal RESET of the digital amplifier 162 becomes an abnormal voltage, the abnormal voltage is induced to the ground by the filter element Z52, thereby causing the abnormal voltage. Prevents the digital amplifier 162 from being reset due to the influence of. Therefore, the gaming machine 1 according to the embodiment of the present invention can prevent the sound quality of the reproduced sound from deteriorating.

Further, in the gaming machine 1 according to the embodiment of the present invention, the influence of noise on the sound IC by the low-pass filter 163, the filter elements FB1, FB2 and the Schmitt trigger circuit 164 provided in the data line for transmitting the sound source data. Since it is possible to prevent the received sound source data from being transmitted, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

Further, in the gaming machine 1 according to the embodiment of the present invention, the noise component of the power supply voltage of the optical communication receiving connector 131 composed of an optical device is removed by a plurality of filter elements FL1, C21, Z21 over a wide frequency band. Prevents the optical device from malfunctioning. Therefore, the gaming machine 1 according to the embodiment of the present invention can prevent a communication abnormality from occurring.

Further, in the gaming machine 1 according to the embodiment of the present invention, the filter element Z21 is arranged in the vicinity of the optical communication receiving connector 131, so that the noise component is removed from the power supply terminal of the optical communication receiving connector 131. Since the drive voltage immediately after is supplied, the optical communication reception connector 131 can be driven with a stable drive voltage immediately after the noise component is removed.

Further, in the gaming machine 1 according to the embodiment of the present invention, the noise of the electric signal output from the optical communication receiving connector 131 including the optical device is removed by the Schmitt trigger S1, so that the communication abnormality is detected in the communication IC 133. Can be prevented.

Further, the gaming machine 1 according to the embodiment of the present invention has each input terminal A1 of the buffer IC 151 constituting an input port for storing the detection states of the plurality of switches 152s to 157s for detecting the operation of the player. By providing the overvoltage prevention elements Z41 to Z46 in ~ A6, when the power supply voltage of each input terminal A1 to A6 of the buffer IC 151 becomes an abnormal voltage, the abnormal voltage is guided to the ground by the overvoltage prevention elements Z41 to Z46. Therefore, the input port can be protected from external noise.

Further, in the gaming machine 1 according to the embodiment of the present invention, when the operation of the player is detected, the plurality of switches 152s to 157s output ground level signals, and the input terminals A1 to A6 of the buffer IC 151 and the switches 152s. When line resistors R7 to R12 are provided between ~ 157s and the output sides of a plurality of switches 152s to 157s are pulled up by resistors R1 to R6, respectively, so that the player's operation is not detected. The level of the signal input to the input terminals A1 to A6 of the buffer IC 151 can be stabilized.

Further, the gaming machine 1 according to the embodiment of the present invention has each input terminal A1 of the buffer IC 151 constituting an input port for storing the detection states of the plurality of switches 152s to 157s for detecting the operation of the player. By providing the overvoltage prevention elements D71 to D76 in ~ A6, when the power supply voltage of each input terminal A1 to A6 of the buffer IC 151 becomes an abnormal voltage, the abnormal voltage is sent to the power supply line by the overvoltage prevention elements D71 to D76. Since it is induced, the input port can be protected from external noise.

Further, the gaming machine 1 according to the embodiment of the present invention has output terminals AOUT1, AOUT2, BOUT1, and BOUT2 of the driver IC 141 constituting a driver circuit for driving and controlling the motor 142 for driving the movable accessory 85. By providing the overvoltage prevention elements Z41 to Z46 in the driver IC 141, when a surge voltage is generated in each output terminal AOUT1, AOUT2, BOUT1 and BOUT2 of the driver IC 141, the surge current due to the surge voltage is prevented from flowing back to the driver IC 141. , The internal element of the driver circuit can be protected from the surge voltage.

Further, in the gaming machine 1 according to the embodiment of the present invention, since the reset terminal RESET and the sleep terminal SLEEP of the driver IC 141 constituting the driver circuit are connected to the ground line via the overvoltage prevention element Z35, the reset terminal When a surge voltage is generated in the RESET or the sleep terminal SLEEP, the internal element of the driver circuit can be protected from the surge voltage.

Further, the gaming machine 1 according to the embodiment of the present invention compresses the level (dB) of the frequency band that generates wind with respect to the sound source data that can generate wind from the bass reflex port 22 of the enclosure unit 20. By compressing and outputting to the digital amplifier IC 162, an effect that does not generate wind from the bass reflex port 22 of the enclosure unit 20 is executed.

Further, the gaming machine 1 according to the embodiment of the present invention outputs the level (dB) of the sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20 to the digital amplifier IC 162 without being compressed by the compressor processing. By doing so, the effect of generating wind from the bass reflex port 22 of the enclosure unit 20 is executed.

Further, the gaming machine 1 according to the embodiment of the present invention expands the level (dB) of the frequency band that generates wind with respect to the sound source data that can generate wind from the bass reflex port 22 of the enclosure unit 20. By amplifying with and outputting to the digital amplifier IC 162, an effect of generating a wind stronger than the sound source data level is executed from the bass reflex port 22 of the enclosure unit 20.

Further, the gaming machine 1 according to the embodiment of the present invention uses the digital amplifier IC 162 without amplifying the level (dB) of the sound source data capable of generating wind from the bass reflex port 22 of the enclosure unit 20 by the expander processing. By outputting, the effect of generating the wind of the sound source data level from the bass reflex port 22 of the enclosure unit 20 is executed.

As described above, the gaming machine 1 according to the embodiment of the present invention has an effect of not generating wind, an effect of generating wind at a sound source data level, and a wind stronger than the sound source data level, based on common sound source data. It is possible to execute the effect to be generated.

Although the case where the embodiment of the present invention is applied to a pachislot machine has been described above, the present invention can also be applied to other gaming machines (for example, pachinko machines, slot machines, etc.).

[Other expandability of gaming machines according to the present invention]
In the pachislot machine (game machine 1) of the above embodiment, the player's medal insertion operation (that is, the operation of inserting a hand-held medal into the medal insertion slot DD5, or the credited medal is inserted into the MAX bet button DD8 or If the game is started by (1 operation of operating the bet button and inserted) and the medal is paid out when the game is finished, the medal is paid out from the medal payout outlet DD14 by driving the hopper device HP. Alternatively, although the credited form has been described, the present invention is not limited thereto.

For example, for all forms in which a player inputs a game medium necessary for a game, a game is performed based on the game medium, and a privilege is given based on the result of the game (for example, a medal is paid out). The present invention can be applied. That is, not only the game medium is input (hanged) and the game medium is paid out by the physical movement of the player, but also the main control circuit (main control board 71) itself uses the game medium owned by the player. It may be in a form that is electromagnetically managed and enables games without medals. In this case, it is the game medium management device that is mounted (connected) to the main control circuit (main control board 71) and manages the game medium that electromagnetically manages the game medium owned by the player. May be good.

In this case, the game medium management device has a ROM and RWM (or RAM), and is a device provided in the game machine, and is capable of bidirectional communication with an external game medium handling device (not shown) via a predetermined interface. (That is, the operation of providing the game medium necessary for the player to perform the operation of inserting the game medium) or the winning role related to the payout of the game medium (that is, the operation of lending the game medium). When the winning combination is established), the game medium is paid out (that is, the player is made to acquire the game medium necessary for paying out the game medium), or the game medium used for the game is electromagnetically used. It suffices that the operation of recording is possible. Further, the game medium management device not only manages the actual number of game media, but also, for example, a possessed game medium number display device (not shown) that displays the number of owned game media based on the management result of the number of game media. May be provided on the front surface of the pachislot machine (game machine 1) to manage the number of game media displayed on the possessed game medium number display device. That is, the game medium management device may be capable of recording and displaying the total number of game media that the player can use for the game by an electromagnetic method.

Further, in this case, the game medium management device may have a performance (function) capable of allowing the player to freely transmit a signal indicating the number of recorded game media to an external game medium handling device. desirable. Further, it is desirable that the game medium management device has a performance that the number of recorded game media cannot be reduced except when the player directly operates the game medium management device. Further, when an external connection terminal plate (not shown) is provided between the game medium management device and the external game medium handling device, the game medium management device must be via the external connection terminal plate. It is desirable that the player has the ability to not transmit a signal indicating the number of recorded game media.

In addition to the above, the gaming machine is provided with a lending operating means, a return (settlement) operating means, and an external connection terminal plate that can be operated by the player. Insertion port for recording media (for example, IC card), non-contact communication antenna for depositing electronic money from mobile terminals, other various operation means such as lending operation means, return operation means, external connection on the gaming medium handling device side A terminal plate may be provided (neither is shown).

As a flow of the game at that time, for example, the player deposits valuable value into the game medium handling device by any of the above methods, and a predetermined number of valuable values are based on the operation of any of the above lending operation means. Is subtracted, and the game medium corresponding to the subtracted valuable value is increased from the game medium handling device to the game medium management device. Then, the player plays a game, and if a game medium is required, the above operation is repeated. After that, as a result of the game, a predetermined number of game media are acquired, and when the game is ended, the number of game media is increased from the game media management device to the game media handling device by operating any of the above return operation means. Is transmitted, and the game medium handling device discharges the recording medium on which the number of the game media is recorded. Further, when the game medium management device transmits the number of game media, the game medium management device clears the number of game media stored by itself. The player takes the discharged recording medium to a prize counter or the like for exchanging prizes, or moves the game counter to play a game on another game table based on the recorded game medium.

In the above example, the total number of gaming media is transmitted from the gaming media management device to the gaming media handling device, but only the number of gaming media desired by the player is transmitted on the gaming machine or the gaming media handling device side, and the game is played. The gaming medium possessed by the person may be divided and processed. Further, in the above example, the game medium handling device discharges the recording medium, but cash or a cash equivalent may be discharged, or may be stored in a mobile terminal or the like. Further, the game medium handling device may be capable of inserting a member recording medium of the game hall, storing the game medium in the member recording medium, and making it possible to replay the game using the stored game medium at a later date. ..

Further, in the game machine or the game medium handling device, a lock operation for locking the game medium or valuable value data communication can be executed on the game medium handling device or the game medium management device by operating a predetermined operating means (not shown). May be. In that case, the player may be stored by setting information such as a one-time password that only the player can know, or by an imaging means provided in the game machine or the game medium handling device.

As described above, the game medium management device may be capable of playing games only without medals, or the game medium is inserted (hanged) by the physical movement of the player, and the game medium is loaded. It may be possible to play in both a form in which the game is paid out and a form in which the game is possible without a medal. In the latter case, the game medium management device may adopt a method of directly controlling the selector 46 and the hopper device HP described above, and these are controlled by the main control circuit (main control board 71). Based on the transmission of the control result, it is also possible to adopt a method capable of controlling the total number of game media that the player can use for the game to be recorded and displayed by an electromagnetic method.

Further, in the above example, the case where the game medium management device is applied to a pachislot machine is described. It is also possible to manage the game medium of.

When the above-mentioned game medium management device is provided, the number of devices such as the selector 46 and the hopper device HP inside the game machine can be reduced as compared with the case where the game medium is physically used for the game. Not only can the cost and manufacturing cost be reduced, but also the player can be prevented from coming into direct contact with the gaming medium, the gaming environment can be improved, noise can be reduced, and the number of devices can be reduced. It is also possible to reduce the power consumption of. Further, when the above-mentioned game medium management device is provided, it is possible to prevent fraudulent acts through the game medium and the slot and the payout port of the game medium. That is, when the above-mentioned game medium management device is provided, it is possible to provide a game machine capable of improving various environments surrounding the game machine.

[Gist of the invention]
<Summary 1>
Japanese Patent Application Laid-Open No. 2006-136345 proposes a backup power supply connected to a RAM built in a main CPU and a noise removing capacitor connected to the wiring of the backup power supply.

It is common to take measures against noise by using a noise removal capacitor connected to the wiring of the backup power supply as in a conventional game machine, but noise due to overvoltage / current exceeding the capacitance of the noise removal capacitor is generated. If it occurs, the noise cannot be removed and the voltage of the wiring of the backup power supply becomes an indefinite value, which may cause a problem such as a memory error in the stored contents of the storage means such as RAM.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of preventing a defect in the stored contents of a storage means.

The gaming machine according to the present invention
A control unit (microprocessor 94) that executes control regarding the progress of the game, and
A power management unit (power management IC 112) for managing the power supply of the control unit, and
A first power supply unit (power supply circuit 111) for supplying a power supply voltage to the control unit and the power supply management unit, and
A second power supply unit (electrolytic capacitor B1) that supplies a power supply voltage to the control unit even when the power supply voltage is not supplied from the first power supply unit.
It is provided between the second power supply unit and the control unit, and includes a power supply regulating means for regulating the power supply voltage supplied from the second power supply unit.
The control unit
Arithmetic processing means (main CPU) that performs arithmetic processing,
A first storage means (main RAM) in which the arithmetic processing means reads and writes data, and
A second storage means (main ROM) in which data for the arithmetic processing means to control is stored, and
A first voltage terminal (VCC) for receiving the supply of the power supply voltage from the first power supply unit, and
It has a second voltage terminal (VBB) for receiving a supply of a power supply voltage for maintaining the data stored in the first storage means, and has.
The power supply regulating means is
A rectifying element (D1) provided between the first voltage terminal and the second voltage terminal,
A first filter element (C1) provided between the second voltage terminal and the ground,
It has a second filter element (Z1) provided between the second voltage terminal and the ground.
The power supply regulating means is
When the power supply voltage is supplied from the first power supply unit, the power supply voltage is supplied to the second voltage terminal and the second power supply unit.
When the power supply voltage is not supplied from the first power supply unit, the power supply voltage is supplied from the second power supply unit to the second voltage terminal, but the power supply voltage is supplied to the first voltage terminal. figure,
The first filter element accumulates a noise component as an electric charge and accumulates the noise component as an electric charge.
The second filter element has a configuration for inducing an abnormal voltage to ground.

With this configuration, the gaming machine according to the present invention supplies the power supply voltage to the second voltage terminal and the second power supply unit when the power supply voltage is supplied from the first power supply unit, and the first power supply unit. When the power supply voltage is not supplied from the first power supply unit, the power supply voltage is supplied from the second power supply unit to the second voltage terminal. Therefore, even if the power supply voltage is not supplied from the first power supply unit, the first storage means. Since the power supply voltage for maintaining the data stored in is supplied from the second power supply unit, it is possible to prevent a problem from occurring in the stored contents of the first storage means.

Further, in the gaming machine according to the present invention, when the power supply voltage for maintaining the data stored in the first storage means becomes an abnormal voltage, the abnormal voltage is induced to the ground by the second filter element. It is possible to prevent a problem from occurring in the stored contents of the first storage means.

According to the present invention, it is possible to provide a gaming machine capable of preventing a defect in the stored contents of the storage means.

<Summary 2>
In order to solve the same problems as in Abstract 1, the gaming machine according to the present invention is
A control unit (microprocessor 94) that executes control regarding the progress of the game, and
A power management unit (power management IC 112) for managing the power supply of the control unit, and
A first power supply unit (power supply circuit 111) for supplying a power supply voltage to the control unit and the power supply management unit, and
A second power supply unit (electrolytic capacitor B1) that supplies a power supply voltage to the control unit even when the power supply voltage is not supplied from the first power supply unit.
It is provided between the second power supply unit and the control unit, and includes a power supply regulating means for regulating the power supply voltage supplied from the second power supply unit.
The control unit
Arithmetic processing means (main CPU) that performs arithmetic processing,
A first storage means (main RAM) in which the arithmetic processing means reads and writes data, and
A second storage means (main ROM) in which data for the arithmetic processing means to control is stored, and
A first voltage terminal (VCC) for receiving the supply of the power supply voltage from the first power supply unit, and
It has a second voltage terminal (VBB) for receiving a supply of a power supply voltage for maintaining the data stored in the first storage means, and has.
The power supply regulating means is
A first filter element (C1) provided between the second voltage terminal and the ground,
It has a second filter element (Z1) provided between the second voltage terminal and the ground.
The first power supply unit is connected to the first voltage terminal and the second voltage terminal without a harness.
The second power supply unit is connected to the second voltage terminal via a harness, and is connected to the second voltage terminal.
The second filter element has a configuration for inducing an abnormal voltage to ground.

With this configuration, the gaming machine according to the present invention supplies the power supply voltage to the second voltage terminal and the second power supply unit when the power supply voltage is supplied from the first power supply unit, and the first power supply unit. When the power supply voltage is not supplied from the first power supply unit, the power supply voltage is supplied from the second power supply unit to the second voltage terminal. Therefore, even if the power supply voltage is not supplied from the first power supply unit, the first storage means. Since the power supply voltage for maintaining the data stored in is supplied from the second power supply unit, it is possible to prevent a problem from occurring in the stored contents of the first storage means.

Further, in the gaming machine according to the present invention, since the second power supply unit is connected to the second voltage terminal via the harness, the control unit and the second power supply unit can be configured by separate substrates. Therefore, since the gaming machine according to the present invention can supply the power supply voltage for maintaining the data stored in the first storage means from different boards, the circuit of the board on which the control unit is mounted is changed. Without this, the storage capacity of the second power supply unit can be changed according to the device specifications of the game machine. Therefore, in the gaming machine 1 according to the embodiment of the present invention, a substrate on which a control unit is mounted can be commonly used even for gaming machines having different device specifications.

Further, in the gaming machine according to the present invention, when the power supply voltage for maintaining the data stored in the first storage means becomes an abnormal voltage, the abnormal voltage is induced to the ground by the second filter element. It is possible to prevent a problem from occurring in the stored contents of the first storage means.

In the gaming machine according to the present invention,
The first filter element is composed of a passive element that accumulates and discharges electric charges.
The second filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, the gaming machine according to the present invention can remove the noise component of the power supply voltage for maintaining the data stored in the first storage means by the first filter element, and is stored in the first storage means. When the power supply voltage for maintaining the data becomes an abnormal voltage, the abnormal voltage can be induced to the ground by the second filter element.

According to the present invention, it is possible to provide a gaming machine capable of preventing a defect in the stored contents of the storage means.

<Summary 3>
In order to solve the same problems as in Abstract 1, the gaming machine according to the present invention is
A control unit (microprocessor 94) that executes control regarding the progress of the game, and
A power management unit (power management IC 112) for managing the power supply of the control unit, and
A first power supply unit (power supply circuit 111) for supplying a power supply voltage to the control unit and the power supply management unit, and
A second power supply unit (electrolytic capacitor B1) that supplies a power supply voltage to the control unit even when the power supply voltage is not supplied from the first power supply unit.
It is provided between the second power supply unit and the control unit, and includes a power supply regulating means for regulating the power supply voltage supplied from the second power supply unit.
The control unit
Arithmetic processing means (main CPU) that performs arithmetic processing,
A first storage means (main RAM) in which the arithmetic processing means reads and writes data, and
A second storage means (main ROM) in which data for the arithmetic processing means to control is stored, and
A first voltage terminal (VCC) for receiving the supply of the power supply voltage from the first power supply unit, and
It has a second voltage terminal (VBB) for receiving a supply of a power supply voltage for maintaining the data stored in the first storage means, and has.
The power supply regulating means has a filter element (Z1) provided between the second voltage terminal and the ground, and has a filter element (Z1).
The first power supply unit is connected to the first voltage terminal and the second voltage terminal without a harness.
The second power supply unit is connected to the second voltage terminal via a harness, and is connected to the second voltage terminal.
The filter element has a configuration for inducing an abnormal voltage to ground.

With this configuration, the gaming machine according to the present invention supplies the power supply voltage to the second voltage terminal and the second power supply unit when the power supply voltage is supplied from the first power supply unit, and the first power supply unit. When the power supply voltage is not supplied from the first power supply unit, the power supply voltage is supplied from the second power supply unit to the second voltage terminal. Therefore, even if the power supply voltage is not supplied from the first power supply unit, the first storage means. Since the power supply voltage for maintaining the data stored in is supplied from the second power supply unit, it is possible to prevent a problem from occurring in the stored contents of the first storage means.

Further, in the gaming machine according to the present invention, since the second power supply unit is connected to the second voltage terminal via the harness, the control unit and the second power supply unit can be configured by separate boards. .. Therefore, since the gaming machine according to the present invention can supply the power supply voltage for maintaining the data stored in the first storage means from different boards, the circuit of the board on which the control unit is mounted is changed. Without this, the storage capacity of the second power supply unit can be changed according to the device specifications of the game machine. Therefore, in the gaming machine 1 according to the embodiment of the present invention, a substrate on which a control unit is mounted can be commonly used even for gaming machines having different device specifications.

Further, in the gaming machine according to the present invention, when the power supply voltage for maintaining the data stored in the first storage means becomes an abnormal voltage, the abnormal voltage is induced to the ground by the second filter element. It is possible to prevent a problem from occurring in the stored contents of the first storage means.

In the gaming machine according to the present invention,
The filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, the gaming machine according to the present invention can induce the abnormal voltage to the ground by the filter element when the power supply voltage for maintaining the data stored in the first storage means becomes an abnormal voltage. can.

According to the present invention, it is possible to provide a gaming machine capable of preventing a defect in the stored contents of the storage means.

<Summary 4>
In order to solve the same problems as in Abstract 1, the gaming machine according to the present invention is
A control unit (microprocessor 94) that executes control regarding the progress of the game, and
A power management unit (power management IC 112) for managing the power supply of the control unit, and
A first power supply unit (power supply circuit 111) for supplying a power supply voltage to the control unit and the power supply management unit, and
A second power supply unit (electrolytic capacitor B1) that supplies a power supply voltage to the control unit even when the power supply voltage is not supplied from the first power supply unit.
It is provided between the second power supply unit and the control unit, and includes a power supply regulating means for regulating the power supply voltage supplied from the second power supply unit.
The control unit
Arithmetic processing means (main CPU) that performs arithmetic processing,
A first storage means (main RAM) in which the arithmetic processing means reads and writes data, and
A second storage means (main ROM) in which data for the arithmetic processing means to control is stored, and
A first voltage terminal (VCC) for receiving the supply of the power supply voltage from the first power supply unit, and
It has a second voltage terminal (VBB) for receiving a supply of a power supply voltage for maintaining the data stored in the first storage means, and has.
The power supply regulating means is
A rectifying element (D1) provided between the first voltage terminal and the second voltage terminal and having a Schottky barrier generated by joining a metal and a semiconductor.
A first filter element (C1) provided between the second voltage terminal and the ground and composed of a passive element for accumulating and discharging electric charges, and a first filter element (C1).
It has a second filter element (Z1) provided between the second voltage terminal and the ground and composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.
The power supply regulating means is
When the power supply voltage is supplied from the first power supply unit, the power supply voltage is supplied to the second voltage terminal and the second power supply unit.
When the power supply voltage is not supplied from the first power supply unit, the power supply voltage is supplied from the second power supply unit to the second voltage terminal, but the first voltage terminal is supplied by the shotkey barrier. Without supplying power supply voltage
The second filter element has a configuration in which when an abnormal voltage is generated, the electric charge generated by the abnormal voltage is guided to the ground.

With this configuration, the gaming machine according to the present invention supplies the power supply voltage to the second voltage terminal and the second power supply unit when the power supply voltage is supplied from the first power supply unit, and the first power supply unit. When the power supply voltage is not supplied from the first power supply unit, the power supply voltage is supplied from the second power supply unit to the second voltage terminal. Therefore, even if the power supply voltage is not supplied from the first power supply unit, the first storage means. Since the power supply voltage for maintaining the data stored in is supplied from the second power supply unit, it is possible to prevent a problem from occurring in the stored contents of the first storage means.

Further, in the gaming machine according to the present invention, when the power supply voltage for maintaining the data stored in the first storage means becomes an abnormal voltage, the electric charge generated by the abnormal voltage by the second filter element is grounded. Since it is guided, it is possible to prevent a problem from occurring in the stored contents of the first storage means.

According to the present invention, it is possible to provide a gaming machine capable of preventing a defect in the stored contents of the storage means.

<Summary 5>
Japanese Patent Application Laid-Open No. 2001-12737 proposes a noise reduction filter circuit installed in an NMI (Non-Maskable Interrupt) signal line of a power supply monitoring circuit of a power supply board and connected to an NMI terminal of a CPU.

In such conventional gaming machines, although a noise removal filter is installed in the NMI, noise countermeasures are not taken in the power supply monitoring IC and the reset IC, and these ICs malfunction due to noise, resulting in an error. There is a risk that a reset signal will be generated and the gaming machine will not operate stably.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine that operates stably.

The gaming machine according to the present invention
A control unit (microprocessor 94) that executes control regarding the progress of the game, and
A power management unit (power management IC 112) for managing the power supply of the control unit, and
A first power supply unit (power supply circuit 111) for supplying a power supply voltage to the control unit and the power supply management unit is provided.
The power management unit
A reset output terminal (RESET) connected to the reset terminal (XSRST) of the control unit, and
An interrupt signal output terminal (OUT) connected to an external interrupt terminal (XINT) of the control unit, and
A reset output means (power management IC 112) that outputs a reset signal from the reset output terminal when the first voltage based on the power supply voltage supplied from the first power supply unit exceeds the first reference voltage.
An interrupt signal output means (power management IC 112) that outputs an interrupt signal from the interrupt signal output terminal when the second voltage based on the power supply voltage supplied from the first power supply unit falls below the second reference voltage. )When,
A first voltage monitoring terminal (VSB) connected to the first voltage line for monitoring the first voltage, and
A second voltage monitoring terminal (VSC) connected to the second voltage line for monitoring the second voltage, and
A power supply terminal (VCC) connected to the first voltage line for operating the power supply management unit, and
A ground terminal (GND) connected to the ground line to operate the power management unit, and
It has a first filter element (C2) and a second filter element (Z2) provided between the power supply terminal and the ground terminal.
The first filter element accumulates the noise component of the first voltage line as an electric charge.
The second filter element has a configuration in which the power supply management unit does not output the reset signal from the reset output terminal when an abnormal voltage is generated in the first voltage line by inducing the abnormal voltage to the ground line. have.

With this configuration, in the gaming machine according to the present invention, the noise component of the power supply voltage for operating the power supply management unit is removed by the first filter element, and the power supply voltage for operating the power supply management unit becomes an abnormal voltage. In this case, since the abnormal voltage is induced to the ground by the second filter element, it is prevented that the power supply management unit malfunctions and outputs a reset signal from the reset output terminal. Therefore, the gaming machine according to the present invention operates stably.

In the gaming machine according to the present invention,
The first filter element is composed of a passive element that accumulates and discharges electric charges.
The second filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, in the gaming machine according to the present invention, the noise component of the voltage for operating the power supply management unit can be removed by the first filter element, and the voltage for operating the power supply management unit becomes an abnormal voltage. In this case, the abnormal voltage can be induced to the ground by the second filter element.

According to the present invention, it is possible to provide a gaming machine that operates stably.

<Summary 6>
In order to solve the same problems as in Abstract 5, the gaming machine according to the present invention is
A control unit (microprocessor 94) that executes control regarding the progress of the game, and
A power management unit (power management IC 112) for managing the power supply of the control unit, and
A first power supply unit (power supply circuit 111) for supplying a power supply voltage to the control unit and the power supply management unit is provided.
The power management unit
A reset output terminal (RESET) connected to the reset terminal (XSRST) of the control unit, and
An interrupt signal output terminal (OUT) connected to an external interrupt terminal (XINT) of the control unit, and
A reset output means (power management IC 112) that outputs a reset signal from the reset output terminal when the first voltage based on the power supply voltage supplied from the first power supply unit exceeds the first reference voltage.
An interrupt signal output means (power management IC 112) that outputs an interrupt signal from the interrupt signal output terminal when the second voltage based on the power supply voltage supplied from the first power supply unit falls below the second reference voltage. )When,
A first voltage monitoring terminal (VSB) connected to the first voltage line for monitoring the first voltage, and
A second voltage monitoring terminal (VSC) connected to the second voltage line for monitoring the second voltage, and
A power supply terminal (VCC) connected to the first voltage line for operating the power supply management unit, and
A ground terminal (GND) connected to the ground line to operate the power management unit, and
It has a filter element (Z2) provided between the power supply terminal and the ground terminal.
The filter element has a configuration in which the power supply management unit does not output the reset signal from the reset output terminal when an abnormal voltage is generated in the first voltage line by inducing the abnormal voltage to the ground line. doing.

With this configuration, in the gaming machine according to the present invention, when the power supply voltage for operating the power supply management unit becomes an abnormal voltage, the abnormal voltage is guided to the ground by the filter element, so that the power supply management unit malfunctions. To prevent the reset signal from being output from the reset output terminal. Therefore, the gaming machine according to the present invention operates stably.

In the gaming machine according to the present invention,
The filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, the gaming machine according to the present invention can induce the abnormal voltage to the ground by the filter element when the voltage for operating the power supply management unit becomes an abnormal voltage.

According to the present invention, it is possible to provide a gaming machine that operates stably.

<Summary 7>
Japanese Patent Application Laid-Open No. 2015-016259 proposes a varistor connected in parallel to the output side of the photo relay circuit of the external centralized terminal plate to protect the moss FET in the photo relay circuit from an abnormal voltage.

In such a conventional game machine, although the optical device can be protected from an abnormal voltage by using a varistor, the operation of the optical device cannot be protected from noise that does not become an abnormal voltage, so that the optical device malfunctions. However, the reliability of the signal output from the optical device may be lowered.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of improving the reliability of a signal output from an optical device.

The gaming machine according to the present invention
A control unit (microprocessor 94) that controls the progress of the game, and
A plurality of detection units (BET switch 62, start switch 64, etc.) connected to the control unit, and
A connection unit (main relay board 55) for connecting the control unit and the plurality of detection units is provided.
The connection part
A signal input unit (optical communication reception connector 101) composed of an optical device for inputting detection signals from the plurality of detection units, and
A signal output unit (port input / output IC 103) connected to the signal input unit and for outputting a detection signal to the control unit,
A power supply line and a ground line for operating the signal input unit and the signal output unit, and
A first filter element (L2) and a second filter element (L1) having three terminals for removing noise from the power supply line,
It has a third filter element (C12), a fourth filter element (C13), and a fifth filter element (Z11) having two terminals for removing noise from the power supply line.
The signal input unit
Power supply terminal (VCC) and ground terminal (GND) for inputting power supply voltage,
It has an output terminal (VO) for outputting the detection signal input to the signal output unit.
The first filter element and the second filter element have a first terminal, a second terminal, and a third terminal.
The third filter element, the fourth filter element, and the fifth filter element have a first terminal and a second terminal.
The power supply terminal of the signal input unit is connected to the first terminal of the first filter element.
The second terminal of the first filter element is connected to the first terminal of the second filter element.
The second terminal of the second filter element, the first terminal of the third filter element, the first terminal of the fourth filter element, and the first terminal of the fifth filter element are described as described above. Connected to the power line,
The third terminal of the first filter element, the third terminal of the second filter element, the second terminal of the third filter element, the second terminal of the fourth filter element, and the first. The second terminal of the five-filter element has a configuration in which it is connected to the ground line.

With this configuration, the gaming machine according to the present invention outputs from the optical device in order to prevent the optical device from malfunctioning by removing the noise component of the power supply voltage of the optical device over a wide frequency band by a plurality of filter elements. The reliability of the resulting signal can be improved.

In the gaming machine according to the present invention,
The first filter element and the second filter element are configured by coupling two ferrites and a capacitor.
The fifth filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, in the gaming machine according to the present invention, since the two ferrites of the first filter element and the second filter element function as resonance suppression components, the antiresonance between the third filter element and the fourth filter element When the voltage for operating the signal input unit becomes an abnormal voltage, the abnormal voltage can be induced to the ground by the fifth filter element.

According to the present invention, it is possible to provide a gaming machine capable of improving the reliability of a signal output from an optical device.

<Summary 8>
In order to solve the same problems as in Abstract 7, the gaming machine according to the present invention is
A control unit (microprocessor 94) that controls the progress of the game, and
A plurality of detection units (BET switch 62, start switch 64, etc.) connected to the control unit, and
A connection unit (main relay board 55) for connecting the control unit and the plurality of detection units is provided.
The connection part
A signal input unit (optical communication reception connector 101) composed of an optical device for inputting detection signals from the plurality of detection units, and
A signal output unit (port input / output IC 103) connected to the signal input unit and for outputting a detection signal to the control unit,
A power supply line and a ground line for operating the signal input unit and the signal output unit, and
A first filter element (L2) and a second filter element (L1) having three terminals for removing noise from the power supply line,
It has a third filter element (C12), a fourth filter element (C13), and a fifth filter element (Z11) having two terminals for removing noise from the power supply line.
The signal input unit
Power supply terminal (VCC) and ground terminal (GND) for inputting power supply voltage,
It has an output terminal (VO) for outputting the detection signal input to the signal output unit.
The signal output unit has an input terminal (OPT11) for inputting a detection signal output from the signal input unit.
The first filter element and the second filter element have a first terminal, a second terminal, and a third terminal.
The third filter element, the fourth filter element, and the fifth filter element have a first terminal and a second terminal.
The power supply terminal of the signal input unit is connected to the first terminal of the first filter element.
The second terminal of the first filter element is connected to the first terminal of the second filter element.
The second terminal of the second filter element, the first terminal of the third filter element, the first terminal of the fourth filter element, and the first terminal of the fifth filter element are described as described above. Connected to the power line,
The third terminal of the first filter element, the third terminal of the second filter element, the second terminal of the third filter element, the second terminal of the fourth filter element, and the first. 5 The second terminal of the filter element is connected to the ground line and is connected to the ground line.
The signal line connecting the output terminal of the signal input unit and the input terminal of the signal output unit has a configuration in which a sixth filter element (L1) for removing noise from the signal line is provided. ing.

With this configuration, the gaming machine according to the present invention outputs from the optical device in order to prevent the optical device from malfunctioning by removing the noise component of the power supply voltage of the optical device over a wide frequency band by a plurality of filter elements. The reliability of the resulting signal can be improved.

Further, since the gaming machine according to the present invention removes the noise of the detection signal output from the optical device by the sixth filter element, the reliability of the signal output from the optical device can be improved.

In the gaming machine according to the present invention,
The first filter element and the second filter element are configured by coupling two ferrites and a capacitor.
The fifth filter element is composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.
The sixth filter element may be made of ferrite.

With this configuration, in the gaming machine according to the present invention, since the two ferrites of the first filter element and the second filter element function as resonance suppression components, the antiresonance between the third filter element and the fourth filter element When the voltage for operating the signal input unit becomes an abnormal voltage, the abnormal voltage can be induced to the ground by the fifth filter element. Further, the gaming machine according to the present invention can remove the noise of the detection signal output from the optical device by ferrite.

According to the present invention, it is possible to provide a gaming machine capable of improving the reliability of a signal output from an optical device.

<Summary 9>
In order to solve the same problems as in Abstract 7, the gaming machine according to the present invention is
A control unit (microprocessor 94) that controls the progress of the game, and
A plurality of detection units (BET switch 62, start switch 64, etc.) connected to the control unit, and
A connection unit (main relay board 55) for connecting the control unit and the plurality of detection units is provided.
The connection part
A signal input unit (optical communication reception connector 101) composed of an optical device for inputting detection signals from the plurality of detection units, and
A signal output unit (port input / output IC 103) connected to the signal input unit and for outputting a detection signal to the control unit,
A power supply line and a ground line for operating the signal input unit and the signal output unit, and
A first filter element (L2) and a second filter element (L1) having three terminals for removing noise from the power supply line,
It has a third filter element (Z11) having two terminals for removing noise from the power supply line, and has a third filter element (Z11).
The signal input unit
It has a power supply terminal (VCC) for inputting the power supply voltage,
The first filter element and the second filter element have a first terminal, a second terminal, and a third terminal.
The third filter element has a first terminal and a second terminal.
The power supply terminal of the signal input unit is connected to the first terminal of the first filter element.
The second terminal of the first filter element is connected to the first terminal of the second filter element.
The second terminal of the second filter element and the first terminal of the third filter element are connected to the power supply line.
The third terminal of the first filter element, the third terminal of the second filter element, and the second terminal of the third filter element have a configuration in which they are connected to the ground line. There is.

With this configuration, the gaming machine according to the present invention outputs from the optical device in order to prevent the optical device from malfunctioning by removing the noise component of the power supply voltage of the optical device over a wide frequency band by a plurality of filter elements. The reliability of the resulting signal can be improved.

In the gaming machine according to the present invention,
The first filter element and the second filter element are configured by coupling two ferrites and a capacitor.
The third filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, in the gaming machine according to the present invention, since the two ferrites of each of the first filter element and the second filter element function as resonance suppression components, antiresonance between the first filter element and the second filter element is suppressed. When the voltage for operating the signal input unit becomes an abnormal voltage, the abnormal voltage can be induced to the ground by the third filter element.

According to the present invention, it is possible to provide a gaming machine capable of improving the reliability of a signal output from an optical device.

<Summary 10>
In order to solve the same problems as in Abstract 7, the gaming machine according to the present invention is
A control unit (microprocessor 94) that controls the progress of the game, and
A plurality of detection units (BET switch 62, start switch 64, etc.) connected to the control unit, and
A connection unit (main relay board 55) for connecting the control unit and the plurality of detection units is provided.
The connection part
A signal input unit (optical communication reception connector 101) composed of an optical device for inputting detection signals from the plurality of detection units, and
A signal output unit (port input / output IC 103) connected to the signal input unit and for outputting a detection signal to the control unit,
A power supply line and a ground line for operating the signal input unit and the signal output unit, and
A first filter element (L2) and a second filter element (L1) having three terminals for removing noise from the power supply line,
A third filter element (C12), a fourth filter element (C13), and a fifth filter element (Z11) having two terminals for removing noise from the power supply line.
A first power supply unit (5V) for supplying a power supply voltage to the signal input unit, and
It has a second power supply unit (CP1) that supplies a power supply voltage to the signal input unit even when the power supply voltage is not supplied from the first power supply unit.
The signal input unit
Power supply terminal (VCC) and ground terminal (GND) for inputting power supply voltage,
It has an output terminal (VO) for outputting the detection signal input to the signal output unit.
The first filter element and the second filter element have a first terminal, a second terminal, and a third terminal.
The third filter element, the fourth filter element, and the fifth filter element have a first terminal and a second terminal.
The power supply terminal of the signal input unit is connected to the first terminal of the first filter element.
The second terminal of the first filter element is connected to the first terminal of the second filter element.
The second terminal of the second filter element, the first terminal of the third filter element, the first terminal of the fourth filter element, and the first terminal of the fifth filter element are described as described above. Connected to the power line,
The third terminal of the first filter element, the third terminal of the second filter element, the second terminal of the third filter element, the second terminal of the fourth filter element, and the first. The second terminal of the five-filter element has a configuration in which it is connected to the ground line.

With this configuration, the gaming machine according to the present invention outputs from the optical device in order to prevent the optical device from malfunctioning by removing the noise component of the power supply voltage of the optical device over a wide frequency band by a plurality of filter elements. The reliability of the resulting signal can be improved.

Further, the gaming machine according to the present invention has a second power supply unit that supplies a power supply voltage to the signal input unit even when the power supply voltage is not supplied from the first power supply unit. When the power supply voltage is no longer supplied from the signal input unit, the operation of the signal input unit can be stably terminated.

In the gaming machine according to the present invention,
The first filter element and the second filter element are configured by coupling two ferrites and a capacitor.
The fifth filter element may be composed of a non-linear resistance element whose resistance value changes depending on the applied voltage.

With this configuration, in the gaming machine according to the present invention, since the two ferrites of the first filter element and the second filter element function as resonance suppression components, the antiresonance between the third filter element and the fourth filter element When the voltage for operating the signal input unit becomes an abnormal voltage, the abnormal voltage can be induced to the ground by the fifth filter element.

According to the present invention, it is possible to provide a gaming machine capable of improving the reliability of a signal output from an optical device.

<Summary 11>
In order to solve the same problems as in Abstract 7, the gaming machine according to the present invention is
A control unit (microprocessor 94) that controls the progress of the game, and
A plurality of detection units (BET switch 62, start switch 64, etc.) connected to the control unit, and
A connection unit (main relay board 55) for connecting the control unit and the plurality of detection units is provided.
The connection part
A signal input unit (optical communication reception connector 101) composed of an optical device for inputting detection signals from the plurality of detection units, and
A signal output unit (port input / output IC 103) connected to the signal input unit and for outputting a detection signal to the control unit,
A power supply line and a ground line for operating the signal input unit and the signal output unit, and
A plurality of filter elements that remove noise from the power supply line,
It has an abnormal voltage inducing element (L2, L1, C12, C13) for inducing an abnormal voltage of the power supply line to the ground.
The plurality of filter elements have a configuration including filter elements (L2, L1) having ferrite.

With this configuration, the gaming machine according to the present invention outputs from the optical device in order to prevent the optical device from malfunctioning by removing the noise component of the power supply voltage of the optical device over a wide frequency band by a plurality of filter elements. The reliability of the resulting signal can be improved.

Further, in the gaming machine according to the present invention, since anti-resonance between a plurality of filter elements is suppressed by ferrite, the noise component of the power supply voltage of the optical device can be completely removed over a wide frequency band.

According to the present invention, it is possible to provide a gaming machine capable of improving the reliability of a signal output from an optical device.

<Summary 12>
Japanese Unexamined Patent Publication No. 2016-016298 proposes a device in which a varistor, a bidirectional Zener diode, and a ferrite bead are provided in a signal line of a liquid crystal control substrate of a sub-screen display device to take measures against noise.

In such a conventional gaming machine, noise countermeasures are taken for the signal line, but when noise enters the IC to which the signal line is connected, the IC malfunctions and is displayed on the display device due to the malfunction of the IC. The image may be distorted.

Therefore, when the above-mentioned conventional technique is applied to a sound IC, the sound being played is interrupted or the pitch of the sound being played is out of order, and the sound quality of the sound being played is deteriorated. There is a risk.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of preventing deterioration of the sound quality of the reproduced sound.

The gaming machine according to the present invention
Speaker section (lower left subwoofer DD25L) that converts electrical signals into physical vibration,
A sound source conversion unit (amplifier board 81) connected to the speaker unit and converting sound source data into the electric signal, and a sound source conversion unit (amplifier board 81).
The sound source conversion unit is provided with a control unit (sub-control board 72) that outputs the sound source data.
The sound source conversion unit
A sound source conversion means (sound IC 161) that inputs the sound source data from the control unit and converts it into the electric signal, and
A power supply line and a ground line for operating the sound source conversion means, and
A reset line for resetting the sound source conversion means,
The first Schmitt trigger inverter (IC1-4) and the first Schmitt trigger inverter (IC1-4) that change the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and invert the signal to output from the output terminal. 2 Schmitt trigger inverter (IC1-3) and
It has a first filter element (C52) and a second filter element (Z51) provided between the reset line and the ground line.
The sound source conversion means
It has a reset terminal (PDN) to which the reset line is connected.
The reset terminal is connected to the output terminal of the first Schmitt trigger inverter.
The input terminal of the first Schmitt trigger inverter is connected to the output terminal of the second Schmitt trigger inverter.
The input terminal of the second Schmitt trigger inverter is connected to the reset line, the first filter element, and the second filter element.
The second filter element has a configuration in which the sound source conversion means is not reset by inducing the generated abnormal voltage to the ground line when an abnormal voltage is generated in the reset line.

With this configuration, the gaming machine according to the present invention has noise due to the first Schmitt trigger inverter, the second Schmitt trigger inverter, the first filter element, and the second filter element provided in the reset line for resetting the sound source conversion means. Since it is prevented that the sound source conversion means is reset due to the influence of the above, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

According to the present invention, it is possible to provide a gaming machine capable of preventing deterioration of the sound quality of the reproduced sound.

<Summary 13>
In order to solve the same problems as in Abstract 12, the gaming machine according to the present invention is
Speaker section (lower left subwoofer DD25L) that converts electrical signals into physical vibration,
A sound source conversion unit (amplifier board 81) connected to the speaker unit and converting sound source data into the electric signal, and a sound source conversion unit (amplifier board 81).
The sound source conversion unit is provided with a control unit (sub-control board 72) that outputs the sound source data.
The sound source conversion unit
A sound source conversion means (sound IC 161) that inputs the sound source data from the control unit and converts it into the electric signal, and
A power supply line and a ground line for operating the sound source conversion means, and
A reset line for resetting the sound source conversion means,
The first Schmitt trigger inverter (IC1-4) and the first Schmitt trigger inverter (IC1-4) that change the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and invert the signal to output from the output terminal. 2 Schmitt trigger inverter (IC1-3) and
It has a filter element (Z51) provided between the reset line and the ground line.
The sound source conversion means
It has a reset terminal (PDN) to which the reset line is connected.
The reset terminal is connected to the output terminal of the first Schmitt trigger inverter.
The input terminal of the first Schmitt trigger inverter is connected to the output terminal of the second Schmitt trigger inverter.
The input terminal of the second Schmitt trigger inverter is connected to the reset line and the filter element.
The filter element has a configuration in which the sound source conversion means is not reset by inducing the generated abnormal voltage to the ground line when an abnormal voltage is generated in the reset line.

With this configuration, the gaming machine according to the present invention uses the first Schmitt trigger inverter, the second Schmitt trigger inverter, and the filter element provided in the reset line for resetting the sound source conversion means, so that the sound source conversion means is affected by noise. Since it is prevented from being reset, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

According to the present invention, it is possible to provide a gaming machine capable of preventing deterioration of the sound quality of the reproduced sound.

<Summary 14>
In order to solve the same problems as in Abstract 12, the gaming machine according to the present invention is
Speaker section (lower left subwoofer DD25L) that converts electrical signals into physical vibration,
A sound source conversion unit (amplifier board 81) connected to the speaker unit and converting sound source data into the electric signal, and a sound source conversion unit (amplifier board 81).
The sound source conversion unit is provided with a control unit (sub-control board 72) that outputs the sound source data.
The sound source conversion unit
A sound source conversion means (sound IC 161) that inputs the sound source data from the control unit and converts it into the electric signal, and
A power supply line and a ground line for operating the sound source conversion means, and
A reset line for resetting the sound source conversion means,
It has a filter element (Z51) provided between the reset line and the ground line.
The filter element has a configuration in which the sound source conversion means is not reset by inducing the generated abnormal voltage to the ground line when an abnormal voltage is generated in the reset line.

With this configuration, the gaming machine according to the present invention reproduces in order to prevent the sound source conversion means from being reset due to the influence of an abnormal voltage by the filter element provided in the reset line for resetting the sound source conversion means. It is possible to prevent the sound quality of the sound from deteriorating.

According to the present invention, it is possible to provide a gaming machine capable of preventing deterioration of the sound quality of the reproduced sound.

<Summary 15>
In order to solve the same problems as in Abstract 12, the gaming machine according to the present invention is
Speaker section (lower left subwoofer DD25L) that converts electrical signals into physical vibration,
A sound source conversion unit (amplifier board 81) connected to the speaker unit and converting sound source data into the electric signal, and a sound source conversion unit (amplifier board 81).
The sound source conversion unit is provided with a control unit (sub-control board 72) that outputs the sound source data.
The sound source conversion unit
A sound source conversion means (sound IC 161) that inputs the sound source data from the control unit and converts it into the electric signal, and
A power supply line and a ground line for operating the sound source conversion means, and
A data line for transmitting the sound source data and
A reset line for resetting the sound source conversion means,
The first Schmitt trigger inverter (IC1-4) and the first Schmitt trigger inverter (IC1-4) that change the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and invert the signal to output from the output terminal. 2 Schmitt trigger inverter (IC1-3) and
A first filter element (C52) and a second filter element (Z51) provided between the reset line and the ground line,
A third filter element (low-pass filter 163) provided between the data line and the ground line, and
The fourth filter element (FB1) and the fifth filter element (FB2) arranged on the data line,
The third Schmitt trigger inverter (IC-2) and the third Schmitt trigger inverter (IC-2) which changes the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and inverts the signal to output from the output terminal. It has 4 Schmitt trigger inverters (IC-1) and
The sound source conversion means
The reset terminal (PDN) to which the reset line is connected and
It has a data input terminal (RX0) to which the data line is connected, and has.
The reset terminal is connected to the output terminal of the first Schmitt trigger inverter.
The input terminal of the first Schmitt trigger inverter is connected to the output terminal of the second Schmitt trigger inverter.
The input terminal of the second Schmitt trigger inverter is connected to the reset line, the first filter element, and the second filter element.
The data input terminal is connected to the output terminal of the third Schmitt trigger inverter.
The input terminal of the third Schmitt trigger inverter is connected to the output terminal of the fourth Schmitt trigger inverter.
The input terminal of the 4th Schmitt trigger inverter is connected to the 1st terminal of the 4th filter element.
The second terminal of the fourth filter element is connected to the first terminal of the fifth filter element.
The second terminal of the fifth filter element has a configuration in which the data line and the third filter element are connected to each other.

With this configuration, the gaming machine according to the present invention has noise due to the first Schmitt trigger inverter, the second Schmitt trigger inverter, the first filter element, and the second filter element provided in the reset line for resetting the sound source conversion means. Since it is prevented that the sound source conversion means is reset due to the influence of the above, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

Further, the gaming machine according to the present invention uses a third Schmidt trigger inverter, a fourth Schmidt trigger inverter, a third filter element, a fourth filter element, and a fifth filter element provided in a data line for transmitting sound source data. Since it is possible to prevent the sound source data affected by the noise from being transmitted to the sound source conversion means, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

According to the present invention, it is possible to provide a gaming machine capable of preventing deterioration of the sound quality of the reproduced sound.

<Summary 16>
In order to solve the same problems as in Abstract 12, the gaming machine according to the present invention is
Speaker section (lower left subwoofer DD25L) that converts electrical signals into physical vibration,
A sound source conversion unit (amplifier board 81) connected to the speaker unit and converting sound source data into the electric signal, and a sound source conversion unit (amplifier board 81).
The sound source conversion unit is provided with a control unit (sub-control board 72) that outputs the sound source data.
The sound source conversion unit
A sound source conversion means (sound IC 161) that inputs the sound source data from the control unit and converts it into the electric signal, and
Amplifying means (digital amplifier IC162) for amplifying an electric signal converted by the sound source converting means, and
A power supply line and a ground line for operating the sound source conversion means and the amplification means, and
A first reset line for resetting the sound source conversion means,
The first Schmitt trigger inverter (IC1-4) and the first Schmitt trigger inverter (IC1-4) that change the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and invert the signal to output from the output terminal. 2 Schmitt trigger inverter (IC1-3) and
A first filter element (C52) and a second filter element (Z51) provided between the first reset line and the ground line,
A second reset line for resetting the amplification means, and
The third Schmitt trigger inverter (IC1-6) and the third Schmitt trigger inverter (IC1-6) that change the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and invert the signal to output from the output terminal. 4 Schmitt trigger inverter (IC1-5) and
It has a third filter element and a fourth filter element provided between the second reset line and the ground line.
The sound source conversion means
It has a reset terminal (PDN) to which the first reset line is connected.
The reset terminal is connected to the output terminal of the first Schmitt trigger inverter.
The input terminal of the first Schmitt trigger inverter is connected to the output terminal of the second Schmitt trigger inverter.
The input terminal of the second Schmitt trigger inverter is connected to the first reset line, the first filter element, and the second filter element.
The amplification means
It has a second reset terminal to which the second reset line is connected.
The second reset terminal is connected to the output terminal of the third Schmitt trigger inverter.
The input terminal of the third Schmitt trigger inverter is connected to the output terminal of the fourth Schmitt trigger inverter.
The input terminal of the fourth Schmitt trigger inverter has a configuration in which the second reset line, the third filter element, and the fourth filter element are connected to each other.

With this configuration, the gaming machine according to the present invention is provided with a first Schmitt trigger inverter, a second Schmitt trigger inverter, a first filter element, and a second filter element provided in the first reset line for resetting the sound source conversion means. Since it is possible to prevent the sound source conversion means from being reset due to the influence of noise, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

Further, in the gaming machine according to the present invention, noise is generated by the third Schmitt trigger inverter, the fourth Schmitt trigger inverter, the third filter element and the fourth filter element provided in the second reset line for resetting the amplification means. Since it is possible to prevent the amplification means from being reset due to the influence, it is possible to prevent the sound quality of the reproduced sound from being deteriorated.

According to the present invention, it is possible to provide a gaming machine capable of preventing deterioration of the sound quality of the reproduced sound.

<Summary 17>
Japanese Unexamined Patent Publication No. 2005-185868 proposes a method in which a CPU for main control and a display control device are connected by optical communication and the CPU for main control controls the display control device.

In such a conventional game machine, by changing the communication from the lead wire to the optical communication, the transmission line itself becomes resistant to noise, but the receiving light receiving device (hereinafter, simply referred to as "optical device") itself is resistant to noise. Instead, noise may be added to the drive voltage of the optical device, causing the optical device to malfunction, and as a result, a communication abnormality may occur.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of preventing a communication abnormality from occurring.

The gaming machine according to the present invention
A main control unit (main control board 71) that controls the progress of the game,
A sub-control unit (sub-control board 72) that controls the production,
A relay control unit (sub-relay board 69) that relays the main control unit and the sub-control unit is provided.
The relay control unit
A light receiving conversion means (optical communication receiving connector 131) comprising an optical device that receives an optical signal from the main control unit, converts it into an electric signal, and outputs the signal.
An input signal output means (security communication IC 133) that inputs the electric signal from the light receiving conversion means and outputs the electric signal to the sub-control unit.
A power supply line and a ground line for operating the light receiving conversion means and the input signal output means,
A first filter element (FL1) having three terminals to remove noise,
It has a second filter element (Z21) and a third filter element (C21) having two terminals for removing noise.
The light receiving conversion means
A conversion unit that converts the received optical signal into an electrical signal,
An output terminal (VO) for outputting the electric signal converted by the conversion unit, and
A power supply terminal (VCC) for connecting to the power supply line and
It has a ground terminal (GND) for connecting to the ground line, and has.
The power supply terminal of the light receiving conversion means is connected to the first terminal of the first filter element, and is connected to the first terminal.
The second terminal of the first filter element is connected to the power supply line and is connected to the power supply line.
The third terminal of the first filter element is connected to the ground line and is connected to the ground line.
The first terminal of the second filter element and the first terminal of the third filter element are connected between the power supply terminal of the light receiving conversion means and the first terminal of the first filter element.
The second terminal of the second filter element and the second terminal of the third filter element have a configuration in which they are connected to the ground line.

With this configuration, the gaming machine according to the present invention prevents the optical device from malfunctioning by removing the noise component over a wide band of the drive voltage of the optical device with a plurality of filter elements, so that a communication abnormality occurs. Can be prevented.

According to the present invention, it is possible to provide a gaming machine capable of preventing a communication abnormality from occurring.

<Summary 18>
In order to solve the same problem as in Abstract 17, the gaming machine according to the present invention is
A main control unit (main control board 71) that controls the progress of the game,
A sub-control unit (sub-control board 72) that controls the production,
A relay control unit (sub-relay board 69) that relays the main control unit and the sub-control unit is provided.
The relay control unit
A light receiving conversion means (optical communication receiving connector 131) comprising an optical device that receives an optical signal from the main control unit, converts it into an electric signal, and outputs the signal.
An input signal output means (security communication IC 133) that inputs the electric signal from the light receiving conversion means and outputs the electric signal to the sub-control unit.
A power supply line and a ground line for operating the light receiving conversion means and the input signal output means,
A first filter element (FL1) having three terminals to remove noise,
It has a second filter element (Z21) and a third filter element (C21) having two terminals for removing noise.
The light receiving conversion means
A conversion unit that converts the received optical signal into an electrical signal,
An output terminal (VO) for outputting the electric signal converted by the conversion unit, and
A power supply terminal (VCC) for connecting to the power supply line and
It has a ground terminal (GND) for connecting to the ground line, and has.
The power supply terminal of the light receiving conversion means is connected to the first terminal of the first filter element, and is connected to the first terminal.
The second terminal of the first filter element is connected to the power supply line and is connected to the power supply line.
The third terminal of the first filter element is connected to the ground line and is connected to the ground line.
The first terminal of the second filter element and the first terminal of the third filter element are connected between the power supply terminal of the light receiving conversion means and the first terminal of the first filter element.
The second terminal of the second filter element and the second terminal of the third filter element are connected to the ground line.
The second filter element has a configuration in which it is arranged in the vicinity of the light receiving conversion means.

With this configuration, the gaming machine according to the present invention prevents the optical device from malfunctioning by removing the noise component over a wide band of the drive voltage of the optical device with a plurality of filter elements, so that a communication abnormality occurs. Can be prevented.

Further, in the gaming machine according to the present invention, since the second filter element is arranged in the vicinity of the light receiving conversion means, the drive voltage immediately after removing the noise component is supplied to the power supply terminal of the light receiving conversion means, so that noise is generated. The optical device can be driven by a stable drive voltage immediately after the components are removed.

According to the present invention, it is possible to provide a gaming machine capable of preventing a communication abnormality from occurring.

<Summary 19>
In order to solve the same problem as in Abstract 17, the gaming machine according to the present invention is
A main control unit (main control board 71) that controls the progress of the game,
A sub-control unit (sub-control board 72) that controls the production,
A relay control unit (sub-relay board 69) that relays the main control unit and the sub-control unit is provided.
The relay control unit
A light receiving conversion means (optical communication receiving connector 131) comprising an optical device that receives an optical signal from the main control unit, converts it into an electric signal, and outputs the signal.
An input signal output means (security communication IC 133) that inputs the electric signal from the light receiving conversion means and outputs the electric signal to the sub-control unit.
A power supply line and a ground line for operating the light receiving conversion means and the input signal output means,
A first filter element (FL1) having three terminals to remove noise,
It has a second filter element (Z21) and a third filter element (C21) having two terminals for removing noise.
The light receiving conversion means
A conversion unit that converts the received optical signal into an electrical signal,
An output terminal (VO) for outputting the electric signal converted by the conversion unit, and
A power supply terminal (VCC) for connecting to the power supply line and
It has a ground terminal (GND) for connecting to the ground line, and has.
The power supply terminal of the light receiving conversion means is connected to the first terminal of the first filter element, and is connected to the first terminal.
The second terminal of the first filter element is connected to the power supply line and is connected to the power supply line.
The third terminal of the first filter element is connected to the ground line and is connected to the ground line.
The first terminal of the second filter element and the first terminal of the third filter element are connected between the power supply terminal of the light receiving conversion means and the first terminal of the first filter element.
The second terminal of the second filter element and the second terminal of the third filter element are connected to the ground line.
The relay control unit has a Schmitt trigger circuit (S1) that changes the output state with hysteresis in response to a change in the input potential of the signal input to the input terminal and outputs the output from the output terminal.
The output terminal of the light receiving conversion means is connected to the input terminal of the Schmitt trigger circuit.
The output terminal of the Schmitt trigger circuit has a configuration in which it is connected to the input terminal of the input signal output means.

With this configuration, the gaming machine according to the present invention prevents the optical device from malfunctioning by removing the noise component over a wide band of the drive voltage of the optical device with a plurality of filter elements, so that a communication abnormality occurs. Can be prevented.

Further, since the gaming machine according to the present invention removes the noise of the electric signal output from the optical device by the Schmitt trigger circuit, it is possible to prevent the input signal output means from detecting a communication abnormality.

According to the present invention, it is possible to provide a gaming machine capable of preventing a communication abnormality from occurring.

<Summary 20>
Japanese Patent Application Laid-Open No. 2009-261661 proposes a method in which the states of various switches are input to a CPU via an input port for control.

In such a conventional gaming machine, the switches that detect the operation of the buttons exposed on the gaming machine, such as the start switch and the stop switch operated by the player, are in a state of being susceptible to external noise. A surge voltage is generated due to noise, and if the allowable voltage of the input port is exceeded, the input port may be damaged.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of protecting an input port from external noise.

The gaming machine according to the present invention
Multiple switches (152s to 157s) for detecting the player's operation,
A control unit (sub-relay board 69) that is connected to the plurality of switches and performs control is provided.
The control unit
A signal input unit (buffer IC 151) constituting an input port for inputting signals from the plurality of switches, and a signal input unit (buffer IC 151).
A plurality of overvoltage prevention elements (Z41 to Z46) having two terminals for preventing overvoltage, and
It has a power supply line and a ground line for operating the signal input unit.
The signal input unit has a plurality of signal input terminals (A1 to A6) connected to the plurality of switches and to which signals from the plurality of switches are input.
The plurality of switches and the plurality of signal input terminals of the signal input unit connected to the plurality of switches are connected to one terminal of the plurality of overvoltage prevention elements, respectively.
The other terminal of the overvoltage protection element has a configuration connected to the ground line.

With this configuration, the gaming machine according to the present invention provides each input of the signal input unit by providing an overvoltage prevention element at each input end of the signal input unit constituting the input port for storing the detection states of the plurality of switches. When the power supply voltage of the terminal becomes an abnormal voltage, each overvoltage prevention element induces the abnormal voltage to the ground, so that the input port can be protected from external noise.

In the gaming machine according to the present invention,
The overvoltage prevention element may be configured by a voltage-dependent resistor, and the overvoltage may not be input to the plurality of signal input terminals of the signal input unit by changing the resistance value when an overvoltage occurs. ..

With this configuration, in the gaming machine according to the present invention, when an overvoltage is generated from the switch due to external noise, the resistance value of the overvoltage protection element decreases, and a current flows from the switch to the ground line via the overvoltage protection element. Therefore, it is possible to prevent overvoltage from being applied to the input port.

According to the present invention, it is possible to provide a gaming machine capable of protecting an input port from external noise.

<Summary 21>
In order to solve the same problems as in Abstract 20, the gaming machine according to the present invention is
Multiple switches (152s to 157s) for detecting the player's operation,
A control unit (sub-relay board 69) that is connected to the plurality of switches and performs control is provided.
The control unit
A signal input unit (buffer IC 151) constituting an input port for inputting signals from the plurality of switches, and a signal input unit (buffer IC 151).
A plurality of overvoltage prevention elements (Z41 to Z46) having two terminals for preventing overvoltage, and
It has a power supply line and a ground line for operating the signal input unit.
The signal input unit has a plurality of signal input terminals (A1 to A6) connected to the plurality of switches and to which signals from the plurality of switches are input.
The plurality of switches and the plurality of signal input terminals of the signal input unit connected to the plurality of switches are connected to one terminal of the plurality of overvoltage prevention elements, respectively.
The other terminal of the overvoltage protection element is connected to the ground line and
When the plurality of switches detect the operation of the player, they output a ground level signal and output a ground level signal.
Line resistors (R7 to R12) are provided between the plurality of signal input terminals of the signal input unit and the plurality of switches, respectively.
The output sides of the plurality of switches have a configuration in which they are pulled up (via resistors R1 to R6).

With this configuration, the gaming machine according to the present invention provides each input of the signal input unit by providing an overvoltage prevention element at each input end of the signal input unit constituting the input port for storing the detection states of the plurality of switches. When the power supply voltage of the terminal becomes an abnormal voltage, each overvoltage prevention element induces the abnormal voltage to the ground, so that the input port can be protected from external noise.

Further, in the gaming machine according to the present invention, when the player's operation is detected, a plurality of switches output ground level signals, and a line is formed between the plurality of signal input terminals of the signal input unit and the plurality of switches. Since each resistor is provided and the output side of multiple switches is pulled up, the level of the signal input to the multiple signal input terminals of the signal input unit is stabilized when the player's operation is not detected. be able to.

In the gaming machine according to the present invention,
The overvoltage prevention element may be configured by a voltage-dependent resistor, and the overvoltage may not be input to the plurality of signal input terminals of the signal input unit by changing the resistance value when an overvoltage occurs. ..

With this configuration, in the gaming machine according to the present invention, when an overvoltage is generated from the switch due to external noise, the resistance value of the overvoltage protection element decreases, and a current flows from the switch to the ground line via the overvoltage protection element. Therefore, it is possible to prevent overvoltage from being applied to the input port.

According to the present invention, it is possible to provide a gaming machine capable of protecting an input port from external noise.

<Summary 22>
In order to solve the same problems as in Abstract 20, the gaming machine according to the present invention is
An operation unit (various buttons 152 to 157) for the player to operate, and
A control unit (sub-relay board 69) that is connected to the operation unit and performs control is provided.
The operation unit has a plurality of switches (152s to 157s) corresponding to the operation, and has a plurality of switches (152s to 157s).
The control unit
A signal input unit (buffer IC 151) for inputting signals from the plurality of switches, and
A plurality of overvoltage prevention elements (D71 to D76) having two terminals for preventing overvoltage, and
A power supply line and a ground line for operating the signal input unit, and
It has a plurality of regulators (resistors R71 to R82) for adjusting the first specified voltage for the plurality of switches to the second specified voltage for the signal input unit.
The signal input unit has a plurality of signal input terminals (A1 to A6) that are connected to the plurality of switches and input signals from the plurality of switches.
The control unit
One terminal of the overvoltage prevention element is connected to each of the plurality of switches and the plurality of signal input terminals of the signal input unit connected corresponding to the plurality of switches, and the other of the overvoltage prevention elements. The terminal is connected to the power supply line.

With this configuration, the gaming machine according to the present invention provides each input of the signal input unit by providing an overvoltage prevention element at each input end of the signal input unit constituting the input port for storing the detection states of the plurality of switches. When the power supply voltage of the terminal becomes an abnormal voltage, each overvoltage prevention element induces the abnormal voltage to the power supply line, so that the input port can be protected from external noise.

According to the present invention, it is possible to provide a gaming machine capable of protecting an input port from external noise.

<Summary 23>
Japanese Patent Application Laid-Open No. 2017-131693 proposes a decorative drive board that controls a stepping motor by passing a drive current through the stepping motor based on serial drive data from a peripheral control board.

In such a conventional game machine, a stepping motor for driving a reel or a movable accessory is arranged in the housing of the game machine at a position away from the control board, and the drive board and the motor are connected by a harness. When the static electricity generated in the game machine flies to the harness, a surge voltage due to static electricity is generated at the output terminal of the driver circuit that outputs the drive current, and the surge voltage may flow back into the driver circuit and destroy the internal elements. be.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of protecting an internal element of a driver circuit from a surge voltage.

The gaming machine according to the present invention
Movable part (movable accessory 85) and
A drive unit (motor 142) for driving the movable unit and
A drive output unit (panel relay board 83) that outputs a drive current to drive the drive unit, and
A control unit (sub-control board 72) for outputting drive data for controlling the drive unit is provided.
The drive output unit
A driver circuit (driver IC 141) for driving and controlling the drive unit, and
To operate the driver circuit, the power supply line and ground line,
It has a plurality of overvoltage prevention elements (Z31 to Z34) having two terminals for preventing overvoltage, and has.
The driver circuit
A plurality of output terminals (AOUT1, AOUT2, BOUT1, BOUT2) for outputting a drive current to the drive unit, and
A power supply terminal (VCC) connected to the power supply line and
It has a ground terminal (GND) connected to the ground line, and has
One terminal of the plurality of overvoltage prevention elements is connected to the plurality of output terminals of the driver circuit, respectively.
The other terminal of the plurality of overvoltage protection elements has a configuration connected to the ground line.

With this configuration, the gaming machine according to the present invention provides surges at each output terminal of the driver circuit by providing an overvoltage prevention element at each output terminal of the driver circuit for driving and controlling the drive unit for driving the movable portion. When a voltage is generated, the internal element of the driver circuit can be protected from the surge voltage in order to prevent the surge current due to the surge voltage from flowing back to the driver circuit.

In the gaming machine according to the present invention,
The overvoltage prevention element may be configured by a voltage-dependent resistor, and the overvoltage may not be input to the plurality of output terminals of the driver circuit by changing the resistance value when an overvoltage occurs.

With this configuration, in the gaming machine according to the present invention, when a surge voltage is generated at the output terminal of the driver circuit, the resistance value of the overvoltage protection element decreases, and a current flows through the overvoltage protection element to the ground line. Therefore, the internal element of the driver circuit can be protected from the surge voltage.

According to the present invention, it is possible to provide a gaming machine capable of protecting the internal element of the driver circuit from a surge voltage.

<Summary 24>
In order to solve the same problem as in Abstract 23, the gaming machine according to the present invention is
Movable part (movable accessory 85) and
A drive unit (motor 142) for driving the movable unit and
A drive output unit (panel relay board 83) that outputs a drive current to drive the drive unit, and
A control unit (sub-control board 72) for outputting drive data for controlling the drive unit is provided.
The drive output unit
A driver circuit (driver IC 141) for driving and controlling the drive unit, and
To operate the driver circuit, the power supply line and ground line,
It has a plurality of first overvoltage prevention elements (Z31 to Z34) and a second overvoltage prevention element (Z35) having two terminals for preventing overvoltage.
The driver circuit
A plurality of output terminals (AOUT1, AOUT2, BOUT1, BOUT2) for outputting a drive current to the drive unit, and
A power supply terminal (VCC) connected to the power supply line and
A ground terminal (GND) connected to the ground line and
A reset terminal (RESET) for inputting a reset signal,
It has a sleep terminal (SLEEP) for inputting a sleep signal, and has.
One terminal of the plurality of first overvoltage prevention elements is connected to the plurality of output terminals of the driver circuit.
The other terminal of the plurality of first overvoltage protection elements is connected to the ground line.
One terminal of the second overvoltage prevention element is connected to the reset terminal and the sleep terminal of the driver circuit.
The other terminal of the excess voltage prevention element has a configuration in which it is connected to the ground line.

With this configuration, the gaming machine according to the present invention provides surges at each output terminal of the driver circuit by providing an overvoltage prevention element at each output terminal of the driver circuit for driving and controlling the drive unit for driving the movable portion. When a voltage is generated, the internal element of the driver circuit can be protected from the surge voltage in order to prevent the surge current due to the surge voltage from flowing back to the driver circuit.

Further, in the gaming machine according to the present invention, since the reset terminal and the sleep terminal of the driver circuit are connected to the ground line via the overvoltage prevention element, when a surge voltage is generated in the reset terminal or the sleep terminal of the driver circuit. The internal elements of the driver circuit can be protected from surge voltage.

Further, in the gaming machine according to the present invention, since the reset terminal and the sleep terminal of the driver circuit are connected to the ground line via the overvoltage prevention element, the driver circuit may be reset or put into a sleep state due to the influence of noise. Can be prevented.

In the gaming machine according to the present invention,
The first overvoltage prevention element and the second overvoltage prevention element may be configured by a voltage-dependent resistor, and the resistance value may decrease when an overvoltage occurs.

With this configuration, in the gaming machine according to the present invention, when a surge voltage is generated at the output terminal, the reset terminal or the sleep terminal of the driver circuit, the resistance value of the overvoltage protection element is lowered, and the resistance value of the overvoltage protection element is lowered, and the resistance value of the overvoltage protection element is lowered through the overvoltage protection element. Since the current flows through the ground line, the internal element of the driver circuit can be protected from the surge voltage.

According to the present invention, it is possible to provide a gaming machine capable of protecting the internal element of the driver circuit from a surge voltage.

<Summary 25>
For the purpose of enhancing the effect of production, Japanese Patent Application Laid-Open No. 2004-129726 has proposed a method of generating wind from an enclosure by a sound outside the audible range without using a fan.

In such a conventional gaming machine, it is necessary to separately prepare sound source data that does not generate wind and sound source data that generates wind.

The present invention has been made to solve such a problem, and provides a gaming machine capable of performing an effect of generating wind and an effect of not generating wind based on common sound source data. The purpose is.

The gaming machine according to the present invention
A storage unit (sub ROM) that stores predetermined threshold values (threshold values) and ratio values (ratio) according to a plurality of sound source data, and
A control unit (sub-control board 72) that selects and controls the sound source data, and
A sound amplification unit (amplifier board 81) that amplifies the sound source data from the control unit and converts the sound data into an electric signal, and
A vibrating unit (lower left woofer DD25L) that vibrates the diaphragm (25a) by an electric signal converted by the sound amplifying unit is provided.
The control unit has a compression means (sub CPU (compressor processing) of the sub control board 72) for compressing the level (dB) of the sound source data.
When the level corresponding to the frequency in the selected sound source data exceeds the threshold value, the compression means compresses the level by the ratio value and sets the level according to the frequency not exceeding the threshold value. Output to the sound amplification unit without compression,
The vibrating unit has a configuration in which the diaphragm is vibrated based on the level of the sound source data compressed by the compression means.

With this configuration, the gaming machine according to the present invention compresses the level of the frequency band that generates wind with respect to the sound source data that can generate wind from the vibrating unit by the compression means and outputs it to the sound amplification unit. , It is possible to execute an effect that does not generate wind from the vibrating part, and by outputting the level of sound source data that can generate wind from the vibrating part to the sound amplification part without being compressed by the compression means, from the vibrating part. It is possible to perform an effect that generates wind. As described above, the gaming machine according to the present invention can perform an effect of generating wind and an effect of not generating wind based on common sound source data.

According to the present invention, it is possible to provide a gaming machine capable of performing an effect of generating wind and an effect of not generating wind based on common sound source data.

<Summary 26>
For the purpose of enhancing the effect of production, a device that generates wind from an enclosure by a sound outside the audible range without using a fan has been proposed in 2004-129726.

In such a conventional gaming machine, it is necessary to separately prepare sound source data according to the strength of the wind.

The present invention has been made to solve such a problem, and based on common sound source data, an effect of generating a wind at a sound source data level and an effect of generating a wind stronger than the sound source data level are executed. The purpose is to provide a gaming machine that can be played.

The gaming machine according to the present invention
A storage unit (sub ROM) that stores predetermined threshold values (threshold values) and ratio values (ratio) according to a plurality of sound source data, and
A control unit (sub-control board 72) that selects and controls the sound source data, and
A sound amplification unit (amplifier board 81) that amplifies the sound source data from the control unit and converts the sound data into an electric signal, and
A vibrating unit (lower left woofer DD25L) that vibrates the diaphragm (25a) by an electric signal converted by the sound amplifying unit is provided.
The control unit has an increasing means (sub CPU (expander processing) of the sub control board 72) for increasing the level (dB) of the sound source data.
The increasing means increases the level by the ratio value when the level corresponding to the frequency in the selected sound source data exceeds the threshold value, and increases the level according to the frequency not exceeding the threshold value. Output to the sound amplification unit without increasing
The vibrating unit has a configuration in which the diaphragm is vibrated based on the level of the sound source data increased by the increasing means.

With this configuration, the gaming machine according to the present invention increases the level of the frequency band that generates wind with respect to the sound source data that can generate wind from the vibrating unit by increasing means and outputs it to the sound amplification unit. , It is possible to perform an effect of generating a wind stronger than the sound source data level from the vibrating part.

Further, the gaming machine according to the present invention outputs the sound source data level wind from the vibrating unit to the sound amplification unit without increasing the level of the sound source data capable of generating wind from the vibrating unit by the increasing means. It is possible to execute the effect to be generated.

As described above, the gaming machine according to the present invention can execute an effect of generating a wind at the sound source data level and an effect of generating a wind stronger than the sound source data level based on the common sound source data.

According to the present invention, it is possible to provide a gaming machine capable of performing an effect of generating a wind at a sound source data level and an effect of generating a wind stronger than the sound source data level based on common sound source data. ..

1 Pachinko machine 25a Diaphragm 46 Selector (detector)
55 Main relay board (connection part)
61 Door open / close monitoring switch (detector)
62 BET switch (detector)
63 Clearing switch (detector)
64 Start switch (detector)
65 Stop switch board (detector)
67 Reset switch (detector)
69 Sub-relay board (relay control unit, control unit)
71 Main control board (main control unit)
72 Sub-control board (control unit, sub-control unit)
81 Amplifier board (sound source conversion unit, sound amplification unit)
83 Panel relay board (drive output section)
85 Movable accessory (movable part)
94 microprocessor (control unit)
101 Optical communication reception connector (signal input unit)
103 port input / output IC (signal output unit)
111 Power supply circuit (1st power supply unit)
112 Power management IC (power management unit, reset output means, interrupt signal output means)
131 Optical communication reception connector (light reception conversion means)
133 Communication IC (input signal output means)
141 Driver IC (driver circuit)
142 motor (drive unit)
151 Buffer IC (Signal input section)
152 LEFT button (operation unit)
152s LEFT switch (switch)
153 RIGHT button (operation unit)
153s RIGHT switch (switch)
154 UP button (operation unit)
154s UP switch (switch)
155 DOWN button (operation unit)
155s DOWN switch (switch)
156 ENTER button (operation unit)
156s ENTER switch (switch)
157 PUSH button (operation unit)
157s PUSH switch (switch)
161 Sound IC (sound source conversion means, compression means, increase means)
B1, CP1 electrolytic capacitor (second power supply unit)
C1 filter element (power supply regulating means)
C2, C12, C13, C21, C51, C52 Filter element D1 Rectifying element (power supply regulating means)
D71-D76 Overvoltage protection element DD25L Lower left subwoofer (speaker section, vibration section)
FB1, FB2 filter element FL1 filter element IC1-1, IC1-2, IC1-3, IC1-4 Schmitt trigger inverter L1, L2 Filter element R7 to R12 resistance (line resistance)
R71-R82 resistor (adjuster)
S1 Schmitt trigger (Schmitt trigger circuit)
Z1 filter element (power supply regulating means)
Z2, Z11, Z21, Z51 Filter element Z31-Z34, Z41-Z46 Overvoltage protection element D71-D76 Overvoltage protection element

Claims (2)

Moving parts and
A drive unit for driving the movable unit and
A drive output unit that outputs a drive current to drive the drive unit,
A control unit that outputs drive data for controlling the drive unit is provided.
The drive output unit
A driver circuit for driving and controlling the drive unit,
To operate the driver circuit, the power supply line and ground line,
It has a plurality of first overvoltage prevention elements and second overvoltage prevention elements having two terminals for preventing overvoltage.
The driver circuit
A plurality of output terminals for outputting a drive current to the drive unit, and
The power supply terminal connected to the power supply line and
The ground terminal connected to the ground line and
A reset terminal for inputting a reset signal and
It has a sleep terminal for inputting a sleep signal, and
One terminal of the plurality of first overvoltage prevention elements is connected to the plurality of output terminals of the driver circuit.
The other terminal of the plurality of first overvoltage protection elements is connected to the ground line.
One terminal of the second overvoltage prevention element is connected to the reset terminal and the sleep terminal of the driver circuit.
A gaming machine characterized in that the other terminal of the second overvoltage prevention element is connected to the ground line. The first overvoltage prevention element and the second overvoltage prevention element are composed of voltage-dependent resistors, and when an overvoltage occurs, the resistance value changes, so that the overvoltage is applied to the plurality of output terminals of the driver circuit. The gaming machine according to claim 1, wherein the player is not allowed to input.

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