JP6905498B2 - Nitride semiconductor light emitting device and method for manufacturing nitride semiconductor light emitting device - Google Patents

Description

The present invention relates to a nitride semiconductor light emitting device and a method for manufacturing a nitride semiconductor light emitting device.

In recent years, nitride semiconductor light emitting devices such as light emitting diodes and laser diodes that output blue light have been put into practical use, and development of nitride semiconductor light emitting devices with improved light emitting output is underway (see Patent Document 1). ).

The nitride semiconductor light emitting element described in Patent Document 1 includes an n-type nitride semiconductor layer, a trigger layer, a V-pit expansion layer, a multiple quantum well layer forming a light emitting layer, and a p-type nitride semiconductor layer. It is a nitride semiconductor light emitting element provided in this order, and V pits are formed in the multiple quantum well layer, and the trigger layer constitutes the upper surface of the n-type nitride semiconductor layer. The V-pit expansion layer is made of a nitride semiconductor material having a lattice constant different from that of the material to be used, and the V-pit expansion layer is a nitride semiconductor having substantially the same lattice constant as the material constituting the upper surface of the n-type nitride semiconductor layer. It is made of a material and has a thickness of 5 nm or more and 5000 nm or less.

By the way, Non-Patent Document 1 describes the action of V-pits in the multiple quantum well layer. Specifically, in Non-Patent Document 1, if there is a V pit in the multiple quantum well layer, the width of the quantum well on the slope of the V pit becomes narrow, so that the energy of the quantum level increases. It is stated that the effective bandgap is increased, preventing electron holes in the quantum well from reaching the inside of the V pit, and as a result, non-emission recombination in the multiple quantum well layer is suppressed. The nitride semiconductor light emitting device described in Patent Document 1 relates to an invention made based on a technical idea relating to the action of V pits in the multiple quantum well layer.

Japanese Patent No. 5881393

A. Hangleiter, F. Hitzel, C. Netzel, D. Fuhrmann, U. Rossow, G. Ade, and P. Hinze, “Suppression of Nonradiative Recombination by V-Shaped Pits in GaInN / GaN Quantum Wells Produces a Large Increase in the Light Emission Efficiency ”, Physical Review Letters 95, 127402 (2005)

In the nitride semiconductor light emitting device described in Patent Document 1, in addition to the n-type nitride semiconductor layer as the trigger layer, it is necessary to further form a layer containing the nitride semiconductor material as the V-pit expansion layer, and the nitride The number of steps for forming a semiconductor light emitting device has increased, and the manufacturing cost has increased.

The present invention, while improving the luminous output by forming a V pit, the nitride semiconductor light emitting device and a nitride semiconductor light emitting device capable you to reduce the manufacturing cost by eliminating the need for trigger spreading layer It is an object of the present invention to provide a manufacturing method.

An object of the present invention is to provide an n-type clad layer formed of n-type AlGaN and a multiple quantum well layer having a barrier layer formed of AlGaN on the n-type clad layer side, for the purpose of solving the above problems. A nitride semiconductor light emitting device including the n-type clad layer and a trigger layer formed containing Si located between the n-type clad layer and the barrier layer, the n-type clad layer and the multiple quantum well layer. A plurality of V pits starting from the rearrangement in the n-type clad layer are formed, and the trigger layer is composed of one layer and is in contact with both the n-type clad layer and the barrier layer. and it has a concentration of said Si in said trigger layer, said a 5.0 × ¹⁰ 9 ~5.0 × ^{10 10} times the density of the dislocations in the n-type cladding layer, to provide a nitride semiconductor light emitting device .. Further, the present invention includes a step of forming an n-type clad layer having n-type AlGaN on a substrate, a step of forming a multiple quantum well layer having a barrier layer having AlGaN on the n-type clad layer side, and the n. The step of forming a trigger layer composed of one layer containing Si so as to be in contact with both the mold clad layer and the barrier layer is provided, and in the step of forming the trigger layer, the Si concentration of the trigger layer is high. you formed while adjusting the supply amount of 5.0 × ^{10 9} ~5.0 × 10 10 times become as the Si density of dislocations of the n-type cladding layer, the manufacturing method of the nitride semiconductor light emitting device I will provide a.

According to the present invention, while improving the luminous output by forming a V pit, the nitride semiconductor light emitting device and a nitride semiconductor light emitting device capable you to reduce the manufacturing cost by eliminating the need for trigger spreading layer A manufacturing method can be provided.

FIG. 1 is a cross-sectional view schematically showing a configuration of a nitride semiconductor light emitting device according to an embodiment of the present invention. 2A and 2B are images showing V pits, FIG. 2A is an image showing a vertical cross section of a nitride semiconductor light emitting device in which Vpits are formed, and FIG. 2B is an enlarged part of FIG. 2A. It is an enlarged image of the V pit shown by. FIG. 3 is a diagram showing the relationship between the emission wavelength and the emission output of Examples and Comparative Examples. FIG. 4 is a table showing data of current and light emission output supplied in the forward direction of Examples and Comparative Examples shown in FIG.

[Embodiment]
Embodiments of the present invention will be described with reference to FIGS. 1 to 4. It should be noted that the embodiments described below are shown as suitable specific examples for carrying out the present invention, and there are some parts that specifically exemplify various technically preferable technical matters. , The technical scope of the present invention is not limited to this specific aspect. Further, the dimensional ratio of each component in each drawing does not necessarily match the dimensional ratio of the actual nitride semiconductor light emitting device.

FIG. 1 is a cross-sectional view schematically showing a configuration of a nitride semiconductor light emitting device according to an embodiment of the present invention. The nitride semiconductor light emitting device 1 (hereinafter, also simply referred to as “light emitting device 1”) is a light emitting diode (LED) that emits light having a wavelength in the ultraviolet region. In the present embodiment, in particular, the light emitting element 1 that emits deep ultraviolet light having a center wavelength of 250 nm to 350 nm will be described as an example.

As shown in FIG. 1, the light emitting element 1 includes a substrate 10, a buffer layer 20, an n-type clad layer 30, a trigger layer 40, a multiple quantum well layer 50, an electron block layer 60, and a p-type clad layer. It includes 70, a p-type contact layer 80, an n-side electrode 90, and a p-side electrode 92.

As the semiconductor constituting the light emitting device 1, for example, _{a group III nitride semiconductor represented by Al x} Ga _1-x N (0 ≦ x ≦ 1) can be used. Further, some of these Group III elements may be replaced with indium (In), boron (B), thallium (Tl), etc., and a part of N may be replaced with phosphorus (P), arsenic (As), etc. It may be replaced with antimony (Sb), bismuth (Bi) or the like.

The substrate 10 has translucency with respect to the deep ultraviolet light emitted by the light emitting element 1. The substrate 10, for example, sapphire including sapphire _{(Al 2 O 3) (Al} 2 O 3) is a substrate. As the substrate 10, in addition to the sapphire (Al ₂ O ₃ ) substrate, for example, an aluminum nitride (AlN) substrate or an aluminum gallium nitride (AlGaN) substrate may be used.

The buffer layer 20 is formed on the substrate 10. The buffer layer 20 includes an AlN layer 22 and an undoped u-Al _p Ga _1-p N layer 24 (0 ≦ p ≦ 1) formed on the AlN layer 22. Further, the substrate 10 and the buffer layer 20 form a base structure portion 2. The u-Al _p Ga _1-p N layer 24 does not necessarily have to be provided.

The n-type clad layer 30 is formed on the base structure portion 2. The n-type clad layer 30 is a layer formed of n-type AlGaN (hereinafter, also simply referred to as “n-type AlGaN”), and is, for example, Al _q Ga doped with silicon (Si) as an n-type impurity. _{It is a 1-q} N layer (0 ≦ q ≦ 1). As the n-type impurity, germanium (Ge), selenium (Se), tellurium (Te), carbon (C) and the like may be used. The n-type clad layer 30 has a thickness of about 1 μm to 3 μm, and has a thickness of, for example, about 2 μm. The n-type clad layer 30 may be a single layer or a multi-layer structure.

The trigger layer 40 is formed on the n-type clad layer 30. The trigger layer 40 is a layer that plays a role of generating V pits 100 (see FIG. 2A) formed in the multiple quantum well layer 50 described later. The trigger layer 40 has a thickness of about 1 to 100 nm, for example, a thickness of about 25 nm.

The trigger layer 40 is a layer formed containing silicon (Si). The concentration of Si in the trigger layer 40 is appropriately adjusted according to the density of defects such as dislocations occurring in the n-type clad layer 30. As an example, when the n-type clad layer 30 has 1.0 × 10 ⁹ / cm ³ dislocations, the concentration of Si in the trigger layer 40 is, for example, 5.0 × 10 ¹⁸ cm ^{-3 to} 5.0. × 10 ¹⁹ cm ^-3 .

The multiple quantum well layer 50 forming the light emitting layer is formed on the trigger layer 40. The multiple quantum well layer 50 _{includes three barrier layers 52a, 52b, 52c and Al s} including a barrier layer 52a on the n-type clad layer 30 side of the multiple quantum well layer composed of _{Al r} Ga _{1-r N.} Three well layers 54a, 54b, 54c (0 ≦ r ≦ 1, 0 ≦ s ≦ 1, r> s) composed of Ga _{1-s N are alternately laminated.} The multiple quantum well layer 50 is configured to have a band gap of 3.4 eV or more in order to output deep ultraviolet light having a wavelength of 350 nm or less. In the present embodiment, the multiple quantum well layer 50 is provided with three barrier layers 52a, 52b, 52c and well layers 54a, 54b, 54c, but the number of layers is not limited to three. It may be two or four or more.

Next, the V pit 100 will be described with reference to FIG. FIG. 2 is an image showing the V pit 100, FIG. 2A is an image showing a vertical cross section of the nitride semiconductor light emitting device on which the V pit 100 is formed, and FIG. 2B is a part of (a). It is an enlarged image of the V pit 100 which shows (the circular frame part of FIG. 2A) enlarged. The images shown in FIG. 2 are SEM (Scanning Electron Microscope) observation images.

As shown in FIG. 2A, a plurality of V pits 100 are formed in the multiple quantum well layer 50. The V pit 100 is a kind of crystal defect generated by, for example, a crystal shift that may occur during growth. The plurality of V pits 100 are generated from defects such as dislocations existing in the n-type clad layer 30 by providing the trigger layer 40. As shown in FIG. 2B, the V pit 100 extends in the thickness direction of the light emitting element 1 via the plurality of barrier layers 52a, 52b, 52c and well layers 54a, 54b, 54c, and the apex 100a is an n-type cladding. It has a substantially inverted conical shape arranged so as to face the layer 30 side (lower side in the drawing) (see the dotted line in FIG. 2B).

In other words, as shown in FIG. 2B, the vertical cross section of the V pit 100 has a substantially V-shaped shape that opens toward the electron block layer 60 side (upper side in the drawing), and the cross section is substantially V-shaped. It has a circular shape. Here, the vertical cross section means a cross section parallel to the thickness direction of the light emitting element 1, and the cross section means a cross section perpendicular to the thickness direction of the light emitting element 1. The shape of the V pit 100 is not limited to a substantially conical shape, and may be a hexagonal pyramid shape, a polygonal pyramid shape, an elliptical pyramid shape, a columnar shape, a polygonal columnar shape, or the like.

The apex 100a of the V-pit 100 is generated from a dislocation in the n-type clad layer 30, and the bottom surface 100b of the V-pit 100 is terminated in the multiple quantum well layer 50. Preferably, the diameter of the bottom surface 100b of the V pit 100 is 100 nm or less. When the bottom surface 100b of the V pit 100 does not have a circular shape, the diameter of the V pit 100 is the diameter when the shape of the bottom surface 100b of the V pit 100 is approximated to a circle by, for example, an circumscribed circle. say. Further, the V pit 100 has a thickness of about 10 nm to 30 nm, and has a thickness of, for example, about 20 nm. Here, the thickness of the V pit means the length in the thickness direction of the light emitting element 1 in the vertical cross section of the V pit 100.

The electron block layer 60 is formed on the multiple quantum well layer 50. The electron block layer 60 is a layer formed of p-type AlGaN (hereinafter, also simply referred to as “p-type AlGaN”). The electron block layer 60 has a thickness of about 1 nm to 10 nm. The electron block layer 60 may include a layer formed of AlN. Further, the electron block layer 60 is not necessarily limited to the p-type semiconductor layer, and may be an undoped semiconductor layer.

The p-type clad layer 70 is formed on the electron block layer 60. p-type cladding layer 70 is a layer formed by p-type AlGaN, for example, a p-type _{Al t Ga 1-t} N cladding layer of magnesium as an impurity (Mg) is doped (0 ≦ t ≦ 1) be. As the p-type impurity, zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba) and the like may be used. The p-type clad layer 70 has a thickness of about 300 nm to 700 nm, and has a thickness of, for example, about 400 nm to 600 nm.

The p-type contact layer 80 is formed on the p-type clad layer 70. The p-type contact layer 80 is, for example, a p-type GaN layer doped with impurities such as Mg at a high concentration.

The n-side electrode 90 is formed on a part of the n-type clad layer 30. The n-side electrode 90 is formed of, for example, a multilayer film in which titanium (Ti) / aluminum (Al) / Ti / gold (Au) are sequentially laminated on the n-type clad layer 30.

The p-side electrode 92 is formed on the p-type contact layer 80. The p-side electrode 92 is formed of, for example, a nickel (Ni) / gold (Au) multilayer film that is sequentially laminated on the p-type contact layer 80.

Next, a method of manufacturing the light emitting element 1 will be described. The buffer layer 20 is formed on the substrate 10. Specifically, on the substrate 10, the AlN layer 22, the _{u-Al 1-p Ga p} N layer 24 of undoped to high temperature growth. Next, the n-type clad layer 30 is grown at a high temperature on the buffer layer 20.

Next, the trigger layer 40 is grown at a high temperature on the n-type clad layer 30 while appropriately adjusting the doping amount of Si according to the defect density such as dislocations contained in the high-temperature n-type clad layer 30. For example, the doping amount of Si is adjusted so that the concentration of Si becomes the above-mentioned 5.0 × 10 ¹⁸ cm ^{-3 to} 5.0 × 10 ¹⁹ cm ^-3. Next, the multiple quantum well layer 50, the electron block layer 60, and the p-type clad layer 70 are sequentially grown at high temperature on the trigger layer 40.

The n-type clad layer 30, the trigger layer 40, the multiple quantum well layer 50, the electron block layer 60, and the p-type clad layer 70 are formed by a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy method. It can be formed by using a well-known epitaxial growth method such as (Molecular Beam Epitaxy: MBE) and Halide Vapor Phase Epitaxy (NVPE).

Next, a mask is formed on the p-type clad layer 70, and the trigger layer 40, the multiple quantum well layer 50, the electron block layer 60, and the p-type clad layer 70 in the exposed region where the mask is not formed are removed. The trigger layer 40, the multiple quantum well layer 50, the electron block layer 60, and the p-type clad layer 70 can be removed by, for example, plasma etching. The n-side electrode 90 is formed on the exposed surface 30a (see FIG. 1) of the n-type clad layer 30, and the p-side electrode 92 is formed on the p-type contact layer 80 from which the mask has been removed. The n-side electrode 90 and the p-side electrode 92 can be formed by a well-known method such as an electron beam deposition method or a sputtering method. As a result, the light emitting element 1 shown in FIG. 1 is formed.

(Example)
As described above, the trigger layer 40 contains a doping amount of Si according to the defect density such as dislocations of the n-type clad layer 30. The trigger layer 40 is arranged between the n-type cloud layer 30 and the multiple quantum well layer 50 having a barrier layer 52a formed of AlGaN on the outermost layer on the n-type clad layer 30 side. With this configuration, starting from a defect such as a dislocation of the n-type clad layer 30, the multiple quantum well layer 50 extends through the plurality of barrier layers 52a, 52b, 52c and the well layers 54a, 54b, 54c. A plurality of conical V pits 100 according to the defect density are formed by AlGaN of the outermost layer of the multiple quantum well layer 50, for example, the electron block layer 60 side (opposite side to the n-type clad layer 30). The well layer 54c is formed as a terminal. It was confirmed that the plurality of V pits 100 improve the light emitting output of the light emitting element 1.

Next, an experiment confirmed to improve the light emission output will be described with reference to FIG. FIG. 3 is a diagram showing the relationship between the directional current supplied in the examples and the comparative examples and the light emission output. The horizontal axis of FIG. 3 indicates the current (mA) applied to the light emitting element 1, and the vertical axis indicates the light emission output (arbitrary unit). The symbol A indicates the case of the embodiment, and the symbol B indicates the case of the comparative example. FIG. 4 is a table showing data of current and light emission output supplied in the forward direction of Examples and Comparative Examples shown in FIG. As a comparative example, a light emitting element having a configuration in which the trigger layer 40 was removed from the above-mentioned light emitting element 1 was used.

As shown in FIGS. 3 and 4, in the embodiment, when a current of about 20 mA is applied, an emission output of about 1700 is obtained, and when a current of about 60 mA is applied, an emission output of about 5000 is obtained. When a current of 100 mA was applied, a light emission output of about 7800 was obtained, and when a current of 150 mA was applied, a light emission output of about 11000 was obtained. On the other hand, in the comparative example, when a current of about 20 mA was applied, an emission output of about 1300 was obtained, and when a current of about 60 mA was applied, an emission output of about 3500 was obtained, and a current of 100 mA was applied. At that time, about 5000 light emitting outputs were obtained, and when a current of 150 mA was applied, about 7400 light emitting outputs were obtained.

Summarizing the above, the light emitting output of the example is about 1.31 times the light emitting output of the comparative example when a current of 20 mA is applied, and is about 1.1 of the light emitting output of the comparative example when a current of 60 mA is applied. It becomes 43 times, and when a current of 100 mA is applied, it becomes about 1.56 times the emission output of the comparative example, and when a current of 150 mA is applied, the emission output of the example is about 1.49 of the emission output of the comparative example. It has doubled. As described above, the light emission output of the embodiment is improved by at least 20% or more in the range of the applied current. From these results, it was clarified that the light emitting output of the light emitting element 1 is increased by the present invention.

(Actions and effects of embodiments)
As described above, the light emitting element 1 according to the embodiment of the present invention is the n-type clad layer 30.
A trigger layer 40 for generating a V pit 100 is provided between the multiple quantum well layer and the barrier layer 52a on the n-type clad layer 30 side of the multiple quantum well layer. The concentration of Si in the trigger layer 40 is adjusted to 5.0 × ¹⁰ 9 ~5.0 × ^{10 10} times the density of dislocations in the n-type cladding layer. In this way, the V-pid can be formed without providing the trigger expansion layer in addition to the trigger layer 40 as described in Patent Document 1. Therefore, it is possible to improve the light emitting output by forming the V pit and reduce the manufacturing cost by eliminating the need for the trigger expansion layer.

(Summary of Embodiment)
Next, the technical idea grasped from the above-described embodiment will be described with reference to the reference numerals and the like in the embodiment. However, the respective reference numerals and the like in the following description are not limited to the members and the like in which the components in the claims are specifically shown in the embodiment.

[1] An n-type clad layer (30) formed of n-type AlGaN and a multiple quantum well layer having barrier layers (52a, 52b, 52c) formed of AlGaN on the n-type clad layer (30) side. A nitride semiconductor light emitting device (1) containing the above, further comprising a trigger layer (40) formed containing Si, which is located between the n-type clad layer (30) and the barrier layer (52a). The n-type clad layer (30) and the multiple quantum well layer are formed with a plurality of V-pits (100) starting from a rearrangement in the n-type clad layer (30), and the trigger layer is formed. the concentration of the Si in (40), the n-type cladding layer (30) is the 5.0 × ¹⁰ 9 ~5.0 × ^{10 10} times the density of dislocations in the nitride semiconductor light emitting device (1 ).
[2] The nitride semiconductor light emitting device (1) according to the above [1], wherein the trigger layer is in contact with the barrier layer.
[ 3 ] The nitride semiconductor light emitting device according to the above [1] or [2] , wherein the V pit (100) has a substantially inverted conical shape extending in the thickness direction of the nitride semiconductor light emitting device (1). (1).
[4] the apex of the V-pit (100) having a substantially inverted conical shape (100a) is generated from the dislocation of the n-type cladding layer (30) in the V bottom (100b pit (100) ) Is the nitride semiconductor light emitting device (1) according to the above [3 ], which is terminated in the multiple quantum well layer (50).
[5] The V-pit (100) is formed before Symbol multiple quantum well layer (50) said n-type cladding layer (30) opposite the well layer formed by an outermost layer of AlGaN of the (54c) as an end The nitride semiconductor light emitting device (1) according to the above [ 4].
[6] The concentration of the Si of the trigger layer (40) is a ^{5.0 × 10 18 cm -3 ~5.0 ×} 10 19 cm -3, either the [1] [5] 1 The nitride semiconductor light emitting device (1) according to the above.
[ 7 ] A step of forming an n-type clad layer (30) having an n-type AlGaN on a substrate (10) and a barrier layer (52a, 52b, 52c) having an AlGaN on the n-type clad layer (30) side. The step of forming the multiple quantum well layer having the structure and the step of forming the trigger layer (40) formed containing Si, which is located between the n-type clad layer (30) and the barrier layer (52a). comprising the step of forming said trigger layer (40), said trigger layer (40) Si concentration the n-type cladding layer (30) density of 5.0 × ¹⁰ 9 of dislocations in 5.0 × 10 A method for manufacturing a nitride semiconductor light emitting device (1), characterized in that the Si is formed while adjusting the supply amount of Si so as to be ^{10 times larger.}

1 ... Nitride semiconductor light emitting element (light emitting element)
2 ... Underlayer structure 10 ... Substrate 20 ... Buffer layer 22 ... AlN layer 24 ... u-Al _p Ga _1-p N layer 30 ... n-type clad layer 30a ... Exposed surface 40 ... Trigger layer 50 ... Multiple quantum well layer 52, 52a, 52b, 52c ... Barrier layer 54, 54a, 54b, 54c ... Well layer 60 ... Electronic block layer 70 ... p-type clad layer 80 ... p-type contact layer 90 ... n-side electrode 92 ... p-side electrode 100 ... V pit 100a ... Top 100b ... Bottom

Claims (6)

An n-type clad layer formed by n-type AlGaN and
A nitride semiconductor light emitting device including a multiple quantum well layer having a barrier layer formed of AlGaN on the n-type clad layer side.
A trigger layer formed containing Si, which is located between the n-type clad layer and the barrier layer, is further provided.
The n-type clad layer and the multiple quantum well layer are formed with a plurality of V-pits starting from dislocations in the n-type clad layer.
The trigger layer is composed of one layer and is in contact with both the n-type clad layer and the barrier layer.
The concentration of the Si in the trigger layer is 5.0 × 10 ^{9 to} 5.0 × 10 ¹⁰ times the density of the dislocations in the n-type clad layer.
Nitride semiconductor light emitting device. The V-pit has a substantially inverted conical shape extending in the thickness direction of the nitride semiconductor light emitting device.
The nitride semiconductor light emitting device according to claim 1. The apex of the V-pit having a substantially inverted conical shape is generated from the dislocation in the n-type clad layer, and the bottom surface of the V-pit is terminated in the multiple quantum well layer.
The nitride semiconductor light emitting device according to claim 2. The V pit is formed with a well layer formed by AlGaN as the outermost layer on the opposite side of the n-type clad layer of the multiple quantum well layer as a terminal.
The nitride semiconductor light emitting device according to claim 3. The concentration of the Si in the trigger layer is 5.0 × 10 ¹⁸ cm ^{-3 to} 5.0 × 10 ¹⁹ cm ^-3 .
The nitride semiconductor light emitting device according to any one of claims 1 to 4. A step of forming an n-type clad layer having n-type AlGaN on a substrate, and
A step of forming a multiple quantum well layer having a barrier layer having AlGaN on the n-type clad layer side, and
A step of forming a trigger layer composed of one layer containing Si so as to be in contact with both the n-type clad layer and the barrier layer is provided.
In the step of forming the trigger layer, the amount of Si supplied is such that ^{the Si concentration of the trigger layer is 5.0 × 10 9 to} 5.0 × 10 ¹⁰ times the density of dislocations in the n-type clad layer. you form while adjusting the,
A method for manufacturing a nitride semiconductor light emitting device.

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