JP6897139B2 - Board with built-in electronic components and board mounting structure - Google Patents

Description

The present invention relates to an electronic component-embedded substrate and a substrate mounting structure including the electronic component-embedded substrate.

There is known an electronic component built-in board in which a passive component connected to an active component is built. Patent Document 1 shows a component-embedded substrate in which a chip capacitor is incorporated. In recent years, the thinning of electronic components has progressed due to the needs for miniaturization of electronic devices, and studies have been conducted on substrates with built-in electronic components in which thin-film electronic components are incorporated.

Japanese Unexamined Patent Publication No. 2009-194096

In the electronic component built-in substrate, it is required to reduce the ESL (equivalent series inductance) of the electronic component connected to the active component. Therefore, in order to reduce ESL, the inventors of the present application divide the electrodes on the active component side of the electronic components into a plurality of electrodes, and provide terminals for connecting to the active component for each of the divided electrodes. We are considering a terminal structure. However, when the electrode on the side connected to the active component is divided into a plurality of terminals to form a multi-terminal structure, a difference in internal stress occurs between the vicinity of the electrode connected to the active component and the vicinity of the electrode on the opposite side, which is particularly active. It is possible that the connection reliability between the terminals on the component side and the electrodes will decrease.

The present invention has been made in view of the above, and an object of the present invention is to provide an electronic component-embedded substrate capable of suppressing a decrease in connection reliability of electronic components, and a substrate mounting structure including the electronic component-embedded substrate. And.

In order to achieve the above object, the electronic component built-in substrate according to the present invention includes a substrate having a first main surface and a second main surface on the opposite side of the first main surface, and a substrate incorporated in the substrate and said to be the first main surface. An electronic component having a first terminal provided on the surface side, a second terminal provided on the second main surface side, and a capacitance portion provided between the first terminal and the second terminal, and the above. A first via conductor formed in an insulating layer included in a substrate, electrically connected to the first terminal and extending toward the first main surface side, and formed in an insulating layer included in the substrate, said It has a second via conductor that is electrically connected to the second terminal and extends to the second main surface side, and the number N1 of the first terminal and the number N2 of the second terminal are N1> N2. The ground contact area S1 between the first via conductor and the first terminal and the ground contact area S2 between the second via conductor and the end face of the second terminal satisfy S1 ≦ S2.

According to the above-mentioned board for incorporating electronic components, when the number of the first terminals is large and the number of the second terminals is small, the relationship between the second via conductors of the first via conductor is set to S1 ≦ S2. Therefore, the deformation of the electronic component due to the internal stress can be suppressed. Therefore, the connection reliability at the boundary between the first terminal and the first via conductor and the connection reliability at the boundary between the second terminal and the second via conductor are improved.

Here, as an embodiment in which a plurality of the first via conductors are connected to one said first terminal, or a plurality of said second via conductors are connected to one said second terminal. May be good.

As described above, even when a plurality of via conductors are connected to one terminal, it is possible to suppress a decrease in connection reliability of electronic components by satisfying the above relationship.

Further, the thickness T1 of the first terminal and the thickness T2 of the second terminal may satisfy T1 <T2.

As described above, when the thickness of the first terminal having a large number is small and the thickness of the second terminal having a small number is large, the relationship between the second via conductors of the first via conductor is set to S1 ≦ S2. Therefore, the deformation of the electronic component due to the internal stress can be suitably suppressed.

Further, the board mounting structure according to one embodiment of the present invention is a board mounting structure including the above-mentioned board with built-in electronic components, the first terminal is connected to the active component side, and the second terminal is the power supply side. It is connected to the.

In the above board mounting structure, the first terminal of the electronic component built-in board is connected to the active component side, and the second terminal of the electronic component built-in board is connected to the power supply side, so that the ESL of the electronic component can be reduced. At the same time, it is possible to suppress a decrease in connection reliability of electronic components.

According to the present invention, there is provided an electronic component-embedded substrate capable of suppressing a decrease in connection reliability of electronic components, and a substrate mounting structure including the electronic component-embedded substrate.

It is sectional drawing which shows typically the substrate mounting structure using the electronic component built-in substrate which concerns on one Embodiment of this invention. It is sectional drawing which shows roughly a part of the electronic component built-in substrate which concerns on one Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the electronic component built-in substrate shown in FIG. It is a figure for demonstrating the manufacturing method of the electronic component built-in substrate shown in FIG. It is a figure for demonstrating the manufacturing method of the electronic component built-in substrate shown in FIG.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are designated by the same reference numerals, and duplicate description will be omitted.

FIG. 1 is a cross-sectional view schematically showing a board mounting structure using a board with built-in electronic components according to an embodiment of the present invention. Further, FIG. 2 is a cross-sectional view schematically showing a part of the electronic component built-in substrate according to the embodiment of the present invention.

As shown in FIG. 1, the board mounting structure 100 is a mounting structure used for, for example, a communication terminal or the like. The electronic component-embedded substrate 1 includes a substrate 10 including an insulating layer 11 and an electronic component 20 incorporated in the substrate 10. The first main surface 10A on one side of the substrate 10 is provided with a first external terminal 31 extending from the first terminal 21 which is an electrode on one side of the electronic component 20. Further, the second main surface 10B on the opposite side of the first main surface 10A is provided with a second external terminal 32 extending from the second terminal 22 on the opposite side of the first terminal 21 of the electronic component 20.

In the substrate mounting structure 100, on the first main surface 10A side of the substrate 10 of the electronic component embedded substrate 1, the active component is provided to the first external terminal 31 of the electronic component embedded substrate 1 via the conductor material 41 (bump). 42 is connected. The active component 42 is not particularly limited, but for example, an LSI (Large Scale Integrated Circuit), an ASIC (Application Specific Integrated Circuit), a CPU (Central Processing Unit), or the like may be used. Can be done.

On the second main surface 10B side of the electronic component built-in board 1 of the board mounting structure 100, the circuit board 44 on the power supply side is connected to the second external terminal 32 of the electronic component built-in board 1 via the conductor material 43. Will be done. The circuit board 44 is, for example, a motherboard or the like. Instead of the circuit board 44, other electronic components or the like may be connected. At least, in the electronic component built-in substrate 1, the first external terminal 31 on the first main surface 10A side is connected to the active component 42 side, and the second external terminal 32 on the second main surface 10B side is connected to the power supply side. There is.

The detailed structure of the electronic component built-in substrate 1 will be described with reference to FIG. The electronic component-embedded substrate 1 includes a substrate 10 including an insulating layer 11 and a core 12, an electronic component 20 incorporated in the substrate 10, and a via conductor 30 formed in the insulating layer 11 (first via conductor 33, second via conductor 33, second). Via conductor 34) and. The substrate 10 has a first main surface 10A and a second main surface 10B on the opposite side of the first main surface 10A. The electronic component 20 includes a plurality of first terminals 21 provided on the first main surface 10A side, a plurality of second terminals 22 provided on the second main surface 10B side, and a first terminal 21 and a second terminal 22. It has a capacitance unit 23 provided between the two. Further, the electronic component built-in substrate 1 has a first external terminal 31 electrically connected to the first terminal 21 of the electronic component 20 and a second external terminal electrically connected to the second terminal 22 of the electronic component 20. 32 and. Here, the term "built-in" of the electronic component 20 in the substrate 10 means a state in which the electronic component 20 is not exposed from the first main surface 10A and the second main surface 10B of the substrate 10.

The substrate 10 is a so-called multilayer circuit board. In this embodiment, the substrate 10 includes an insulating layer 11 and a core 12. The core 12 is built in the insulating layer 11, and the first main surface 10A and the second main surface 10B of the substrate 10 correspond to the main surfaces of the insulating layer 11. The core 12 is provided with a through hole 13 penetrating from the first main surface 10A side to the second main surface 10B side, and the electronic component 20 is arranged in the through hole 13. The insulating layer 11 is also filled in the through hole 13. As a result, the insulating layer 11 is interposed between the electronic component 20 and the core 12. The insulating layer 11 is made of an insulating material such as an epoxy resin, an acrylic resin, or a phenol resin. The insulating material constituting the insulating layer 11 is preferably a material whose hardness changes depending on a specific treatment, such as a thermosetting resin or a photocurable resin. The core 12 is made of, for example, silicon (Si), glass (SiO ₂ ), a resin substrate, or the like. The total thickness of the substrate 10 can be, for example, about 40 μm to 1000 μm. The thickness of the insulating layer 11 can be, for example, about 1 μm to 200 μm, and the thickness of the core 12 can be, for example, about 20 μm to 400 μm. The total thickness of the substrate 10, the thickness of the insulating layer 11, and the thickness of the core 12 are not particularly limited.

The electronic component 20 is a capacitor having a plurality of first terminals 21, a plurality of second terminals 22, and a capacitance portion 23 provided between the plurality of first terminals 21 and the plurality of second terminals 22. In the present embodiment, the electronic component 20 is a so-called TFCP (Thin Film Capacitor) in which the first terminal 21 and the second terminal 22 are made of a metal thin film and the capacitance portion 23 is made of a dielectric film. Will be described. The electrode layer composed of the metal thin film on the first terminal 21 side may include a region different from the region that functions as the first terminal 21. The electrode layer composed of the metal thin film on the second terminal 22 side may include a region different from the region that functions as the second terminal 22.

In the example shown in FIG. 2, the first terminal 21 is divided into five, and the second terminal 22 is divided into two. Each of the divided first terminals 21 has an end surface 21a on the first main surface 10A side and a side surface 21b. An insulating layer 11 is filled around the end face 21a and the side surface 21b. Further, each of the divided second terminals 22 has an end surface 22a on the second main surface 10B side and a side surface 22b. An insulating layer 11 is filled around the end face 22a and the side surface 22b. The number (number of divisions) and shape of the divided first terminal 21 and second terminal 22 can be changed as appropriate.

The total thickness of the three layers (first terminal 21, second terminal 22, and capacitance portion 23) of the electronic component 20 is, for example, about 5 μm to 650 μm, and the thickness of the first terminal 21 is about 0.1 μm to 50 μm. The thickness of the capacitance portion 23 can be set to about 0.05 μm to 100 μm, and the thickness of the second terminal 22 can be set to about 5 μm to 500 μm. In the electronic component 20 described in this embodiment, the thickness of the second terminal 22 is larger than the thickness of the first terminal 21. Therefore, within the above-mentioned thickness range, the second terminal 22 is appropriately selected so as to be larger than the thickness of the first terminal 21. That is, assuming that the thickness of the first terminal 21 is T1 and the thickness of the second terminal 22 is T2, T1 <T2.

As the material constituting the first terminal 21 and the second terminal 22, the main components are nickel (Ni), copper (Cu), aluminum (Al), platinum (Pt), an alloy containing these metals, or an intermetallic metal. Materials that are compounds are preferably used. However, the materials of the first terminal 21 and the second terminal 22 are not particularly limited as long as they are conductive materials. In this embodiment, a case where the first terminal 21 contains copper as a main component and the second terminal 22 contains nickel as a main component will be described. The term "main component" means that the proportion of the component is 50% by mass or more. Further, the mode of the first terminal 21 and the second terminal 22 includes not only the case of forming an alloy or an intermetallic compound but also the case of a laminated structure composed of two or more types. For example, the electrode layer may be formed as a two-layer structure in which a Cu thin film is provided on a Ni thin film. When pure nickel is used as the first terminal 21 and / or the second terminal 22, the purity of the nickel is preferably 99.99% or more. Further, in the case of an alloy containing nickel, the metals contained as metals other than nickel include platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), osmium (Os), and the like. It is preferable that it is at least one selected from the group consisting of ruthenium (Re), tungsten (W), chromium (Cr), tantalum (Ta), silver (Ag), and copper (Cu).

When the second terminal 22 contains two or more kinds of materials, the second terminal 22 has a so-called TSV (Through Silicon Via) structure or the like, and through holes are formed in _{silicon (Si) or glass (SiO 2) or the like.} It may have a structure in which another conductive material is embedded in the through hole.

The capacitance portion 23 is made of a perovskite-based dielectric material. Here, as the perovskite-based dielectric material in the present embodiment, BaTiO ₃ (barium titanate), (Ba _1-x Sr _x ) TiO ₃ (barium titanate strontium), (Ba _1-x Ca _x ) TiO Represented by (strong) dielectric materials having a perovskite structure such as ₃ , PbTIO ₃ , Pb (Zr _x Ti _1-x ) O _{3 , and Pb (Mg 1/3} Nb _2/3 ) O _3. Includes composite perovskite relaxer type ferroelectric materials and the like. Here, in the above-mentioned perovskite structure and perovskite relaxer type dielectric material, the ratio of A site to B site is usually an integer ratio, but it may be intentionally deviated from the integer ratio in order to improve the characteristics. In addition, in order to control the characteristics of the volume part 23, an additive substance may be appropriately contained in the volume part 23 as an auxiliary component.

The first external terminal 31 is provided corresponding to each of the plurality of first terminals 21. In this embodiment, an example in which five first external terminals 31 are provided is shown. Each of the first external terminals 31 is laminated with respect to the first main surface 10A of the substrate 10, and is electrically connected to the first terminal 21 via a via conductor 30 (first via conductor 33 described later). ing. The first terminal 21 of the electronic component 20 is configured to be electrically connectable to an external electronic component, wiring, or the like via the first via conductor 33 and the first external terminal 31. The first external terminal 31 is made of a conductive material such as copper (Cu).

The second external terminal 32 is provided corresponding to each of the plurality of second terminals 22. In this embodiment, an example in which two second external terminals 32 are provided is shown. Each of the second external terminals 32 is laminated with respect to the second main surface 10B of the substrate 10, and is electrically connected to the second terminal 22 via the via conductor 30 (the second via conductor 34 described later). ing. The second terminal 22 of the electronic component 20 is configured to be electrically connectable to an external electronic component, wiring, or the like via the second via conductor 34 and the second external terminal 32. The second external terminal 32 is made of a conductive material such as copper (Cu).

The via conductor 30 is a first via conductor 33 that electrically connects the first terminal 21 and the first external terminal 31, and a second via conductor that electrically connects the second terminal 22 and the second external terminal 32. 34 and is included. The first via conductor 33 penetrates the insulating layer 11 between the first terminal 21 and the first external terminal 31. Further, the second via conductor 34 penetrates the insulating layer 11 between the second terminal 22 and the second external terminal 32. The first via conductor 33 and the second via conductor 34 are basically cylindrical in the stacking direction (thickness direction of the substrate 10), but as shown in FIG. 2 and the like, the outer side (first main surface). The side surface may be inclined so that the cross-sectional area of 10A or the second main surface 10B side is large and the cross-sectional area of the inside (electronic component 20 side) is small.

The area of contact between the first via conductor 33 continuous from the first external terminal 31 and the end surface 21a of the first terminal 21 is the area of contact between the second via conductor 34 continuous from the second external terminal 32 and the end surface 22a of the second terminal 22. It is smaller than the area in contact with. That is, the area in contact between the first via conductor 33 continuous from the first external terminal 31 and the end surface 21a of the first terminal 21 is the ground contact area S1, and the second via conductor 34 continuous from the second external terminal 32 and the second via conductor 34. Assuming that the area in contact with the end surface 22a of the two terminals 22 is the ground contact area S2, S1 ≦ S2 is satisfied. Note that S1 and S2 each refer to the ground contact area of one via conductor. When a plurality of via conductors are provided, the ground contact area is set to S1 and S2 by calculating the average of the ground contact areas obtained for each via conductor.

As described above, in the electronic component 20, the number of the first terminals 21 connected to the active component 42 side (the number of divisions) is N1, and the number of the second terminals 22 connected to the power supply side (the number of divisions) is N2. Then, N1> N2. Further, assuming that the thickness of the first terminal 21 is T1 and the thickness of the second terminal 22 is T2, T1 <T2. Further, if the area in contact between the first via conductor 33 and the end surface 21a of the first terminal 21 is S1, and the area in contact between the second via conductor 34 and the end surface 22a of the second terminal 22 is S2, then S1 ≦ S2. ing.

Next, a method of manufacturing the electronic component built-in substrate 1 according to the present embodiment will be described with reference to FIGS. 3 to 5. 3 to 5 are diagrams for explaining a method of manufacturing the electronic component built-in substrate shown in FIG. 1. Although FIGS. 3 to 5 show a method of manufacturing one electronic component-embedded substrate 1, in reality, after forming a plurality of electronic component-embedded substrates 1 on one support substrate, each electron is used. It is separated into the component-embedded substrate 1. Therefore, FIGS. 3 to 5 are enlarged views of a part on one support substrate.

First, as shown in FIG. 3, the electronic component 20 is prepared. The electronic component 20 can be manufactured by a known method. The first terminal 21 of the electronic component 20 is divided into five, and the second terminal 22 is divided into two.

Next, as shown in FIG. 4A, the core 12 provided with the through hole 13 is prepared. The through hole 13 can be formed by a known process such as etching. After that, as shown in FIG. 4B, the support substrate W is prepared, and the core 12 is temporarily fixed to the support substrate W. Further, the electronic component 20 is arranged and temporarily fixed in the through hole 13 of the core 12. As the support substrate W, for example, a temporary mounting material having adhesiveness or the like can be used.

Next, as shown in FIG. 5A, the insulating layer 11 is formed. The insulating layer 11 is formed, for example, by applying an uncured resin material to the core 12 and the electronic component 20 temporarily fixed to the support substrate W, curing the resin material, and then removing the support substrate W. Will be done. As a result, the core 12 and the electronic component 20 are embedded in the insulating layer 11.

Next, as shown in FIG. 5B, a hole 33A for forming the first via conductor 33 and a hole 34A for forming the second via conductor 34 are formed. The holes 33A are formed at locations corresponding to the respective first terminals 21, and penetrate the insulating layer 11 between the first main surface 10A and the first terminals 21. The holes 34A are formed at locations corresponding to the respective second terminals 22, and penetrate the insulating layer 11 between the second main surface 10B and the second terminal 22. The holes 33A and 44A can be formed by, for example, laser ablation.

Next, the first via conductor 33 is formed in the hole 33A by plating, sputtering, or the like, and the second via conductor 34 is formed in the hole 34A. Then, patterning is performed on the metal layers formed on the first main surface 10A and the second main surface 10B. As a result, a plurality of first external terminals 31 and a plurality of second external terminals 32 are formed. Finally, the electronic component built-in substrate 1 shown in FIG. 1 can be obtained by performing individualization by dicing or the like. By connecting the electronic component built-in substrate 1, the active component 42, and the circuit board 44 using the conductor materials 41 and 43, the substrate mounting structure 100 shown in FIG. 1 can be obtained.

Here, the electronic components 20 included in the electronic component built-in board 1 of the board mounting structure 100 according to the present embodiment are the number of first terminals 21 (number of divisions) N1 and the number of second terminals 22 (number of divisions). N2 and N2 satisfy N1> N2, and the thickness T1 of the first terminal 21 and the thickness T2 of the second terminal 22 satisfy T1 <T2. Further, in the electronic component 20, the ground contact area S1 between the first via conductor 33 and the end surface 21a of the first terminal 21 and the ground contact area S2 between the second via conductor 34 and the end surface 22a of the second terminal 22 are S1 ≦. It is S2. By having these characteristics, in the electronic component built-in substrate 1, the connection reliability between the first terminal 21 and the first via conductor 33 at the boundary between the first terminal 21 and the first via conductor 33, and the connection reliability of the first via conductor 33, and This has the effect of improving the connection reliability between the second terminal 22 and the second via conductor 34 at the boundary between the second terminal 22 and the second via conductor 34.

In recent years, as in the substrate mounting structure 100 shown in FIG. 1, a configuration in which an active component 42 is arranged on an electronic component 20 built in an electronic component built-in substrate 1 has been studied. In such a configuration, in order to reduce the ESL (equivalent series inductance), the terminals on the active component 42 side of the electronic component 20 are divided into a plurality of terminals, and the number (number of divisions) is larger than that of the terminals on the other side. Is effective. Therefore, as in the case of the electronic component 20, a configuration is studied in which the first terminal 21 on the active component 42 side is divided into a plurality of parts, and via conductors extending in the thickness direction from the surfaces of the plurality of first terminals 21 after the division are provided. There is. However, if the number of divisions of the first terminal is increased, a via conductor (first via conductor 33 in FIG. 1 and the like) is provided for each divided terminal. Further, in order to increase the number of divisions of the first terminal, it is necessary to reduce the thickness of the electrode layer itself constituting the first terminal in order to prevent a short circuit between the terminals after the division. As a result, above the capacitance portion of the electronic component, a thin and plurality of divided first terminals are provided, and above each of the divided first terminals, the cross-sectional area is smaller than before. A via conductor will be provided.

On the other hand, the number of terminals on the second terminal side different from the active component side is smaller than that on the first terminal. Therefore, the number of via conductors provided on the terminals is also different. As a result, the thickness of the terminal, the number of vias, and the like are different between the structure of the terminal on the active component side and its periphery and the structure of the terminal on the opposite side and its periphery across the capacitance portion. With such a structure, there is a difference in stress generated in the vicinity of the terminal between the active component side and the opposite side. Specifically, on the first terminal side of the active component side, inward stress is applied in the direction in which adjacent terminals approach each other, and on the second terminal side on the opposite side, compared with the first terminal side. An outward stress is applied. As a result, the electronic component may be deformed so that the second terminal side is warped. Further, even if the electronic component is not deformed, the contact property between the terminal and the via may be lowered, and it is considered that the connection reliability is lowered.

On the other hand, in the electronic component built-in substrate 1 according to the present embodiment, the number of first terminals 21 (number of divisions) N1 and the number of second terminals 22 (number of divisions) N2 satisfy N1> N2. The thickness T1 of the first terminal 21 and the thickness T2 of the second terminal 22 satisfy T1 <T2. Further, in the electronic component 20, the ground contact area S1 between the first via conductor 33 and the end surface 21a of the first terminal 21 and the ground contact area S2 between the second via conductor 34 and the end surface 22a of the second terminal 22 are S1 ≦. It is S2.

The inventors of the present application considered that the difference in stress generated between the first terminal 21 side and the second terminal 22 side sandwiching the capacitance portion is related to the number of via conductors. That is, the difference in material between the via conductor extending in the thickness direction from the end face of the terminal and the insulating material (insulating layer 11 in this embodiment) provided around the via conductor causes the terminals to approach each other. The inventors of the present application considered that it affects the stress in the direction. Further, when an inward stress is applied, on the first terminal 21 side, the first terminal 21 having a small thickness is finely divided as compared with the second terminal 22, so that when stress is applied, the first terminal 21 is deformed accordingly. It was thought to be easy to do.

Therefore, on the second terminal 22 side, the thickness of the terminal is made larger than that of the first terminal 21, so that deformation due to stress can be suppressed. Further, the ground contact area of the second via conductor 34 extending from the end face 22a of the second terminal 22 with respect to the end face 22a of the second via conductor 34 is made larger than the ground contact area of the end face 21a of the first terminal 21 and the first via conductor 33. As a result, since the second via conductor 34 is provided on the second terminal 22 side as well, an inward stress is generated, so that the difference in stress between the first terminal 21 side and the second terminal 22 side becomes small. Further, since the ground contact area of the second via conductor 34 is larger than that of the first via conductor 33, the number of via conductors is smaller than that of the first via conductor 33, but the inward stress generated by each via conductor is generated. Becomes larger. Therefore, the difference in stress between the second via conductor 34 side (second terminal 22 side) and the first via conductor 33 side (first terminal 21 side) becomes smaller, and the stress received by the first via conductor 33 side is reduced. Deformation on the first via conductor 33 side is suppressed. By preventing the stress from concentrating on the first via conductor 33 side in this way, the deformation of the electronic component 20 is suppressed.

Further, by suppressing the deformation of the electronic component 20, the connection between the end surface 21a of the first terminal 21 and the first via conductor 33 is sufficiently secured, and as a result, the connection reliability of the electronic component is lowered. Can be suppressed. Further, when the deformation of the electronic component 20 is suppressed, the connection between the end surface 22a of the second terminal 22 and the second via conductor 34 is sufficiently secured. As described above, according to the electronic component built-in board 1 and the board mounting structure 100 including the electronic component built-in board 1 according to the present embodiment, when the number of divisions of the first terminal 21 on the active component 42 side increases. Even if there is, it is possible to prevent the electronic component 20 from being deformed, and it is possible to suppress a decrease in the connection reliability of the electronic component 20.

Further, in the board mounting structure 100, since the first terminal 21 of the electronic component built-in board 1 is connected to the active component 42 side and the second terminal 22 is connected to the circuit board 44 on the power supply side, the electronic component 20 It is possible to suppress a decrease in connection reliability of the electronic component 20 while realizing a low ESL.

As an example in which the number of first terminals 21 (number of divisions) N1 and the number of second terminals 22 (number of divisions) N2 satisfy the relationship of N1> N2, in the above embodiment, N1 = 5 (first terminal). The case where 21 is divided into five) and N2 = 2 (the second terminal 22 is divided into two) has been described. However, the combination of N1 and N2 can be changed as appropriate. That is, the terminals after division can be changed within the range in which they function effectively, and the difference between N1 and N2 may be increased, for example, N1 = 25 and N2 = 1. Further, the number of divisions on the second terminal 22 side may be increased, such as N1 = 25 and N2 = 4. The number of divisions is appropriately set according to the area of the area that functions as the first terminal 21 and the second terminal 22.

Further, the thickness T1 of the first terminal 21 and the thickness T2 of the second terminal 22 satisfy the relationship of T1 <T2, but the difference between T1 and T2 is also obtained even after the first terminal 21 and the second terminal 22 are divided. It can be changed as appropriate within the range that functions as a terminal.

Further, the ground contact area S1 between the first via conductor 33 and the end surface 21a of the first terminal 21 and the ground contact area S2 between the second via conductor 34 and the end surface 22a of the second terminal 22 satisfy the relationship of S1 ≦ S2. However, the difference between S1 and S2 can be appropriately changed as long as the first via conductor 33 and the second via conductor 34 properly function as via conductors and short circuits and the like do not occur. However, when the difference in the number of via conductors is large, the stress due to the provision of the via conductors affects the deformation of the electronic component 20 as described above, so S1 = S2 is set in order to suppress the difference in stress. Deformation of electronic components can be suppressed by setting S1 <S2 rather than.

Further, in the above embodiment, the structure is such that one via conductor is provided for one terminal for each of the plurality of first terminals 21 and the plurality of second terminals 22 after the division. A plurality of via conductors may be provided for one terminal. The number of via conductors is appropriately changed depending on the connection destination of the current flowing through the terminals. However, when the number of the first via conductors 33 on the first terminal 21 side increases, the inward stress becomes larger as described above, so that the size of the second via conductor 34 on the second terminal 22 side becomes larger. It is preferable to adjust the stress (grounding area with the second terminal 22), the thickness of the second terminal 22, and the like.

In the above embodiment, the number of first terminals 21 (number of divisions) N1 and the number of second terminals 22 (number of divisions) N2 in the electronic component 20 satisfy N1> N2, and the thickness of the first terminal 21 The case where T1 and the thickness T2 of the second terminal 22 satisfy T1 <T2 has been described. However, even when the electronic component 20 does not satisfy T1 <T2 (that is, when T1 ≧ T2), the first via conductor 33 and the end surface 21a of the first terminal 21 are grounded as described above. When the area S1 and the ground contact area S2 between the second via conductor 34 and the end surface 22a of the second terminal 22 satisfy the relationship of S1 ≦ S2, the electronic component 20 is deformed due to the difference in the number of via conductors. This can be prevented, and the effect of suppressing a decrease in the connection reliability of the electronic component 20 can be obtained.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made.

For example, the structure of the portion different from the electronic component 20, the via conductor 30 (first via conductor 33, second via conductor 34), and the insulating layer 11 included in the electronic component built-in substrate 1 can be appropriately changed. Further, the substrate 10 may be configured not to include the core 12.

Further, in the above embodiment, the example in which the insulating layer 11 is a single layer and the insulating layer 11 forms the first main surface 10A and the second main surface 10B of the substrate 10 has been described. A plurality of insulating layers may be included. In this case, for example, the first via conductor 33 extending from the end surface 21a of the first terminal 21 is provided in one insulating layer, and the second via conductor 34 extending from the end surface 22a of the second terminal 22 is the one insulating layer. It may be provided in another different insulating layer. In this case, the space between the two insulating layers may be made of a material different from the material forming the insulating layer. Further, the insulating layer 11 may exist as a single layer as shown in FIG. 2 or the like, or a plurality of types of materials may be laminated in a layered manner.

Further, in the above embodiment, the number of first terminals 21 connected to the active component 42 side of the electronic component 20 (number of divisions) is N1, and the number of second terminals 22 connected to the power supply side (number of divisions) is set to N1. An example in which N1> N2 is set when N2 is set has been described, but the connection target of the first terminal 21 and the second terminal 22 of the electronic component 20 is not limited to the above. That is, for example, the first terminal 21 may be connected to the power supply side and the second terminal 22 may be connected to the active component side.

1 ... Electronic component built-in substrate, 10 ... Substrate, 10A ... 1st main surface, 10B ... 2nd main surface, 11 ... Insulation layer, 12 ... Core, 13 ... Through hole, 20 ... Electronic component, 21 ... 1st terminal, 22 ... 2nd terminal, 22a ... end face, 23 ... capacitance part, 30 ... via conductor, 31 ... first external terminal, 32 ... second external terminal, 33 ... first via conductor, 34 ... second via conductor, 42 ... Active component, 44 ... Circuit board.

Claims (5)

A substrate having a first main surface and a second main surface on the opposite side of the first main surface,
A first terminal built in the substrate and provided on the first main surface side, a second terminal provided on the second main surface side, and provided between the first terminal and the second terminal. Electronic components with a large capacitance
A first via conductor formed in an insulating layer included in the substrate, electrically connected to the first terminal, and extending toward the first main surface side.
A second via conductor formed in the insulating layer included in the substrate, electrically connected to the second terminal, and extending toward the second main surface side.
Have,
The number N1 of the first terminal and the number N2 of the second terminal satisfy N1> N2.
A contact area S1 between the first terminal and the first via conductor, a contact area S2 between the end surface of the second terminal and the second via conductor, is to satisfy S1 ≦ S2,
A substrate with built-in electronic components, wherein the thickness T1 of the first terminal and the thickness T2 of the second terminal satisfy T1 <T2. The first aspect of claim 1, wherein a plurality of the first via conductors are connected to one said first terminal, or a plurality of said second via conductors are connected to one said second terminal. Described electronic component built-in board. The electronic component built-in substrate according to claim 1 or 2, wherein the substrate does not include a core. The electronic component built-in substrate according to any one of claims 1 to 3, wherein both the first terminal and the second terminal are plural. A board mounting structure including the electronic component built-in substrate according to any one of claims 1 to 4 , wherein the first terminal is connected to an active component and the second terminal is connected to a power supply side. , Board mounting structure.

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