JP6838995B2 - Solid-state image sensor, manufacturing method of solid-state image sensor, and electronic equipment - Google Patents

Description

The present invention relates to a solid-state image sensor, a method for manufacturing a solid-state image sensor, and an electronic device.

CMOS (Complementary Metal Oxide Semiconductor) type image sensors are attracting attention as inexpensive solid-state image sensors because they can be produced by a semiconductor forming process, which is a general-purpose CMOS process.

The CMOS image sensor includes a photodiode formed on a silicon substrate as a light receiving unit. In order to suppress the dark current that causes noise to the light receiving portion, it is important to reduce the interface level between the silicon (silicon substrate) and the silicon oxide film formed on the silicon substrate in the light receiving portion. There are many dangling bonds at the silicon-silicon oxide film interface. Dangling bonds are generally terminated with hydrogen. Dangling bond termination reduces the interface state of the silicon-silicon oxide film.

By the way, there is known a CMOS type image sensor that forms an antireflection film composed of a silicon nitride film on a silicon substrate via a silicon oxide film (Patent Document 1). In the CMOS image sensor of Patent Document 1, by forming an antireflection film, the loss of incident light is reduced by utilizing the multiple interference effect, thereby improving the sensitivity of the light receiving portion.

In the CMOS image sensor of Patent Document 1, since the silicon nitride film is used as the antireflection film, hydrogen contained in the silicon nitride film can be used for the termination treatment of the dangling bond. Further, since the annealing treatment is performed when the silicon nitride film is formed, hydrogen in the annealing atmosphere can also be used for the termination treatment of the dangling bond. That is, the hydrogen contained in the silicon nitride film and the hydrogen in the annealing atmosphere at the time of forming the silicon nitride film serve as a hydrogen supply source for the above-mentioned termination treatment.

Japanese Unexamined Patent Publication No. 2013-21352 (published on January 31, 2013)

In order to enhance the above-mentioned dark current suppression effect, it is considered that the hydrogen content of the silicon nitride film, which is an antireflection film, should be increased. If the hydrogen content of the silicon nitride film increases, the amount of hydrogen supplied from the silicon nitride film, that is, the hydrogen supply source, to the dangling bond increases, so that the termination treatment of the dangling bond is promoted. Is.

However, excessive supply of hydrogen to the silicon-silicon oxide film interface causes deterioration of the NBTI (Negative Bias Temperature Instability) characteristics of the p-type transistor constituting the CMOS image sensor. In a CMOS image sensor, a p-type transistor is used in a peripheral circuit portion for driving a pixel and processing a signal from the pixel. Deterioration of the NBTI characteristics causes fluctuations in the threshold voltage of the p-type transistor and causes malfunction of the peripheral circuit portion. As a result, the reliability of the CMOS image sensor is reduced.

One aspect of the present invention is to provide a method for manufacturing a solid-state image sensor, an electronic device, and a solid-state image sensor capable of improving the sensitivity of a photodiode without deteriorating the NBTI characteristics of a p-type transistor. ..

In order to solve the above problems, the solid-state image sensor according to one aspect of the present invention includes a pixel array portion formed in a first region of a semiconductor substrate and a peripheral circuit portion formed in a second region of the semiconductor substrate. A first silicon nitride film formed above the pixel array portion and a second silicon nitride film formed above the peripheral circuit portion, the hydrogen content of the first silicon nitride film and the said. The hydrogen content of the second silicon nitride film is different.

A method for manufacturing a solid-state imaging device according to another aspect of the present invention includes a pixel array portion formed in a first region of a semiconductor substrate, a peripheral circuit portion formed in a second region of the semiconductor substrate, and the pixel array portion. A method for manufacturing a solid-state imaging device including a first silicon nitride film formed above the above and a second silicon nitride film formed above the peripheral circuit portion, wherein (a) the pixel array in the first region. A step of forming the peripheral circuit portion in the second region, respectively. (B) A first silicon nitride film is formed above the semiconductor substrate so as to cover the pixel array portion and the peripheral circuit portion. Steps of (c) removing the first silicon nitride film covering the peripheral circuit portion and leaving the first silicon nitride film covering the pixel array portion, (d) the pixel array above the semiconductor substrate. A step of forming a second silicon nitride film so as to cover the portion and the peripheral circuit portion, (e) a second silicon nitride film that covers the peripheral circuit portion by removing the second silicon nitride film that covers the pixel array portion. Includes the step of leaving.

According to one aspect of the present invention, there is an effect that the sensitivity of the photodiode can be improved without deteriorating the NBTI characteristics of the p-type transistor.

It is a top view of the solid-state image sensor which concerns on Embodiment 1 of this invention. It is an equivalent circuit diagram of the pixel included in the solid-state image sensor. It is sectional drawing of the pixel array part and peripheral circuit part included in the solid-state image sensor. It is a graph which shows the relationship between the _{flow rate of SiH 4} gas at the time of film formation, and the refractive index of a film | formed Si ₃ N _{4 film.} It is a graph which shows the relationship between the flow rate _{of SiH 4} gas at the time of film formation, and the threshold fluctuation amount of the p-type transistor which used the _{formed Si 3} N _{4 film as an antireflection film.} It is sectional drawing of the pixel array part and peripheral circuit part included in the solid-state image sensor which concerns on Embodiment 2 of this invention.

[Embodiment 1]
Hereinafter, Embodiment 1 of the present invention will be described in detail with reference to FIGS. 1 to 5. FIG. 1 is a plan view showing a schematic configuration of the solid-state image sensor (CMOS type image sensor) 100 of the first embodiment. An outline of the solid-state image sensor 100 will be described with reference to FIG.

(Outline of solid-state image sensor 100)
As shown in FIG. 1, in the solid-state image sensor 100, the pixel array unit 101 and the peripheral circuit unit 201 are integrated on the same semiconductor chip. Further, the second region in which the peripheral circuit unit 201 is formed is adjacent to the first region in which the pixel array unit 101 is formed.

A plurality of pixels 10 are arranged in a two-dimensional matrix (array) in the pixel array unit 101 to form a rectangular imaging region. The details of the pixel 10 will be described later.

The peripheral circuit unit 201 includes a vertical selection circuit 102, a CDS (Correlated Double Sampling) circuit 103, an A / D conversion circuit 104, a horizontal selection circuit 105, a digital signal processing unit 106, and a TG (Timing Generator) 107.

The vertical selection circuit 102, the horizontal selection circuit 105, and the TG 107 sequentially scan the pixels 10 in the pixel array unit 101, and read out the image signal and execute the electronic shutter operation. The CDS circuit 103, the A / D conversion circuit 104, and the digital signal processing unit 106 process the signal read from each pixel 10 while removing noise and the like.

(Pixel 10)
The pixel 10 will be described with reference to FIG. FIG. 2 is an equivalent circuit diagram of pixel 10. As shown in FIG. 2, the pixel 10 includes a photodiode 11, a transfer transistor 12, a reset transistor 13, a floating diffusion layer 14, a selection transistor 15, and an amplification transistor 16.

In the pixel 10, the photoelectric-converted charge is accumulated by the photodiode 11 according to the amount of incident light. When the transfer signal is input from the transfer line T, the transfer transistor 12 is turned on. When the transfer transistor 12 is turned on, the accumulated charge of the photodiode 11 is transferred to the floating diffusion layer 14. The floating diffusion layer 14 is connected to the gate of the amplification transistor 16, and the electric charge transferred to the floating diffusion layer 14 is converted into a voltage signal by the amplification transistor 16.

When the selection signal is input from the selection line H, the selection transistor 15 is turned on. When the selection transistor 15 is turned on, the pixel 10 is selected. The voltage signal converted by the amplification transistor 16 is transmitted to the CDS circuit 103 via the vertical signal line V.

The reset transistor 13 is connected between Vdd (power supply voltage) and the stray diffusion layer 14. When the reset signal is input from the reset line R, the reset transistor 13 is turned on. When the reset transistor 13 is turned on, the potential of the floating diffusion layer 14 is reset to Vdd.

(Pixel array unit 101 and peripheral circuit unit 201)
The pixel array unit 101 and the peripheral circuit unit 201 will be described in detail with reference to FIG. FIG. 3 is a cross-sectional view of the pixel array unit 101 and the peripheral circuit unit 201 of the solid-state image sensor 100. Although various members of the pixel array unit 101 and the peripheral circuit unit 201 are shown in FIG. 3, the description of the members not related to the first embodiment will be omitted. It may be understood that the members for which these explanations are omitted are the same as those known. Regarding the peripheral circuit unit 201, of the n-type transistors and p-type transistors constituting the peripheral transistors, only the p-type transistor 17 related to the first embodiment is shown in FIG.

As shown in FIG. 3, in the pixel array unit 101, the p-well 22 is formed from the surface of the silicon substrate 21 (semiconductor substrate) to a predetermined depth. The p-well 22 is formed by injecting B (boron) into the silicon substrate 21.

A photodiode 11 and a floating diffusion layer 14 are formed in the p-well 22 by injecting As (arsenic) or P (phosphorus). A transfer transistor 12 is formed on the surface of the p-well 22, and the photodiode 11 and the floating diffusion layer 14 are connected to each other via the transfer transistor 12.

A gate insulating film 24 is formed on the p-well 22. As the gate insulating film 24, a SiO ₂ film (silicon oxide film) is preferable, but various insulating films other than the _{SiO 2 film may be used.}

A gate electrode 25 is arranged on the gate insulating film 24, and a sidewall spacer 26 is formed as a side wall insulating film on the side wall of the gate electrode 25. The transfer transistor 12 is composed of a photodiode 11, a gate insulating film 24, a gate electrode 25, a sidewall spacer 26, and a floating diffusion layer 14.

The gate electrode 25 is preferably polysilicon, and the sidewall spacer 26 is preferably a SiO ₂ film or a Si ₃ N ₄ film (silicon nitride film).

The pixels are separated by an element separation layer 23 made _{of a SiO 2 film.} The element separation layer 23 is formed by the STI (Shallow Trench Isolation) method. Forming an isolation trench (trench for device isolation) in the silicon substrate 21, by embedding the SiO ₂ film, it is possible to form the element isolation layer 23 made of SiO ₂ film embedded in the element isolation trench.

A first composed of _{a Si 3} N ₄ film formed by a plasma CVD (Chemical Vapor Deposition) method on a pixel array unit 101 including a transfer transistor 12, a photodiode 11, a floating diffusion layer 14, and an element separation layer 23. The silicon nitride film 27 is formed.

The first silicon nitride film 27 is etched when forming a through hole in the interlayer film 30 when the contact plug 28 is formed on the interlayer film 30 (first interlayer film) formed on the first silicon nitride film 27. Functions as a stopper. The first silicon nitride film 27 also functions as an antireflection film that makes it difficult for incident light to pass through a region other than the region where the photodiode 11 exists. The first silicon nitride film 27 is called a liner film because it is inserted between the silicon substrate 21 and the interlayer film 30.

A contact plug 28 embedded in a conductive material made of W (tungsten) is connected to the floating diffusion layer 14 in order to output a potential based on the electric charge transferred to the floating diffusion layer 14. A metal wiring 29 is formed on the interlayer film 30, and the contact plug 28 is connected to the metal wiring 29. The potential of the floating diffusion layer 14 is connected to the reset transistor 13 or the amplification transistor 16 via the contact plug 28 and the metal wiring 29.

On the other hand, in the peripheral circuit unit 201, n-wells 31 are formed from the silicon substrate 21 over a predetermined depth. The n-well 31 is formed by injecting P (phosphorus) or As (arsenic) into the silicon substrate 21.

A source 32 and a drain 33 are formed in the n-well 31 by injecting B (boron). Further, a p-type transistor 17 is formed on the surface of the n-well 31.

A gate insulating film 34 is formed on the n-well 31. _{As the gate insulating film 34, the SiO 2} film is preferable as in the gate insulating film 24 of the transfer transistor 12 of the pixel array unit 101, but various insulating films other than the _{SiO 2 film may be used.} The gate insulating film 24 and the gate insulating film 34 may be made of the same insulating film formed in the same step, or may be different insulating films formed separately in different steps. Is also good.

The gate electrode 35 is arranged on the gate insulating film 34, and the sidewall spacer 36 is formed on the side wall of the gate electrode 35 as in the gate electrode 25 of the transfer transistor 12 of the pixel array unit 101. The p-type transistor 17 is composed of a source 32, a gate insulating film 34, a gate electrode 35, a sidewall spacer 36, and a drain 33.

Similar to the gate electrode 25, polysilicon is preferable as the gate electrode 35, and SiO ₂ film or Si ₃ N ₄ film is preferable as the sidewall spacer 36.

The transistors are separated by an element separation layer 23.

On top of the peripheral circuit portion 201, similarly to the pixel array portion 101, a second silicon nitride film 37 made of _Si 3 _{N 4} film formed by the plasma CVD method is formed a p-type transistor 17 and the element isolation layer 23 Has been done.

Similar to the first silicon nitride film 27, the second silicon nitride film 37 is the interlayer film 30 when the contact plug 28 is formed on the interlayer film 30 (second interlayer film) formed on the second silicon nitride film 37. Functions as an etching stopper when forming a through hole in the film. The second silicon nitride film 37 is also referred to as a liner film, as in the case of the first silicon nitride film 27.

A contact plug 28 is connected to the drain 33, and the drain 33 is connected to another transistor via the contact plug 28 and the metal wiring 29.

(1st silicon nitride film 27 and 2nd silicon nitride film 37)
Here, it should be noted that the first silicon nitride film 27 of the pixel array portion 101 and the second silicon nitride film 37 of the peripheral circuit portion 201 are different in hydrogen content (ppm), which is preferable. The point is that the hydrogen content of the first silicon nitride film 27 is higher than the hydrogen content of the second silicon nitride film 37.

That is, in the pixel array portion 101, by increasing the hydrogen content of the first silicon nitride film 27, the dangling bond termination treatment at the silicon (silicon substrate 21) -silicon oxide film (gate insulating film 24) interface is performed. Since it can be promoted, the effect of suppressing dark current can be enhanced.

Further, by increasing the hydrogen content of the first silicon nitride film 27, the refractive index of the first silicon nitride film 27 can be increased, so that the effect as an antireflection film, that is, the multiple interference effect (Patent Document 1). See) can be enhanced. Thereby, the sensitivity of the photodiode 11 can be improved.

On the other hand, in the peripheral circuit unit 201, hydrogen is excessively supplied to the silicon (silicon substrate 21) -silicon oxide film (gate insulating film 24) by reducing the hydrogen content of the second silicon nitride film 37. Therefore, the NBTI characteristics of the p-type transistor 17 are not deteriorated.

As described above, the first silicon nitride film 27 and the second silicon nitride film 37 are formed by reacting a mixed gas composed of _{NH 3} (ammonia) gas and SiH _{4 (monosilane) gas by a plasma CVD method.} To. Therefore, with the first silicon nitride film 27 and the second silicon nitride film 37 is deposited separately in different process, by controlling the flow rate _of the SiH ₄ gas during each of the deposition, the first silicon nitride film 27 The hydrogen content of the second silicon nitride film 37 may be set to a desired value.

_{Specifically, the SiH 4} gas flow rate may be increased during the film formation of the first silicon nitride film 27, _{while the SiH 4} gas flow rate may be decreased during the film formation of the second silicon nitride film 37. The more you increase the SiH ₄ gas flow rate, hydrogen content of _{the Si} 3 _{N 4} film to be deposited is high.

Further, more you increase the SiH ₄ gas flow rate, increases the refractive index of _{the Si} 3 _{N 4} film to be formed. FIG. 4 shows the relationship between the _{flow rate of SiH 4} gas during film formation and _{the refractive index of the formed Si 3} N _{4 film. For example, the SiH 4} gas flow rate may be 500 sccm when the first silicon nitride film 27 _{is formed, and the SiH 4} gas flow rate may be 70 sccm when the second silicon nitride film 37 is formed. The refractive index of the first silicon nitride film 27 will increase.

On the other hand, the _{smaller the SiH 4} gas flow rate, the better the NBTI characteristics of the p-type transistor 17. FIG. 5 _{shows the relationship between the flow rate of SiH 4} gas during film formation and the threshold fluctuation amount of the p-type transistor 17 using the _{formed Si 3} N _{4 film as an antireflection film. By reducing the SiH 4} gas flow rate during the formation of the second silicon nitride film 37, the amount of fluctuation in the threshold of the p-type transistor 17 is reduced, that is, the NBTI characteristics of the p-type transistor 17 are improved.

(Manufacturing method of solid-state image sensor 100)
For example, first, the pixel array portion 101 and the peripheral circuit portion 201 are formed on the silicon substrate 21, respectively, and the first silicon nitride film 27 is formed above the silicon substrate 21 so as to cover the pixel array portion 101 and the peripheral circuit portion 201. Membrane. Formation of the first silicon nitride film 27 is performed by a plasma CVD method, to increase the flow rate _of the SiH ₄ gas is a reaction gas.

Next, a first photoresist pattern that covers the pixel array portion 101 and exposes the peripheral circuit portion 201 is formed on the first silicon nitride film 27. Using the first photoresist pattern as an etching mask, the first silicon nitride film 27 that covers the peripheral circuit portion 201 is removed, and the first silicon nitride film 27 that covers the pixel array portion 101 remains. After that, the first photoresist pattern is removed.

Next, a second silicon nitride film 37 is formed on the silicon substrate 21 so as to cover the pixel array portion 101 and the peripheral circuit portion 201. The film formation of the second silicon nitride film 37 is performed by a plasma CVD method, and the flow rate of _{SiH 4 gas, which is a reaction gas, is reduced.}

Next, a second photoresist pattern that covers the peripheral circuit portion 201 and exposes the pixel array portion 101 is formed on the second silicon nitride film 37. Using the second photoresist pattern as an etching mask, the second silicon nitride film 37 that covers the pixel array portion 101 is removed, and the second silicon nitride film 37 that covers the peripheral circuit portion 201 remains. After that, the second photoresist pattern is removed.

Finally, the interlayer film 30 is formed, the contact plug 28 is formed, and the metal wiring 29 is formed by a known method.

(Effect of solid-state image sensor 100)
As described above, the solid-state imaging device 100, at the time of formation of the first silicon nitride film 27, by increasing the SiH ₄ gas flow rate, increasing the hydrogen content of the first silicon nitride film 27. On the other hand, in the time of forming the second silicon nitride film 37, by reducing the flow rate _of the SiH ₄ gas, to reduce the hydrogen content of the second silicon nitride film 37.

Therefore, in the pixel array unit 101, the effect of suppressing dark current can be enhanced by promoting the termination treatment of the dangling bond at the silicon-silicon oxide film interface. Further, by increasing the refractive index of the first silicon nitride film 27, the effect as an antireflection film can be enhanced. Therefore, the sensitivity of the photodiode 11 can be improved.

On the other hand, in the peripheral circuit unit 201, hydrogen is not excessively supplied to the silicon-silicon oxide film, so that the NBTI characteristics of the p-type transistor 17 are not deteriorated.

As described above, according to the solid-state image sensor 100, the sensitivity of the photodiode 11 can be improved without deteriorating the NBTI characteristics of the p-type transistor 17.

[Embodiment 2]
The second embodiment of the present invention will be described below with reference to FIG. For convenience of explanation, the same reference numerals will be added to the members having the same functions as the members described in the first embodiment, and the description thereof will be omitted.

FIG. 6 is a cross-sectional view of the pixel array unit 101 and the peripheral circuit unit 201 of the solid-state image sensor 100 according to the second embodiment of the present invention. The solid-state image sensor 100 of the second embodiment is different from the solid-state image sensor 100 of the first embodiment in that the second silicon nitride film 37 is provided with an opening A that exposes at least a part above the element separation layer 23. This is the point. That is, as shown in FIG. 6, the second silicon nitride film 37 is provided with an opening A from which a part or all of the second silicon nitride film 37 above the element separation layer 23 has been removed.

In the solid-state imaging device 100 of the second embodiment, the second silicon nitride film 37 is removed from the region where the second silicon nitride film 37 is unnecessary in the peripheral circuit unit 201, that is, a part or all of the upper part of the element separation layer 23. By doing so, the amount of hydrogen supplied from the second silicon nitride film 37 is reduced. As a result, as shown in FIG. 5, the solid-state image sensor 100 of the second embodiment can suppress deterioration of the NBTI characteristics of the p-type transistor 17 as compared with the solid-state image sensor 100 of the first embodiment.

〔Electronics〕
The solid-state image sensor 100 of the above-described first and second embodiments includes, for example, an image pickup system such as a digital camera, a still camera, an IP camera, a surveillance camera, an in-vehicle camera, a mobile phone having an image pickup function, or an image pickup function. It can be applied to various electronic devices such as other devices.

[Summary]
The solid-state image sensor 100 according to the first aspect of the present invention is formed in a pixel array portion 101 formed in a first region of a semiconductor substrate (silicon substrate 21) and a second region of the semiconductor substrate (silicon substrate 21). A peripheral circuit unit 201, a first silicon nitride film 27 formed above the pixel array unit 101, and a second silicon nitride film 37 formed above the peripheral circuit unit 201 are provided, and the first silicon is provided. The hydrogen content of the nitride film 27 and the hydrogen content of the second silicon nitride film 37 are different.

In the solid-state imaging device 100 according to the second aspect of the present invention, in the first aspect, the hydrogen content of the first silicon nitride film 27 is preferably higher than the hydrogen content of the second silicon nitride film 37.

According to the above configuration, the hydrogen content of the first silicon nitride film 27 is increased, while the hydrogen content of the second silicon nitride film 37 is decreased. Therefore, in the pixel array unit 101, the effect of suppressing dark current can be enhanced by promoting the termination treatment of the dangling bond at the silicon-silicon oxide film interface. Further, by increasing the refractive index of the first silicon nitride film 27, the effect as an antireflection film can be enhanced. Therefore, the sensitivity of the photodiode of the pixel array unit 101 can be improved.

On the other hand, in the peripheral circuit unit 201, hydrogen is not excessively supplied to the silicon-silicon oxide film, so that the NBTI characteristics of the p-type transistor of the peripheral circuit unit 201 are not deteriorated.

Therefore, according to the solid-state image sensor 100, the sensitivity of the photodiode can be improved without deteriorating the NBTI characteristics of the p-type transistor.

In the solid-state imaging device 100 according to the third aspect of the present invention, in the first or second aspect, the peripheral circuit unit 201 includes an element separation layer 23 embedded in the semiconductor substrate (silicon substrate 21), and the second silicon. The nitride film 37 preferably includes an opening A that exposes at least a part above the element separation layer 23.

In any one of the above aspects 1 to 3, the solid-state image sensor 100 according to the fourth aspect of the present invention includes the pixel array section 101 and the wiring (metal wiring 29) formed above the pixel array section 101. It is preferable that the first interlayer film (interlayer film 30) is provided to insulate the first interlayer film (interlayer film 30), and the first silicon nitride film 27 is formed between the pixel array portion 101 and the first interlayer film (interlayer film 30). ..

The solid-state image sensor 100 according to the fifth aspect of the present invention includes the peripheral circuit unit 201 and the wiring (metal wiring 29) formed above the peripheral circuit unit 201 in any one of the first to fourth aspects. It is preferable that the second interlayer film (interlayer film 30) is provided to insulate the second interlayer film (interlayer film 30), and the second silicon nitride film 37 is formed between the peripheral circuit portion 201 and the second interlayer film (interlayer film 30). ..

The solid-state imaging device 100 according to the embodiment 6 of the present invention, in any one of the above embodiments 1 to 5, wherein the first silicon nitride film 27 and the second silicon nitride film 37, plasma CVD using SiH ₄ gas a film formed by law, and SiH ₄ gas flow rate during deposition of the first silicon nitride film 27, it is preferably different and SiH ₄ gas flow rate during deposition of the second silicon nitride film 37 ..

In the solid-state imaging device 100 according to the seventh aspect of the present invention, in any one of the first to sixth aspects, the SiH ₄ gas flow rate at the time of film formation of the second silicon nitride film 37 is the same as that of the first silicon nitride film 27. it is preferably less than the SiH ₄ gas flow rate during deposition of the.

The electronic device according to the eighth aspect of the present invention includes the solid-state image pickup device according to any one of the above aspects 1 to 7.

The method for manufacturing the solid-state imaging device 100 according to the ninth aspect of the present invention is to form the pixel array portion 101 formed in the first region of the semiconductor substrate (silicon substrate 21) and the second region of the semiconductor substrate (silicon substrate 21). Manufacture of a solid-state imaging device 100 including a peripheral circuit unit 201, a first silicon nitride film 27 formed above the pixel array unit 101, and a second silicon nitride film 37 formed above the peripheral circuit unit 201. The method is as follows: (a) a step of forming the pixel array unit 101 in the first region and the peripheral circuit unit 201 in the second region, and (b) above the semiconductor substrate (silicon substrate 21). In the step of forming the first silicon nitride film 27 so as to cover the pixel array portion 101 and the peripheral circuit portion 201, (c) the first silicon nitride film 27 covering the peripheral circuit portion 201 is removed. A step of leaving the first silicon nitride film 27 covering the pixel array portion 101, (d) second silicon so as to cover the pixel array portion 101 and the peripheral circuit portion 201 above the semiconductor substrate (silicon substrate 21). The step of forming the nitride film 37 (e) includes a step of removing the second silicon nitride film 37 covering the pixel array portion 101 and leaving the second silicon nitride film 37 covering the peripheral circuit portion 201.

In the method for manufacturing the solid-state image sensor 100 according to the tenth aspect of the present invention, in the ninth aspect, the flow rate of the SiH ₄ gas during the film formation in the step (d) is the SiH ₄ gas during the film formation in the step (b). It is preferably less than the flow rate.

[Additional notes]
The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and the embodiments obtained by appropriately combining the technical means disclosed in the different embodiments. Is also included in the technical scope of the present invention. Furthermore, new technical features can be formed by combining the technical means disclosed in each embodiment.

10 pixels 11 photodiode 12 transfer transistor 13 reset transistor 14 floating diffusion layer 15 selection transistor 16 amplification transistor 17 p-type transistor 21 silicon substrate (semiconductor substrate)
22 p-well 23 element separation layer 24, 34 gate insulating film 25, 35 gate electrode 26, 36 sidewall spacer 27 first silicon nitride film 28 contact plug 29 metal wiring 30 interlayer film (first interlayer film, second interlayer film)
31 n-well 32 Source 33 Drain 37 Second silicon nitride film 100 Solid-state image sensor 101 Pixel array unit 102 Vertical selection circuit 103 CDS circuit 104 A / D conversion circuit 105 Horizontal selection circuit 106 Digital signal processing unit 107 TG
201 Peripheral circuit section

Claims (8)

A pixel array portion formed in the first region of the silicon substrate, which is a region including the interface structure between the silicon substrate and the silicon oxide film,
A peripheral circuit unit formed in the second region of the silicon substrate and including a p-type MOS transistor, and
A first silicon nitride film formed above the pixel array portion and functioning as an antireflection film on the silicon substrate, and a first silicon nitride film.
A second silicon nitride film formed above the peripheral circuit portion is provided.
The hydrogen content of the first silicon nitride film and the hydrogen content of the second silicon nitride film is Ri Do different,
The hydrogen content of the first silicon nitride film is
It is higher than the hydrogen content of the second silicon nitride film and
A solid-state image sensor characterized in that the amount of dangling bonds at the interface between the silicon substrate and the silicon oxide film can be terminated. The peripheral circuit portion includes an element separation layer embedded in the silicon substrate.
The solid-state imaging device according to claim 1 , wherein the second silicon nitride film includes an opening that exposes at least a part above the element separation layer. A first interlayer film that insulates the pixel array portion and the wiring formed above the pixel array portion is provided.
The solid-state imaging device according to claim 1 or 2 , wherein the first silicon nitride film is formed between the pixel array portion and the first interlayer film. A second interlayer film that insulates the peripheral circuit portion and the wiring formed above the peripheral circuit portion is provided.
The solid-state imaging device according to any one of claims 1 to 3 , wherein the second silicon nitride film is formed between the peripheral circuit portion and the second interlayer film. An electronic device comprising the solid-state image pickup device according to any one of claims 1 to 4. A pixel array portion formed in the first region of the silicon substrate, which is a region including the interface structure between the silicon substrate and the silicon oxide film, and a peripheral circuit formed in the second region of the silicon substrate and including a p-type MOS transistor. Manufacture of a solid-state image sensor including a first silicon nitride film formed above the pixel array portion and functioning as an antireflection film on the silicon substrate and a second silicon nitride film formed above the peripheral circuit portion. It ’s a method,
(A) A step of forming the pixel array portion in the first region and the peripheral circuit portion in the second region.
(B) above the silicon substrate, forming a first silicon nitride film so as to cover the pixel array portion and the peripheral circuit portion,
(C) A step of removing the first silicon nitride film covering the peripheral circuit portion and leaving the first silicon nitride film covering the pixel array portion.
(D) above the silicon substrate, forming a second silicon nitride film to cover the pixel array portion and the peripheral circuit portion,
(E) the pixel array portion by removing the second silicon nitride film covering the, viewed including the step of leaving the second silicon nitride layer covering the peripheral circuit portion,
The hydrogen content of the first silicon nitride film and the hydrogen content of the second silicon nitride film are different.
The hydrogen content of the first silicon nitride film is
It is higher than the hydrogen content of the second silicon nitride film and
A method for manufacturing a solid-state image sensor, characterized in that the amount of dangling bonds at the interface between the silicon substrate and the silicon oxide film can be terminated. The first silicon nitride film and the second silicon nitride film are SiH. ₄ It is a film formed by the plasma CVD method using gas, and is a film.
SiH at the time of film formation of the first silicon nitride film ₄ Gas flow rate and SiH at the time of film formation of the second silicon nitride film ₄ The method for manufacturing a solid-state image sensor according to claim 6, wherein the gas flow rate is different from that of the gas flow rate. The solid-state image sensor according to claim 6 or 7 , wherein the SiH ₄ gas flow rate during the film formation in the step (d) is smaller than the SiH ₄ gas flow rate during the film formation in the step (b). Production method.

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