JP2015226022A - Semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an art favorable to efficiently supply hydrogen to a semiconductor element of a semiconductor substrate.SOLUTION: A semiconductor device manufacturing method comprises a formation process of forming a hydrogen-containing silicon nitride film on a semiconductor substrate having a semiconductor element. The silicon nitride film has a first part and a second part lying on the first part. A density of the first part is lower than a density of the second part. A ratio of an N-H bonding amount to a Si-H bonding amount in the first part is higher than the ratio in the second part.

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  There is known a technique for suppressing noise generated in a solid-state imaging device by supplying hydrogen to a photoelectric conversion unit or a transistor formed on a semiconductor substrate when the solid-state imaging device is manufactured. In Patent Document 1, a hydrogen release film is formed on a silicon substrate, and a hydrogen barrier film is formed thereon. By disposing the hydrogen blocking film on the hydrogen releasing film, hydrogen released from the hydrogen releasing film is hardly diffused upward. The hydrogen releasing film is made of P-SiN, and the hydrogen blocking film is made of UV-SiN.

JP 2008-211013 A

  Patent Document 1 does not describe detailed film forming conditions for the hydrogen releasing film and the hydrogen blocking film. Depending on these film forming conditions, the expected hydrogen supply effect may not be obtained. Further, it is necessary to form the hydrogen release film and the hydrogen barrier film with separate CVD apparatuses, which increases labor and cost. An object of this invention is to provide the technique advantageous in supplying hydrogen efficiently to the semiconductor element of a semiconductor substrate.

In view of the above problems, according to some embodiments, there is a method for manufacturing a semiconductor device, which includes a forming step of forming a silicon nitride film containing hydrogen on a semiconductor substrate having a semiconductor element, The silicon nitride film has a first portion and a second portion on the first portion. In the silicon nitride film formed in the forming step, the density of the first portion is set to the first portion. There is provided a manufacturing method characterized in that the density is lower than the density of two parts, and the ratio of the amount of N—H bonds in the first part to the amount of Si—H bonds is higher than the ratio in the second part. According to another part of the embodiments, there is provided a method for manufacturing a semiconductor device, the method comprising: forming a silicon nitride film containing hydrogen on a semiconductor substrate having a semiconductor element, wherein the silicon nitride film Has a first part and a second part overlying the first part, and in the forming step, the film forming rate of the first part is faster than the film forming rate of the second part, A manufacturing method is provided in which the ratio of the NH ₃ gas flow rate to the SiH ₄ gas flow rate when forming the first portion is higher than the ratio when forming the second portion.

  The above means provides an advantageous technique for efficiently supplying hydrogen to the semiconductor element of the semiconductor substrate.

The figure explaining the structure of the solid-state imaging device which concerns on some embodiment. FIG. 2 is a diagram for explaining a method for manufacturing the solid-state imaging device of FIG. The figure explaining the change by the heat processing of the component in a silicon nitride film. The figure explaining the change of the film-forming speed | rate by the film-forming conditions, and the change of stress. The figure explaining the change of the coupling ratio by film-forming conditions. The figure explaining the measurement result by FT-IR spectroscopy of a silicon nitride film.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. Throughout the various embodiments, similar elements are given the same reference numerals, and redundant descriptions are omitted. In addition, each embodiment can be appropriately changed and combined. The present invention is generally applicable to a semiconductor device having a semiconductor element on a semiconductor substrate. Examples of such a semiconductor device include a solid-state imaging device and a storage device. As a semiconductor element included in the semiconductor device, a transistor, a photoelectric conversion element, a light emitting diode, a thyristor, or the like can be given. Hereinafter, embodiments of the present invention will be described by taking a solid-state imaging device as an example of a semiconductor device. Although this description deals with the case where electrons are signal charges, the holes may be signal charges. When holes are signal charges, the conductivity type of the semiconductor region may be reversed.

  A configuration example of a solid-state imaging device 100 according to some embodiments will be described with reference to FIG. FIG. 1 is a schematic plan view of the solid-state imaging device 100. The solid-state imaging device 100 includes a semiconductor substrate 101. The semiconductor substrate 101 includes a pixel region 102 and a peripheral region 103. In the pixel region 102, a plurality of pixels each having a photoelectric conversion unit are arranged two-dimensionally. The pixel region 102 may include a light receiving region 102a and a light shielding region 102b. The photoelectric conversion unit of the pixel arranged in the light receiving region 102a receives light incident on the solid-state imaging device 100. The photoelectric conversion portions of the pixels arranged in the light shielding region 102b are shielded from light. A signal from a pixel arranged in the light shielding region 102b can be used as a reference for the black level.

  The peripheral region 103 is a region other than the pixel region 102 in the semiconductor substrate 101. In some embodiments, a vertical scanning circuit 104, a horizontal scanning circuit 105, a column amplifier 106, a column ADC (Analog to Digital Converter) 107, a memory 108, a timing generator 109, and a plurality of pads 110 are arranged in the peripheral region 103. The These circuits are circuits for processing signals from the pixels. A part of the above circuit may not be arranged. Since these circuits may have known functions and configurations, detailed description thereof will be omitted.

  Next, the cross-sectional structure of the solid-state imaging device 100 will be described with reference to FIG. Each drawing of FIG. 2 is a diagram showing a schematic cross-sectional view along a line AA ′ (FIG. 1) of the solid-state imaging device 100 for a plurality of manufacturing stages.

  First, the structure shown in FIG. 2A is formed. The semiconductor substrate 101 is a substrate formed of a semiconductor material such as silicon. The semiconductor substrate 101 includes a semiconductor wafer having a semiconductor region formed by a known semiconductor manufacturing process. The interface between the semiconductor material and another material is the main surface 101a of the semiconductor substrate. For example, another material is a thermal oxide film disposed on the semiconductor substrate 101 in contact with the semiconductor substrate. A P-type semiconductor region and an N-type semiconductor region are disposed on the semiconductor substrate 101. In the present specification, the plane is a plane parallel to the main surface 101a. For example, the main surface 101a in a region where a photoelectric conversion unit, which will be described later, is arranged, or the main surface 101a in the channel of a MOS transistor may be used as a reference. In this specification, a cross section is a plane that intersects a plane.

  Each semiconductor region is formed in the semiconductor substrate 101, and a gate electrode and a multilayer wiring are formed on the semiconductor substrate 101. In the pixel region 102 of the semiconductor substrate 101, a photoelectric conversion unit 201, a floating diffusion region (hereinafter referred to as FD) 202, and source / drain regions of a well 203 for pixel transistors are formed. The photoelectric conversion unit 201 is, for example, a photodiode. The photoelectric conversion unit 201 includes an N-type semiconductor region disposed on the semiconductor substrate 101. Electrons generated by photoelectric conversion are collected in the N-type semiconductor region of the photoelectric conversion unit. The FD 202 is an N-type semiconductor region. Electrons generated in the photoelectric conversion unit 201 are transferred to the FD 202 and converted into a voltage. The FD 202 is electrically connected to the input node of the amplification unit. Alternatively, the FD 202 may be electrically connected to the signal output line. In this embodiment, the FD 202 is electrically connected to the gate electrode 207 of the amplification transistor via the plug 211. In the pixel transistor well 203, source / drain regions of transistors such as an amplifying transistor for amplifying a signal and a reset transistor for resetting an input node of the amplifying transistor are formed.

  A peripheral transistor well 204 is formed in the peripheral region 103 of the semiconductor substrate 101. In the peripheral transistor well 204, the source / drain regions of the peripheral transistor constituting the signal processing circuit are formed. An element isolation portion 205 may be formed on the semiconductor substrate 101. The element isolation unit 205 electrically isolates the pixel transistor or the peripheral transistor from other elements. The element isolation unit 205 is STI (Shallow Trench Isolation), LOCOS (LOCal Oxidation of Silicon), or the like.

  A transfer gate electrode 206 and a gate electrode 207 are arranged on the semiconductor substrate 101 via an oxide film (not shown). The transfer gate electrode 206 controls charge transfer between the photoelectric conversion unit 201 and the FD 202. The gate electrode 207 is a gate of the pixel transistor and the peripheral transistor.

  A protective layer 208 is formed on the semiconductor substrate 101. The protective layer 208 is a silicon nitride film, for example. The protective layer 208 may be composed of a plurality of layers including a silicon nitride film and a silicon oxide film. The protective layer 208 may have a function of reducing damage given to the photoelectric conversion unit in a later step. In addition to or instead of this, the protective layer 208 may have an antireflection function. Further, the protective layer 208 may have a function of preventing metal diffusion in the silicide process. The protective layer 208 may not be formed.

  A first wiring layer 209a, a second wiring layer 209b, and a plurality of interlayer insulating films are formed on the protective layer 208. The plurality of interlayer insulating films are referred to as a first interlayer insulating film 210 a to a fourth interlayer insulating film 210 d in order from the side closer to the semiconductor substrate 101. In the present embodiment, the first wiring layer 209a and the second wiring layer 209b are formed by the damascene method.

  The first interlayer insulating film 210 a is formed on the pixel region 102 and the peripheral region 103. If necessary, the surface (upper surface) of the first interlayer insulating film 210a opposite to the semiconductor substrate 101 may be planarized. A through hole is formed in the first interlayer insulating film 210a. A plug 211 that electrically connects the conductive member of the first wiring layer 209a and the semiconductor region of the semiconductor substrate 101 is disposed in the through hole. The plug 211 is made of a conductive material. For example, the plug 211 is tungsten.

  A second interlayer insulating film 210b is formed on the side opposite to the semiconductor substrate 101 with respect to the first interlayer insulating film 210a. A portion of the second interlayer insulating film 210b corresponding to the region where the conductive member of the first wiring layer 209a is disposed is removed by etching. Thereafter, a metal film serving as a material for the first wiring layer is formed on the pixel region 102 and the peripheral region 103. Thereafter, a predetermined pattern is formed by removing the metal film until the second interlayer insulating film is exposed by a method such as CMP, and this pattern constitutes the wiring of the first wiring layer 209a.

  Subsequently, a third interlayer insulating film 210 c and a fourth interlayer insulating film 210 d are formed on the pixel region 102 and the peripheral region 103. Thereafter, a portion of the fourth interlayer insulating film 210d corresponding to the region where the conductive member of the second wiring layer 209b is disposed is removed by etching. Next, a portion of the third interlayer insulating film 210c corresponding to a region where a plug for electrically connecting the conductive member of the first wiring layer 209a and the conductive member of the second wiring layer 209b is disposed is removed by etching. Is done. Thereafter, a metal film serving as a material for the second wiring layer and the plug is formed in the pixel region 102 and the peripheral region 103. Thereafter, the metal film is removed by a method such as CMP until the fourth interlayer insulating film is exposed, whereby the wiring pattern of the second wiring layer 209b and the pattern of the plug are formed. Note that after the third interlayer insulating film 210c and the fourth interlayer insulating film 210d are formed, a plug for electrically connecting the conductive member of the first wiring layer 209a and the conductive member of the second wiring layer 209b is disposed first. A portion corresponding to the region to be removed may be removed by etching.

  The first wiring layer 209a and the second wiring layer 209b may be formed by a method other than the damascene method. An example of a method other than the damascene method will be described. After the first interlayer insulating film 210 a is formed, a metal film that is a material for the first wiring layer is formed in the pixel region 102 and the peripheral region 103. Next, portions of the metal film other than the region where the conductive member of the first wiring layer 209a is disposed are removed by etching. Thereby, the wiring pattern of the first wiring layer 209a is formed. Thereafter, a second interlayer insulating film 210b and a third interlayer insulating film 210c are formed, and a second wiring layer 209b is formed similarly. After the second wiring layer 209b is formed, a fourth interlayer insulating film 210d is formed.

  The first wiring layer 209 a and the second wiring layer 209 b are arranged at different heights with respect to the main surface of the semiconductor substrate 101. In the present embodiment, the conductive members of the first wiring layer 209a and the second wiring layer 209b are made of copper. The conductive member may be formed of a material other than copper as long as it is a conductive material. Except for the portion electrically connected by the plug, the conductive member of the first wiring layer 209a and the conductive member of the second wiring layer 209b are insulated from each other by the interlayer insulating film 210c. The number of wiring layers is not limited to two, and the wiring layer may be a single layer or three or more layers.

  Further, an etch stop film, a metal diffusion preventing film, or a film having both functions may be disposed between the interlayer insulating films. In the present embodiment, the plurality of interlayer insulating films 210a to 210d are silicon oxide films. For the silicon oxide film, the silicon nitride film serves as a metal diffusion prevention film. Therefore, a diffusion prevention film 212 made of a silicon nitride film is disposed between the interlayer insulating films. The diffusion prevention film 212 may not be formed.

  Subsequently, a fifth interlayer insulating film 210e, a third wiring layer 209c, and a silicon oxynitride film 214 are formed on the diffusion prevention film 212. First, the fifth interlayer insulating film 210e is formed on the diffusion preventing film 212. The fifth interlayer insulating film 210e may be formed of the same material as the fourth interlayer insulating film 210d. In the present embodiment, the fifth interlayer insulating film 210e is a silicon oxide film. Next, a through hole for arranging a predetermined conductive member of the second wiring layer 209b and a plug 213 that electrically connects the predetermined conductive member of the third wiring layer 209c is formed, and the plug 213 is inserted into the through hole. Form.

  Subsequently, a third wiring layer 209c is formed. In the present embodiment, the conductive member of the third wiring layer 209c is made of aluminum. As the method for forming the third wiring layer 209c, the method described in the method for forming the first wiring layer 209a or the first wiring layer 209b is appropriately used.

  Subsequently, a silicon oxynitride film 214 is formed on the fifth interlayer insulating film 210e and the third wiring layer 209c. The silicon oxynitride film 214 functions as an antireflection film at the interface between the fifth interlayer insulating film 210e and the silicon nitride layer 215 formed in the next step. The silicon oxynitride film 214 may not be formed. Thus, the structure shown in FIG. 2A is formed.

  Subsequently, as shown in FIG. 2B, a silicon nitride film including a silicon nitride layer 215 and a silicon nitride layer 216 and a silicon oxynitride film 217 are sequentially formed on the silicon oxynitride film 214. The silicon nitride film including the silicon nitride layer 215 and the silicon nitride layer 216 functions as a passivation film. The silicon nitride layer 216 is on the silicon nitride layer 215 (on the side opposite to the semiconductor substrate 101). In the present embodiment, the silicon nitride layer 215 and the silicon nitride layer 216 are in contact with each other. Details of the formation process of the silicon nitride layer 215 and the silicon nitride layer 216 will be described later. The silicon oxynitride film 217 functions as an antireflection film on the surface of the silicon nitride layer 216. The silicon oxynitride film 217 may not be formed. Thereafter, heat treatment is performed on the structure shown in FIG. Details of the heat treatment will be described later. Thereafter, as necessary, a color filter, a microlens, and the like are formed, and the solid-state imaging device 100 is manufactured.

Next, with reference to FIGS. 3 to 5, experimental results for examining the properties of the silicon nitride film containing hydrogen (H) will be described. The table of FIG. 3 is a result of examining how the N—H bond amount, Si—H bond amount, and Si—N bond amount in the silicon nitride film containing hydrogen (H) change with heat treatment, respectively. Indicates. The heat treatment was performed for 120 minutes in an N ₂ atmosphere at each temperature shown in the first column of the table. The amount of binding was measured using FT-IR spectroscopy. The amount of binding may be measured by other methods such as time-of-flight secondary ion mass spectrometry (TOF-SIMS).

  From this result, it is recognized that the N—H bond amount decreases and the Si—H bond amount and Si—N bond amount increase due to the heat treatment. Therefore, it is considered that when a silicon nitride film containing hydrogen (H) is heated, hydrogen is mainly released from the N—H bond. Therefore, even if the silicon nitride film contains a large amount of hydrogen, when the Si—H bond is dominant and the N—H bond is small, the silicon nitride film releases sufficient hydrogen by heat treatment. I can't. From the above, it can be seen that the silicon nitride film functioning as the hydrogen supply film should have a higher N—H / Si—H bond ratio. Here, the N—H / Si—H bond ratio is a value obtained by dividing the N—H bond amount by the Si—H bond amount, that is, the ratio of the N—H bond amount to the Si—H bond amount. The bond ratios of other elements are defined similarly.

The graph of FIG. 4 shows how the film formation rate and the stress of the silicon nitride film after film formation change by changing specific parameters when forming the silicon nitride film containing hydrogen (H). The result of examining whether to do is shown. A parallel plate type plasma CVD apparatus was used for forming the silicon nitride film. 4A shows the result when only the film formation temperature is changed, FIG. 4B shows the result when only the pressure in the chamber is changed, and FIG. 4C shows the SiH ₄ flow rate. FIG. 4 (d) shows the result when only the NH ₃ flow rate is changed.

  From this result, it is recognized that the deposition rate of the silicon nitride film and the absolute value of the stress of the silicon nitride film have a negative correlation. The higher the absolute value of the stress, the higher the stress in the compression direction of the silicon nitride film. The higher the stress in the compression direction of the silicon nitride film, the smaller the coefficient of thermal expansion of the silicon nitride film, so that the density of this silicon nitride film increases. Therefore, it can be seen from the results of FIG. 4 that the density of the silicon nitride film increases as the silicon nitride film containing hydrogen (H) is formed at a slower rate. Here, the density of the silicon nitride film means a mass per unit volume. The density can be obtained, for example, by measuring a single or laminated silicon nitride film formed on the substrate by an X-ray reflectivity method (XRR), Rutherford backscattering analysis method (RBS), or the like.

The graph of FIG. 5 shows the (N—H + Si—H) / Si—N bond ratio in the silicon nitride film by changing specific parameters when forming a silicon nitride film containing hydrogen (H). The result of investigating how the N—H / Si—H bond ratio changes is shown. Here, the (N—H + Si—H) / Si—N bond ratio is a value obtained by dividing the sum of the N—H bond amount and the Si—H bond amount by the Si—N bond amount. A parallel plate type plasma CVD apparatus was used for forming the silicon nitride film. FIG. 5 (a) shows the result when only the film forming temperature is changed, FIG. 5 (b) shows the result when only the pressure in the chamber is changed, and FIG. 5 (c) shows the SiH ₄ flow rate. FIG. 5D shows the result when only the NH ₃ flow rate is changed.

  When the results of FIG. 4 and the results of FIG. 5 are examined together, it is recognized that the absolute value of the stress of the silicon nitride film and the (N—H + Si—H) / Si—N bond ratio have a negative correlation. Since the (N—H + Si—H) / Si—N bond ratio indicates the content of hydrogen (H) in the silicon nitride film, the larger the absolute value of the stress of the silicon nitride film (that is, the higher the density), the more the silicon It is recognized that the content of hydrogen (H) in the nitride film is reduced. From the above, it can be seen that the silicon nitride film functioning as a hydrogen supply film should have a higher hydrogen (H) content, and therefore the density of the silicon nitride film should be lower.

Subsequently, attention is focused on the result of FIG. According to this result, increasing the flow rate of SiH ₄ increases the (N—H + Si—H) / Si—N bond ratio and increases the content of hydrogen (H) in the silicon nitride film. It can be seen that the -H / Si-H bond ratio is lowered. This is considered to be caused by the fact that the partial pressure of NH ₃ contributing to the N—H bond is reduced by increasing the flow rate of SiH ₄ . According to the result of FIG. 3, the more N—H bonds in the silicon nitride film, the greater the amount of hydrogen released when this silicon nitride film is heated. Accordingly, it can be seen that it is better to reduce the flow rate of SiH ₄ relative to the flow rate of NH ₃ when forming a silicon nitride film that functions as a hydrogen release film. In other words, it is better that the NH ₃ / SiH ₄ gas flow rate ratio is larger when the silicon nitride film functioning as the hydrogen release film is formed. Here, the NH ₃ / SiH ₄ gas flow rate ratio is a ratio of the NH ₃ gas flow rate to the SiH ₄ gas flow rate ratio.

  Based on the above experimental results, the formation process and heat treatment process of the silicon nitride layer 215 and the silicon nitride layer 216 in the description of FIG. 2 will be described in detail. Of the two silicon nitride layers 215 and 216, hydrogen released from the silicon nitride layer 215 closer to the semiconductor substrate 101 is supplied to the semiconductor substrate 101. That is, the silicon nitride layer 215 functions as a hydrogen release film. Hydrogen desorbed from the silicon nitride layer 215 by heating the silicon nitride layer 215 diffuses to both the lower side (semiconductor substrate 101 side) and the upper side (silicon nitride layer 216 side). By suppressing the amount of hydrogen diffusing upward, the amount of hydrogen diffusing downward can be increased, and hydrogen can be efficiently supplied to the semiconductor elements of the semiconductor substrate 101. Therefore, the silicon nitride layer 216 is preferably formed so as to function as a hydrogen barrier film. Hydrogen supplied to the semiconductor substrate 101 terminates dangling bonds in the semiconductor substrate 101. As a result, the performance of the semiconductor element of the semiconductor substrate 101 is improved (for example, transistor noise is reduced).

Based on consideration of the above experimental results, in some embodiments, the silicon nitride layer 215 and the silicon nitride layer 216 are formed so that the silicon nitride film after film formation satisfies the following two conditions.
1) The density of the silicon nitride layer 215 is lower than the density of the silicon nitride layer 216.
2) The N—H / Si—H bond ratio of the silicon nitride layer 215 is larger than the N—H / Si—H bond ratio of the silicon nitride layer 216.
By forming the silicon nitride layer 215 and the silicon nitride layer 216 in this manner, the silicon nitride layer 215 functions efficiently as a hydrogen release film. Further, since the density of the silicon nitride layer 216 is higher than the density of the silicon nitride layer 215, the silicon nitride layer 216 functions as a hydrogen barrier film efficiently.

In order to form the silicon nitride layer 215 and the silicon nitride layer 216 so as to satisfy the above conditions, the silicon nitride layer 215 and the silicon nitride layer 216 are preferably formed so as to satisfy the following film formation conditions.
1) The deposition rate of the silicon nitride layer 215 is faster than the deposition rate of the silicon nitride layer 216.
2) The NH ₃ / SiH ₄ gas flow rate ratio during deposition of the silicon nitride layer 215 is larger than the NH ₃ / SiH ₄ gas flow rate ratio during deposition of the silicon nitride layer 216.

Hereinafter, a specific example of the process of forming the silicon nitride layer 215 and the silicon nitride layer 216 that satisfy the above film formation conditions will be described. The film formation conditions for the silicon nitride layer 215 include a film formation temperature of 405 ° C., a pressure in the chamber during film formation of 4.5 Torr, an RF power of 805 W, an SiH ₄ gas flow rate of 540 cm ³ / min, and an NH ₃ gas flow rate. 315cm ³ / min, the N ₂ gas flow rate to 8600cm ³ / min. Under these deposition conditions, the deposition rate of the silicon nitride layer 215 is 8684 Å / min, the N—H / Si—H bond ratio is 57%, and the stress is −1.34E4N / cm ² .

The film formation conditions for the silicon nitride layer 216 are as follows: the film formation temperature is 405 ° C., the pressure in the chamber during film formation is 4.5 Torr, the RF power is 805 W, the SiH ₄ gas flow rate is 540 cm ³ / min, and the NH ₃ gas flow rate is 200 cm ³ / min, the N ₂ flow rate to 8600cm ³ / min. Under these deposition conditions, the deposition rate of the silicon nitride layer 216 is 7645 Å / min, the N—H / Si—H bond ratio is 47%, and the stress is −2.71E4N / cm ² . Both the silicon nitride layer 215 and the silicon nitride layer 216 may be formed by the same parallel plate type plasma CVD apparatus. Labor and cost can be reduced by using the same CVD apparatus. When the above stress is converted, the stress -1.34E4N / cm ² is -134 MPa, and the stress -2.71E4N / cm ² is -271 MPa.

The graph of FIG. 6 shows the results of measuring the silicon nitride layer 215 and the silicon nitride layer 216 formed under the film forming conditions of this specific example by FT-IR spectroscopy. The lower graph shows the measurement result of the silicon nitride layer 215, and the upper graph shows the measurement result of the silicon nitride layer 216. The Si—N bond amount is near 845 cm ⁻¹ (dashed line 604), the Si—H bond amount is near 2170 cm ⁻¹ (dashed line 602), the N—H bond amount is near 1100 cm ⁻¹ (dashed line 603), and 3300 cm ^{−. A} peak is observed near ¹ (dashed line 601). From this graph, it can be seen that the silicon nitride layer 215 has a smaller Si—H bond peak and a larger N—H bond peak than the silicon nitride layer 216. Therefore, the N—H / Si—H bond ratio of the silicon nitride layer 215 is larger than the N—H / Si—H bond ratio of the silicon nitride layer 216.

The heat treatment after the formation of the silicon nitride layer 215 and the silicon nitride layer 216 is performed, for example, in an N ₂ : H ₂ = 1: 1 atmosphere at 425 ° C. for 2 hours. By this heat treatment, hydrogen H is desorbed from the silicon nitride layer 215. This heat treatment may be performed at any time after the silicon nitride layer 216 is formed. The heat treatment may be performed after forming the silicon nitride layer 216 and before forming a material having low heat resistance such as a resist.

In the above-described specific example, the parameter changed according to the film formation condition of the silicon nitride layer 215 and the film formation condition of the silicon nitride layer 216 is only the NH ₃ gas flow rate. However, other parameters may be changed together. .

  In the above-described embodiment, the solid-state imaging device 100 includes the two silicon nitride layers 215 and 216. However, the solid-state imaging device 100 may include three or more silicon nitride layers formed under separate film formation conditions. Good. The plurality of silicon nitride layers may be continuously formed so as to be in contact with each other. Instead of including a plurality of silicon nitride layers, the silicon nitride film may be formed as a single monolayer film that is formed while switching the film formation conditions in one film formation process.

Whether the silicon nitride film is a laminated film or a single layer film, it is formed so as to satisfy the following conditions.
1) The closer to the semiconductor substrate 101, the lower the density.
2) The portion closer to the semiconductor substrate 101 has a higher N—H / Si—H bond ratio.
When the silicon nitride film is a laminated film, the two parts to be compared are included in different silicon nitride layers. When the silicon nitride film is a single layer film, the two parts to be compared are different parts included in the single single layer film.

In order to form the silicon nitride film so as to satisfy the above conditions, the silicon nitride film may be formed so as to satisfy the following film formation conditions.
1) The film forming speed is higher in the portion closer to the semiconductor substrate 101.
2) The closer to the semiconductor substrate 101, the larger the NH ₃ / SiH ₄ gas flow rate ratio during film formation.

  In the above-described embodiment, the silicon nitride layers 215 and 216 are on the wiring layer, but the silicon nitride layers 215 and 216 may be between the wiring layer and the semiconductor substrate 101. Further, the silicon oxynitride film may not be formed between the plurality of silicon nitride films. That is, the silicon oxynitride film may not be formed in the step of forming a plurality of silicon nitride films. Further, the mixed gas used in the step of forming the plurality of silicon nitride films may not include oxygen-containing molecules. Thereby, it can suppress that a some silicon nitride film contains oxygen.

  101: Semiconductor substrate, 205: Silicon nitride layer, 206: Silicon nitride layer

Claims (11)

A method for manufacturing a semiconductor device, comprising:
Forming a silicon nitride film containing hydrogen on a semiconductor substrate having a semiconductor element;
The silicon nitride film has a first portion and a second portion overlying the first portion;
In the silicon nitride film formed in the forming step,
The density of the first part is lower than the density of the second part,
The ratio of the N—H bond amount in the first portion to the Si—H bond amount is higher than the ratio in the second portion. The silicon nitride film formed in the forming step is
The closer to the semiconductor substrate, the lower the density,
The manufacturing method according to claim 1, wherein a portion closer to the semiconductor substrate has a higher ratio of the N—H bond amount to the Si—H bond amount. A method for manufacturing a semiconductor device, comprising:
Forming a silicon nitride film containing hydrogen on a semiconductor substrate having a semiconductor element;
The silicon nitride film has a first portion and a second portion overlying the first portion;
In the forming step,
The deposition rate of the first part is faster than the deposition rate of the second part,
The manufacturing method characterized in that the ratio of the NH ₃ gas flow rate to the SiH ₄ gas flow rate when forming the first portion is higher than the ratio when forming the second portion. The silicon nitride film formed in the forming step is
4. The production according to claim 3, wherein a portion closer to the semiconductor substrate has a higher deposition rate, and a portion closer to the semiconductor substrate has a higher ratio of the NH ₃ gas flow rate to the SiH ₄ gas flow rate during film formation. Method.   5. The silicon nitride film according to claim 1, wherein the silicon nitride film is formed of a single silicon nitride layer, and the first portion and the second portion are included in the single silicon nitride layer. The production method according to item.   5. The silicon nitride film according to claim 1, wherein the silicon nitride film includes a plurality of silicon nitride layers, and the first portion and the second portion are included in different silicon nitride layers. Manufacturing method.   The manufacturing method according to claim 6, wherein the plurality of silicon nitride layers are continuously formed.   The manufacturing method according to claim 6, wherein the plurality of silicon nitride layers are formed using the same CVD apparatus.   9. The heat treatment step of heating the silicon nitride film so as to supply hydrogen from the silicon nitride film to the semiconductor element after the forming step of forming the silicon nitride film. The manufacturing method of any one of Claims 1.   The manufacturing method according to claim 1, wherein the semiconductor element includes a transistor.   The manufacturing method according to claim 1, wherein the semiconductor device is a solid-state imaging device.