JP6826020B2 - Synchronization program, recording medium, communication device and synchronization method - Google Patents

Description

The present invention relates to synchronization programs, recording media, communication devices and synchronization methods.

In recent years, virtualization has attracted attention in the field of networks. With virtualization, the devices that make up the network can be logically used regardless of the actual physical hardware configuration. For virtualization, a configuration is being studied in which a device that was conventionally made of dedicated hardware in an optical access system is configured with general-purpose hardware and the functions are implemented by software. By realizing the functions with software, the functions of the devices can be replaced, and the devices can be shared and resources can be shared, so that the reduction of CAPEX (Capital Expenditure) can be expected. In addition, it is thought that OPEX (Operating Expense) can be reduced by facilitating function updates and setting changes.

FIG. 8 is a diagram showing an outline of a burst frame configuration used in an optical access system and a conventional synchronization function. The burst frame configuration used in the optical access system and a part of the mounting method thereof have been standardized (see, for example, Non-Patent Documents 1 and 2). The burst frame is composed of SP (Synchronization Pattern), BD (Burst Delimiter), payload (Payload) and EOB (End of Burst Delimiter).

When receiving a burst frame, SP is used to execute Rx setting and Clock Data Recovery (CDR) to correspond to the burst frame, BD is used to detect the start position of the payload, and EOB is used to detect the payload. Detects the end of. In general, SP takes a constant pattern of repetition. The length of this constant pattern is defined as the SP pattern length n _sp . The SP length L _sp (= an _sp , a is a constant larger than 1), which is the length of the SP, takes a value longer than the BD length. The payload is physically encoded in units of length n. For example, in the case of the 10G-EPON (10 Gigabit Ethernet (registered trademark) passive optical network) standard, the FEC (forward error correction) encoded data 66 bits x 31 blocks is set as one unit, and the unit is a multiple of that. The payload is configured.

FIG. 9 is a functional block diagram for executing the BD detection function according to the prior art, and FIG. 10 is a flow diagram showing a flow of BD detection processing according to the configuration of FIG. Conventionally, the synchronization function is implemented by an ASIC (Application Specific Integrated Circuit). The BD detection unit shown in FIG. 9 executes the BD detection function among the synchronization functions. In the buffer, an input data string which is a signal received by a device having a synchronization function is held as buffer data. The BD detection unit detects the BD by comparing the input data string held in the buffer with the BD pattern held in advance in a 1-bit cycle. In the comparison, the Hamming distance is calculated, and if the Hamming distance is equal to or less than the threshold value, it is detected as BD.

FIG. 11 is a functional block diagram for executing the EOB detection function according to the prior art, and FIG. 12 is a flow diagram showing a flow of EOB detection processing according to the configuration of FIG. The EOB detection unit shown in FIG. 11 executes the EOD detection function among the synchronization functions. In the EOD detection process, the EOB detection unit performs a search in a 1-bit cycle in the same manner as the BD detection process. That is, the EOD detection unit detects the BOD by comparing the input data string held in the buffer with the EOD pattern held in advance at a bit cycle.

"IEEE Std 802.3av-2009: IEEE Standard for Information technology- Telecommunications and information exchange between systems-Local and metropolitan area networks-Specific requirements, Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA / CD) Access Method and Physical Layer Specifications ", 2009 "40-Gigabit-capable passive optical networks (NG-PON2): Transmission convergence layer specification", ITU-T G.989.3 Series G: Transmission Systems and Media, Igital Systems and Networks, 2015

In general, compared to ASIC, it is difficult to perform high-speed physical layer processing with a general-purpose chip such as a CPU (central processing unit) or GPU (Graphics Processing Unit), and it is difficult to achieve throughput performance by using only the CPU. The synchronization function and physical decoding, which are physical layer processing, require a much larger amount of calculation than the upper layer processing, and high-speed processing is difficult. When the synchronization function is performed by pattern comparison in a 1-bit cycle as in the conventional hardware implementation, the amount of calculation becomes enormous.

In view of the above circumstances, an object of the present invention is to provide a synchronization program, a recording medium, a communication device, and a synchronization method capable of reducing the amount of calculation of the synchronization function in burst frame reception.

One aspect of the present invention is used for a communication device that receives a burst signal including a synchronization pattern including a constant pattern repeatedly, a burst delimiter set after the synchronization pattern, and a payload set after the burst delimiter. The first detection step of searching the received signal stored in the storage unit and detecting the synchronization pattern in the synchronization pattern length cycle in which the data reception of the synchronization pattern length is set as one cycle, and the first detection step. The burst is searched for in a constant pattern length cycle with data reception of the constant pattern length as one cycle, with a range from the position of the synchronization pattern detected in one detection step to the length of the synchronization pattern. It is a synchronization program that executes the second detection step of detecting the delimiter.

One aspect of the present invention is the above-mentioned synchronization program, further comprising a data creation step of generating shift data obtained by shifting the received signal by the number of bits from 0 bits to 7 bits and writing the shift data to the storage unit. When the data is executed and the search is performed in each of the first detection step and the second detection step, the shift data corresponding to the position of the search target in the received signal is referred to.

One aspect of the present invention is the synchronization program described above, which is based on the position of the burst delimiter detected by the second detection step and the length of the burst signal pre-assigned to the source of the received signal. , Further perform a third detection step of calculating the position of the end of burst set after the payload in the received signal.

One aspect of the present invention is the above-mentioned synchronization program, in which the length of the data block constituting the payload ranges from the position of the burst delimiter detected by the second detection step to the maximum length of the payload. The received signal is searched at the interval of, and a third detection step of detecting the end of burst set after the payload is further executed.

One aspect of the present invention is a recording medium on which any of the above synchronization programs is recorded.

One aspect of the present invention is a communication device that receives a burst signal including a synchronization pattern including a constant pattern repeatedly, a burst delimiter set after the synchronization pattern, and a payload set after the burst delimiter. The reception signal stored in the storage unit is searched for and the synchronization pattern is detected in a storage unit that stores the received signal and a synchronization pattern length cycle in which data reception of the length of the synchronization pattern is set as one cycle. The first detection unit and the period from the position of the synchronization pattern detected by the first detection unit to the length of the synchronization pattern are defined, and the data reception of the constant pattern length is defined as one cycle. A second detection unit that searches for a received signal and detects the burst delimiter is provided.

One aspect of the present invention is executed by a communication device that receives a burst signal including a synchronization pattern including a constant pattern repeatedly, a burst delimiter set after the synchronization pattern, and a payload set after the burst delimiter. The first detection step of searching the received signal stored in the storage unit and detecting the synchronization pattern in the synchronization pattern length cycle in which the data reception of the synchronization pattern length is set as one cycle. The received signal is searched for in a constant pattern length cycle with data reception of the constant pattern length as one cycle, with a range from the position of the synchronization pattern detected in the first detection step to the length of the synchronization pattern. It has a second detection step of detecting the burst delimiter.

According to the present invention, it is possible to reduce the amount of calculation of the synchronization function in burst frame reception.

It is a figure which shows the algorithm of the synchronization method by 1st Embodiment of this invention. It is a block diagram which shows the structure of the communication apparatus by the same embodiment. It is a functional block diagram which shows the detailed structure about the synchronization function of the uplink signal processing part by this embodiment. It is a flow figure which shows the synchronization processing in the synchronization function part by the same embodiment. It is a figure which shows the data held in the memory and the access method of the data by this embodiment. It is a figure which shows the EOB search algorithm by 2nd Embodiment. It is a figure which shows the EOB search algorithm by the 3rd Embodiment. It is a figure which shows the structure of the burst frame used in an optical access system, and the outline of the conventional synchronization function. It is a functional block diagram which performs the conventional BD detection processing. It is a flow chart which shows the flow of the conventional BD detection processing. It is a functional block diagram which performs the conventional EOB detection processing. It is a flow chart which shows the flow of the conventional EOB detection processing.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Since the physical layer processing requires a large amount of calculation, it is conventionally mounted on an ASIC (Application Specific Integrated Circuit) or the like, which is a dedicated chip. The present embodiment relates to a technique for implementing a software implementation of a received burst frame synchronization function as a study for expanding the software area of a virtual communication device used in an access system to physical layer processing.

Since the BD included in the burst frame does not have a repeating pattern and is short, a search with a 1-bit period is required to detect the BD. On the other hand, SP is a repetition of a constant pattern and is longer than BD. Therefore, in the synchronization method of the present embodiment, after the SP is detected, the calculation is reduced by performing the two-step detection for detecting the BD.

Normally, SP is used for Rx setting and CDR to correspond to burst, but it is designed to be long with a margin. In the synchronization method of the present embodiment, the SP for this margin is used for BD detection. That is, in the first-stage SP detection, the SP is searched for the continuous signal stored in the memory at the L _sp cycle. Then, as the next second stage search, the BD is searched from the detected SP position in an n _sp cycle. As a result, the search range of the BD can be reduced and the amount of calculation can be reduced. n _sp is the length of a constant pattern repeated in SP, and L _sp (= an _sp , a is a constant greater than 1) is the length of SP. The n _sp cycle is a cycle in which the time required for receiving a constant pattern (data) of length n _sp is repeated as the length of one cycle, and the L _sp cycle is an SP (data ₎ of length L _sp. ) Is a cycle that is repeated with the time required for reception as the length of one cycle.

Then, in the search for EOB, the frame length determined in the band allocation algorithm of the upper layer processing is acquired, and the position of EOB is acquired by adding the frame length to the start position of the payload. Alternatively, the search range is reduced and the amount of calculation is reduced by searching the EOB at intervals of n bits in the processing unit of physical decoding.

According to this embodiment, it is possible to perform high-speed processing when executing communication device synchronization function (BD detection, EOB detection) and physical decoding by software, high throughput processing by software, and low resource hardware. It is possible to realize the synchronization function of.
A detailed embodiment will be described below.

[First Embodiment]
FIG. 1 is a diagram showing an algorithm of the synchronization method in the present embodiment. By this algorithm, it is possible to reduce the amount of calculation when BD detection is performed by software. In this algorithm, first, SP is detected in the L _sp cycle, and then BD is detected in the n _sp cycle from the SP detection position, and two-step detection is performed. Here, the EPON (Ethernet (registered trademark) Passive Optical Network) standard standardized by the IEEE is shown, but it can also be applied to the GPON (Gigabit-capable Passive Optical Network) standardized by the ITU-T. is there. In the case of GPON, SP and BD in EPON are replaced with PSBu that performs the same function.

FIG. 2 is a functional block diagram showing the configuration of the communication device 1 of the present embodiment, and only the functional blocks related to the present embodiment are extracted and shown. The communication device 1 is, for example, a subscriber line terminal device (OLT: Optical Line Terminal) in a PON (Passive Optical Network), and one or more subscriber line terminal devices (ONU: Optical Network Unit) and It is connected to the host device. The communication device 1 may be a virtualized communication device. In the following, the communication from the ONU to the upper device is described as going up, and the notification from the upper device to the ONU direction is described as going down. A burst frame is used for the uplink signal transmitted from the ONU.

The communication device 1 includes a photoelectric conversion unit 2 and a signal processing unit 3. The opto-electric conversion unit 2 converts the PON signal (uplink signal) received from the ONU from an optical signal to an electric signal and outputs it to the signal processing unit 3. Further, the optical-electric conversion unit 2 converts the electric signal (downlink signal) output from the signal processing unit 3 into a PON signal of an optical signal and transmits it to the ONU. The signal processing unit 3 includes an uplink signal processing unit 4 and a downlink signal processing unit 5. The uplink signal processing unit 4 performs physical layer processing and PON MAC processing on the uplink signal input from the opto-electric conversion unit 2, and transfers the uplink signal to a higher-level device. The downlink signal processing unit 5 performs PON MAC processing and physical layer processing on the downlink signal received from the host device, and outputs the downlink signal to the opto-electric conversion unit 2.

FIG. 3 is a functional block diagram showing a detailed configuration of the synchronization function of the uplink signal processing unit 4. The uplink signal processing unit 4 has a buffer 41, a synchronization function unit 42, and a memory 43. One or both of the buffer 41 and the memory 43 may be provided outside the uplink signal processing unit 4. The buffer 41 holds continuous data (continuous signal) of the uplink signal input from the photoelectric conversion unit 2. The synchronization function unit 42 sets the continuous signal held in the buffer 41 in the memory 43, and performs the synchronization process with reference to the continuous signal set in the memory 43. The synchronization function unit 42 includes a data creation unit 421, a first detection unit 422, a second detection unit 423, and a third detection unit 424.

The data creation unit 421 stores the buffer data, which is a continuous signal stored in the buffer 41, in the memory 43. The first detection unit 422 executes the search for SP in parallel in the L _sp cycle with respect to the continuous signal stored in the memory 43, and detects the SP. In this SP detection, the first detection unit 422 calculates the Hamming distance between the continuous signal and the SP pattern held in advance while shifting the collation start position in the continuous signal by 0 to (n _sp -1) bits. If the Hamming distance is equal to or less than the threshold value, the first detection unit 422 detects it as SP. The second detection unit 423 performs BD detection after SP detection by the first detection unit 422. The second detection unit 423 searches for a BD in an n _sp cycle for continuous signals within the range from the detected SP position to + L _sp . In BD detection, the second detection unit 423 calculates the Hamming distance between the continuous signal and the BD pattern, and if the result is equal to or less than the threshold value, it detects it as BD. The uplink signal processing unit 4 performs line decoding processing and error correction decoding processing on the uplink signal detected by the synchronization function unit 42 BD, and then performs PON MAC processing to transfer the uplink signal to a higher-level device. The third detection unit 424 detects EOB in a continuous signal. Details of the processing of the third detection unit 424 will be described in the second embodiment and the third embodiment described later.

FIG. 4 is a flow chart showing synchronization processing in the synchronization function unit 42. The data creation unit 421 stores the continuous signal, which is the upstream signal data stored in the buffer 41 in the L _sp cycle, in the memory 43 (step S105). The first detection unit 422 bit shifts the collation start position in the continuous signal stored in the memory 43 (step S110). In the first loop, the bit shift amount is 0, and in the second and subsequent loops, the bit shift amount is a value obtained by adding 1 to the previous bit shift amount. The first detection unit 422 calculates the Hamming distance between the continuous signal from the collation start position and the SP pattern held in advance (step S115). The first detection unit 422 determines whether or not the Hamming distance is less than the threshold value (step S120).

When the first detection unit 422 determines that the Hamming distance is equal to or greater than the threshold value (step S120: NO), the first detection unit 422 determines whether or not the number of bit shifts performed in step S110 has reached n _sp times (step S125). .. When the first detection unit 422 determines that the number of bit shifts has not reached n _sp times (step S125: <), the first detection unit 422 repeats the process from step S110.

When the first detection unit 422 determines that the Hamming distance is less than the threshold value (step S120: YES), it determines that SP has been detected. The second detection unit 423 shifts the collation start position when the SP is detected by n _sp bits (step S130). The second detection unit 423 calculates the Hamming distance between the continuous signal from the collation start position and the BP pattern held in advance (step S135). The second detection unit 423 determines whether or not the Hamming distance calculated in step S135 is less than the threshold value (step S140).

When the second detection unit 423 determines that the Hamming distance is equal to or greater than the threshold value (step S140: NO), the second detection unit 423 determines whether or not the number of bit shifts performed in step S130 has reached L _sp / n _sp times (step S140: NO). Step S145). When the second detection unit 423 determines that the number of bit shifts has not reached L _sp / n _sp times (step S145: <), the second detection unit 423 repeats the process from step S130. When the second detection unit 423 determines that the Hamming distance is less than the threshold value (step S140: YES), it determines that the frame is detected and ends the process (step S150).

When the first detection unit 422 determines in step S125 that the number of bit shifts has reached n _sp times (step S125 :=), or in step S145, the second detection unit 423 determines the number of bit shifts. When it is determined that L _sp / n _sp times have been reached (step S145: =), the synchronization function unit 42 determines that the frame has not been detected and ends the process (step S155).

Since the hardware can collectively process the bit shift operations required for the synchronization function from 1 to an arbitrary number of bits by using registers, the operations are simple. On the other hand, in software, memory access is performed in units of at least 1 byte. Therefore, when the entire buffer data is bit-shifted, it must be shifted for each access unit and concatenated with adjacent data, which increases the amount of calculation. In the synchronization function, since the buffer data is sequentially shifted to perform pattern comparison, bit shifting is required many times, which makes real-time processing difficult. Therefore, in the bit shift calculation, the data obtained by shifting the input data (continuous signal) by 0 to 7 bits is stored in the memory 43, and the memory address corresponding to the shift amount used at the time of executing the algorithm is accessed. As a result, the amount of processing required for the bit shift operation is reduced.

FIG. 5 shows the data stored in the memory 43 and the method of accessing the data. The uplink signal processing unit 4 holds the uplink signal data input from the photoelectric conversion unit 2 in the buffer 41. The data creation unit 421 creates data in which the entire buffer data, which is the data held in the buffer 41, is shifted by 1 to 7 bits, respectively. The data creation unit 421 holds the created data in the memory 43 together with the buffer data. The buffer data corresponds to the data shifted by 0 bits. In the following, buffer data that has been n-bit shifted (n is an integer of 0 or more and 7 or less) will be referred to as n-bit shift data.

For example, the data creation unit 421 creates two-dimensional array data data [0] to data [7], and stores n-bit shift data in data [n]. data [n] [m] indicates the (m + 1) byte th of the n-bit shift data. For example, when accessing the third byte of 0-bit shift data, data [0] [2] is specified. After the data creation unit 421 pre-calculates the table holding the bit-shifted result and holds it in the memory 43, the first detection unit 422, the second detection unit 423, or the third detection unit 424 shifts the data by n bits. When accessing arbitrary data data [a] [b] using data, it is specified as data [(a + n) mod 8] [b + n / 8 + (a + n) / 8]. However, "mod" is a remainder operation.

[Second Embodiment]
In this embodiment, a method of detecting an EOB without performing an operation after detecting a BD by the method of the first embodiment described above is shown.

FIG. 6 is a diagram showing an EOB search algorithm of the present embodiment. The OLT specifies the data length that allows each ONU to transmit in a bandwidth allocation algorithm such as DBA (Dynamic Bandwidth Allocation) of upper layer processing. Therefore, the third detection unit 424 of the communication device 1 acquires the payload length by using the data length assigned to the ONU by the upper layer processing unit (not shown). The third detection unit 424 calculates the position of the EOB by adding the payload length to the data address of the payload start position. As described above, in the present embodiment, the third detection unit 424 acquires the payload length from the DBA and searches the EOB with a low calculation amount. The payload start position is a position obtained by adding the BD length to the collation start position when the frame detection is determined in step S150 of FIG.

[Third Embodiment]
The present embodiment shows a method of detecting EOB with a low calculation amount after detecting BD by the method of the first embodiment.

FIG. 7 is a diagram showing an EOB search algorithm of the present embodiment. The payload portion of the burst frame is physically coded such as FEC. The coding is done in n-bit units. Therefore, in the EOB detection performed by the third detection unit 424, the XOR (exclusive OR) of the buffer data and the EOB pattern is calculated while shifting the collation start position at n-bit intervals from the payload start position to the maximum payload length. .. The third detection unit 424 determines that EOB has been detected if the number of 1s in the calculation result is equal to or less than the threshold value.

According to the embodiment described above, the communication device is a terminal device such as an OLT, and is a synchronization pattern in which a constant pattern is repeatedly included, a burst delimiter set after the synchronization pattern, and a burst delimiter set after the burst delimiter. Receives a burst signal containing the payload. Communication device, the length L synchronization pattern length which is one cycle to receive data _sp (L _sp) period of the synchronization pattern, searches the received signal stored in the storage unit to detect a sync pattern. The storage unit is, for example, a buffer 41 or a memory 43. Communication device, a range up synchronization pattern length from the position of the detected synchronization pattern, a repeating predetermined constant pattern length data received was one cycle of length n _sp pattern (n _sp) period included in the synchronization pattern, Search the received signal to detect the burst delimiter. This makes it possible to reduce the amount of calculation when the communication device realizes the synchronization function for searching the burst delimiter for the continuous signal stored in the storage unit by software.

In addition, the communication device calculates the end-of-burst position based on the detected burst delimiter position and the burst signal length pre-allocated to the source of the received signal. Alternatively, the communication device searches the received signal at intervals of the lengths of the data blocks constituting the payload within the range from the position of the detected burst delimiter to the maximum length of the payload, and detects the end of burst. This makes it possible to reduce the amount of calculation when the communication device realizes the synchronization function of searching the end of burst for the continuous signal stored in the storage unit by software.

The communication device generates shift data in which the received signal is shifted by the number of bits from 0 bits to 7 bits and writes it in the storage unit. When searching for the received signal, the position to be searched. You may refer to the shift data according to. As a result, the amount of processing required for the bit shift operation can be reduced.

As described above, the communication device reduces the amount of calculation by performing two-step detection for detecting BD after detecting SP which is longer than BD and is a repetition of a constant pattern. Further, the communication device acquires the position of the EOB by adding the frame length acquired from the DBA to the start position of the payload. Alternatively, the communication device searches the EOB at intervals of n bits, which is a processing unit of physical decoding, thereby reducing the search range and reducing the amount of calculation. This enables high-speed processing when executing the synchronization function in software, and enables high-throughput processing in software and realization in low-resource hardware.

The communication device 1 includes a CPU, GPU, memory, auxiliary storage device, and the like connected by a bus, and functions as a device including a signal processing unit 3 by executing a program. All or a part of each function of the signal processing unit 3 may be realized by using hardware such as ASIC. The program may be recorded on a computer-readable recording medium. The computer-readable recording medium is, for example, a storage device such as a magneto-optical disk, a portable medium such as a ROM or a CD-ROM, or a hard disk built in a computer system. The program may be transmitted over a telecommunication line.

Although the embodiments of the present invention have been described in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and includes designs and the like within a range that does not deviate from the gist of the present invention.

It is applicable to communication devices that receive burst frames.

1 ... Communication device, 2 ... Optical-electric conversion unit, 3 ... Signal processing unit, 4 ... Upstream signal processing unit, 52 ... Downstream signal processing unit, 41 ... Buffer, 42 ... Synchronization function unit, 43 ... Memory, 421 ... Data creation Unit, 422 ... 1st detection unit, 423 ... 2nd detection unit, 424 ... 3rd detection unit

Claims (7)

A computer used in a communication device that receives a burst signal including a synchronization pattern in which a constant pattern is repeatedly included, a burst delimiter set after the synchronization pattern, and a payload set after the burst delimiter.
The first detection step of searching the received signal stored in the storage unit and detecting the synchronization pattern in the synchronization pattern length cycle in which the data reception of the synchronization pattern length is set as one cycle,
The received signal is searched for in a constant pattern length cycle with data reception of the constant pattern length as one cycle, with a range from the position of the synchronization pattern detected in the first detection step to the length of the synchronization pattern. The second detection step of detecting the burst delimiter and
A synchronization program that runs. A data creation step of generating shift data obtained by shifting the received signal by the number of bits from 0 bits to 7 bits and writing it to the storage unit is further executed.
When performing a search in each of the first detection step and the second detection step, the shift data corresponding to the position of the search target in the received signal is referred to.
The synchronization program according to claim 1. An end-of-burst set after the payload in the received signal based on the position of the burst delimiter detected by the second detection step and the length of the burst signal pre-allocated to the source of the received signal. Further execution of the third detection step to calculate the position,
The synchronization program according to claim 1 or 2. The received signal is searched for at intervals of the lengths of the data blocks constituting the payload within a range from the position of the burst delimiter detected by the second detection step to the maximum length of the payload, and is set after the payload. Further perform a third detection step to detect the end of burst
The synchronization program according to claim 1 or 2. A recording medium on which the synchronization program according to any one of claims 1 to 4 is recorded. A communication device that receives a burst signal including a synchronization pattern including a constant pattern repeatedly, a burst delimiter set after the synchronization pattern, and a payload set after the burst delimiter.
A storage unit that stores received signals and
A first detection unit that searches for a reception signal stored in the storage unit and detects the synchronization pattern in a synchronization pattern length cycle in which data reception of the synchronization pattern length is one cycle.
The received signal is searched for in a constant pattern length cycle with data reception of the constant pattern length as one cycle, with a range from the position of the synchronization pattern detected by the first detection unit to the length of the synchronization pattern. A second detector that detects the burst delimiter,
A communication device equipped with. A synchronization method executed by a communication device that receives a burst signal including a synchronization pattern in which a constant pattern is repeatedly included, a burst delimiter set after the synchronization pattern, and a payload set after the burst delimiter.
The first detection step of searching the received signal stored in the storage unit and detecting the synchronization pattern in the synchronization pattern length cycle in which the data reception of the synchronization pattern length is set as one cycle,
The received signal is searched for in a constant pattern length cycle with data reception of the constant pattern length as one cycle, with a range from the position of the synchronization pattern detected in the first detection step to the length of the synchronization pattern. The second detection step of detecting the burst delimiter and
A synchronization method that has.

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