JP2008085970A - Optical receiver, optical transmitter, optical communication system, and block synchronization method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical receiver, optical transmitter, optical communication system, and a block synchronization method for establishing block synchronization at high speed. <P>SOLUTION: The optical receiver includes: a sub delimiter detection section 82 which is installed in a station-side device of an optical communication system for performing transmission of optical signals between the station-side device and a plurality of home-side devices and detects the boundary of a sub delimiter included in data of an optical signal which is received from an optical transmission line and in which a delimiter including a plurality of sub delimiters with the equal number of bits for block synchronization is inserted; a delimiter detection section which detects the boundary of the delimiter by reading the detected boundary of the sub delimiter and a pattern of data for one block started from positions of an integer multiple of the number of bits corresponding to one sub delimiter from the boundary; and a data selection section 85 which selects block-synchronized data starting from the boundary of the delimiter detected by the delimiter detection section 84. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an optical receiver, an optical transmitter, an optical communication system, and a block synchronization method for achieving PON burst block synchronization in an optical communication system.

  Using the optical data communication network between the station side equipment OLT (Optical Line Terminal: optical subscriber line terminal equipment) and a plurality of home side equipment ONU (Optical Network Unit: optical subscriber line termination equipment) In particular, there is a practical single-star network configuration in which a single optical fiber is used between the station-side device OLT and each home-side device ONU. This network configuration simplifies the system and equipment configuration, but if one home-side device ONU occupies one optical fiber and there are N home-side device ONUs, it is directly connected from the station-side device OLT. N optical fibers are required, and it is difficult to reduce the cost of the system.

Therefore, a PON (Passive Optical Network) communication system in which one optical fiber drawn from the station side device OLT is shared by a plurality of home side devices ONU has been put into practical use. The PON optical communication system is one of low-cost access methods for optical subscribers that have been applied to FTTx such as FTTH (Fiber To The Home) and FTTB (Fiber To The Building).
In the PON optical communication system, one station side is passed through a passive optical branching device (optical coupler) that splits and multiplexes the signal passively from the input signal without the need for external power supply. The device OLT and a plurality of home-side devices ONU are connected by an optical transmission line. The station-side apparatus OLT and the N-station home-side apparatus ONU are based on 1-to-N transmission connected via an optical fiber SMF and an optical coupler OC. Thereby, many home side apparatuses ONU can be allocated with respect to one station side apparatus OLT, and the whole installation cost can be held down.

  In the PON optical communication system, since the optical transmission path between the station side device OLT and the optical branching unit is shared by a plurality of home side devices ONU, the direction from the home side device ONU to the station side device OLT (hereinafter referred to as the uplink direction). ), It is necessary to take measures to avoid collision of optical signals transmitted from each home-side apparatus ONU. For this reason, the station side apparatus OLT controls the optical signal transmission timing of each home side apparatus ONU by the time division access control system.

With this time-division access control method, each home-side apparatus ONU sends out an optical signal divided at a certain time from each home-side apparatus ONU. An optical signal transmitted from each home-side apparatus ONU in this way is called a “burst optical signal”.
FIG. 13 is a block diagram showing a conventional PON optical communication system from the home-side device ONU to the station-side device OLT. In this optical communication, 64B / 66B codes are used.

  The optical transmission unit of the home device ONU receives 64-bit data from the upper layer and provides it to the 64B / 66B transmission unit. The 64B / 66B transmission unit attaches a 2-bit synchronization header (SH) every 64 bits, and sends it to the parallel / serial conversion unit (P / S). The parallel / serial converter converts the parallel signal into a 1-bit serial signal and supplies it to the electrical / optical converter (E / O conversion). A burst optical signal is transmitted from the electrical / optical converter (E / O converter) to the optical fiber.

The optical receiver of the station side device OLT performs optical / electrical conversion (O / E conversion) on the burst optical signal that has entered from the optical fiber, and sends it to the serial / parallel converter (S / P). The serial / parallel converter converts the serial signal into a 66-bit parallel signal and sends it to the 64B / 66B receiver.
The 64B / 66B receiver searches for the position of the synchronization header from the 66-bit parallel signal and performs block synchronization of the 64B / 66B code.

This block synchronization method will be described with reference to FIG. FIG. 14 is a frame configuration diagram of a synchronization unit added to the head of a burst optical signal transmitted from the PON home-side apparatus ONU to the station-side apparatus OLT.
As shown in this figure, the burst optical signal synchronization section is composed of a plurality of blocks, and each block is composed of a 2-bit synchronization header (SH) and a 64-bit delimiter.

The conventional 64B / 66B receiving unit detects the position of the synchronization header from the read data, and establishes block synchronization of transmission information encoded by the 64B / 66B code.
Specifically, the delimiter boundary is detected from the 66-bit signal, the value of the synchronization header (SH) (“01” or “10”) after the delimiter boundary is searched, and continuously in a 66-bit cycle. 64B / 66B block synchronization is established when the synchronization header is detected at the same position 64 times.
JP 2005-184674

Accordingly, it takes 66 bits of processing time to detect a delimiter boundary in block synchronization at the shortest, and it is repeated 64 times, so that 66 bits × 64 = 4224 bits of processing time are required.
As described above, since 64B / 66B block synchronization takes time, the time during which data cannot be decoded until block synchronization is achieved increases, and transmission efficiency deteriorates.

  An object of the present invention is to provide an optical receiver, an optical transmitter, an optical communication system, and a block synchronization method capable of establishing block synchronization at high speed.

  An optical receiver according to the present invention is installed in a PON optical communication system for transmitting an optical signal, is received from an optical transmission line, and is a block synchronization optical signal in which a delimiter including a plurality of sub-delimiters having the same number of bits is inserted. An electro-optical conversion unit that converts a signal into an electric signal, a sub delimiter detection unit that detects a boundary of a sub delimiter included in the converted electric signal data, a boundary of the detected sub delimiter, and a bit corresponding to one sub delimiter from the boundary A delimiter detection unit that detects a delimiter boundary by reading a pattern of data for each block, starting from each position that is an integer multiple of the number, and a block synchronization that starts from the delimiter boundary detected by the delimiter detection unit And a data selection unit for selecting data.

  According to this optical receiver, each block of the transmitted burst optical signal includes a delimiter including a plurality (N: N ≧ 2) sub-delimiters having the same number of bits in order to achieve block synchronization. Therefore, in order to achieve block synchronization, first, the sub-delimiter detection unit detects the boundary of the sub-delimiter. Since the number of bits of the sub-delimiter is smaller than the number of bits of the delimiter (basically 1 / N), the circuit of the burst receiving unit can be simplified, and the detection time of the boundary of the sub-delimiter is 1 block. This is shorter than the conventional technique in which the delimiter boundary is detected for all the minute data.

Next, the delimiter detection unit targets the data of one delimiter starting from each boundary of the detected sub delimiter and each position of an integer multiple of the number of bits corresponding to one sub delimiter from the boundary. Perform boundary detection. Since this detection may be performed for N blocks of data, the circuit of the burst receiving unit can be simplified.
As a result, the total detection time is {sub-delimiter boundary detection time + delimiter boundary detection time}, but this time is the same as the conventional method for delimiter boundaries for all data of one block. It becomes shorter than the conventional time which was detected.

  A specific configuration of the sub-delimiter detection unit may include a sub-delimiter detection buffer having a bit capacity corresponding to the sum of the number of bits of the sub-delimiter and the number of bits of the synchronization header. Thereby, the converted electric signal data is accumulated in each sub-delimiter detection buffer while being shifted bit by bit, and the boundary of the sub-delimiter can be detected by reading the pattern of each accumulated data.

The specific configuration of the delimiter detection unit includes a delimiter detection buffer having a capacity corresponding to the number of sub delimiters constituting one delimiter and the sum of the number of bits corresponding to one delimiter and the number of bits of the synchronization header. There may be.
The sub-delimiter detection unit includes a storage unit that stores a predetermined pattern of the sub-delimiter, and is based on a complete match or a partial match between the sub-delimiter pattern included in the sub-delimiter detection buffer and the predetermined pattern stored in the storage unit. It may detect the boundary of the sub delimiter. The reason why partial match is acceptable is that a data transmission error actually occurs. Therefore, when determining the match of sub-delimiter detection, it is less likely to cause detection omission if partial mismatch is allowed, and 64B / 66B It is possible to reduce the probability of failure of block synchronization.

  The delimiter detection unit includes a storage unit that stores a predetermined pattern of the delimiter, and is based on a complete match or a partial match between the delimiter pattern included in the delimiter detection buffer and the predetermined pattern stored in the storage unit. It may be one that detects a delimiter boundary. The reason why the partial match may be acceptable is that a data transmission error actually occurs, and therefore, when performing a match determination for delimiter detection, it is more difficult to cause a detection omission if partial mismatch is allowed.

  An optical receiver according to the present invention includes an electro-optic conversion unit for converting an optical signal into which an delimiter including a plurality of sub-delimiters having the same number of bits for block synchronization is inserted into an electrical signal, the number of bits of the sub-delimiter, and the bits of the synchronization header A delimiter detection buffer having a capacity equivalent to the sum of the number of bits corresponding to one delimiter and the number of bits of the synchronization header, a storage unit for storing a predetermined pattern of sub-delimiters, and the delimiter detection buffer A calculation circuit that calculates a match between a pattern obtained by dividing the included data into a number corresponding to the number of sub-delimiters constituting one delimiter, and a predetermined pattern stored in the storage unit, and an output logic of each calculation circuit A data selector that detects delimiter boundaries based on the product and selects block-synchronized data starting from the detected delimiter boundaries It is intended to include.

  According to this configuration, in order to achieve block synchronization, first, a match (for example, a partial match) between a pattern obtained by dividing data included in the delimiter detection buffer and a predetermined pattern stored in the storage unit is calculated. When all the calculation circuits output a pattern match, the delimiter boundary is detected. Even in this configuration, the number of sub-delimiters having the same number of bits included in the delimiter is smaller than the number of bits of the delimiter (basically 1 / N), so the bit capacity of the delimiter detection buffer can be small. Therefore, the circuit of the burst receiving unit can be simplified.

Further, the optical receiver of the present invention provides an input data holding unit for temporarily holding the converted electric signal data and a bit selection position of the input data holding unit based on the sub delimiter boundary detected by the sub delimiter detecting unit. The configuration may further include a data distribution unit that adjusts and distributes to the delimiter detection unit.
The optical transmitter of the present invention includes a delimiter insertion unit that inserts a delimiter including a plurality of sub-delimiters having the same number of bits for block synchronization with respect to data to be transmitted, and an electrical signal as an optical signal. And a photoelectric conversion unit for converting and sending it out to the optical transmission line.

  In this optical transmitter, a delimiter composed of a plurality of sub-delimiters having the same number of bits is inserted in block units for data to be transmitted. Therefore, in order to achieve block synchronization, the receiver detects the boundary of the sub-delimiter, and then starts from each position of the sub-delimiter boundary and an integer multiple of the number of bits corresponding to one sub-delimiter from the boundary. The delimiter boundary can be detected for data of one block. As a result, the block detection time becomes {sub-delimiter boundary detection time + delimiter boundary detection time}, but this time detects the delimiter boundary for all data of one block as in the past. It becomes shorter than the conventional time. Therefore, block synchronization can be achieved at high speed on the receiving side.

The optical communication system of the present invention relates to an invention of an optical communication system configured by using the optical transmitter and the optical receiver.
The block synchronization method of the present invention is a block synchronization method performed using substantially the same configuration as the optical receiver.

  As described above, according to the present invention, block synchronization can be established in a shorter time than in the prior art, and the efficiency of burst transmission is improved. Further, the circuit configuration of the receiving unit for burst on the receiving side can be simplified.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a schematic diagram illustrating a configuration example of a PON optical communication system.
In the PON optical communication system, a station side device OLT provided in a station building and a home side device ONU provided in a plurality of subscribers are connected via an optical fiber SMF and an optical coupler OC.
The home-side apparatus ONU includes a network interface for connecting a terminal that enjoys optical network services, such as a personal computer installed in a subscriber's home.

The optical coupler OC is composed of a star coupler that passively branches and multiplexes a signal from an input signal without requiring an external power supply.
The optical fiber connected to the station side device OLT, the optical coupler OC, the optical coupler OC, and the home side device ONU is a single mode fiber composed of one optical fiber SMF. That is, one station side device OLT is connected to one optical coupler OC through one trunk optical fiber SMF. One optical coupler OC is connected to M second optical couplers OC (M is a number of 4 in this example) by an optical fiber SMF. The second optical coupler OC is connected to N units (N is a number of 8 or less in this example) of home-side devices ONU by branch optical fibers SMF. Therefore, a signal transmitted / received by one station-side device OLT is distributed to a maximum of 32 home-side devices ONU by 1 + M optical couplers OC. Note that the numbers of the optical couplers OC and the home-side devices ONU are merely examples.

The communication system of the present invention incorporates 10 Gigabit Ethernet (Ethernet is a registered trademark) technology into the PON optical communication system, and enables optical fiber access section communication at a baseband speed of 10.3125 Gbps. The 10GE-PON (Gigabit Ethernet-Passive Optical Network) method is used.
According to the 10GE-PON system, communication between the station side device OLT and the home side device ONU is performed in units of variable length frames. The frame structure is composed of a GE-PON header including a logical link identifier and data of 64 bytes or more. The maximum size of data is generally about 1530 bytes.

  First, a downlink frame that enters the station side apparatus OLT from the higher level network is subjected to a predetermined bridge process in the station side apparatus OLT, and a logical link to be relayed is specified. Then, it is transmitted to the optical fiber SMF as an optical signal through the station side device OLT. At this time, the station side device OLT adds a GE-PON header including a logical link identifier to the frame. The optical signal transmitted to the optical fiber SMF is branched by the optical coupler OC and transmitted to the home-side device ONU connected to the optical coupler OC. Only the home-side device ONU constituting the logical link receives a predetermined optical signal. Capture and relay frame to home network interface.

  On the other hand, the upstream optical signal includes an upstream frame from each home-side apparatus ONU. The upstream optical signal needs to be transmitted so that the optical signals from the respective home devices ONU do not compete with each other in time. For this purpose, the station side device OLT allocates a window (hereinafter simply referred to as a window) during which an upstream optical signal may be transmitted to each home side device ONU, and notifies it as a control frame. The home apparatus ONU to which the window is assigned transmits an upstream optical signal to the assigned window. This upstream optical signal is referred to as a “burst optical signal”. The burst optical signal is a finite-time optical signal sequence which is transmitted from each home-side apparatus ONU and whose light emission state is changed by a 10.3125 Gbps baseband signal.

Therefore, the competition of the upstream optical signal between each home-side apparatus ONU is avoided. Each home-side apparatus ONU, when given a certain window, may transmit frames continuously as long as it fits in that window.
The station apparatus OLT can receive a burst optical signal including a series of frame signals from each home apparatus ONU.

Note that the optical signal waveform and optical signal intensity received by the station side device OLT differ depending on the characteristics of the optical transmission line such as the characteristics of the light emitting element of the home side device ONU and the length of the optical fiber SMF. Therefore, the station side device OLT performs a predetermined process on the upstream burst optical signal, and then transmits the restored significant frame sequence to the upper network.
FIG. 2 is a block diagram showing a simplified configuration of the PON optical communication system using the 64B / 66B code from the home apparatus ONU to the station apparatus OLT according to the present invention. Only one home device ONU is depicted.

  The optical transmission unit (corresponding to the transmitter of the present invention) of the home-side apparatus ONU includes a 64B / 66B transmission unit 2 that receives a burst optical signal in 64-bit units from an upper layer. The 64B / 66B transmission unit 2 adds a 2-bit synchronization header (SH) to each 66-bit data constituting the burst optical signal and converts the data into 66 bits, and a parallel / serial conversion unit via a delimiter insertion unit 4 (P / S). The parallel / serial converter 4 converts the parallel signal into a 1-bit serial signal. The converted serial signal is converted into an optical signal by the electrical / optical conversion unit 5 (E / O conversion) and sent to the optical fiber.

  The optical receiving unit (corresponding to the receiver of the present invention) of the station side device OLT converts the burst optical signal that has entered from the optical fiber into an electric signal by the optical / electric converting unit 6 (O / E conversion), and serial・ Send to parallel converter 7 (S / P). The serial / parallel converter 7 converts the serial signal into a 66-bit parallel signal and sends it to the burst 64B / 66B receiver 8. The burst 64B / 66B receiver 8 searches for the position of the synchronization header from the 66-bit parallel signal, performs block synchronization of the 64B / 66B code, converts it to a 64-bit signal, and outputs it.

  The feature of this PON optical communication system is that a delimiter insertion unit 3 exists between the 64B / 66B transmission unit 2 and the parallel / serial conversion unit 4 of the home-side apparatus ONU optical transmission unit. The delimiter insertion unit 3 changes (overwrites) the 64-bit data part to the delimiter (delimiter) while the value of the delimiter insertion control signal received from the upper layer is “1”. The delimiter insertion control signal will be described later.

This delimiter is composed of a plurality of sub delimiters. It is assumed that the “0” and “1” patterns of each sub-delimiter are predetermined, and the sub-delimiter pattern information is commonly recognized between the home-side apparatus ONU and the station-side apparatus OLT.
Further, the PON optical communication system is characterized in that a burst 64B / 66B receiving unit 8 is provided in the optical receiving unit of the station side apparatus OLT. The burst 64B / 66B receiver 8 detects a 64-bit delimiter to establish block synchronization at high speed.

  FIG. 3 shows a frame configuration of a burst optical signal transmitted from the home apparatus ONU to the station apparatus OLT. In FIG. 3, a plurality of burst optical signals are depicted, but the transmission source of these burst optical signals may be the same home-side device ONU or different home-side devices ONU. In the case of burst optical signals transmitted from different home-side apparatuses ONU, the optical intensity of each burst optical signal varies depending on the length of the optical cable, etc., but in FIG. 3, it is drawn with the same intensity for convenience. .

  Each burst optical signal has a “synchronization unit” for bit synchronization and block synchronization at the head of the burst, followed by an “effective frame unit” including one or more Ethernet frames. The delimiter insertion control signal is a signal for creating this synchronization section, and takes a value of “1” for the time corresponding to the synchronization section at the beginning of the burst optical signal to be transmitted, and corresponds to an effective frame section. This signal takes the value of time “0”.

4A and 4B show the format of the burst optical signal. FIG. 4 (a) shows the format of the effective frame portion when the 64B / 66B code is used. The effective frame portion is composed of 66-bit blocks, and one block is composed of a 2-bit synchronization header (SH) and 64-bit data.
FIG. 4 (b) shows the format of the synchronization unit when the 64B / 66B block code is used. A block synchronization delimiter (64 bits) is inserted in place of the 64-bit data.

The delimiter is composed of a plurality (four in this example) of sub-delimiters. The number of bits of the sub delimiter is 64/4 = 16 bits.
FIG. 5 is a detailed internal block diagram of the burst 64B / 66B receiving unit 8 of the station side apparatus OLT.
The burst 64B / 66B receiving unit 8 includes an input data holding unit 81, a sub delimiter detection unit 82, a data distribution unit 83, a delimiter detection unit 84, and a data selection unit 85.

The input data holding unit 81 includes a memory that temporarily stores a 66-bit parallel signal that is input from the serial / parallel conversion unit 7 of the station side device OLT.
The sub delimiter detection unit 82 includes a plurality of sub delimiter detection buffers for storing data of the number of bits corresponding to the sub delimiter detection range. The number of sub-delimiter detection buffers is 18 (16 + 2) if the length of the sub-delimiter is 16 bits. Each of these 18 sub-delimiter detection buffers is denoted by 0 to 17.

  The 66-bit data input from the serial / parallel converter 7 is held in the input data holding unit 81 (66 bits). The 66-bit data stored in the input data holding unit 81 has the number of bits (16 bits) corresponding to the sub-delimiter detection range accumulated in the sub-delimiter detection buffer 0 from the beginning, and the sub-delimiter detection range is shifted by 1 bit. The same number of data is accumulated in the sub-delimiter detection buffer 1, the same number of data that is further shifted by 1 bit from the sub-delimiter detection range is accumulated in the sub-delimiter detection buffer, and so on. Is remembered.

Since the position of the synchronization header is arbitrarily changed for each burst, there is no guarantee that the synchronization header exists at a fixed position of the 66-bit data stored in the input data holding unit 81.
The sub delimiter detection unit 82 checks whether the data stored in each buffer matches the sub delimiter pattern. If there is no bit transmission error, there is data that matches the sub-delimiter pattern among the data shifted by 1 bit stored in each sub-delimiter detection buffer. However, in practice, since there is a transmission error, input data may be deformed in the process of transmission, and there is not always a perfect match with the sub-delimiter pattern.

Therefore, the process assuming that there is no bit transmission error that there is a pattern that completely matches is described below, and the process assuming that there is a bit transmission error will be described later.
FIG. 6 is a diagram for explaining a method of checking whether or not the data stored in each sub delimiter detection buffer matches the sub delimiter pattern. FIG. 6 shows the relationship of the comparison position between the input data holding unit 81 and the sub delimiter detection unit 82.

  The sub delimiter detection buffer 0 of the sub delimiter detection unit 82 determines whether the 0-15 bits of the input data holding unit 81 match the sub delimiter. Next, the sub delimiter detection buffer 1 determines 1 to 16 bits of the input data holding unit 81. Thereafter, the sub-delimiter detection buffer 17 shifts every bit, and the 17-32 bits of the input data holding unit 81 are determined.

  FIG. 7 is a detailed block diagram of the sub-delimiter detection unit 82. The sub-delimiter detection unit 82 includes a sub-delimiter detection buffer N (N = 0, 1, 2,...), And includes a storage unit 821 that stores the value of the sub-delimiter and a comparator 822 that compares each of the 16 bits. I have. The comparator 822 outputs a signal “1” indicating a match when all the 16 bits match, and outputs a signal “0” indicating a mismatch when even one of the 16 bits does not match. . All output signals of the comparators 822 are input to the decoder 823. The decoder 823 identifies the sub-delimiter detection buffer with the smallest number among the sub-delimiter detection buffers N that have output the signal “1”, and notifies the data distribution unit 83 of the sub-delimiter boundary information based on the number of the sub-delimiter detection buffer.

As a result of the determination, it is assumed that the sub-delimiter detection buffer 10 detects a pattern that matches the sub-delimiter pattern, for example, as indicated by the bold line in FIG. The sub delimiter boundary is determined to be between 25 and 26 of the input data holding unit 81.
Upon receiving the notification of the sub delimiter boundary information from the sub delimiter detection unit 82, the data distribution unit 83 rearranges the data in the input data holding unit 81 at the sub delimiter boundary and at a position that is an integer multiple of the number of bits of the sub delimiter from the boundary. , Each is passed to the delimiter detector 84.

The delimiter detection unit 84 includes a number of delimiter detection buffers corresponding to the number of sub delimiters included in the delimiter. The storage capacity of the delimiter detection buffer is 66 bits for one block.
FIG. 8 is a diagram illustrating a distribution range selection process for data stored in the input data holding unit 81 of the data distribution unit 83. The data distribution unit 83 indicates which range of the input data holding unit 81 is distributed to each delimiter detection buffer.

  When the sub delimiter boundary is between 25 and 26 of the input data holding unit 81, the data distribution unit 83 distributes the data of 0 to 25 and 26 to 65 stored in the input data holding unit 81 to the delimiter detection buffer 0. These data are distributed to storage addresses 0 to 65 of the delimiter detection buffer 0. Further, the data distribution unit 83 shifts the range of the input data holding unit 81 by the sub delimiter length (16 bits), and the data 42 to 65 and the data 0 to 41 are stored in the storage addresses 0 to 65 of the delimiter detection buffer 1 as data 58. ˜65 and data 0 to 57 are distributed to storage addresses 0 to 65 of the delimiter detection buffer 2, and data 8 to 65 and 0 to 7 are distributed to storage addresses 0 to 65 of the delimiter detection buffer 3.

Each delimiter detection unit 84 holds the data sent from the data distribution unit 83 in a delimiter detection buffer, and the data held in the delimiter detection buffer is a synchronization flag (2 bits) + a predetermined number of delimiters (64 Bit) pattern (66 bit match comparison).
FIG. 9 is a block diagram of the delimiter detection unit 84. The delimiter detection unit 84 includes a delimiter detection buffer M (M = 0, 1, 2, 3), a storage unit 841 that stores a synchronization flag and a delimiter value, and a comparator 842 that compares 66 bits. It has. The comparator 842 outputs a signal “1” indicating a match when all the 66 bits match, and outputs a signal “0” indicating a mismatch when even one of the 66 bits does not match. . The output signal of each comparator 842 is input to the data selection unit 85.

In the case of FIG. 8, the data stored in the delimiter detection buffer 3 matches the pattern of “synchronization flag + delimiter value”. This is because there is a synchronization flag first, followed by four sub-delimiter patterns.
Therefore, the data selection unit 85 selects 64 bits from the delimiter detection buffer whose pattern matches. As a result, the 64B / 66B block is synchronized and outputs 64-bit data to the upper layer.

  When the next 66-bit parallel signal is input to the input data holding unit 81, the input data holding unit 81 updates the accumulated data to the next 66-bit parallel signal. Since block synchronization is established, the data distribution unit 83 only needs to pass the data of the input data holding unit 81 rearranged based on the previously determined number of the sub delimiter detection buffer to the delimiter detection unit 84. Since the delimiter detection buffer detected last time is known, the delimiter detection unit 84 selects the data and outputs it to the upper layer. Such a procedure can be repeated until reception of one burst optical signal is completed.

  Next, processing when there is a bit transmission error will be described. Due to bit transmission errors, there may not be an exact pattern match. For this reason, it is sometimes impossible to detect sub-delimiters and delimiters if perfect matching is assumed. Therefore, in this case, even if the sub-delimiters and delimiters do not all match, a detection process is performed in which only a partial match is regarded as matching.

  FIG. 10 is a block diagram of the sub delimiter detection unit 82. The sub-delimiter detection unit 82 includes a sub-delimiter detection buffer N (N = 0, 1, 2,..., 17), and compares each of the 16 bits with the storage unit 821 that stores the values of the sub-delimiters. And an EXOR circuit 824 that takes an EXOR (exclusive OR) of the above. Each output of the EXOR circuit 824 is input to the calculation circuit 825, where when the 16-X (X is an integer of 1 or more) bits match, a signal “1” indicating a match is output, and a mismatch of X + 1 bits or more If there is, a signal “0” indicating a mismatch is output. Here, “X” is a threshold value for determining coincidence / non-coincidence. As the value of X is set larger, the probability of erroneous detection of the sub-delimiter boundary increases, and as the value of X is set smaller, the sub-delimiter boundary is increased. Since the probability of missing is increased, it is preferable to actually operate this optical communication system to find an optimum value and set the value of X to this optimum value. For example, it is predicted that X = 4 is an appropriate value.

All output signals of the calculation circuits 825 are input to the decoder 823. The decoder 823 identifies the sub-delimiter detection buffer with the smallest number among the sub-delimiter detection buffers N that have output the signal “1”, and notifies the data distributor 83 of the sub-delimiter boundary information based on the sub-delimiter detection buffer number.
Instead of specifying the sub-delimiter detection buffer with the smallest number, the calculation circuit 825 compares the number of matched bits for each sub-delimiter detection buffer, and specifies the sub-delimiter detection buffer with the largest number of matched bits. Also good.

  FIG. 11 is a block diagram of the delimiter detection unit 84 that determines a partial match. The delimiter detection unit 84 includes a delimiter detection buffer M (M = 0, 1, 2, 3), compares the 66 bits with the storage unit 841 that stores the synchronization flag and the value of the delimiter, and determines each bit. And an EXOR circuit 844 that takes EXOR (exclusive OR). Each output of the EXOR circuit 844 is input to the calculation circuit 845, which outputs a signal “1” indicating a match when the 66-Y bits match, and indicates a mismatch when there is a mismatch of Y + 1 bits or more. The signal “0” is output. Here, “Y” is a threshold value for determining a match / mismatch. The larger the value of Y, the greater the probability of erroneous detection of the delimiter boundary, and the lower the Y value, the more delimiter boundary is set. Since the probability of being overlooked increases, it is preferable to actually operate this optical communication system to find an optimum value and set the value of Y to this optimum value. For example, it is expected that Y = 16 is an appropriate value.

Next, a circuit example (corresponding to claim 6) for simultaneously performing the functions of the sub-delimiter detection unit and the delimiter detection unit will be described with reference to FIG.
This circuit includes 18 delimiter detection buffers L (L = 0, 1, 2,..., 17). Each delimiter detection buffer L has a capacity for storing 66 bits for one block. Each delimiter detection buffer L stores 66 bits for one block while shifting one bit at a time.

  This circuit is provided corresponding to each delimiter detection buffer L (L = 0, 1, 2,..., 17), and is stored in the storage unit 861 for storing the value of the sub delimiter and the delimiter detection buffer L. 66 bits are divided into 16 bits into 4 bits (in this case, comparison is not performed because a 2-bit synchronization flag is not compared), and the divided 16 bits are divided into bits stored in the storage unit 861 for each bit. An EXOR circuit 862 that performs EXOR (exclusive OR) for each bit by comparison is provided. Each output of the EXOR circuit 862 is input to the calculation circuit 863, where a signal “1” indicating a match is output when the 16−X bits match, and a mismatch is indicated when there is a mismatch of X + 1 bits or more. The signal “0” is output.

Further, an AND circuit 864 that performs an AND operation on the output of each calculation circuit 863 is further provided. The AND circuit 864 supplies a signal indicating that the boundary of the block has been detected to the data selection unit 85 when the outputs of the four calculation circuits 863 are all 1. In this way, sub delimiters and delimiters can be detected with a simple circuit.
Here, the effect of the present invention described above will be verified.

  To explain with numerical values, it is assumed that one block = 66 bits (of which the synchronization bit is 2 bits) and the number of sub-delimiters N = 4. The number of bits of the sub delimiter is (66-2) / 4 = 16 bits. In order to detect the boundary of the sub-delimiter, it is only necessary to detect the 16 bits while shifting one bit at a time. Therefore, 16 × 18 (18 considers 2 synchronization bits) = 288 bits. In this way, when the boundary of the sub-delimiter is detected, the boundary of the delimiter is detected from each position of an integer multiple of 16 bits, 16 × 2 bits, 16 × 3 bits, and 16 × 4 bits. There are four “each position”, and since a 66-bit block is searched from these positions, the number of bits to be checked is 4 × 66 = 264 bits. From the above, it is sufficient to check a total of 288 + 264 = 552 bits.

On the other hand, in the conventional technique in which the delimiter boundary is detected for all the data for one block, 66 bits must be detected while being shifted by one bit, and 66 × 66 = 4356 bits are checked. Must.
Although the embodiments of the present invention have been described above, the embodiments of the present invention are not limited to the above-described embodiments, and various modifications can be made within the scope of the present invention.

It is the schematic which shows the structural example of the PON optical communication system which connected between the control station apparatus OLT and several terminal device ONU with the optical fiber via the optical coupler. It is the block diagram which simplified and represented the structure of the PON optical communication system from the home side apparatus ONU to the station side apparatus OLT using a 64B / 66B code | symbol. It is a frame configuration diagram of a burst optical signal transmitted from the home side apparatus ONU to the station side apparatus OLT. It is a figure which shows the format of a burst optical signal. 4A shows the format of the effective frame part, and FIG. 4B shows the format of the synchronization part. FIG. 6 is a detailed internal block diagram of a burst 64B / 66B receiving unit 8 of the station side device OLT. It is a figure for demonstrating the method to check whether the data memorize | stored in each sub delimiter detection buffer correspond with the pattern of a sub delimiter. 3 is a block diagram showing a detailed configuration of a sub delimiter detection unit 82. FIG. 7 is a diagram showing a distribution range selection process for data stored in an input data holding unit 81 of a data distribution unit 83. FIG. 4 is a block diagram showing a detailed configuration of a delimiter detection unit 84. FIG. It is a block diagram which shows the detailed structure based on the other Example of the sub delimiter detection part. This relates to another embodiment of the delimiter detector 84. It is a block diagram which shows a detailed structure. It is a block diagram which shows the detailed structure of the circuit which detects a sub delimiter and a delimiter simultaneously. It is a block diagram showing the PON optical communication system from the conventional home side apparatus ONU to the station side apparatus OLT. It is a frame block diagram of the burst optical signal transmitted from the conventional PON home-side apparatus ONU to the station-side apparatus OLT.

Explanation of symbols

2 64B / 66B transmission unit 3 delimiter insertion unit 4 parallel / serial conversion unit 5 electrical / optical conversion unit 6 optical / electrical conversion unit 7 serial / parallel conversion unit 8 64B / 66B receiving unit for burst 81 input data holding unit 82 sub delimiter detection Unit 83 data distribution unit 84 delimiter detection unit 85 data selection unit 821, 841, 861 storage unit 822, 842 comparator 823 decoder 824, 844, 862 EXOR circuit 825, 845, 863 calculation circuit 864 logical product circuit

Claims (10)

An optical receiver installed in a PON optical communication system for transmitting an optical signal,
An electro-optic conversion unit that converts an optical signal received from an optical transmission line and into which a delimiter including a plurality of sub-delimiters having the same number of bits for block synchronization is inserted into an electrical signal;
A sub-delimiter detection unit for detecting a boundary of the sub-delimiter included in the data of the converted electrical signal;
A delimiter detection unit that detects a delimiter boundary by reading a pattern of data for each block, starting from each boundary that is an integer multiple of the number of bits corresponding to one sub delimiter from the boundary of the detected sub delimiter When,
An optical receiver including a data selection unit that selects block-synchronized data starting from a delimiter boundary detected by the delimiter detection unit.   The sub-delimiter detection unit includes a sub-delimiter detection buffer having a bit capacity corresponding to the number of sub-delimiter bits corresponding to the sum of the number of bits of the sub-delimiter and the number of bits of the synchronization header, and the converted electric signal data bit by bit 2. The optical receiver according to claim 1, wherein the sub-delimiter detection buffer detects the boundary of the sub-delimiter by accumulating in each sub-delimiter detection buffer while shifting and reading the accumulated pattern of each data.   2. The light according to claim 1, wherein the delimiter detection unit includes a delimiter detection buffer having a capacity equivalent to the number of bits corresponding to one delimiter and the number of bits of the synchronization header, corresponding to the number of sub-delimiters constituting one delimiter. Receiving machine.   The sub-delimiter detection unit includes a storage unit that stores a predetermined pattern of the sub-delimiter, and a sub-delimiter boundary based on a partial match between the sub-delimiter pattern included in the sub-delimiter detection buffer and the predetermined pattern stored in the storage unit. The optical receiver according to claim 2, wherein:   The delimiter detection unit includes a storage unit that stores a predetermined pattern of the delimiter, and a delimiter boundary based on a partial match between the delimiter pattern included in the delimiter detection buffer and the predetermined pattern stored in the storage unit. The optical receiver according to claim 3, wherein the optical receiver is detected. An optical receiver installed in a PON optical communication system for transmitting an optical signal,
An electro-optic conversion unit that converts an optical signal received from an optical transmission line and into which a delimiter including a plurality of sub-delimiters having the same number of bits for block synchronization is inserted into an electrical signal;
A delimiter detection buffer having a capacity corresponding to the sum of the number of bits corresponding to one delimiter and the number of bits of the synchronization header, the number corresponding to the sum of the number of bits of the sub-delimiter and the number of bits of the synchronization header;
A storage unit for storing a predetermined pattern of sub-delimiters;
A calculation circuit for calculating a match between a pattern obtained by dividing data included in the delimiter detection buffer into a number corresponding to the number of sub-delimiters constituting one delimiter and a predetermined pattern stored in the storage unit;
An optical receiver comprising: a data selector that detects a delimiter boundary based on a logical product of outputs of the respective calculation circuits and selects block-synchronized data starting from the detected delimiter boundary.   The bit selection position of the input data holding unit is adjusted based on the input data holding unit that temporarily holds the converted electric signal data and the sub delimiter boundary detected by the sub delimiter detection unit, and is distributed to the delimiter detection unit. The optical receiver according to claim 1, further comprising a data distributor. An optical transmitter installed in a PON optical communication system for transmitting an optical signal,
A delimiter insertion unit that inserts a delimiter including a plurality of sub-delimiters of the same number of bits for block synchronization with respect to data to be transmitted, and converts an electrical signal into an optical signal and sends it out to an optical transmission line An optical transmitter comprising a photoelectric conversion unit for the purpose. A PON optical communication system for transmitting optical signals,
An optical transmitter converts, in block units, data to be transmitted, a delimiter insertion unit that inserts a delimiter including a plurality of sub delimiters of the same number of bits for block synchronization, and converts an electrical signal into an optical signal. A photoelectric conversion unit for sending out to the optical transmission line,
The optical receiver includes an electro-optic conversion unit that converts an optical signal received from the optical transmission path into an electric signal, and a burst receiving unit that performs block synchronization on the converted electric signal based on the delimiter. Prepared,
The burst receiving unit includes a sub delimiter detection unit that detects a boundary of a sub delimiter included in the converted electrical signal data, a boundary of the detected sub delimiter, and an integer multiple of the number of bits corresponding to one sub delimiter from the boundary. Data that starts from each position, detects the delimiter boundary by reading the data pattern for each block, and data that selects block-synchronized data starting from the delimiter boundary detected by the delimiter detection section An optical communication system including a selection unit. A block synchronization method executed in a PON optical communication system for transmitting an optical signal,
An optical signal received from an optical transmission line and converted into an electrical signal for block synchronization, in which a delimiter including a plurality of sub-delimiters having the same number of bits is inserted,
Detects the boundary of the sub-delimiter included in the converted electrical signal data,
A delimiter boundary is detected by reading a pattern of data for each block starting from the detected data at the boundary of the sub delimiter, and from each position of an integer multiple of the number of bits corresponding to one sub delimiter from the boundary,
A block synchronization method that selects block-synchronized data starting from a detected delimiter boundary.

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