JP6817312B2 - 半導体デバイスのゲート・スタック作製方法および半導体デバイス - Google Patents
半導体デバイスのゲート・スタック作製方法および半導体デバイス Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000000034 method Methods 0.000 claims description 79
- 150000004767 nitrides Chemical class 0.000 claims description 52
- 229910052751 metal Inorganic materials 0.000 claims description 48
- 239000002184 metal Substances 0.000 claims description 48
- 230000002000 scavenging effect Effects 0.000 claims description 43
- 238000000151 deposition Methods 0.000 claims description 36
- 230000004888 barrier function Effects 0.000 claims description 27
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 23
- 229910010041 TiAlC Inorganic materials 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 15
- 229910010038 TiAl Inorganic materials 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 229910052782 aluminium Inorganic materials 0.000 claims description 9
- 230000005669 field effect Effects 0.000 claims description 9
- 229910052719 titanium Inorganic materials 0.000 claims description 9
- 125000006850 spacer group Chemical group 0.000 claims description 5
- 239000007772 electrode material Substances 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 3
- 230000008021 deposition Effects 0.000 description 26
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 18
- 229910052760 oxygen Inorganic materials 0.000 description 18
- 239000001301 oxygen Substances 0.000 description 18
- 230000015572 biosynthetic process Effects 0.000 description 15
- 238000005530 etching Methods 0.000 description 11
- 238000000231 atomic layer deposition Methods 0.000 description 9
- 238000001459 lithography Methods 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 238000005498 polishing Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 229910000673 Indium arsenide Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 2
- UJXZVRRCKFUQKG-UHFFFAOYSA-K indium(3+);phosphate Chemical compound [In+3].[O-]P([O-])([O-])=O UJXZVRRCKFUQKG-UHFFFAOYSA-K 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 230000007261 regionalization Effects 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 229910000927 Ge alloy Inorganic materials 0.000 description 1
- 229910000676 Si alloy Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- AXQKVSDUCKWEKE-UHFFFAOYSA-N [C].[Ge].[Si] Chemical compound [C].[Ge].[Si] AXQKVSDUCKWEKE-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000000306 component Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000002070 nanowire Substances 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823821—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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Description
Claims (15)
- 半導体デバイスのゲート・スタックを作製する方法であって、
前記デバイスのチャネル領域の上方に第1の誘電体層を形成することと、
前記第1の誘電体層の上方に障壁層を形成することと、
前記障壁層の上方に第1のゲート金属層を形成することと、
前記第1のゲート金属層の上方にキャップ層を形成することと、
前記ゲート・スタックのp型電界効果トランジスタ(pFET)領域内の前記第1の誘電体層の一部を露出させるために、前記障壁層と前記第1のゲート金属層と前記キャップ層との一部を除去することと、
前記キャップ層と前記第1の誘電体層との露出部上に第1の窒化物層を堆積させることと、
前記第1の窒化物層上にスカベンジング層を堆積させることと、
前記スカベンジング層上に第2の窒化物層を堆積させることと、
前記第2の窒化物層上にゲート電極材料を堆積させることと
を含む方法。 - 前記第1の誘電体層は、酸化物材料を含む、請求項1に記載の方法。
- 前記障壁層は金属窒化物材料を含む、請求項1に記載の方法。
- 前記第1のゲート金属層は、TiAlCまたはTiAl、Ti、Al、TiAlC、NbAlCを含む、請求項1に記載の方法。
- 前記第1の窒化物層はTiNまたはTaNを含む、請求項1に記載の方法。
- 前記第1の窒化物層はTaNを含む、請求項1に記載の方法。
- 前記第2の窒化物層はTiNを含む、請求項1に記載の方法。
- 前記ゲート電極材料はWを含む、請求項1に記載の方法。
- 前記ゲート・スタックを形成する前に、前記ゲート・スタックに隣接するソース/ドレイン領域を形成することをさらに含む、請求項1に記載の方法。
- 前記ゲート・スタックを形成する前に、
前記デバイスの前記チャネル領域の上方に犠牲ゲート・スタックを形成することと、
前記犠牲ゲート・スタックの側壁に沿ってスペーサを形成することと、
前記犠牲ゲート・スタックに隣接して前記デバイスのソース/ドレイン領域を形成することと、
前記スペーサの周囲に絶縁材料の層を形成することと、
前記デバイスの前記チャネル領域を露出させるために前記犠牲ゲート・スタックを除去することと
をさらに含む、請求項1に記載の方法。 - 半導体デバイスであって、
前記デバイスのチャネル領域の上方に配置されたゲート・スタックを含み、前記ゲート・スタックは、n型電界効果トランジスタ(nFET)部を含み、前記nFET部は、
基板上に配置された誘電体層と、
前記誘電体層上に配置された障壁層と、
前記障壁層上に配置された第1のゲート金属層と、
前記第1のゲート金属層上に配置されたキャップ層と、
前記キャップ層上に配置された第1の窒化物層と、
前記第1の窒化物層上に配置されたスカベンジング層と、
前記スカベンジング層上に配置された第2の窒化物層と、
前記第2の窒化物層上に配置されたゲート電極と
を含む、半導体デバイス。 - p型電界効果トランジスタ(pFET)部をさらに含み、前記pFET部は、
前記基板上に配置された前記誘電体層と、
前記誘電体層上に配置された前記第1の窒化物層と、
前記第1の窒化物層上に配置された前記スカベンジング層と、
前記スカベンジング層上に配置された前記第2の窒化物層と、
前記第2の窒化物層上に配置された前記ゲート電極と
を含む、請求項11に記載のデバイス。 - 前記誘電体層は酸化物材料を含む、請求項11または12に記載のデバイス。
- 前記障壁層は金属窒化物材料を含む、請求項11または12に記載のデバイス。
- 前記ゲート電極はWを含む、請求項11または12に記載のデバイス。
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US14/996,563 | 2016-01-15 | ||
US14/996,563 US9583400B1 (en) | 2016-01-15 | 2016-01-15 | Gate stack with tunable work function |
PCT/IB2017/050049 WO2017122104A1 (en) | 2016-01-15 | 2017-01-06 | Semiconductor device gate stack |
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DE (1) | DE112017000171B4 (ja) |
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US7029966B2 (en) * | 2003-09-18 | 2006-04-18 | International Business Machines Corporation | Process options of forming silicided metal gates for advanced CMOS devices |
JP4626411B2 (ja) * | 2005-06-13 | 2011-02-09 | ソニー株式会社 | 半導体装置および半導体装置の製造方法 |
KR101225642B1 (ko) * | 2007-11-15 | 2013-01-24 | 삼성전자주식회사 | H2 원격 플라즈마 처리를 이용한 반도체 소자의 콘택플러그 형성방법 |
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