JP6766552B2 - Image forming equipment, printing system and integrated circuit for image transfer - Google Patents

Description

The present invention relates to an image forming apparatus, a printing system including the image forming apparatus, and an integrated circuit for image transfer that can be mounted on the image forming apparatus.

The image forming apparatus often transmits data from an external controller (for example, a host device such as a DFE (digital Front End)). On the printer engine (image forming apparatus) side, it is necessary to identify the data sent from the host apparatus for each page. For example, Patent Document 1 proposes a technique in which a central arithmetic processing unit on the engine side assigns an identification number to data when developing print data into a bit image. Here, the number that identifies the input interface is included in the assigned data, and the print engine reads the identification number and outputs a print completion message so that printing waits do not occur even if the input interface changes. , Regardless of the state of the printer engine, print data is received and expanded from a plurality of higher-level devices.

Further, Patent Document 2 proposes a technique of accumulating document identification data as one document for each page inside the image forming apparatus and selectively displaying the document identification data for each page.

However, in the above-mentioned Patent Document 1 and Patent Document 2, since the print data is converted into a bit image for each page and identified, the timing of image formation depending on the color is determined by the configuration of the mechanical portion which is the mechanism for forming the image. No consideration was given to the handling of image processing, which adjusts the time for reading and developing data for multiple colors in different devices.

Further, in a device in which image data is transferred from a higher-level device and the timing of image formation differs depending on the color, if the printing speed in the mechanical unit becomes high, there is a concern that the handling of image processing may not be in time.

Therefore, in view of the above circumstances, an object of the present invention is to provide an image forming apparatus capable of accurately handling image data transferred from an external controller at different timings for each color and capable of high-speed printing. To do.

In order to solve the above problems, in one aspect of the present invention,
Receives multi-valued image data of a plurality of plates for each color from the external controller and Tag information for identifying image types and attributes such as characters and photographs, and performs image processing on the multi-valued image data according to the Tag information. image transfer unit for,
The image forming engine performs printing operation on a recording medium, and receives a print instruction from the external controller, based on the image picture data after the image processing of each plate obtained from the image transfer unit, the printing of the image forming engine It is equipped with a control unit that controls the operation to be executed.
The image transfer unit is
The first memory and
A Tag receiver that receives the Tag information from the external controller once per page, and
In the received Tag information, a Tag write DMA unit that embeds a process identifier for identifying a page in addition to the effective area of data and stores it in the first memory, and
A Tag read DMA unit that reads out the accumulated Tag information, extracts the process identifier, and outputs the tag information at each timing of receiving the multi-valued image data of the plates for each of the plurality of colors.
It is provided with an image processing unit that performs image processing on the received multi-valued image data of the plate for each color by using the Tag information read from the first memory.
The Tag read DMA unit provides an image forming apparatus characterized in that it determines whether or not the process identifier extracted from the Tag information has a predetermined value.

According to one aspect, in the image forming apparatus, the image data transferred from the external controller can be accurately handled at different timings for each color, and high-speed printing can be supported.

FIG. 6 is a schematic block diagram of a configuration of a printing system including an image forming apparatus including an image transfer unit and DFE. A detailed block diagram relating to the control of the image forming apparatus shown in FIG. The schematic diagram of the mechanical structure of the image formation engine of FIG. The block diagram of FPGA of the image transfer unit which concerns on 1st Embodiment of this invention. A timing chart for explaining image transfer when printing one page. A timing chart for explaining image transfer when printing three pages. The internal block diagram of Tag light DMAC included in FPGA of FIG. Explanatory drawing which shows an example which makes a margin in the rear line of a main scan and embeds raster data. Explanatory drawing which shows an example which makes a margin in the line after the sub-scan and embeds raster data. The internal block diagram of the Tag read DMAC included in the FPGA of FIG. The block diagram of FPGA of the image transfer unit which concerns on 2nd Embodiment of this invention.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the drawings below, the same components may be designated by the same reference numerals and duplicate description may be omitted.

[Whole system]
FIG. 1 is a schematic block diagram of the configuration of a printing system 3 including an image forming apparatus 1 including an image transfer unit and DFE2. The configuration of the image forming apparatus 1 with the image transfer unit 40, which is an embodiment of the present invention, will be described with reference to FIG.

As shown in FIG. 1, the printing system 3 includes a digital front end (DFE: Digital Front End) 2 and an image forming apparatus (engine unit) 1.

The image forming apparatus 1 includes, for example, a control unit 10, an operation unit 20, an image forming engine 30, and an image transfer unit 40. Specifically, the control unit 10 includes a controller 110, an image processing unit (IPU) 120, and a base control unit (BCU) 130. The image forming engine 30 includes a writing unit 300, a sensor 313, and the like.

The DFE2 is connected to the controller 110 of the image forming apparatus 1 via the GbE 91, and is connected to the image transfer unit 40 of the image forming apparatus 1 via the high-speed serial I / F 92.

DFE2 draws the print data sent from the user. Then, each version of yellow (Y), magenta (M), cyan (C), black (K), and spot color (S) as needed is drawn at 1200dpi 8bit, and only the image data is passed through the high-speed serial I / F92. Is transferred to the image transfer unit 40. Further, the print command (print instruction) is sent to the controller 110 via GbE91.

The high-speed serial I / F 92 is an interface (I / F) for transferring image data from DFE2 to the image transfer unit 40 of the image forming apparatus 1. The transfer timing is generated by the image transfer unit 40.

GbE (Giga Bit Ethernet: Gigabit Ethernet (registered trademark) ) 91 is a transmission medium capable of communicating at 1 GBps, and is used to send a control command (print instruction) from DFE2 to the controller 110 of the image forming apparatus 1. Will be done. Here, the transmission medium for communicating (connecting) the DFE 2 and the image forming apparatus 1 in the GbE standard is, for example, an STP (Shielded Twisted Pair) cable or UTP (Unshielded).
Twisted Pair) Cables, optical fibers, etc.

In addition, the DFE2 further includes a communication interface such as a wired LAN or a wireless LAN for receiving print information from the customer PC.

In the image forming apparatus 1, the controller 110 of the control unit 10 receives print information and commands from DFE2, converts them into commands that can be interpreted by the BCU 130, sends the commands to the BCU 130, and sends the command to the image transfer unit 40. Is set to control the entire printing.

The image transfer unit 40 is connected to the DFE2 by the high-speed serial I / F 92, and transfers the image data drawn by the DFE2 to the IPU 120 according to an instruction from the controller 110.

The IPU 120 is a unit for image processing of copying, and only transfers image data when the printer is operating.

The BCU 130 controls the paper transport system of the image forming engine 30 and the like.

The sensor 313 included in the image forming engine 30 reads (detects) the registration mark information, and in the BCU 130, reads the image of the positioning registration mark (dragonfly mark information) detected by the sensor 313 at a predetermined timing.

The image forming engine 30 (mechanical unit which is a mechanism for forming an image including a writing unit 300) has a paper transport mechanism as described later in FIGS. 2 and 3, and has a function of transferring an image to paper and fixing the image. And is controlled by the BCU 130.

Further, the operation unit 20 is connected to the controller 110 and has a UI (User Interface) function.

Here, as a comparative example, a multi-valued image for each page drawn by DFE is subjected to a screening process inside the DFE to reduce the value, compressed, and then transferred to the controller on the image forming apparatus side by GbE. There is also a configuration to transfer. In such an image forming apparatus, the image data expanded by DFE, which is the data after the reduction in value, is often transferred to the image processing unit (IPU) of the image forming apparatus. In the configuration of this comparative example, by transferring the reduced data from the DFE to the image forming apparatus, the amount of transferred data is small and the cost of the transfer cable etc. can be reduced, but the image forming apparatus (engine) side The engine characteristics could not be fed back to the image processing.

For example, as shown in FIG. 1, due to the mechanical layout, if the engine side that processes and prints the received image data has different printing timings of the data of each plate at the time of printing, if the value is reduced by DFE, the mechanical Since the characteristics of the above cannot be reflected, it is difficult to separately transmit the reduced data at the timing associated with the timing of printing each color due to the characteristics of the mechanism.

On the other hand, if the engine characteristics can be fed back to the image processing on the engine side, it is necessary to receive the multi-valued image data before the reduction in value from DFE, but when transmitting the multi-valued image data, the low-value value is required. This means that the amount of data will be larger than that of the low-value image data after conversion.

Further, the multi-valued image data before the value reduction is associated with Tag information indicating attributes such as a photograph and characters of the image, and the Tag information is often used when the value is reduced. Along with this, if Tag information is added to multi-valued image data and transferred from DFE, image processing becomes easier on the image forming apparatus side, but the same for each color from DFE to the image forming apparatus at the timing of printing. Since the Tag information of is sent for the number of versions, the amount of transferred data increases.

Here, as the printing speed in the mechanical unit of image formation in the image forming apparatus is increased, if the image or Tag information is transferred only by the control unit of the image forming apparatus, the transfer speed of the image or process identifier cannot keep up. There was a case that it ended up.

In particular, as shown in FIG. 1, when the image forming apparatus has different printing timings of the data of each plate at the time of printing, it is necessary to appropriately read out according to the image data transfer timing of the plates, and the higher the speed of the machine body, the higher the speed. , It becomes difficult to handle images by sequentially performing timing image transfer for each color.

On the other hand, as described above, in the present invention, the image transfer unit 40 is provided on the image forming apparatus 1 side in order to realize high-speed image transfer. With this image transfer unit 40, in addition to the transfer path (GbE91⇔controller 110) between the controller 110 and DFE2, a transfer path for image data (high-speed serial I / F92⇔image transfer unit 40⇔IPU120) is newly prepared. By doing so, high-speed image transfer can be realized. Therefore, even if the printing speed of the image forming engine 30 becomes high, it is possible to avoid an error that the image transfer speed in the high-speed serial I / F and the transfer speed in GbE cannot keep up.

Further, in the present invention, since the transfer path for the image is provided on the image forming apparatus 1 side, image processing (screening, edge enhancement, γ correction) and the like are performed on the image near the writing unit 300 instead of on the DFE2 side. By arranging it on the forming device 1 side, relatively real-time feedback becomes possible. Here, in consideration of stability of image quality, a dither processing circuit 416 (see FIG. 4) and an edge enhancement circuit 417 are provided as image processing units in the image transfer unit 40.

[Control block]
FIG. 2 shows a detailed block diagram relating to the control of the image forming apparatus 1 shown in FIG. In FIG. 2, among the image forming apparatus 1, as the control unit 10, the controller 110, the IPU 120, the base control unit 130, the image transfer unit 40, the operation unit 20, and the sensor 313 which is a part of the image forming engine 30 are included. Shown. The configuration of the image forming engine 30 including the writing unit 300 will be described later together with FIG.

As shown in FIG. 2, PCIe92 and GbE91 are provided as interfaces for connecting the image forming apparatus 1 and the DFE2 which is an external controller. The PCIe92 is a type of high-speed serial I / F92 that connects parts, and bidirectional communication is possible between the image transfer unit 40 and the DFE2. The GbE91 is a GbE standard transmission medium and is a dedicated interface for connecting the DFE2 and the controller 110.

The controller 110 shown in FIG. 2 includes a CPU 111, an LSI 112, an ASIC 113, an HDD 114, a NIC 115, a RAM 116, and a ROM 117. The controller 110 shown in FIG. 2 receives print information in the RAM 116, and transfers a print command (print) to the BCU 130 via the PCIe 118 in response to a command from DFE2.

In the configuration of the second embodiment (see FIG. 11) described later, image data is also transferred through PCIe118 in addition to the print command.

In FIG. 2, the CPU (Central Processing Unit) 111 reads the initialization program from the ROM 117 and executes the program. Further, initialization of the device mounted on the controller 110, initialization of the PCIe 118 connected to the PCIe SW43, initialization of the PCIe unit 430 connected to the FPGA 41, initialization of the PCIe unit 128 of the ASIC 121 to 126 of the IPU 120, and ASIC 127. You can control the communication of.

The LSI (Large-Scale Integration) 112 is an integrated circuit used in combination with the CPU 111, and has peripheral interfaces such as PCIe and USB. The ASIC (application specific integrated circuit) 113 is a dedicated ASIC for connection and transfer, and has a PCIe118 interface for connecting to the IPU 120 and a DMAC (Direct Memory Access Controller) for transfer. are doing.

The HDD (Hard Disk Drive) 114 stores programs, data, set values, and the like. The NIC (Network Interface Card) 115 is a PCIe 118, which is a dedicated interface for connecting to the DFE2, which is connected to the LSI 112.

The RAM (Random Access Memory) 116 is a memory used by the CPU 111 to operate, and is also used to temporarily store image data. The ROM (Read Only Memory) 117 stores the initialization program of the CPU 111 and the boot loader.

The image transfer unit 40 shown in FIG. 2 includes an FPGA 41, a RAM (memory) 42, a PCIeSW43, a CPU 44, a ROM 45, a RAM 46, a high-speed serial interface (I / F) 47, and a BCU I / F 48.

The image transfer unit 40 is connected to the controller 110 and the IPU 120 via the PCIeSW43.

The image transfer unit 40 receives the image data and Tag information before image processing from DFE2 through the high-speed serial I / F 92.

The PCIeSW43 is a switch device of PCIe (118, 430, 47) and is used to connect a plurality of PCIe devices. It is also initialized by the controller 110.

The CPU 44 initializes the image transfer unit 40 by executing the program of the ROM 45, and executes the content instructed by the command from the BCU 130. Further, the CPU 44 sets the start address (process ID) for each page based on the image collection information set by the controller 110.

The ROM 45 stores the control program and data of the data transfer unit 40. The RAM 46 is a work memory of the CPU 44.

The FPGA (Field-programmable gate array) 41 is a programmable gate array, and the image data received from the DFE2 is image-processed via the high-speed serial interface 92 to generate a small value image data in the RAM 42. accumulate. Then, in response to the transfer request of the IPU 120, low-value image data is transferred for each color plate. That is, the FPGA 41 is an integrated circuit for image transfer.

Here, the role of the FPGA 41 is to receive multi-valued image data of each version and Tag information indicating an image type common to each version of the page from the external controller (DFE2) for each printing page and perform image processing. Then, the small value data is transmitted in response to the print request from the BCU 130 that controls the print timing in the image forming engine 30.

In the image transfer unit, Tag information is temporarily stored in the memory (RAM 42) on the image transfer unit side, and Tag information is read out from the memory according to the transfer timing of each version to perform various image processing. For example, the RAM 42 functions as a Tag buffer memory 421, which is a memory dedicated to Tag shown in FIG. 4, and has a memory for four pages in order to absorb a drum delay due to a difference in the layout of the image forming engine 30.

The RAM (memory) 42 is a memory for temporarily storing image data. Store data for image processing used for image transfer.

The high-speed serial I / F 92 is a high-speed serial interface for transferring image data from DFE2. The transfer timing for transferring the image data with the high-speed serial I / F 92 is indicated by the FPGA 41.

The BCU I / F48 is an interface for BCU for exchanging data between the BCU 130 and the image transfer unit 40.

The IPU (image processing unit) 120 is in charge of image transfer for each color plate. PCIe118 and 47 are connected to the controller 110.

With reference to FIG. 2, the IPU 120 includes ASIC 121, 122, 123, 124, 125 for writing control for each of a plurality of colors, control ASIC 126, and image processing ASIC 127.

The ASIC 121 is a Y (yellow) color writing ASIC, has an image correction (trapezoidal correction) function, and correction parameters are set from the BCU 130.

The ASIC 122 is an M (magenta) color writing ASIC, the ASIC 123 is a C (cyan) color writing ASIC, and the ASIC 124 is a K (black) color writing ASIC. These ASICs are image correction as in the case of Y. It has a (trapezoidal correction) function and is set from the BCU 130.

The ASIC 125 is a special color writing ASIC, and is optionally additionally used when the fifth color is used. It also has an image correction (trapezoidal correction) function, and correction parameters are set from the BCU 130.

The ASIC 126 is an ASIC that controls the write control ASIC (121-125). The ASIC 127 is an image processing ASIC, which transfers an image from the controller 110 and is controlled by the BCU 130.

The BCU 130 (base control unit) performs mechanical control such as paper transport and image transfer timing control. The BCU 130 shown in FIG. 2 includes a CPU 131, a RAM 132, and a ROM 133.

The RAM 132 is a memory used by the CPU 131, and the program / data of the CPU 131 is stored in the ROM 133. The CPU 131 initializes the IPU 120 and the BCU 130 by executing the program of the ROM 133.

The sensor 313 is an image sensor for reading out the positioning registration marks. In the BCU 130, the register mark image is read out, and the coordinates of the register mark image are determined and used as an index at the time of image formation.

The operation unit 20 is a unit in charge of the UI and is connected to the controller 110. In FIG. 2, the operation unit 20 includes a CPU 21, a touch panel 22, an LCD 23, a key input unit 24, a ROM 25, a RAM 26, and an operation unit I / F27.

The CPU 21 is the main control unit of the operation unit 20, starts from the program of the ROM 25, and waits for a command from the controller 110 after the initialization of the entire operation unit 20 is completed.

The touch panel 22 detects input from the user. The LCD (liquid crystal display) 23 functions as a display unit. The key input unit (KEY) 24 is a dedicated hard key and detects input from the user. The ROM 25 is a memory for storing programs / data of the operation unit 20. The RAM 26 is a work memory of the CPU 21 of the operation unit 20. The operation unit I / F 27 is an interface for connecting the operation unit 20 and the controller 110.

[Image formation engine]
FIG. 3 shows a schematic diagram of the mechanical configuration of the image forming engine 30 of FIG. A mechanical configuration for forming an image will be described with reference to FIG.

The image forming engine 30 includes photoconductor units 301 to 304 of each color, a transfer belt 306, a registration unit 307, a transfer unit 308, a fixing unit 309, and a cooling unit 310 as image forming units.

Further, in the image forming engine 30, the transfer unit includes a paper feed tray 311, an inversion unit 312, a sensor 313, a sensor 314, and the like.

In FIG. 3, the Y color photoconductor unit 301 is a unit for forming an image in Y color, and the M color photoconductor unit 302 is a unit for forming an image in M color, and is a C color photoconductor. The unit 303 is a unit for forming an image in C color, and the K color photoconductor unit 304 is a unit for forming an image in K color.

In FIG. 3, only the photoconductor is shown in the four photoconductor units 301 to 304, but each photoconductor unit 301 to 304 is also provided with a charging device, a developing device, and the like around the photoconductor.

Further, a writing unit (optical writing unit, exposure apparatus) 300 is provided above the four photoconductor units 301 to 304.

When printing an image on paper P, the surface of the rotating photoconductor is uniformly charged by a charging device, and the writing unit 300 exposes the surface of the photoconductor based on the image data or the like transferred from the IPU 120 to perform static electricity. Form a latent image. Next, a developing device containing a developer containing toner develops an electrostatic latent image on the surface of the photoconductor to form a toner image.

The transfer belt 306 is a belt for mounting the toner (toner image) of one page of images from the photoconductor units 301 to 304 of each color and secondary transfer to the paper P. The transfer unit 308 is a unit that secondarily transfers a toner image from the transfer belt 306 to the paper P.

The registration unit 307 is a place where the paper P is temporarily stopped for timing adjustment. When the registration unit 307 pauses, the sensor (positioning sensor) 313 can read the registration marks on the first surface of the paper P.

The fixing unit 309 is a unit that fixes the paper P on which the toner is placed (the toner image is transferred) by heat and pressure. The cooling unit 310 is a unit that cools the paper P that has been warmed by fixing.

Further, as a transport unit, the paper P is placed on the paper feed tray 311, and the paper P is supplied as needed. The reversing unit 312 switches back the paper P at the time of double-sided printing to reverse the front and back of the paper P.

The sensor (positioning sensor) 313 in the vicinity of the reversing unit 312 can read the registration marks on the second surface of the paper P. The density sensor 314 is a sensor that reads the density of each color transferred to the roller (transfer roller), and is used for color matching and color alignment.

In the image forming engine 30 having such a mechanical configuration, the paper P is conveyed from the tray 311 at the time of printing, and is momentarily stopped at the registration unit 307 at the position for timing adjustment.

At that timing, the IPU 120 transfers an image in order to draw a picture on the photoconductor of the Y color photoconductor unit 301 with the head color being Y color. Subsequently, the image is transferred to the M color photoconductor unit 302, the image is transferred to the C color photoconductor unit 303, and the image is transferred to the K color photoconductor unit 304.

Each of these images is developed for each color using the toner of each color and transferred to the transfer belt 306. The transfer is primarily transferred to the transfer belt 306 by adjusting the timing so that the positions of the images are aligned, and is secondarily transferred to the paper P in the transfer unit 308.

After that, the paper P is fixed with an image by applying heat and pressure in the fixing unit 309, and is cooled by the cooling unit 310. In the case of single-sided printing, the paper P is discharged as it is.

In the case of double-sided printing, the paper P is conveyed to the reversing unit 312 and switched back so that the second side faces up. Similarly, when printing on the second side by double-sided printing, the paper P is stopped for a moment at the registration unit 307, and the image of each color is placed on the transfer unit 308 from the transfer belt 306 to the second side. Is secondarily transferred, fixed, cooled, and discharged.

In the image forming engine shown in FIG. 3, the case where there is one paper feed tray has been described, but the present invention is not limited to this, and there may be a plurality of paper feed trays. Further, in FIG. 3, the case where the image forming engine has four photoconductors has been described, but the number of photoconductors can be increased or decreased according to the color, and the number of the photoconductors is not limited to this.

[Image transfer unit of the first embodiment]
FIG. 4 is a block diagram of the FPGA 41 of the image transfer unit 40 according to the first embodiment of the present invention. The image transfer of the first embodiment will be described with reference to FIG.

FIG. 4 mainly shows the FPGA 41 and the Tag buffer memory (indicated as TagBUF in the figure) 421 in the image transfer unit 40. The Tag buffer memory 421 is realized by, for example, the RAM 42 of FIG.

The Tag buffer memory (memory, first memory) 421 is a buffer memory for Tag, and stores image data in which Tag information is embedded.

The FPGA 41 of the image transfer unit 40 includes a tag receiving circuit 411, a plate receiving circuit for each color 412Y, 412M, 412C, 412K, a tag light DMAC413, a tag read DMAC414M, 414C, 414K, a parameter transmitter 415, a dither processing circuit 416Y, 416M, It includes 416C, 416K, edge enhancement circuits 417Y, 417M, 417C, 417K, interrupt control circuit 418, and PCIe I / F circuit 419.

The Tag receiving circuit 411 is a circuit that receives Tag data (Tag information) as an image type from DFE2.

The multi-value image data receiving circuit (multi-value image data receiving unit) 412Y is a circuit that receives the Y version of multi-value image data from DFE2. Similarly, the 412M, 412C, and 412K are receiving circuits that receive the M-version, C-version, and K-version multi-valued image data, respectively.

Here, the transfer color order of the image data sent from DFE2 differs for each of a plurality of color components (Y version / M version / C version / K version), and in the case of the layout shown in FIG. 3, the mechanical layout The order is Tag = Y version ⇒ M version ⇒ C version ⇒ K version. The order of these colors is an example, and the transfer order is set according to the order of the mechanical layout.

Further, the CPU bus 440 connected to the CPU 44 is connected to the Tag write DMAC413 and the Tag read DMAC414M, 414C, 414K.

The Tag write DMAC413 is a DMA circuit (Tag write DMA unit, Tag information writing unit) that receives data (Tag information) from the Tag receiving circuit 411 and writes it to the memory 42. The start address (process ID) for accessing the memory 42 is set in advance by the CPU 44 (see FIG. 2) of the image transfer unit 240.

The Tag read DMAC414M, 414C, and 414K are DMA circuits (Tag read DMA unit, Tag information reading unit) that are activated in accordance with the reception timing of the M version / C version / K version multi-valued image. Specifically, when the Tag read DMAC414M, 414C, 414K receives the multi-valued image data of the plates (M version / C version / K version) for each of a plurality of colors, the accumulated Tag information is read out and the identifier (start address). ) Is extracted and output.

That is, the Tag read DMAC414M, 414C, 414K determines whether or not the data of each color is desired data by using the Tag information and image data received from the memory and the start address (process ID) received from the CPU 44. Then, the image processing is started at different timings for each color.

The dither processing circuit (Dither: reduction circuit) 416Y is a circuit that performs image processing (reduction) of Y version of multi-valued image data using a dither matrix of 64 pixels × 64 lines. Similarly, the 416M, 416C, and 416K are circuits that image-process the M-version, C-version, and K-version multi-valued image data, respectively.

The parameter transmission unit 415 is a circuit that supplies parameters required for dither processing to the dither processing circuits 416Y, 416M, 416C, and 416K at any time.

The edge enhancement circuit 417Y is a circuit that corrects the edge of a character image. Similarly, the 417M, 417C, and 417K are circuits that perform edge correction of character images of the M version, the C version, and the K version, respectively.

The dither processing circuits 416Y to 416K, the parameter transmission unit 415, and the edge enhancement circuits 417Y to 417K function as image processing units.

The interrupt control circuit 418 compares the extracted process ID with the preset process ID, and generates an interrupt when they are different. Details will be described later together with FIG.

The PCIeI / F circuit 419 is a circuit that controls the PCIe430 connected to the PCIeSW43 shown in FIG.

In this way, the FPGA 41 receives the image data and the Tag information from the DFE2, which is an external controller, and receives the process ID from the CPU 44, thereby determining that the data of each color is the desired data, and for each color. Image processing handling (image handling) is performed at different timings. That is, the image transfer process can be executed in association with each other at a timing suitable for the timing of image formation for each drum.

[Transfer timing]
In the image transfer unit 40 shown in FIG. 4, the state of transfer of image data sent from DFE2 is shown in FIG. 5 (1 page printing), and the state of 3 page printing is shown in FIG. 6 as a schematic timing chart.

First, the transfer timing will be described using the case of one-page printing shown in FIG. The Tag data transferred at the same timing as the Y version is directly written by the Tag write DMAC413 to the Tag buffer memory 421 (hereinafter, simply referred to as memory 421) which is a memory inside the image transfer unit 40. At the same time, Tag data is also used for Y version image processing.

After that, when the time elapses and the transfer of the M version of the image data is started (FIG. 5, time t2), the tag read DMAC414M starts reading the previously written Tag data. The read Tag data is read in synchronization with the image data of the M version, and image processing is performed. Subsequent C and K versions are also performed in the same manner.

Although four colors have been described here, the number of color elements may be other. For example, the Tag receiving circuit 411, which is a Tag receiving unit, receives a plurality of n-color Tag information from the external controller DFE2 once per page. At this time, as shown in FIG. 5, the timing of receiving the multi-valued image data of the plate of any one of the plurality of n colors is the same as the timing of receiving the Tag information by the Tag receiving circuit 411.

The Tag Lite DMAC413 embeds a process identifier that identifies a page other than the effective area of data for a (n-1) color other than the one color in the received Tag information, stores it in the memory 421, and stores the (n-1) color in the memory 421. -1) At each timing of receiving the multi-valued image data of each version of the color, the Tag information accumulated from the memory 42 is read, and the identifier is extracted and output.

In the timing chart for printing three pages in FIG. 6, although it depends on the mechanical layout, in this embodiment, the transfer (2) of the Y version of the second page overlaps with the transfer (1) of the first page of the M version. .. Furthermore, the first page of the K version overlaps with the third page of the M version and the second page of the C version. The Tag data once written to the memory 421 will be read out at any time. In continuous printing, such overlapping of transfers is possible, which complicates image handling.

In addition, there are not always four plates, and depending on the print page, a specific plate (for example, Y plate) may not exist as print data, which increases the complexity of image handling.

However, in the present invention, by applying the Tag write DMAC413 and the Tag read DMAC414 of the following controls, the process ID is determined and image handling is appropriately performed.

[Tag Light DMAC]
FIG. 7 shows an internal configuration diagram of the Tag Light DMAC413 shown in FIG. 4, which will be described below. As shown in FIG. 7, the Tag Lite DMAC413 includes a data input circuit 51, a bus I / F circuit 52, a process ID setting unit 53, and a process ID embedded circuit 54.

The Tag write DMAC413 is started by designating a start address to be accessed from the CPU bus 440 connected to the CPU 44 (see FIG. 2). At the time of its activation, the process ID to be transferred is set in advance.

Here, the process ID is an identifier (process identifier, PID) for executing the process (page), and indicates a unique number of the page to be processed (for example, a number from 0 to 255 is repeatedly used).

After activation, in the Tag write DMAC413, the data input circuit 51 performs an operation of writing data into the memory 42 at any time via the bus I / F circuit 52 and the memory bus 420 in response to receiving the Tag data from the DFE2. .. At that time, the process ID embedding circuit 54 embeds the process ID in the data to be written. Specifically, a range wider than the print effective area is set as a memory write target, a process ID is embedded in an area outside the print effective range, and the memory 42 is written (written).

FIG. 8 shows an example in which a margin is created in the rear line of the main scan and raster data is embedded. Image transfer is performed in raster format in the main scanning direction, and the raster data is called a line when counted in the sub-scanning direction. Create a margin at the back of the line and embed the process ID in that part.

Further, FIG. 9 shows an example in which a margin is created in the rear line in the sub-scanning direction and raster data is embedded. The portion to be embedded may be at any position as long as it has a predetermined margin.

By embedding the process ID as data outside the print effective area in this way, it becomes possible to determine whether the data instructing the DMA transfer is the desired data, and debugging becomes easy.

Further, by shifting to image processing at different timings for each color, image handling can be performed at different timings for each color.

Therefore, in the subsequent image formation, correct data can be executed at an appropriate timing for each color, so that the image created on the paper P by the image formation engine is high due to accurate handling without deviation for each page. It becomes quality and can support high-speed image formation.

[Tag read DMAC]
FIG. 10 shows an internal configuration diagram of the Tag read DMAC414 described with reference to FIG. 4, and will be described below. In FIG. 10, the Tag read DMAC414M will be described as an example, but since the Tag read DMAC414C and 414K also have the same configuration, the description thereof will be omitted.

As shown in FIG. 10, the Tag read DMAC414M includes a bus I / F circuit 61, a data output circuit 62, a process ID setting unit 63, a process ID extraction circuit 64, and a process ID comparison / interrupt circuit 65.

In the Tag read DMAC414M, the process ID setting unit 63 is started by designating the start address to be accessed from the CPU bus 440. At the time of its activation, the process ID to be transferred is set in advance.

After activation, the Tag read DMAC414M performs an operation of reading (reading) transfer data from the memory 42 via the bus I / F circuit 61 and the memory bus 420. From the read read data, the process ID extraction circuit 64 extracts the process ID from the same position as the embedding location of the process ID of the Tag write DMAC413.

The process ID comparison / interrupt circuit 65 compares the extracted process ID with the preset process ID, and generates an interrupt when they are different. The interrupt is processed by the interrupt control circuit 418 (see FIG. 4) inside the FPGA 41 and transmitted to the CPU 44.

As a result, the CPU 44 can immediately detect the abnormal operation, and can provide a high-quality image forming apparatus. Further, since the identifier (process ID) is collated in the hardware of FPGA 41, debugging becomes easy.

[Image transfer unit of the second embodiment]
FIG. 11 shows a block diagram of FPGA 41A of the image transfer unit 40A according to the second embodiment of the present invention. The FPGA 41A according to the present embodiment shown in FIG. 11 is provided with a buffer memory 422 for low-value image data in addition to the components shown in FIG. 4, and the FPGA 41A is an image light DMAC491Y, 491M, 491C, 491K of each color version. The image leads DMAC492Y, 492M, 492C, and 492K of each color plate are further provided.

The buffer memory for low-value image data (second buffer memory, memory) 422 is a buffer memory for low-value image data after image processing, and is printed on two pages and back side for front side printing for each color plate. It has a total of 4 pages, 2 pages for use.

The image lights DMAC491Y, 491M, 491C, 491K of each version and the image reads DMAC492Y, 492M, 492C, 492K of each version are connected to the CPU 44 via the CPU bus 440.

The Y version light DMAC (image light DMA unit) 491Y is a DMA circuit that writes the image data after the reduction in value to the memory 422. The start address for accessing the second memory 422 is set in advance by the CPU 44. The same applies to the other color plates of the image lights DMAC491M, 491C, 491K.

The Y-plate read DMAC (image read DMA unit) 492Y is a DMA circuit that transfers K-plate data that is activated in response to a print request. The start address for accessing the second memory 422 is set in advance by the CPU 44. The same applies to other color plates of the image read DMAC492M, 492C, and 492K.

As described above, the present embodiment is different from the control of FIG. 4 in that the data after the reduction in value is temporarily stored in the second memory 422 of the image transfer unit 40A. In the present embodiment, once the data is accumulated in this way, the data transfer speed for printing and the data reception speed from DFE2 can be relaxed.

Since the data transfer speed on the printing side does not include the time between the transferred transfer paper and the next transfer paper (also called the paper spacing), the data transfer speed on the DFE2 side is increased by that amount. There is a need.

The internal configuration of each version of the light DMAC491Y, 491M, 491C, 491K is the same as that of the Tag light DMAC413 shown in FIG. In this case, the usage differs between the Tag information and the low-value image data of the plate for each color, but it is the same in that the process ID of the data is written to the second memory 422.

Further, the internal configuration of each of the above-mentioned version read DMAC492Y, 492M, 492C, 492K is the same as the configuration of the Tag read DMAC414M shown in FIG. In this case, the usage differs between the multi-valued image data of the plate for each color and the low-value image data of the plate for each color, but it is the same in that the process ID of the accumulated data is collated at the time of reading.

In this way, even in the Debug data read from the second memory 422, the start address of the memory access is instructed from the CPU 44, but it is correct or incorrect by extracting the identifier embedded in the hardware at the time of writing from the data. Since it can be identified as data, debugging becomes easy.

Therefore, in debugging when creating control software for the image transfer unit, mistakes related to image handling can be discriminated, design efficiency is improved, and a high-quality image forming apparatus can be provided.

As described above, in the plurality of embodiments of the present invention, with respect to the Tag information indicating the image type and the image data after image processing, the unique number of the page to be processed is set in a portion other than the effective area of the data at the time of storage. The indicated process ID is embedded, and when the data is read out at a predetermined timing, the process ID is taken out so that it can be identified by software.

As a result, it becomes possible to determine whether the data instructing the DMA transfer is the desired data, and debugging becomes easy.

In the above description, the case of an electrophotographic color printer as the image forming apparatus has been described, but the present invention is not limited to this, and for example, an optical plotter or a digital copying apparatus may be used. Alternatively, the image forming apparatus may be applicable to an inkjet printer that forms an image by spraying ink on paper.

Further, in the above-mentioned image forming apparatus, the object of image formation is described as paper, but the recording medium on which the image is formed is not limited to paper. For example, the recording medium means a medium to which a liquid can adhere at least temporarily, such as one that adheres and adheres, and one that adheres and permeates. Specific examples include paper, recording paper, recording paper, film, recording media such as cloth, electronic substrates, electronic components such as piezoelectric elements, powder layers (powder layers), organ models, and media such as inspection cells. Yes, including anything to which liquids and powders adhere, unless otherwise specified. For example, the material of the "object" is paper, thread, fiber, cloth, leather, metal, plastic, glass, wood, ceramics, or the like, and any material may be used as long as the liquid can be attached even temporarily.

Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited to the specific embodiment, and is within the scope of the gist of the embodiment of the present invention described in the claims. Various modifications and changes are possible.

1 Image forming device 2 DFE (external controller, digital front end)
10 Control unit 110 Controller (control unit)
120 IPU (control unit)
130 BCU (control unit)
20 Operation unit 30 Image formation engine 300 Writing unit 313 Sensor 40, 40A Image transfer unit (data transfer unit, DTU)
41,41A FPGA (Integrated circuit for image transfer)
42 RAM
44 CPU
411 Tag receiving circuit 412 (412Y, 412M, 412C, 412K) Multi-value image data receiving circuit (multi-value data receiving unit)
412 Tag receiver circuit (Tag receiver)
413 Tag light DMAC (Tag light DMA part)
414 (414M, 414C, 414K) Tag lead DMAC (Tag lead DMA section)
415 Parameter transmitter 416 (416Y, 416M, 416C, 416K) Dither processing circuit (image processing unit)
417 (417Y, 417M, 417C, 417K) Edge enhancement circuit (image processing unit)
418 Interrupt control circuit 419 PCIeI / F circuit 421 memory (Tag buffer memory, first memory)
422 memory (buffer memory for low-value image data, second memory)
491 K version light DMAC (image light DMA section)
492 K version read DMAC (image read DMA section)
P paper (recording medium)
Tag Tag information (tag)
PID Process ID (process identifier, start address)

Patent No. 2828011 Patent No. 3344778

Claims (7)

An image forming device connected to an external controller via an interface.
Receives multi-valued image data of a plurality of plates for each color from the external controller and Tag information for identifying image types and attributes such as characters and photographs, and performs image processing on the multi-valued image data according to the Tag information. image transfer unit for,
The image forming engine performs printing operation on a recording medium, and receives a print instruction from the external controller, based on the image picture data after the image processing of each plate obtained from the image transfer unit, the printing of the image forming engine It is equipped with a control unit that controls the operation to be executed.
The image transfer unit is
The first memory and
A Tag receiver that receives the Tag information from the external controller once per page, and
In the received Tag information, a Tag write DMA unit that embeds a process identifier for identifying a page in addition to the effective area of data and stores it in the first memory, and
A Tag read DMA unit that reads out the accumulated Tag information, extracts the process identifier, and outputs the tag information at each timing of receiving the multi-valued image data of the plates for each of the plurality of colors.
It is provided with an image processing unit that performs image processing on the received multi-valued image data of the plate for each color by using the Tag information read from the first memory.
The tag read DMA unit is an image forming apparatus characterized in that it determines whether or not the process identifier extracted from the tag information has a predetermined value. The image transfer unit is
The second memory and
An image light DMA unit that embeds a process identifier for identifying a page other than the effective area of the data in the image data image-processed by the image processing unit and stores the image data in the second memory.
An image read DMA unit that reads image data after image processing of each version from the second memory, extracts the process identifier, and outputs the process identifier is provided.
The image forming apparatus according to claim 1, wherein the image read DMA unit determines whether or not the process identifier extracted from the image data has a second predetermined value. According to claim 1 or 2, the Tag read DMA unit collates each read process identifier with a preset predetermined value, and if they are different, an error interrupt is generated. The image forming apparatus described. It is provided with n multi-value image data receivers corresponding to n colors, which are two or more integers that receive multi-value image data of plates for each of the plurality of colors from the external controller.
The Tag receiving unit receives a plurality of n-color Tag information from the external controller once per page.
The timing of receiving the multi-valued image data of the plate of any one of the plurality of n colors is the same as the timing of receiving the Tag information by the Tag receiving unit.
The Tag light DMA unit embeds an identifier for identifying a page other than the effective area of data for a (n-1) color other than the one color in the received Tag information, and the first memory. Accumulate in
The Tag read DMA unit reads the Tag information accumulated from the first memory at each timing of receiving the multi-valued image data of each version of the (n-1) color, and extracts the identifier. The image forming apparatus according to any one of claims 1 to 3, wherein the image forming apparatus is characterized by outputting. The image processing unit is characterized by having a value reduction unit that performs image processing on the multivalued image data to reduce the value.
The image forming apparatus according to any one of claims 1 to 4. A digital front end that functions as the external controller that receives print data sent from the user, draws it, and creates multi-valued image data.
A printing system comprising the image forming apparatus according to any one of claims 1 to 5 , which is connected to the digital front end via an interface. An integrated circuit for image transfer connected to a memory that can be mounted on an image forming device connected to an external controller via an interface.
A Tag receiver that receives Tag information that identifies an image type such as a character or a photograph once per page from the external controller.
A Tag write DMA unit that embeds an identifier for identifying a page other than the effective area of data in the received Tag information and stores it in the memory.
A Tag read DMA unit that reads the Tag information accumulated from the memory at each timing of receiving the multi-valued image data of a plurality of color plates, extracts the identifier, and outputs the identifier.
It is provided with an image processing unit that performs image processing on the received multi-valued image data of the plate for each color by using the Tag information read from the memory.
The Tag read DMA unit is an integrated circuit for image transfer, characterized in that it determines whether or not the read identifier has a predetermined value.

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