JP6756172B2 - Circuits, oscillators, electronics and mobiles - Google Patents

Description

The present invention relates to circuit devices, oscillators, electronic devices, mobile bodies and the like.

Conventionally, oscillators such as OCXO (oven controlled crystal oscillator) and TCXO (temperature compensated crystal oscillator) have been known. For example, OCXO is used as a reference signal source in base stations, network routers, measuring instruments and the like.

In such oscillators such as OCXO and TCXO, high frequency stability is desired. However, the oscillation frequency of the oscillator has a secular change called aging, and there is a problem that the oscillation frequency fluctuates with the elapsed time. For example, there is a technique disclosed in Patent Document 1 as a conventional technique for suppressing fluctuations in the oscillation frequency when a reference signal such as a GPS signal becomes unreceivable and a so-called holdover state occurs. In this conventional technique, a storage unit for storing the correspondence information (aging characteristic data) between the correction value of the control voltage of the oscillation frequency and the elapsed time and the elapsed time measuring unit are provided. Then, when the holdover is detected, the aging correction is executed based on the correspondence information between the correction value stored in the storage unit and the elapsed time and the elapsed time measured by the elapsed time measuring unit. ..

In this case, since the correspondence information is information obtained by operating the oscillator for a long period of time and measuring the aging characteristics, it is impossible to obtain the correspondence information for all the mass-produced oscillators. Therefore, the correspondence information is obtained by using the oscillator prepared as a sample, and this information is reused as the correspondence information of other oscillators.

Japanese Unexamined Patent Publication No. 2015-82815

However, the behavior of the aging fluctuation of the oscillation frequency between individual oscillators depends on individual variations (hereinafter referred to as element variations) such as the performance of the components constituting the oscillator, the mounting state of the components and the oscillator, or the usage environment of the oscillator. Due to the difference, it is difficult to reduce the frequency fluctuation caused by the element variation by the above-mentioned conventional technique.

According to some aspects of the present invention, it is possible to provide a circuit device, an oscillator, an electronic device, a moving body, or the like capable of realizing more accurate aging correction.

One aspect of the present invention is a processing unit that performs signal processing on frequency control data based on a phase comparison result between an input signal based on an oscillation signal and a reference signal, and the frequency control data and an oscillator from the processing unit. The processing unit includes an oscillation signal generation circuit that generates an oscillation signal of an oscillation frequency set by the frequency control data, and the processing unit performs a period before a holdover due to a loss or abnormality of the reference signal is detected. In the above, when the true value of the frequency control data based on the phase comparison result with respect to the observed value is estimated by the Kalman filter processing and the holdover is detected, the timing corresponding to the detection timing of the holdover is performed. The present invention relates to a circuit device that generates aging-corrected frequency control data by holding the true value in the above and performing arithmetic processing based on the true value.

According to one aspect of the present invention, the processing unit performs signal processing on the frequency control data based on the phase comparison result between the input signal and the reference signal. Then, using the frequency control data from the processing unit and the oscillator, an oscillation signal of the oscillation frequency set by the frequency control data is generated. Then, in one aspect of the present invention, the true value of the frequency control data with respect to the observed value is estimated by the Kalman filter processing in the period before the holdover is detected. When a holdover is detected, the true value at the timing corresponding to the holdover detection timing is retained, and arithmetic processing is performed based on the held true value to generate aging-corrected frequency control data. Will be done. In this way, the aging correction can be realized based on the true value estimated by the Kalman filter processing and held at the timing corresponding to the holdover detection timing. Therefore, it becomes possible to realize highly accurate aging correction that could not be realized in the past.

Further, in one aspect of the present invention, the processing unit may generate the aging-corrected frequency control data by performing the calculation process of adding the correction value to the true value.

In this way, aging correction is realized by performing arithmetic processing that adds, for example, a correction value that compensates for frequency changes due to the aging rate to the true value held at the timing corresponding to the holdover detection timing. Will be done. Therefore, it is possible to realize highly accurate aging correction with a simple process.

Further, in one aspect of the present invention, the processing unit sets the correction value in the time step k to D (k) and the aging-corrected frequency control data in the time step k to AC (k). The frequency control data AC (k + 1) corrected for aging in the time step k + 1 may be obtained by AC (k + 1) = AC (k) + D (k).

By doing so, by performing the processing of AC (k + 1) = AC (k) + D (k) for each time step, highly accurate aging correction can be realized by simple processing.

Further, in one aspect of the present invention, the processing unit may perform the calculation process of adding the correction value after the filter process to the true value.

By doing so, it becomes possible to effectively suppress the deterioration of the accuracy of the aging correction due to the addition of the correction value having the fluctuation of the fluctuation to the true value.

Further, in one aspect of the present invention, the processing unit may obtain the correction value based on the observation residual in the Kalman filter processing.

In this way, the correction value update processing that reflects the observation residuals in the Kalman filter processing becomes possible, and more accurate aging correction can be realized.

Further, in one aspect of the present invention, a storage unit for storing the system noise constant for setting the system noise of the Kalman filter processing and the observation noise constant for setting the observation noise of the Kalman filter processing may be included.

By doing so, it becomes possible to realize aging correction that reduces the influence of element variation of system noise and observation noise.

Further, in one aspect of the present invention, the processing unit is based on the voltage of the input terminal to which the holdover detection signal is input or the holdover detection information input via the digital interface unit. It may be determined whether or not the holdover state has been reached.

In this way, it becomes possible to determine whether or not the holdover state has occurred by a simple process based on the voltage of the input terminal and the detection information input via the digital interface unit.

Further, in one aspect of the present invention, the oscillation signal generation circuit may generate the oscillation signal based on the frequency control data based on the phase comparison result when returning from the holdover.

In this way, when the holdover is restored and the normal operation is started, for example, an oscillation signal having an appropriate oscillation frequency can be generated based on the frequency control data based on the phase comparison result.

Further, another aspect of the present invention relates to an oscillator including the circuit device according to any one of the above and the oscillator.

Further, another aspect of the present invention relates to an electronic device including the circuit device according to any one of the above.

Further, another aspect of the present invention relates to a moving body including the circuit device according to any one of the above.

Explanatory drawing about element variation of aging characteristic. Explanatory drawing about aging correction at the time of holdover Explanatory drawing about holdover. Explanatory drawing about holdover. Explanatory drawing about holdover time. A basic configuration example of the circuit device of this embodiment. A detailed configuration example of the circuit device of this embodiment. Explanatory drawing of aging correction using Kalman filter processing. Explanatory drawing of aging correction using Kalman filter processing. Detailed configuration example of the processing unit. Explanatory drawing of temperature compensation processing. Explanatory drawing of temperature compensation processing. Explanatory drawing of temperature compensation processing. The operation explanatory drawing of the processing part. The operation explanatory drawing of the processing part. Configuration example of the aging correction unit. An example of a Kalman filter model. Configuration example of the Kalman filter section. The figure which shows the example of the predicted frequency deviation and the measured frequency deviation by this embodiment. Configuration example of temperature sensor. Configuration example of the oscillation circuit. The explanatory view of the modification of this embodiment. The explanatory view of the modification of this embodiment. Oscillator configuration example. Configuration example of electronic equipment. Configuration example of a moving body. Detailed structural example of the oscillator. A configuration example of a base station, which is one of electronic devices.

Hereinafter, preferred embodiments of the present invention will be described in detail. It should be noted that the present embodiment described below does not unreasonably limit the content of the present invention described in the claims, and all the configurations described in the present embodiment are indispensable as a means for solving the present invention. Not necessarily.

1. 1. Oscillation frequency fluctuation due to aging In oscillators such as OCXO and TCXO, the oscillation frequency fluctuates due to a secular change called aging. A1 to A5 of FIG. 1 are examples of measurement results of aging characteristics for a plurality of oscillators having the same or different shipping lots. As shown in A1 to A5 of FIG. 1, there is a difference in the mode of aging fluctuation due to element variation.

It is said that the cause of the fluctuation of the oscillation frequency due to aging is the desorption of dust to the vibrator that occurs in the airtight sealed container, the environmental change due to some outgassing, or the secular change of the adhesive used for the oscillator.

As a measure for suppressing the fluctuation of the oscillation frequency due to such aging, there is a method of performing initial aging in which the oscillator is operated for a certain period of time before shipping, and then shipping after initial fluctuation of the oscillation frequency. However, in applications where high frequency stability is required, such initial aging countermeasures are not sufficient, and aging correction that compensates for fluctuations in the oscillation frequency due to aging is required.

In addition, when an oscillator is used as a reference signal source for a base station, there is a so-called holdover problem. For example, in a base station, frequency fluctuation is suppressed by synchronizing the oscillation signal (output signal) of the oscillator with a reference signal from GPS or a network by using a PLL circuit. However, if the reference signal from GPS or the network (Internet) disappears or an abnormal holdover occurs, the reference signal for synchronization cannot be obtained. Taking GPS as an example, when the positioning signal cannot be received due to the installation position or direction of the GPS antenna, the positioning signal cannot be received accurately due to the interference wave, or the positioning signal is not transmitted from the positioning satellite. , Holdover occurs, and synchronization processing using the reference signal cannot be executed.

When such a holdover occurs, the oscillation signal generated by the self-propelled oscillation of the oscillator becomes the reference signal source of the base station. Therefore, holdover performance is required to suppress fluctuations in the oscillation frequency due to self-propelled oscillation of the oscillator during the holdover period from the holdover occurrence timing to the return timing (release timing) from the holdover.

However, as described above, the oscillator has a non-negligible level of fluctuation in the oscillation frequency due to aging, and this causes a problem that high holdover performance cannot be realized. For example, in a holdover period of 24 hours or the like, when an allowable frequency deviation (Δf / f) is specified, if there is a large fluctuation in the oscillation frequency due to aging, the specified allowable frequency deviation cannot be satisfied. ..

For example, as a communication method between a base station and a communication terminal, various methods such as FDD (Frequency Division Duplex) and TDD (Time Division Duplex) have been proposed. In the TDD method, data is transmitted and received in a time-division manner using the same frequency for ascending and descending, and a guard time is set between the time slots assigned to each device. Therefore, in order to realize proper communication, it is necessary to synchronize the time in each device, and accurate absolute time timing is required. That is, in order to provide a wireless communication system in a wide area in mobile phones, terrestrial digital broadcasting, etc., it is necessary to provide a plurality of base stations, and if the time timing shifts between these base stations, Proper communication cannot be realized. However, when the reference signal from GPS or the network disappears or an abnormal holdover occurs, the oscillator side needs to time the absolute time in the absence of the reference signal, and if this time is off, Communication breaks down. For this reason, oscillators used in base stations and the like are required to have extremely high frequency stability even during the holdover period. Therefore, high-precision correction is also required for aging correction that compensates for frequency fluctuations due to aging.

FIG. 2 is a diagram illustrating aging correction at the time of holdover. The frequency control data generation unit 40 generates frequency control data by performing phase comparison (comparison calculation) between the input signal (input clock signal) based on the oscillation signal and the reference signal (reference clock signal) from GPS or the network. To do. During normal operation, the selector 48 outputs the frequency control data from the frequency control data generation unit 40 to the oscillation signal generation circuit 140. The D / A conversion unit 80 of the oscillation signal generation circuit 140 converts this frequency control data into a frequency control voltage and outputs it to the oscillation circuit 150. The oscillation circuit 150 vibrates the oscillator XTAL at an oscillation frequency corresponding to this frequency control voltage to generate an oscillation signal. The frequency control data generation unit 40 and the oscillation signal generation circuit 140 form a loop of the PLL circuit, and it becomes possible to synchronize the input signal based on the oscillation signal with the reference signal.

The detection circuit 47 performs a reference signal detection operation to detect a holdover in which the reference signal disappears or becomes abnormal. When the holdover is detected, the aging correction unit 56 performs aging correction on the frequency control data held in the register 49 to compensate for the frequency fluctuation due to aging. Then, the oscillation signal generation circuit 140 oscillates the oscillator XTAL at the oscillation frequency corresponding to the aging-corrected frequency control data to generate an oscillation signal. As a result, the oscillation signal of self-propelled oscillation can be supplied as a reference signal source for electronic devices such as base stations.

B1 of FIG. 3 shows the aging characteristics of the ideal oscillation frequency when holdover occurs. On the other hand, B2 (dotted line) shows a characteristic that the oscillation frequency fluctuates due to aging. B3 is the fluctuation range of the oscillation frequency due to aging. Further, B4 in FIG. 4 shows the transition of the frequency control voltage for approaching the characteristics of B1 when the holdover occurs. On the other hand, B5 (dotted line) indicates a state in which the frequency voltage control is constant from the time when the reference signal disappears or an abnormality occurs.

Aging correction is performed in order to make the characteristic shown in B2 of FIG. 3 close to the ideal characteristic as shown in B1. For example, if the frequency control voltage is changed as shown in B4 of FIG. 4 by aging correction, the characteristic shown in B2 of FIG. 3 can be corrected to be close to the ideal characteristic shown in B1, and the correction accuracy can be improved, for example. For example, the characteristic shown in B2 can be corrected to the ideal characteristic shown in B1. On the other hand, if the aging correction is not performed as shown in B5 of FIG. 4, the oscillation frequency fluctuates during the holdover period as shown in B2 of FIG. 3, and for example, the required specifications for the holdover performance are shown in FIG. If it is B1 shown in the above, the requirement cannot be satisfied.

For example, the holdover time θ _tot , which represents the amount of time _dilation (total amount) based on the fluctuation of the oscillation frequency during the holdover period, can be expressed by the following equation (1).

Here, T ₁ represents the elapsed time of aging due to holdover. f ₀ is the nominal oscillation frequency, and Δf / f ₀ is the frequency deviation. In the above equation (1), T ₁ × f ₀ represents the total number of clocks, and (Δf / f ₀ ) × (1 / f ₀ ) represents the amount of timing deviation in one clock. Then, using the holdover time θ _tot and the elapsed time T ₁ , the frequency deviation Δf / f ₀ can be expressed as in the above equation (2).

As shown in B6 of FIG. 5, it is assumed that the frequency deviation Δf / f ₀ changes with a constant slope linearly with respect to the elapsed time. In this case, as shown in B7 of FIG. 5, the holdover time θ _tot becomes quadratically long as the elapsed time T ₁ becomes longer.

For example, in the case of the TDD method, the holdover time is required to be, for example, θ _tot <1.5 μs in order to prevent the time slots in which the guard times are set from overlapping. Therefore, as is clear from the above equation (2), a very small value is required for the frequency deviation Δf / f ₀ allowed for the oscillator. In particular, the allowable frequency deviation, as the elapsed time T ₁ is longer, a small value is required. For example, if the time assumed as the time from the holdover occurrence timing to the recovery timing from the holdover due to the maintenance work is, for example, T ₁ = 24 hours, a very small value is required as the allowable frequency deviation. It will end up being. Since the frequency deviation Δf / f ₀ includes, for example, a temperature-dependent frequency deviation and a frequency deviation due to aging, extremely high-precision aging correction is required to satisfy the above requirements.

2. 2. Configuration of Circuit Device FIG. 6 shows the basic circuit configuration of the circuit device of the present embodiment. As shown in FIG. 6, the circuit apparatus of this embodiment includes a processing unit 50 and an oscillation signal generation circuit 140. Further, a frequency control data generation unit 40 (in a broad sense, a phase comparison unit) can be included. The configuration of the circuit device of the present embodiment is not limited to the configuration of FIG. 6, and various components such as omitting some components (for example, frequency control data generation unit) or adding other components are added. It is possible to carry out transformation.

The processing unit 50 performs various signal processing. For example, signal processing is performed on the frequency control data DFCI (frequency control code). Specifically, the processing unit 50 (digital signal processing unit) performs signal processing (digital signal processing) such as aging correction processing, Kalman filter processing, and temperature compensation processing as needed. Then, the frequency control data DFCQ after signal processing is output. The processing unit 50 includes a holdover processing unit 52 (holdover processing circuit or program module), a Kalman filter unit 54 (Kalman filter processing circuit or program module), and an aging correction unit 56 (aging correction processing circuit or program module). Can be included. The processing unit 50 may be realized by an ASIC circuit such as a gate array, or may be realized by a processor (DSP, CPU) and a program (program module) operating on the processor.

The oscillator XTAL is, for example, a thick sliding vibration type crystal oscillator such as an AT cut type or an SC cut type, or a piezoelectric vibrator such as a bending vibration type. As an example, the oscillator XTAL is a type provided in a constant temperature bath of an oven type oscillator (OCXO), but is not limited to this, and may be a type of oscillator for TCXO not provided with a constant temperature bath. .. The oscillator XTAL may be a resonator (electromechanical resonator or electrical resonance circuit). As the oscillator XTAL, a SAW (Surface Acoustic Wave) resonator as a piezoelectric oscillator, a MEMS (Micro Electro Mechanical Systems) oscillator as a silicon oscillator, or the like can be adopted. As the substrate material of the transducer XTAL, a piezoelectric single crystal such as quartz, lithium tantalate, or lithium niobate, a piezoelectric material such as piezoelectric ceramics such as lead zirconate titanate, or a silicon semiconductor material can be used. As the exciting means of the oscillator XTAL, one by a piezoelectric effect may be used, or electrostatic drive by a Coulomb force may be used.

The oscillation signal generation circuit 140 generates the oscillation signal OSCK. For example, the oscillation signal generation circuit 140 uses the frequency control data DFCQ (frequency control data after signal processing) from the processing unit 50 and the oscillator XTAL to generate the oscillation signal OSCK of the oscillation frequency set by the frequency control data DFCQ. To do. As an example, the oscillation signal generation circuit 140 oscillates the oscillator XTAL at the oscillation frequency set by the frequency control data DFCQ to generate the oscillation signal OSCK.

The oscillation signal generation circuit 140 may be a circuit that generates an oscillation signal OSCK by a direct digital synthesizer method. For example, the oscillation signal OSCK of the oscillation frequency set by the frequency control data DFCQ may be digitally generated by using the oscillation signal of the oscillator XTAL (oscillation source of the fixed oscillation frequency) as a reference signal.

The oscillation signal generation circuit 140 can include a D / A conversion unit 80 and an oscillation circuit 150. However, the oscillation signal generation circuit 140 is not limited to such a configuration, and various modifications such as omitting some of the components or adding other components can be performed.

The D / A conversion unit 80 performs D / A conversion of the frequency control data DFCQ (output data of the processing unit) from the processing unit 50. The frequency control data DFCQ input to the D / A conversion unit 80 is frequency control data (frequency control code) after signal processing by the processing unit 50 (for example, after aging correction, temperature compensation, or Kalman filter processing). As the D / A conversion method of the D / A conversion unit 80, for example, a resistance string type (resistor division type) can be adopted. However, the D / A conversion method is not limited to this, and various methods such as a resistance ladder type (R-2R ladder type, etc.), a capacitance array type, and a pulse width modulation type can be adopted. Further, the D / A conversion unit 80 can include a control circuit, a modulation circuit (dither modulation, PWM modulation, etc.), a filter circuit, and the like in addition to the D / A converter.

The oscillation circuit 150 generates an oscillation signal OSCK by using the output voltage VQ of the D / A conversion unit 80 and the oscillator XTAL. The oscillation circuit 150 is connected to the oscillator XTAL via the first and second oscillator terminals (oscillator pads). For example, the oscillation circuit 150 generates an oscillation signal OSCK by oscillating an oscillator XTAL (piezoelectric oscillator, resonator, etc.). Specifically, the oscillation circuit 150 oscillates the oscillator XTAL at an oscillation frequency in which the output voltage VQ of the D / A conversion unit 80 is a frequency control voltage (oscillation control voltage). For example, when the oscillation circuit 150 is a circuit (VCO) that controls the oscillation of the oscillator XTAL by voltage control, the oscillation circuit 150 is a variable capacitance capacitor (varicap or the like) whose capacitance value changes according to the frequency control voltage. ) Can be included.

As described above, the oscillation circuit 150 may be realized by the direct digital synthesizer method. In this case, the oscillation frequency of the oscillator XTAL becomes the reference frequency, which is different from the oscillation frequency of the oscillation signal OSCK. ..

The frequency control data generation unit 40 generates frequency control data DFCI. For example, the frequency control data DFCI is generated by comparing the input signal based on the oscillation signal OSCK with the reference signal RFCK. The generated frequency control data DFCI is input to the processing unit 50. Here, the input signal based on the oscillation signal OSCK may be the oscillation signal OSCK itself, or may be a signal generated from the oscillation signal OSCK (for example, a divided signal). In the following, the case where the input signal is the oscillation signal OSCK itself will be described mainly as an example.

The frequency control data generation unit 40 includes a phase comparison unit 41 and a digital filter unit 44. The phase comparison unit 41 (comparison calculation unit) is a circuit that performs phase comparison (comparison calculation) between the oscillation signal OSCK, which is an input signal, and the reference signal RFCK, and includes a counter 42 and a TDC 43 (time digital converter).

The counter 42 generates digital data corresponding to the integer part of the result of dividing the reference frequency (for example, 1 Hz) of the reference signal RFCK by the oscillation frequency of the oscillation signal OSCK. The TDC 43 generates digital data corresponding to a decimal part of the division result. The TDC 43 includes, for example, a plurality of latch circuits that latch a plurality of delay elements and a plurality of delay clock signals output by the plurality of delay elements at the edge (High) timing of the reference signal RFCK, and output signals of the plurality of latch circuits. Includes a circuit that generates digital data corresponding to the fractional part of the division result by coding. Then, the phase comparison unit 41 adds the digital data corresponding to the integer part from the counter 42 and the digital data corresponding to the decimal part from the TDC 43, and detects the phase error with the set frequency. Then, the digital filter unit 44 performs the phase error smoothing process to generate the frequency control data DFCI. For example, when the frequency of the oscillation signal OSCK is FOS, the frequency of the reference signal RFCK is FRF, and the frequency division number (division ratio) corresponding to the set frequency is FCW, the frequency is such that the relationship of FOS = FCW × FRF is established. Control data DFCI is generated. Alternatively, the counter 42 may count the number of clocks of the oscillation signal OSCK. That is, the counter 42 performs a counting operation with an input signal based on the oscillation signal OSCK. Then, even if the phase comparison unit 41 compares the count value of the counter 42 in the n period of the reference signal RFCK (n is an integer that can be set to 2 or more) with the expected value (n × FCW) of the count value by an integer. Good. For example, the difference between the expected value and the count value of the counter 42 is output from the phase comparison unit 41 as phase error data.

The configuration of the frequency control data generation unit 40 is not limited to the configuration shown in FIG. 6, and various modifications can be performed. For example, the phase comparison unit 41 may be composed of a phase comparator of an analog circuit, or the digital filter unit 44 may be composed of a filter unit (loop filter) of an analog circuit. Further, the processing unit 50 may perform the processing of the digital filter unit 44 (the smoothing processing of the phase error data). For example, the processing unit 50 performs the processing of the digital filter unit 44 in a time division with other processing (holdover processing, Kalman filter processing, etc.). For example, the processing unit 50 performs a filtering process (smoothing process) on the phase comparison result (phase error data) of the phase comparison unit 41.

Further, in FIG. 6, the circuit device has a structure in which the frequency control data generation unit 40 is built in, but the frequency control data generation unit may be a circuit provided outside the circuit device. In this case, in FIG. 7, which will be described later, the frequency control data DFCI may be input to the processing unit 50 from the frequency control data generation unit provided externally via the digital I / F unit 30.

As described above, in the present embodiment, the processing unit 50 (processor) performs signal processing on the frequency control data DFCI based on the phase comparison result between the input signal based on the oscillation signal OSCK and the reference signal RFCK. That is, the processing unit 50 performs signal processing on the frequency control data DFCI based on the phase comparison result in the phase comparison unit 41. For example, the processing unit 50 receives the frequency control data DFCI from the frequency control data generation unit 40 that compares the input signal based on the oscillation signal OSCK with the reference signal RFCK to generate the frequency control data DFCI. The processing unit 50 may input the phase comparison result of the phase comparison unit 41 and perform filter processing (processing of the digital filter unit 44) on the phase comparison result. Then, the processing unit 50 (processor) estimates the true value of the frequency control data DFCI based on the phase comparison result by Kalman filter processing in the period before the loss of the reference signal or the holdover due to the abnormality is detected. Perform processing. This true value is a true value estimated by Kalman filtering, and is not necessarily a true true value. The Kalman filter process is executed by the Kalman filter unit 54. Further, the control process by detecting the holdover is executed by the holdover processing unit 52.

Then, when the holdover is detected, the processing unit 50 (processor) holds the true value at the timing corresponding to the holdover detection timing. The timing for holding this true value may be the holdover detection timing itself, the timing before the timing, or the like. Then, the processing unit 50 generates aging-corrected frequency control data DFCQ by performing arithmetic processing based on the held true value. The generated frequency control data DFCQ is output to the oscillation signal generation circuit 140. The generation process of the aging-corrected frequency control data DFCQ is executed by the aging correction unit 56.

For example, during the normal operation period, the processing unit 50 performs signal processing such as temperature compensation processing on the frequency control data DFCI based on the phase comparison result, and transmits the frequency control data DF CQ after the signal processing to the oscillation signal generation circuit 140. Output. The oscillation signal generation circuit 140 generates an oscillation signal OSCK by using the frequency control data DFCQ from the processing unit 50 and the oscillator XTAL, and outputs the oscillation signal OSCK to the frequency control data generation unit 40 (phase comparison unit 41). As a result, a loop of the PLL circuit is formed by the frequency control data generation unit 40 (phase comparison unit 41), the oscillation signal generation circuit 140, and the like, and an accurate oscillation signal OSCK phase-synchronized with the reference signal RFCK can be generated.

In the present embodiment, the Kalman filter unit 54 of the processing unit 50 operates even in the normal operation period before the holdover is detected, and the Kalman filter processing for the frequency control data DFCI is executed. That is, a process of estimating the true value with respect to the observed value of the frequency control data DFCI by the Kalman filter process is performed.

When the holdover is detected, the processing unit 50 holds the true value at the timing corresponding to the holdover detection timing. Specifically, the aging correction unit 56 holds this true value. Then, the aging correction unit 56 generates the aging-corrected frequency control data DFCQ by performing arithmetic processing based on the held true value.

In this way, the aging correction is performed based on the true value at the timing corresponding to the holdover detection timing, so that the accuracy of the aging correction can be significantly improved. That is, it becomes possible to realize aging correction in consideration of the influence of observation noise and system noise.

When the oscillation signal generation circuit 140 recovers from the holdover, the oscillation signal generation circuit 140 generates the oscillation signal OSCK based on the frequency control data DFCQ based on the phase comparison result. For example, the oscillation signal OSCK is generated based on the frequency control data DFCQ input from the frequency control data generation unit 40 (phase comparison unit 41) via the processing unit 50. For example, when the disappeared state or abnormal state of the reference signal RFCK is resolved, the holdover state is released and the holdover is restored. In this case, the operation of the circuit device returns to the normal operation. Then, in the oscillation signal generation circuit 140, instead of the frequency control data DFCQ generated by the processing unit 50 performing aging correction, the frequency control data DFCQ (temperature) input from the frequency control data generation unit 40 via the processing unit 50. The oscillation signal OSCK is generated based on the frequency control data after signal processing such as compensation processing).

Further, the processing unit 50 generates aging-corrected frequency control data DFCQ by performing arithmetic processing (arithmetic processing for compensating for frequency change due to aging) in which a correction value is added to the held true value. For example, with respect to the true value at the timing corresponding to the holdover detection timing, the correction value (correction value for canceling the frequency change due to the aging rate) corresponding to the aging rate (aging gradient, aging coefficient) is set for each predetermined timing. The aging-corrected frequency control data DFCQ is generated by sequentially adding to. The addition process of the present embodiment includes a subtraction process which is a process of adding a negative value.

For example, the correction value in the time step k is D (k), and the aging-corrected frequency control data in the time step k is AC (k). In this case, the processing unit 50 obtains the aging-corrected frequency control data AC (k + 1) in the time step k + 1 by AC (k + 1) = AC (k) + D (k). The processing unit 50 performs such addition processing of the correction value D (k) for each time step until the return timing (release timing) from the holdover.

Further, the processing unit 50 performs arithmetic processing for adding the correction value after the filter processing to the true value. For example, the correction value D (k) is subjected to a filter process such as a low-pass filter process, and the correction value D'(k) after the filter process is sequentially added to the true value. Specifically, the arithmetic processing of AC (k + 1) = AC (k) + D'(k) is performed.

Further, the processing unit 50 obtains a correction value based on the observation residual in the Kalman filter processing. For example, the processing unit 50 performs a process of estimating the correction value of the aging correction based on the observation residual in the period before the holdover is detected. For example, when the observation residual is ek, the correction value D (k) is estimated by performing the process of D (k) = D (k-1) + E · ek. Here, E is, for example, a constant, but Kalman gain may be used instead of the constant E. Then, the aging-corrected frequency control data DFCQ is generated by holding the correction value at the timing corresponding to the holdover detection timing and performing the arithmetic processing of adding the held correction value to the true value.

FIG. 7 shows a detailed configuration example of the circuit device of the present embodiment. In FIG. 7, the temperature sensor 10, the A / D conversion unit 20, the digital I / F unit 30, the register unit 32, and the storage unit 34 are further provided with respect to the configuration of FIG. The configuration of the circuit device is not limited to the configuration shown in FIG. 7, and various modifications such as omitting some of the components or adding other components can be performed. For example, a temperature sensor provided outside the circuit device may be used as the temperature sensor 10.

The temperature sensor 10 outputs the temperature detection voltage VTD. Specifically, a temperature-dependent voltage that changes according to the temperature of the environment (circuit device) is output as the temperature detection voltage VTD. A specific configuration example of the temperature sensor 10 will be described later.

The A / D conversion unit 20 performs A / D conversion of the temperature detection voltage VTD from the temperature sensor 10 and outputs the temperature detection data DTD. For example, the digital temperature detection data DTD (A / D result data) corresponding to the A / D conversion result of the temperature detection voltage VTD is output. As the A / D conversion method of the A / D conversion unit 20, for example, a sequential comparison method or a method similar to the sequential comparison method can be adopted. The A / D conversion method is not limited to such a method, and various methods (counting type, parallel comparison type, series-parallel type, etc.) can be adopted.

The digital I / F unit (interface unit) 30 is an interface for inputting / outputting digital data between a circuit device and an external device (microcomputer, controller, etc.). The digital I / F unit 30 can be realized by, for example, a synchronous serial communication method using a serial clock line and a serial data line. Specifically, it can be realized by an I2C (Inter-Integrated Circuit) method, a 3-wire or 4-wire SPI (Serial Peripheral Interface) method, or the like. The I2C method is a synchronous serial communication method in which communication is performed by two signal lines, a serial clock line SCL and a bidirectional serial data line SDA. A plurality of slaves can be connected to the I2C bus, and the master specifies the address of the individually determined slave, selects the slave, and then communicates with the slave. The SPI system is a synchronous serial communication system that communicates with the serial clock line SCK and two unidirectional serial data lines SDI and SDO. A plurality of slaves can be connected to the SPI bus, but in order to identify them, the master needs to select the slave using the slave select line. The digital I / F unit 30 is composed of an input / output buffer circuit, a control circuit, and the like that realize these communication methods.

The register unit 32 is a circuit composed of a plurality of registers such as a status register, a command register, and a data register. The external device of the circuit device accesses each register of the register section 32 via the digital I / F section 30. Then, the external device uses the register of the register unit 32 to check the status of the circuit device, issue a command to the circuit device, transfer data to the circuit device, and transfer data from the circuit device. It can be read out.

The storage unit 34 stores various types of information necessary for various types of processing and operation of the circuit device. This storage unit 34 can be realized by, for example, a non-volatile memory. As the non-volatile memory, for example, EEPROM or the like can be used. As the EEPROM, for example, a MONOS (Metal-Oxide-Nitride-Oxide-Silicon) type memory or the like can be used. For example, a flash memory using a MONOS type memory can be used. Alternatively, another type of memory such as a floating gate type may be used as the EEPROM. The storage unit 34 may be any as long as it can hold and store information even when the power supply is not supplied, and can be realized by, for example, a fuse circuit or the like.

In addition to the holdover processing unit 52, the Kalman filter unit 54, and the aging correction unit 56, the processing unit 50 further includes a temperature compensation unit 58 (temperature compensation processing circuit or program module) in this case. The temperature compensation unit 58 (processing unit 50) performs temperature compensation processing for the oscillation frequency based on the temperature detection data DTD from the A / D conversion unit 20. Specifically, the temperature compensation unit 58 changes the temperature based on the temperature detection data DTD (temperature-dependent data) that changes according to the temperature and the coefficient data for the temperature compensation processing (data of the coefficient of the approximation function). If there is, temperature compensation processing is performed to reduce the fluctuation of the oscillation frequency.

The reference signal RFCK is input to the circuit device via the terminal TRFCK (pad) which is an external connection terminal of the circuit device. The signal PLOCK notifying whether or not the external PLL circuit is in the locked state is input to the circuit device via the terminal TPLOCK (pad) which is an external connection terminal of the circuit device.

Then, the storage unit 34 stores the system noise constant (V) for setting the system noise of the Kalman filter processing and the observation noise constant (W) for setting the observation noise of the Kalman filter processing. For example, at the time of manufacturing and shipping a product (oscillator, etc.), measurement (inspection) is performed to monitor various information such as oscillation frequency. Then, based on this measurement result, the system noise constant and the observed noise constant are determined and written in the storage unit 34 realized by, for example, a non-volatile memory. In this way, it is possible to set the system noise constant and the observed noise constant that reduce the adverse effects due to the element variation.

Further, the processing unit 50 is in a holdover state based on the voltage of the input terminal to which the holdover detection signal is input or the holdover detection information input via the digital I / F unit 30. Judge whether or not. The holdover processing unit 52 performs these determination processes. For example, the holdover processing unit 52 has a circuit of a state machine, and the state transition of the state machine is executed based on various signals and information. Then, it is determined that the holdover state has been reached based on the voltage of the input terminal into which the holdover detection signal is input, the holdover detection information input via the digital I / F unit 30, and the like. , The state of the state machine transitions to the holdover state. Then, various processes (aging correction, etc.) at the time of holdover are executed.

As the holdover detection signal, for example, a reference signal RFCK or a signal PLOCK can be assumed. In this case, the processing unit 50 determines whether or not the holdover state has been reached based on the voltage of the terminal TRFCK to which the reference signal RFCK is input and the voltage of the terminal TPLOCK to which the signal PLOCK is input.

For example, when the PLL circuit is formed by the frequency control data generation unit 40 provided inside the circuit device, whether or not the holdover state is reached based on the voltage of the terminal TRFCK to which the reference signal RFCK is input. Can be judged. For example, the processing unit 50 determines whether or not the holdover state has been reached when it is detected that the reference signal RFCK has disappeared or is in an abnormal state based on the voltage of the terminal TRFCK.

On the other hand, when the PLL circuit is formed by the frequency control data generation unit provided outside the circuit device, whether or not the holdover state is reached is determined based on the voltage of the terminal TPLOCK to which the signal PLOCK is input. I can judge. For example, an external device (a device that controls an external PLL circuit) outputs a signal PLOCK notifying whether or not the external PLL circuit is in the locked state to the circuit device. Then, for example, when it is determined by the signal PLOCK that the external PLL circuit is not in the locked state, the processing unit 50 determines that it is in the holdover state. In addition to the signal PLOCK, the reference signal RFCK may also be used to determine whether or not the holdover state has been reached. The external PLL circuit is, for example, a PLL circuit composed of a frequency control data generation unit provided outside the circuit device, an oscillation signal generation circuit 140 of the circuit device, and the like.

Further, when the PLL circuit is formed by the frequency control data generation unit provided outside the circuit device, the holdover state is based on the holdover detection information input via the digital I / F unit 30. You may judge whether or not it has become. For example, when an external device (for example, a microcomputer) that controls an external PLL circuit determines that a holdover state has occurred due to a loss or abnormality of a reference signal, the holdover detection information is transmitted via the digital I / F unit 30. It is set in the register (notification register) of the register unit 32. The processing unit 50 determines whether or not the holdover state has been reached by reading the holdover detection information set in this register. In this way, it is not necessary to newly provide a terminal for detecting holdover, and the number of terminals of the circuit device can be reduced.

3. 3. Aging correction using Kalman filter processing In this embodiment, an aging correction method using Kalman filter processing is adopted. Specifically, in the present embodiment, the true value of the frequency control data (oscillation frequency) with respect to the observed value is estimated by Kalman filter processing in the period before the holdover is detected. When a holdover is detected, the true value at the timing (time point) corresponding to the holdover detection timing is held, and the arithmetic processing based on the held true value is performed to realize the aging correction.

FIG. 8 is a diagram showing an example of the measurement result of the fluctuation of the oscillation frequency due to aging. The horizontal axis is the elapsed time (aging time), and the vertical axis is the frequency deviation (Δf / f ₀ ) of the oscillation frequency. As shown in C1 of FIG. 8, the measured values, which are observed values, have large variations due to system noise and observed noise. This variation also includes variation due to the environmental temperature.

In this embodiment, in order to correctly obtain the true value in such a situation where the measured values vary greatly, the state is estimated by Kalman filter processing (for example, linear Kalman filter processing).

FIG. 9 shows a time-series state-space model, and the discrete-time state equations of this model are given by the state equations and observation equations of the following equations (3) and (4).

x (k) is the state at time k, and y (k) is the observed value. v (k) is the system noise, w (k) is the observed noise, and A is the system matrix. When x (k) is the oscillation frequency (frequency control data), A corresponds to, for example, the aging rate (aging coefficient). The aging rate represents the rate of change of the oscillation frequency with respect to the elapsed period.

For example, assume that a holdover occurs at the timing shown in C2 of FIG. In this case, the aging correction is performed based on the true state x (k) at the time of C2 when the reference signal RFCK is interrupted and the aging rate (A) corresponding to the slope shown in C3 of FIG. Specifically, the true value x (k) of the oscillation frequency (frequency control data) at the time of C2 is compensated (corrected) for reducing the frequency change due to the aging rate shown in C3, for example, the frequency change. Aging correction is performed by sequentially changing the correction value to be canceled (offset). That is, the true value x (k) is changed by a correction value that cancels the frequency change at the aging rate as shown in B2 of FIG. 3 and obtains the ideal characteristic as shown in B1. By doing so, for example, when the holdover period is 24 hours, the FDV of FIG. 8, which is the fluctuation of the oscillation frequency after the lapse of 24 hours, can be compensated by the aging correction.

Here, the fluctuation of the oscillation frequency (frequency deviation) shown in C1 of FIG. 8 includes one caused by temperature fluctuation and one caused by aging. Therefore, in the present embodiment, for example, by adopting an oven-structured oscillator (OCXO) having a constant temperature bath, fluctuations in the oscillation frequency due to temperature fluctuations are minimized. Further, using the temperature sensor 10 and the like shown in FIG. 7, a temperature compensation process for reducing fluctuations in the oscillation frequency due to temperature fluctuations is executed.

Then, during the period (normal operation period) in which the PLL circuit (internal PLL circuit, external PLL circuit) is synchronized with the reference signal RFCK, the frequency control data (frequency control code) is monitored and the error (system noise, observation noise) is detected. Find the removed true value and hold it in the register. Then, when the lock of the PLL circuit is released due to the disappearance or abnormality of the reference signal RFCK, the aging correction is performed based on the true value (true value with respect to the observed value of the frequency control data) held at the time when the lock is released. Execute. For example, as compensation for reducing the frequency change due to the aging rate, which is the slope of C3 in FIG. 8, for the true value of the held frequency control data, for example, a correction value to be canceled is sequentially added. As a result, the frequency control data DFCQ at the time of self-propelled oscillation during the holdover period is generated, and the oscillator XTAL is oscillated. In this way, the true value at the time of entry of the holdover can be obtained with the minimum error and the aging correction can be performed, so that the holdover performance with the adverse effect due to the aging fluctuation minimized can be realized.

4. Configuration of Processing Unit FIG. 10 shows a detailed configuration example of the processing unit 50. The configuration of the processing unit 50 is not limited to the configuration of FIG. 10, and various modifications such as omitting some of the components or adding other components can be performed.

As shown in FIG. 10, the processing unit 50 includes a Kalman filter unit 54, an aging correction unit 56, a temperature compensation unit 58, selectors 62 and 63, and an adder 65.

The Kalman filter unit 54 receives input of frequency control data DFCI (frequency control data from which environmental fluctuation components have been removed) and executes Kalman filter processing. Then, the ex post facto estimated value x ^{^} (k) corresponding to the true value estimated by the Kalman filter processing is output. In this specification, the hat symbol "^" indicating that the value is an estimated value is appropriately described in two characters.

The Kalman filter process is a process that estimates the optimum state of the system using the observed values acquired from the past to the present, assuming that noise (error) is included in the observed values and variables representing the state of the system. .. Specifically, the state is estimated by repeatedly updating the observation (observation process) and time (prediction process). Observation update is the process of updating the Kalman gain, estimates, and error covariance using the observed values and the results of the time update. Time update is the process of predicting the estimated value and error covariance at the next time using the result of observation update. Although the method using the linear Kalman filter processing is mainly described in this embodiment, it is also possible to adopt the extended Kalman filter processing. The details of the Kalman filter processing of this embodiment will be described later.

In the aging correction unit 56, the ex post facto estimated value x ^{^} (k) and the correction value D'(k) are input from the Kalman filter unit 54. Then, by performing an arithmetic process of adding the correction value D'(k) to the ex post facto estimated value x ^{^} (k) corresponding to the true value of the frequency control data, the AC which is the aging-corrected frequency control data (K) is generated. Here, D'(k) is a correction value D (k) after the filter processing (after the low-pass filter processing). That is, when the correction value (correction value after filtering) in the time step k (time k) is D'(k) and the aging-corrected frequency control data in the time step k is AC (k). , The aging correction unit 56 obtains the aging-corrected frequency control data AC (k + 1) in the time step k + 1 (time k + 1) by AC (k + 1) = AC (k) + D'(k).

The temperature compensation unit 58 receives the temperature detection data DTD, performs temperature compensation processing, and generates temperature compensation data TCODE (temperature compensation code) for keeping the oscillation frequency constant against temperature fluctuations. The temperature detection data DTD is data obtained by A / D conversion unit 20 of FIG. 7 A / D conversion of the temperature detection voltage VTD from the temperature sensor 10.

For example, FIGS. 11, 12, and 13 show examples of initial oscillation frequency temperature characteristics. In these figures, the horizontal axis is the ambient temperature and the vertical axis is the frequency deviation of the oscillation frequency. As shown in FIGS. 11 to 13, the temperature characteristics of the oscillation frequency vary greatly from product sample to product sample. Therefore, in the inspection process at the time of manufacturing and shipping the product (oscillator), the temperature characteristic of the oscillation frequency and the change characteristic of the temperature detection data corresponding to the ambient temperature are measured. Then, based on the measurement result, the coefficients A _{0 to} A ₅ of the polynomial (approximate function) of the following equation (5) are obtained, and the information of the obtained coefficients A _{0 to} A ₅ is stored in the storage unit 34 (nonvolatile memory) of FIG. ) To write and memorize.

In the above equation (5), X corresponds to the temperature detection data DTD (A / D conversion value) obtained by the A / D conversion unit 20. Since the change in the temperature detection data DTD with respect to the change in the ambient temperature is also measured, the ambient temperature and the oscillation frequency can be associated with each other by the approximate function represented by the polynomial in the above equation (5). The temperature compensation unit 58 reads the information of the coefficients A _{0 to} A ₅ from the storage unit 34, and based on the coefficients A _{0 to} A ₅ and the temperature detection data DTD (= X), the calculation of the above equation (5) The process is performed to generate temperature compensation data TCODE (temperature compensation code). This makes it possible to realize a temperature compensation process for keeping the oscillation frequency constant with respect to a change in ambient temperature.

When the logic level of the input signal of the select terminal S is "1" (active), the selectors 62 and 63 select the input signal of the terminal on the "1" side and output it as an output signal. When the logic level of the input signal of the select terminal S is "0" (inactive), the input signal of the terminal on the "0" side is selected and output as an output signal.

The signal KFEN is an enable signal for Kalman filtering. The Kalman filter unit 54 executes the Kalman filter process when the signal KFEN has a logic level of “1” (hereinafter, simply referred to as “1”). The signal PLLLOCK is a signal that becomes "1" when the PLL circuit is in the locked state. The signal HOLDOVER is a signal that becomes "1" during the holdover period in which the holdover is detected. These signals PLLLOCK and HOLDOVER are generated by the circuit of the state machine of the holdover processing unit 52 of FIG.

The signal TCEN is an enable signal for the temperature compensation process. In the following, the case where the signal TCEN is “1” and the selector 63 selects the input signal on the “1” side will be mainly taken as an example. Further, it is assumed that the signal KFEN is also "1".

In the normal operation period, the signal HOLDOVER becomes the logic level "0" (hereinafter, simply referred to as "0"), so that the selector 62 selects the frequency control data DFCI on the "0" terminal side, and this frequency control. The temperature compensation data TCODE is added to the data DFCI by the adder 65, and the frequency control data DFCQ after the temperature compensation processing is output to the oscillation signal generation circuit 140 in the subsequent stage.

On the other hand, in the holdover period, the signal HOLDOVER becomes "1" and the selector 62 selects the AC (k) on the "1" terminal side. AC (k) is aging-corrected frequency control data.

FIG. 14 is a truth table for explaining the operation of the Kalman filter unit 54. When both the signals PLLLOCK and KFEN are "1", the Kalman filter unit 54 executes a true value estimation process (Kalman filter process). That is, when the PLL circuit (internal or external PLL circuit) is in the locked state during the normal operation period, the true value estimation process of the frequency control data DFCI, which is the observed value, is continued.

Then, when the holdover state is reached and the PLL circuit is unlocked and the signal PLLLOCK becomes “0”, the Kalman filter unit 54 holds the previous output state. For example, in FIG. 10, the holdover detection timing (PLL circuit is unlocked) is set as the post-estimation value x ^{^} (k) estimated as the true value of the frequency control data DFCI and the correction value D'(k) for the aging correction. The value at (timing) is retained and output is continued.

During the holdover period, the aging correction unit 56 performs aging correction using the ex post facto estimated value x ^{^} (k) and the correction value D'(k) from the Kalman filter unit 54. Specifically, the post-estimated value x ^{^} (k) and the correction value D'(k) at the holdover detection timing are held, and the aging correction is performed.

Further, in FIG. 10, frequency control data DFCI in which the temperature fluctuation component (in a broad sense, the environment fluctuation component) and the aging fluctuation component from which the temperature fluctuation component is removed is input to the Kalman filter unit 54. The Kalman filter unit 54 performs Kalman filter processing on the frequency control data DFCI from which the temperature fluctuation component (environmental fluctuation component) has been removed, and estimates the true value of the frequency control data DFCI. That is, the ex post facto estimated value x ^{^} (k) is obtained. Then, the aging correction unit 56 performs aging correction based on the post-estimated value x ^{^} (k), which is the estimated true value. More specifically, the aging-corrected frequency control data AC (k) is obtained based on the ex post facto estimated value x ^{^} (k) and the correction value D'(k) from the Kalman filter unit 54. Then, the aging-corrected frequency control data AC (k) is input to the adder 65 via the selector 62, and the adder 65 receives the temperature compensation data TCODE (environmental fluctuation component) with respect to the AC (k). Compensation data) is added.

For example, as shown in the schematic diagram of FIG. 15, when the temperature fluctuates, the frequency control data also fluctuates accordingly as shown in E1. Therefore, if the Kalman filter processing is performed using the frequency control data that fluctuates with the temperature fluctuation as in E1, the true value at the holdover detection timing also fluctuates.

Therefore, in the present embodiment, the frequency control data from which the temperature fluctuation component has been removed is acquired and input to the Kalman filter unit 54. That is, the frequency control data excluding the temperature fluctuation component from the temperature fluctuation component (environmental fluctuation component) and the aging fluctuation component is input to the Kalman filter unit 54. That is, the frequency control data as shown in E2 of FIG. 15 is input. The frequency control data of E2 is the frequency control data in which the temperature fluctuation component is removed and the aging fluctuation component remains.

The Kalman filter unit 54 performs a Kalman filter process on the frequency control data DFCI from which the temperature fluctuation component is removed and the aging fluctuation component remains, so that the post-estimated value x ^{^} estimated as a true value. (K) and the correction value D'(k) for aging correction are obtained. Then, the ex post facto estimated value x ^{^} (k) and the correction value D'(k), which are true values estimated at the holdover detection timing, are held by the aging correction unit 56, and the aging correction is executed.

For example, the frequency control data DFCQ becomes the temperature-compensated frequency control data by performing the process of adding the temperature compensation data TCODE by the adder 65. Therefore, the oscillation signal generation circuit 140 to which the frequency control data DFCQ is input outputs the oscillation signal OSCK of the temperature-compensated oscillation frequency. Therefore, the frequency control data generation unit 40 of FIG. 7, which constitutes the PLL circuit together with the oscillation signal generation circuit 140, sends the frequency control data DFCI from which the temperature fluctuation component has been removed to the processing unit 50 as shown in E2 of FIG. It will be supplied. Then, in the frequency control data DFCI from which the temperature fluctuation component has been removed, as shown in E2 of FIG. 15, an aging fluctuation component that changes with the elapsed time remains. Therefore, if the Kalman filter unit 54 of the processing unit 50 performs the Kalman filter processing on the frequency control data DFCI in which the aging fluctuation component remains, and the aging correction unit 56 performs the aging correction based on the result of the Kalman filter processing, Highly accurate aging correction can be realized.

As a modification of FIG. 10, the calculation process for removing the temperature fluctuation component (environmental fluctuation component) of the frequency control data DFCI is performed without performing the addition processing of the temperature compensation data TCODE in the adder 65. The processed frequency control data DFCI may be input to the Kalman filter unit 54. For example, the configuration of the adder 65 and the selector 63 in FIG. 10 is omitted, and a subtractor for subtracting the temperature compensation data TCODE from the frequency control data DFCI is provided in front of the Kalman filter unit 54, and the output of this subtractor is used as a Kalman filter. Input to unit 54. Further, an adder for adding the output of the aging correction unit 56 and the temperature compensation data TCODE is provided between the aging correction unit 56 and the selector 62, and the output of the adder is input to the terminal on the “1” side of the selector 62. Even with such a configuration, the frequency control data DFCI in which the temperature fluctuation component is removed and only the aging fluctuation component remains can be input to the Kalman filter unit 54.

FIG. 16 shows a detailed configuration example of the aging correction unit 56. Since the signal HOLDOVER becomes "0" during the normal operation period, the selectors 360 and 361 select the "0" terminal side. As a result, the ex post facto estimated value x ^{^} (k) and the correction value D'(k) (correction value after the filter processing) calculated by the Kalman filter unit 54 during the normal operation period are held in the registers 350 and 351 respectively. To.

When the holdover is detected and the signal HOLDOVER becomes "1", the selectors 360 and 361 select the "1" terminal side. As a result, the selector 361 continues to output the correction value D'(k) held in the register 351 at the holdover detection timing during the holdover period.

Then, the adder 340 has a correction value D'(k) held in the register 351 and output from the selector 361 with respect to the ex post facto estimated value x ^{^} (k) held in the register 350 at the holdover detection timing. (Correction value) is sequentially added for each time step. As a result, the aging correction as shown in the following equation (6) is realized.

That is, the correction value D'(k) that cancels (compensates) the frequency change due to the aging rate corresponding to the slope of C3 with respect to the ex post facto estimated value x ^{^} (k) which is the true value held at the timing of C2 in FIG. ) Are sequentially added to realize aging correction.

5. Kalman filter processing Next, the details of the Kalman filter processing of the present embodiment will be described. FIG. 17 shows an example of a Kalman filter model. The equations of state and observations of the model of FIG. 17 are expressed as the following equations (7) and (8).

k represents a time step that is a discrete time. x (k) is the state of the system at time step k (time k), for example an n-dimensional vector. A is called a system matrix. Specifically, A is an n × n matrix, and associates the state of the system in the time step k with the state of the system in the time step k + 1 when there is no system noise. v (k) is system noise. y (k) is the observed value and w (k) is the observed noise. C is an observation coefficient vector (n-dimensional), and T represents a transposed matrix.

In the Kalman filter processing of the models of the above equations (7) and (8), the processing of the following equations (9) to (13) is performed to estimate the true value.

The above equations (9) and (10) are equations for time update (prediction process), and the above equations (11) to (13) are equations for observation update (observation process). Every time the time step k, which is a discrete time, advances by one, the Kalman filter processing time update (Equations (9), (10)) and observation update (Equations (11) to (13)) are performed once. ..

x ^{^} (k) and x ^{^} (k-1) are post-estimated values of the Kalman filter processing in the time steps k and k-1. x ^{^-} (k) is a pre-estimated value predicted before obtaining the observed value. P (k) is the posterior covariance of Kalman filtering process, P ^- (k) is a pre-covariance predicted prior to obtaining observations. G (k) is Kalman gain.

In the Kalman filter processing, the Kalman gain G (k) is obtained by the above equation (11) in the observation update. Further, the ex post facto estimated value x ^{^} (k) is updated by the above equation (12) based on the observed value y (k). Further, the posterior covariance P (k) of the error is updated by the above equation (13).

In the Kalman filter processing, in the time update, as shown in the above equation (9), the next time step is based on the ex post facto estimated value x ^{^} (k-1) in the time step k-1 and the system matrix A. Predict the pre-estimated value x ^{^-} (k) at k. Further, as shown in the above equation (10), in the next time step k based on the posterior covariance P (k-1) in the time step k-1, the system matrix A, and the system noise v (k). pre-covariance P ^- to predict the (k).

By the way, if the Kalman filter processing of the above equations (9) to (13) is to be executed, the processing load of the processing unit 50 becomes excessive, which may lead to an increase in the scale of the circuit device. For example, in order to obtain A of x ^{^-} (k) = Ax ^{^} (k-1) in the above equation (9), extended Kalman filter processing is required. The extended Kalman filter processing has a very heavy processing load, and if the processing unit 50 is to be realized by hardware capable of the extended Kalman filter processing, the circuit area of the processing unit 50 tends to be very large. Therefore, it becomes unsuitable in a situation where miniaturization is strongly required for the circuit device built in the oscillator. On the other hand, if a fixed scalar value is used as the system matrix A, the difficulty in realizing an appropriate aging correction increases.

Therefore, as a solution when it is necessary to avoid such a situation, in the present embodiment, the Kalman filter processing is changed to the following equations (14) to (19) instead of the above equations (9) to (13). It is realized by the following processing. That is, the processing unit 50 (Kalman filter unit 54) executes the Kalman filter processing based on the following equations (14) to (19).

In the present embodiment, since x (k) to be the target of the true value estimation process is the frequency control data and the observed value y (k) is also the frequency control data, C = 1. Further, since the scalar value of A is as close to 1 as possible, the above equation (15) can be used instead of the above equation (10).

As described above, as compared with the case where the extended Kalman filter processing is adopted as the Kalman filter processing, in the Kalman filter processing of the present embodiment, as shown in the above equation (14), the pre-estimated value in the time step k x ^{^-} (k) is obtained by the addition process of the ex post facto estimated value x ^{^} (k-1) and the correction value D (k-1) in the time step k-1. Therefore, it is not necessary to use the extended Kalman filter processing, and it is excellent in that the processing load of the processing unit 50 can be reduced and the increase in the circuit scale can be suppressed.

In this embodiment, the above equation (14) is derived by modifying the equation as follows.

For example, the above equation (20) can be modified like the above equation (21). Here, since (A-1) in the above equation (21) is a very small number, as shown in the above equations (22) and (23), (A-1) and x ^{^} (k-1) are used. , (A-1) · F ₀ can be replaced with an approximation. Then, put the _{(A-1) · F 0} , and the correction value D (k-1).

Then, as shown in the above equation (19), when the time is updated from the time step k-1 to the time step k, the correction value D (k) = D (k-1) + E · (y (k) −x. ^{^-} (k)) = D (k-1) + E · ek is updated. Here, ek = y (k) −x ^{^-} (k) is called the observation residual in the Kalman filter processing. E is a constant. It is also possible to carry out the modification using the Kalman gain G (k) instead of the constant E. That is, D (k) = D (k-1) + G (k) · ek may be set.

As described above, in the equation (19), when the observation residual is ek and the constant is E, the correction value D (k) is obtained by D (k) = D (k-1) + E · ek. By doing so, the correction value D (k) can be updated to reflect the observation residual ek in the Kalman filter processing.

FIG. 18 shows a configuration example of the Kalman filter unit 54. The Kalman filter unit 54 includes adders 300, 301, 302, 303, 304, multiplier 305, registers 310, 311, 312, 313, selectors 320, 321 and filters 330, 331, and arithmetic units 332 and 333. The configuration of the Kalman filter unit 54 is not limited to the configuration shown in FIG. 18, and various modifications such as omitting some of the components or adding other components can be performed. For example, processing of adders 300 to 304 and the like may be realized by time division processing by one arithmetic unit.

The arithmetic processing of the above equation (14) is executed by the adder 304 and the register 312. The information of the system noise constant V for setting the system noise and the observation noise constant W for setting the observation noise is read from the storage unit 34 of FIG. 7 and input to the Kalman filter unit 54 (processing unit 50). Will be done. Then, the adder 300 and the register 310 execute the arithmetic processing of the above equation (15). Further, the arithmetic unit 332 executes the arithmetic processing of the above equation (16) to obtain the Kalman gain G (k). Then, based on the obtained Kalman gain G (k), the adder 301, the multiplier 305, and the adder 302 execute the arithmetic processing of the above equation (17). Further, the arithmetic unit 333 executes the arithmetic processing of the above equation (18) to obtain the posterior covariance P (k).

Further, the adder 303, the register 311 and the filter 330 execute the arithmetic processing of the above equation (19). The information of the constant E input to the filter 330 is read out from the storage unit 34 of FIG. The constant E corresponds to the aging rate correction coefficient (filter constant). For example, the filter 330 can realize the E · (y (k) −x ^{^-} (k)) of the above equation (19) by adjusting the gain based on the constant E.

When the signals PLLLOCK and KFEN are "1", the selectors 320 and 321 select the input signal of the terminal on the "1" side, respectively. The output signal of the selector 320 is held in the register 313. Therefore, when the signal PLLLOCK changes from "1" to "0" in the holdover state, the true value x ^{^} (k) at the holdover detection timing is held in the register 313.

The filter 331 performs a filter process on the correction value D (k). Specifically, the correction value D (k) is subjected to digital low-pass filter processing, and the correction value D'(k) after the filter processing is input to the aging correction unit 56 of FIG. The constant J is the filter constant of the filter 331. The optimum cutoff frequency of the filter 331 is set based on the constant J.

For example, the correction value D (k) that compensates for the frequency change due to the aging rate has fine fluctuations as is clear from FIG. Therefore, if the correction value D (k) having such fluctuations is added to the true value, the accuracy of the aging correction is lowered.

In this respect, in the present embodiment, since the correction value D'(k) after the filtering process is added to the true value, more accurate aging correction can be realized.

As described above, in the present embodiment, as shown in the above equation (14), the processing unit 50 updates the pre-estimated value of the Kalman filter processing (time update), and the pre-estimated value x ^{^} at the current timing. ^- (K) is obtained by the addition process of the ex post facto estimated value x ^{^} (k-1) and the correction value D (k-1) at the previous timing. Then, based on the result of the Kalman filter processing, the aging correction of the frequency control data is performed. That is, the ex post facto estimated value x ^{^} (k-1) and the correction value D (k-1) in the time step k-1 which is the previous timing are added, and the time step k which is the current timing is used. The pre-estimated value x ^{^-} (k) of is obtained by x ^{^-} (k) = x ^{^} (k-1) + D (k-1).

Then, the processing unit 50 (aging correction unit 56) performs aging correction based on the result (true value, correction value) of this Kalman filter processing. That is, when the correction value in the time step k is D (k) (or D'(k)) and the aging-corrected frequency control data in the time step k is AC (k), the time step k + 1 is used. The aging-corrected frequency control data AC (k + 1) is obtained by AC (k + 1) = AC (k) + D (k) (or AC (k) + D'(k)).

Further, as shown in the above equation (19), the processing unit 50 sets the correction value D (k) at the current timing as the correction value D (k-1) at the previous timing and the observation residue in the Kalman filter processing. It is calculated based on the difference ek. For example, by adding E · ek (or G (k) · ek), which is a value based on the observation residual, to the correction value D (k-1) at the previous timing, this timing The correction value D (k) in is obtained. Specifically, the correction value D (k) at the time step k, which is the current timing, the correction value D (k-1) at the time step k-1, which is the previous timing, and the observation residue in the Kalman filter processing. It is calculated based on the difference ek. For example, when the observation residual is ek and the constant is E, the correction value D (k) is obtained by D (k) = D (k-1) + E · ek.

For example, in the present embodiment, as described with reference to FIG. 15, environmental change component information such as temperature change component information is acquired, and the acquired environmental change component information is used to change the environment among the environmental change component and the aging change component. Acquire frequency control data from which components have been removed. Here, the environmental fluctuation component information may be a power supply voltage fluctuation component, an atmospheric pressure fluctuation component, a gravity fluctuation component, or the like. Then, aging correction is performed based on the frequency control data from which the environmental fluctuation component is removed. Specifically, it is assumed that the environmental change component is temperature. In this case, the temperature, which is the environmental change component information, is based on the temperature detection data DTD obtained by the temperature detection voltage VTD from the temperature sensor 10 of FIG. 7 as the environmental change information acquisition unit for acquiring the environmental change component information. Acquire variable component information. Then, using the acquired temperature fluctuation component information, frequency control data from which the temperature fluctuation component has been removed is acquired. For example, the temperature compensation unit 58 in FIG. 10 acquires the temperature compensation data TCODE, and the adder 65 performs the addition processing of the temperature compensation data TCODE, so that the frequency control data DFCI from which the temperature fluctuation component is removed is the frequency control data generation unit. It is input from 40 and is acquired by the processing unit 50. That is, as shown in E2 of FIG. 15, the frequency control data DFCI in which the temperature fluctuation component remains while the temperature fluctuation component is removed is acquired and input to the Kalman filter unit 54.

The frequency control data from which the environmental fluctuation component has been removed includes, in addition to the frequency control data in a suitable state in which the environmental fluctuation component is completely removed, the environmental fluctuation component at a negligible level is included in the frequency control data. Also includes frequency control data in the state of being.

For example, environmental fluctuation component information such as temperature fluctuation component information or power supply voltage fluctuation component information can be acquired by a temperature sensor, a voltage detection circuit, or the like, which is an environmental fluctuation information acquisition unit that detects environmental fluctuation component information. On the other hand, the aging fluctuation component is a fluctuation component of the oscillation frequency that changes with the passage of time, and it is difficult to directly detect the information of the aging fluctuation component by a sensor or the like.

Therefore, in the present embodiment, environmental change component information such as temperature change component information that can be detected by a sensor or the like is acquired, and the environmental change component is excluded from the environmental change component and the aging change component by using this environmental change component information. Acquire the frequency control data. That is, by performing a process of removing the environmental variable component from the variable component of the frequency control data (for example, an addition process by the adder 65), the frequency control data in which only the aging variable component remains as shown in E2 of FIG. 15 is obtained. Can be obtained. Then, the true value of the frequency control data can be estimated by performing Kalman filter processing or the like based on the frequency control data in which the aging fluctuation component remains. Then, if the aging correction is performed based on the true value estimated in this way, it becomes possible to realize a highly accurate aging correction that could not be realized in the conventional example.

As described above, in the present embodiment, the frequency control data DFCI in which the temperature fluctuation component (environmental fluctuation component) is removed while the aging fluctuation component remains is input to the Kalman filter unit 54. Then, as shown in FIGS. 1 and 8, if the period is limited, it can be assumed that the oscillation frequency changes at a constant aging rate within that period. For example, it can be assumed that the slope changes with a constant inclination as shown in C3 of FIG.

In the present embodiment, the correction value for compensating (cancelling) the frequency change at a constant aging rate due to such an aging fluctuation component is calculated by the formula of D (k) = D (k-1) + E · ek. I'm looking for. That is, the correction value D (k) for compensating for the frequency change due to the aging rate corresponding to the slope of C3 in FIG. 8 is obtained. Here, the aging rate is not constant and changes according to the elapsed time as shown in FIGS. 1 and 8.

In this respect, in the present embodiment, D (k) = D (k-1) + E · ek, based on the observation residual ek = y (k) −x ^{^-} (k) of the Kalman filter processing. The correction value D (k) corresponding to the aging rate is updated. Therefore, it becomes possible to realize the update process of the correction value D (k) that also reflects the change in the aging rate according to the elapsed time. Therefore, it is possible to realize more accurate aging correction.

For example, in FIG. 19, the measured frequency deviation and the predicted frequency deviation are shown in comparison. D1 is the frequency deviation of the actually measured oscillation frequency, and D2 is the frequency deviation of the oscillation frequency predicted by the estimation process of the Kalman filter of the present embodiment. The predicted frequency deviation shown in D2 is within the permissible error range with respect to the measured frequency deviation shown in D1, indicating that highly accurate aging correction is realized by this embodiment.

6. Temperature sensor and oscillation circuit FIG. 20 shows a configuration example of the temperature sensor 10. The temperature sensor 10 of FIG. 20 has a current source IST and a bipolar transistor TRT in which the current from the current source IST is supplied to the collector. The bipolar transistor TRT is a diode connection to which a base is connected to the collector, and a temperature detection voltage VTD having a temperature characteristic is output to a node of the collector of the bipolar transistor TRT. The temperature characteristic of the temperature detection voltage VTD is caused by the temperature dependence of the base-emitter voltage of the bipolar transistor TRT. The temperature detection voltage VTD of the temperature sensor 10 has, for example, a negative temperature characteristic (a first-order temperature characteristic having a negative gradient).

FIG. 21 shows a configuration example of the oscillation circuit 150. The oscillation circuit 150 includes a current source IBX, a bipolar transistor TRX, a resistor RX, a variable capacitance capacitor CX1, a capacitor CX2, and a CX3.

The current source IBX supplies a bias current to the collector of the bipolar transistor TRX. The resistor RX is provided between the collector and the base of the bipolar transistor TRX.

One end of the variable capacitance capacitor CX1 having a variable capacitance is connected to one end of the oscillator XTAL. Specifically, one end of the variable capacitance capacitor CX1 is connected to one end of the oscillator XTAL via a first oscillator terminal (oscillator pad) of the circuit device. One end of the capacitor CX2 is connected to the other end of the oscillator XTAL. Specifically, one end of the capacitor CX2 is connected to the other end of the oscillator XTAL via a second oscillator terminal (oscillator pad) of the circuit device. One end of the capacitor CX3 is connected to one end of the oscillator XTAL, and the other end is connected to the collector of the bipolar transistor TRX.

A base-emitter current generated by the oscillation of the oscillator XTAL flows through the bipolar transistor TRX. When the base-emitter current increases, the collector-emitter current of the bipolar transistor TRX increases, and the bias current branched from the current source IBX to the resistor RX decreases, so that the collector voltage VCX decreases. On the other hand, when the base-emitter current of the bipolar transistor TRX decreases, the collector-emitter current decreases and the bias current branching from the current source IBX to the resistor RX increases, so that the collector voltage VCX rises. This collector voltage VCX is fed back to the oscillator XTAL via the capacitor CX3.

The oscillation frequency of the oscillator XTAL has a temperature characteristic, and this temperature characteristic is compensated by the output voltage VQ (frequency control voltage) of the D / A conversion unit 80. That is, the output voltage VQ is input to the variable capacitance capacitor CX1, and the capacitance value of the variable capacitor CX1 is controlled by the output voltage VQ. When the capacitance value of the variable capacitance capacitor CX1 changes, the resonance frequency of the oscillation loop changes, so that the fluctuation of the oscillation frequency due to the temperature characteristic of the oscillator XTAL is compensated. The variable capacitance capacitor CX1 is realized by, for example, a variable capacitance diode (varicap).

The oscillation circuit 150 of the present embodiment is not limited to the configuration shown in FIG. 21, and various modifications can be made. For example, in FIG. 21, the case where CX1 is used as a variable capacitance capacitor has been described as an example, but CX2 or CX3 may be used as a variable capacitance capacitor controlled by an output voltage VQ. Further, a plurality of CX1 to CX3 may be used as variable capacitance capacitors controlled by VQ.

Further, the oscillation circuit 150 does not have to include all the circuit elements for oscillating the oscillator XTAL. For example, some circuit elements may be configured by discrete components provided outside the circuit device 500, and may be connected to the oscillation circuit 150 via an external connection terminal.

7. Modifications Next, various modifications of the present embodiment will be described. FIG. 22 shows a configuration example of a circuit device of a modified example of the present embodiment.

In FIG. 22, unlike FIG. 7, the oscillation signal generation circuit 140 is not provided with the D / A conversion unit 80. Then, the oscillation frequency of the oscillation signal OSCK generated by the oscillation signal generation circuit 140 is directly controlled based on the frequency control data DFCQ from the processing unit 50. That is, the oscillation frequency of the oscillation signal OSCK is controlled without going through the D / A conversion unit.

For example, in FIG. 22, the oscillation signal generation circuit 140 has a variable capacitance circuit 142 and an oscillation circuit 150. The oscillation signal generation circuit 140 is not provided with the D / A conversion unit 80 of FIG. 7. Then, instead of the variable capacitance capacitor CX1 of FIG. 21, this variable capacitance circuit 142 is provided, and one end of the variable capacitance circuit 142 is connected to one end of the oscillator XTAL.

The capacitance value of the variable capacitance circuit 142 is controlled based on the frequency control data DFCQ from the processing unit 50. For example, the variable capacitance circuit 142 has a plurality of capacitors (capacitor arrays) and a plurality of switch elements (switch arrays) whose on / off control of each switch element is controlled based on the frequency control data DFCQ. Each switch element of these plurality of switch elements is electrically connected to each capacitor of the plurality of capacitors. Then, when these a plurality of switch elements are turned on or off, the number of capacitors to which one end of the plurality of capacitors is connected to one end of the oscillator XTAL changes. As a result, the capacitance value of the variable capacitance circuit 142 is controlled, and the capacitance value at one end of the oscillator XTAL changes. Therefore, the capacitance value of the variable capacitance circuit 142 is directly controlled by the frequency control data DFCQ, and the oscillation frequency of the oscillation signal OSCK can be controlled.

Further, when a PLL circuit is configured by using the circuit device of the present embodiment, it is also possible to use a direct digital synthesizer type PLL circuit. FIG. 23 shows an example of a circuit configuration in the case of the direct digital synthesizer system.

The phase comparison unit 380 (comparison calculation unit) performs phase comparison (comparison calculation) between the reference signal RFCK and the oscillation signal OSCK (input signal based on the oscillation signal). The digital filter unit 382 performs a phase error smoothing process. The configuration and operation of the phase comparison unit 380 are the same as those of the phase comparison unit 41 of FIG. 6, and a counter and a TDC (time digital converter) can be included. The digital filter unit 382 corresponds to the digital filter unit 44 in FIG. The numerically controlled oscillator 384 is a circuit that digitally synthesizes an arbitrary frequency and waveform using a reference oscillation signal from a reference oscillator 386 having an oscillator XTAL. That is, instead of controlling the oscillation frequency based on the control voltage from the D / A converter as in VCO, using digital frequency control data and the reference oscillator 386 (oscillator XTAL), any arbitrary arithmetic processing is performed. Generates an oscillation signal OSCK with an oscillation frequency. With the configuration of FIG. 23, a direct digital synthesizer type ADPLL circuit can be realized.

8. Oscillator, Electronic Equipment, Mobile Body FIG. 24 shows a configuration example of an oscillator 400 including the circuit device 500 of this embodiment. As shown in FIG. 24, the oscillator 400 includes an oscillator 420 and a circuit device 500. The oscillator 420 and the circuit device 500 are mounted in the package 410 of the oscillator 400. The terminal of the oscillator 420 and the terminal (pad) of the circuit device 500 (IC) are electrically connected by the internal wiring of the package 410.

FIG. 25 shows a configuration example of an electronic device including the circuit device 500 of the present embodiment. This electronic device includes the circuit device 500 of the present embodiment, an oscillator 420 such as a crystal oscillator, an antenna ANT, a communication unit 510, and a processing unit 520. Further, the operation unit 530, the display unit 540, and the storage unit 550 can be included. The oscillator 400 is composed of the oscillator 420 and the circuit device 500. The electronic device is not limited to the configuration shown in FIG. 25, and various modifications such as omitting some of these components or adding other components can be performed.

Examples of the electronic devices shown in FIG. 25 include network-related devices such as base stations or routers, high-precision measuring devices, GPS built-in clocks, biometric information measuring devices (pulse wave meters, pedometers, etc.), or head-mounted displays. Wearable devices such as devices, mobile information terminals (mobile terminals) such as smartphones, mobile phones, portable game devices, notebook PCs or tablet PCs, content providing terminals that distribute content, and images from digital cameras or video cameras. Various devices such as devices can be assumed.

The communication unit 510 (wireless circuit) performs a process of receiving data from the outside or transmitting data to the outside via the antenna ANT. The processing unit 520 performs control processing of the electronic device, various digital processing of data transmitted and received via the communication unit 510, and the like. The function of the processing unit 520 can be realized by a processor such as a microcomputer.

The operation unit 530 is for the user to perform an input operation, and can be realized by an operation button, a touch panel display, or the like. The display unit 540 displays various types of information, and can be realized by a display such as a liquid crystal or an organic EL. When a touch panel display is used as the operation unit 530, the touch panel display also functions as the operation unit 530 and the display unit 540. The storage unit 550 stores data, and its function can be realized by a semiconductor memory such as RAM or ROM, an HDD (hard disk drive), or the like.

FIG. 26 shows an example of a moving body including the circuit device of the present embodiment. The circuit device (oscillator) of the present embodiment can be incorporated into various moving bodies such as a car, an airplane, a motorcycle, a bicycle, or a ship. The moving body is, for example, a device / device provided with a drive mechanism such as an engine or a motor, a steering mechanism such as a steering wheel or a rudder, and various electronic devices (vehicle-mounted devices), and moves on the ground, in the sky, or on the sea. FIG. 26 schematically shows an automobile 206 as a specific example of the moving body. An oscillator (not shown) having a circuit device and an oscillator of the present embodiment is incorporated in the automobile 206. The control device 208 operates by the clock signal generated by this oscillator. The control device 208 controls the hardness of the suspension according to, for example, the posture of the vehicle body 207, and controls the brakes of the individual wheels 209. For example, the control device 208 may realize the automatic driving of the automobile 206. The device in which the circuit device and the oscillator of the present embodiment are incorporated is not limited to such a control device 208, and can be incorporated in various devices (vehicle-mounted devices) provided in a moving body such as an automobile 206. ..

FIG. 27 is a detailed structural example of the oscillator 400. The oscillator 400 in FIG. 27 is an oscillator having a double oven structure (in a broad sense, an oven structure).

The package 410 is composed of a substrate 411 and a case 412. Various electronic components (not shown) are mounted on the substrate 411. A second container 414 is provided inside the case 412, and a first container 413 is provided inside the second container 414. Then, the vibrator 420 is mounted on the inner side surface (lower side surface) of the upper surface of the first container 413. Further, the circuit device 500, the heater 450, and the temperature sensor 460 of the present embodiment are mounted on the outer surface (upper side surface) of the upper surface of the first container 413. The temperature inside the second container 414 can be adjusted by the heater 450 (heating element), for example. Then, the temperature sensor 460 can detect, for example, the temperature inside the second container 414.

The second container 414 is provided on the substrate 416. The board 416 is a circuit board on which various electronic components can be mounted. A heater 452 and a temperature sensor 462 are mounted on the back surface of the substrate 416 on which the second container 414 is provided. For example, a heater 452 (heating element) can adjust the temperature of the space between the case 412 and the second container 414. Then, the temperature sensor 462 can detect the temperature of the space between the case 412 and the second container 414.

As the heat generating elements of the heaters 450 and 452, for example, a heat generating power bipolar transistor, a heat generating heater MOS transistor, a heat generating resistor, a Peltier element and the like can be used. The heat generation of these heaters 450 and 452 can be controlled by, for example, the oven control circuit of the circuit device 500. As the temperature sensors 460 and 462, for example, a thermistor, a diode, or the like can be used.

In FIG. 27, since the temperature of the vibrator 420 and the like can be adjusted in the constant temperature bath having a double oven structure, the oscillation frequency of the vibrator 420 can be stabilized.

FIG. 28 is a configuration example of a base station (base station device) which is one of electronic devices. The physical layer circuit 600 processes the physical layer in the communication process via the network. The network processor 602 performs processing (link layer, etc.) on a layer higher than the physical layer. The switch unit 604 performs various switching processes of communication processing. The DSP 608 performs various digital signal processing necessary for communication processing. The RF circuit 608 includes a receiving circuit composed of a low noise amplifier (LNA), a transmitting circuit composed of a power amplifier, a D / A converter, an A / D converter, and the like.

The selector 612 outputs either the reference signal RFCK1 from the GPS 610 or the reference signal RFCK2 (clock signal from the network) from the physical layer circuit 600 to the circuit device 500 of the present embodiment as the reference signal RFCK. The circuit device 500 performs a process of synchronizing the oscillation signal (input signal based on the oscillation signal) with the reference signal RFCK. Then, various clock signals CK1, CK2, CK3, CK4, and CK5 having different frequencies are generated and supplied to the physical layer circuit 600, the network processor 602, the switch unit 604, the DSP 606, and the RF circuit 608.

According to the circuit device 500 of the present embodiment, in the base station as shown in FIG. 28, the oscillation signal is synchronized with the reference signal RFCK, and the clock signals CK1 to CK5 having high frequency stability generated based on the oscillation signal. Can be supplied to each circuit of the base station.

Although the present embodiment has been described in detail as described above, those skilled in the art will easily understand that many modifications that do not substantially deviate from the novel matters and effects of the present invention are possible. Therefore, all such modifications are included in the scope of the present invention. For example, a term (temperature fluctuation component, etc.) described at least once in the specification or drawing together with a different term (environmental fluctuation component, etc.) in a broader sense or synonymous is the different term in any part of the specification or drawing. Can be replaced with. All combinations of the present embodiment and modifications are also included in the scope of the present invention. Further, the configuration / operation of circuit devices, oscillators, electronic devices, and moving objects, aging correction processing, Kalman filter processing, holdover processing, temperature compensation processing, etc. are not limited to those described in this embodiment, and various modifications are performed. Is possible.

XTAL ... oscillator, TRFCK, TPLOCK ... terminal,
DFCI, DFCQ ... Frequency control data, VQ ... Output voltage (frequency control voltage),
VTD ... Temperature detection voltage, DTD ... Temperature detection data,
OSCK ... Oscillation signal, RFCK, RFCK1, RFCK2 ... Reference signal,
10 ... Temperature sensor, 20 ... A / D converter, 30 ... Digital I / F section,
32 ... Register unit, 34 ... Storage unit, 40 ... Frequency control data generation unit,
41 ... Phase comparison unit, 42 ... Counter, 43 ... TDC, 44 ... Digital filter unit,
47 ... detection circuit, 48 ... selector, 49 ... register, 50 ... processing unit,
52 ... Holdover processing unit, 54 ... Kalman filter unit,
56 ... Aging correction unit, 58 ... Temperature compensation unit, 62, 63 ... Selector, 65 ... Adder, 80 ... D / A conversion unit, 140 ... Oscillation signal generation circuit, 142 ... Variable capacitance circuit,
150 ... Oscillator circuit, 206 ... Automobile, 207 ... Body, 208 ... Control device, 209 ... Wheels,
300, 301, 302, 303, 304 ... adder, 305 ... multiplier,
310, 311, 312, 313 ... Register, 320, 321 ... Selector,
330, 331 ... Filter, 332, 333 ... Arithmetic,
340 ... adder, 350, 351 ... register, 360, 361 ... selector,
380 ... Phase comparison section, 382 ... Digital filter section,
384 ... Numerically controlled oscillator, 386 ... Reference oscillator,
400 ... oscillator, 410 package, 411 ... board, 412 ... case,
413 ... 1st container, 414 ... 2nd container, 416 ... substrate, 420 ... oscillator,
450, 452 ... heater, 460, 462 ... temperature sensor,
500 ... circuit device, 510 ... communication unit, 520 ... processing unit, 530 ... operation unit,
540 ... Display unit, 550 ... Storage unit,
600 ... Physical layer circuit, 602 ... Network processor, 604 ... Switch section,
606 ... DSP, 608 ... RF circuit, 610 ... GPS, 612 ... selector

Claims (9)

A processing unit that performs signal processing on frequency control data based on the phase comparison result between the input signal based on the oscillation signal and the reference signal, and
An oscillation signal generation circuit that generates the oscillation signal of the oscillation frequency set by the frequency control data after the signal processing by using the frequency control data and the oscillator after the signal processing from the processing unit.
Including
The processing unit
In the period before the disappearance of the reference signal or the holdover due to the abnormality is detected, the true value of the frequency control data based on the phase comparison result with respect to the observed value is estimated by the Kalman filter processing.
If the holdover is detected, holding the true value at the timing corresponding to the detection timing of the holdover, for the true value, adding a correction value to cancel the change in the oscillation frequency due to aging The aging-corrected frequency control data is generated by performing the arithmetic processing to be performed .
The processing unit
When the correction value in the time step k is D (k) and the aging-corrected frequency control data in the time step k is AC (k), the aging-corrected frequency in the time step k + 1 is used. A circuit device characterized in that the control data AC (k + 1) is obtained by AC (k + 1) = AC (k) + D (k) . A processing unit that performs signal processing on frequency control data based on the phase comparison result between the input signal based on the oscillation signal and the reference signal, and
An oscillation signal generation circuit that generates the oscillation signal of the oscillation frequency set by the frequency control data after the signal processing by using the frequency control data and the oscillator after the signal processing from the processing unit.
Including
The processing unit
In the period before the disappearance of the reference signal or the holdover due to the abnormality is detected, the true value of the frequency control data based on the phase comparison result with respect to the observed value is estimated by the Kalman filter processing.
If the holdover is detected, holding the true value at the timing corresponding to the detection timing of the holdover, for the true value, adding a correction value to cancel the change in the oscillation frequency due to aging The aging-corrected frequency control data is generated by performing the arithmetic processing to be performed .
The processing unit
A circuit device characterized in that the correction value is obtained based on the observation residual in the Kalman filter processing . In the circuit device according to claim 1 or 2 .
The processing unit
A circuit device characterized by performing the arithmetic process of adding the correction value after the filter process to the true value. A processing unit that performs signal processing on frequency control data based on the phase comparison result between the input signal based on the oscillation signal and the reference signal, and
An oscillation signal generation circuit that generates the oscillation signal of the oscillation frequency set by the frequency control data after the signal processing by using the frequency control data and the oscillator after the signal processing from the processing unit.
Memory and
Including
The processing unit
In the period before the disappearance of the reference signal or the holdover due to the abnormality is detected, the true value of the frequency control data based on the phase comparison result with respect to the observed value is estimated by the Kalman filter processing.
When the holdover is detected, the true value at the timing corresponding to the detection timing of the holdover is held, and the arithmetic processing based on the true value is performed to obtain the aging-corrected frequency control data. Generate and
The storage unit
A circuit device for storing a system noise constant for setting the system noise of the Kalman filter processing and an observation noise constant for setting the observation noise of the Kalman filter processing . A processing unit that performs signal processing on frequency control data based on the phase comparison result between the input signal based on the oscillation signal and the reference signal, and
An oscillation signal generation circuit that generates the oscillation signal of the oscillation frequency set by the frequency control data after the signal processing by using the frequency control data and the oscillator after the signal processing from the processing unit.
Memory and
Including
The processing unit
In the period before the disappearance of the reference signal or the holdover due to the abnormality is detected, the true value of the frequency control data based on the phase comparison result with respect to the observed value is estimated by the Kalman filter processing.
When the holdover is detected, the true value at the timing corresponding to the detection timing of the holdover is held, and the arithmetic processing based on the true value is performed to obtain the aging-corrected frequency control data. Generate and
The processing unit
It is determined whether or not the holdover state has been reached based on the voltage of the input terminal to which the holdover detection signal is input or the holdover detection information input via the digital interface unit. A circuit device characterized by. In the circuit device according to any one of claims 1 to 5 .
The oscillation signal generation circuit is
A circuit device characterized in that when it recovers from the holdover, the oscillation signal is generated based on the frequency control data based on the phase comparison result. The circuit device according to any one of claims 1 to 6 .
With the oscillator
An oscillator characterized by including. An electronic device comprising the circuit device according to any one of claims 1 to 6 . A moving body including the circuit device according to any one of claims 1 to 6 .