JP6713230B2 - Amusement machine - Google Patents

Description

The present invention relates to gaming machines such as slot machines, pachislot gaming machines, and pachinko gaming machines.

For example, in a pachi-slot gaming machine, there is known a gaming machine including a plurality of reels on each surface of which a plurality of symbols are arranged, a start switch, a stop switch, a control unit, a power supply, and the like. The start switch detects that the start lever has been operated by the player (hereinafter, referred to as “start operation”) on condition that a game medium such as a game medal or coin (hereinafter, medal or the like) has been inserted, It outputs a signal requesting the start of rotation of all reels. The stop switch detects that the stop button provided corresponding to each of the plurality of reels has been pressed by the player (hereinafter referred to as "stop operation"), and requests the stop of the rotation of the corresponding reel. Is output. The driving force of the stepping motor provided corresponding to each of the plurality of reels is transmitted. The control unit controls the operation of the stepping motor based on the signals output by the start switch and the stop switch to rotate each reel and stop it.

When the control unit detects a start operation, it performs a lottery process using a random number on the program (hereinafter referred to as “internal lottery process”), and a result of this lottery (hereinafter referred to as “internal winning combination”) and a stop operation. The rotation of the reel is stopped based on the timing.

In such a gaming machine, a general gaming state, which is a basic gaming state, and a plurality of types of special gaming states that are advantageous to the player based on whether a predetermined condition is satisfied or a lottery result is set, It is configured such that an effect using a decoration lamp, a liquid crystal display device, a sound generating device, or the like is executed in accordance with various game states.

The configuration of the control unit of such a conventional game machine will be described with reference to FIG. 117. The control unit mainly controls a game state setting and a game processing operation by a main control circuit (board) 41, a light transmitted from the main control circuit 41 (hereinafter, referred to as "communication data"), an image or It is composed of a sub-control circuit (board) 42 for realizing a sound effect and peripheral devices such as a reel, a hopper and a start switch which are electrically connected to them.

The main control circuit (board) 41 is a main processing section 50 including a main CPU 51, a main ROM 52, a main RAM 53, etc., a clock path generation circuit 54, and a main board that receives power from a power supply circuit (board) 40 of the gaming machine. A power supply circuit 59 and the like are provided, and a series of control programs such as the internal lottery process, the reel rotation start process, and the reel stop control process described above are executed.

Further, the main CPU 51 executes an interrupt process such as a fixed-cycle interrupt process for transmitting communication data to the sub-control circuit based on an interrupt signal having a constant cycle (for example, 1.1173 msec) after the reel rotation start process. doing. At that time, in the conventional game machine, in the fixed-cycle interrupt processing, 1 byte is transmitted from the main processing unit 50 to the sub control circuit 42 as a serial or parallel signal by an electric cable (Patent Document 1).

As shown in FIG. 7, the sub control circuit 42 includes a sub CPU 91, a sub ROM 92, a sub RAM 93, and the like, and performs processing such as determination and execution of effect contents based on communication data transmitted from the main control circuit 41. There is.

Further, the power supply circuit (substrate) 40 supplies a predetermined power supply voltage required to the main control circuit 41, the sub control circuit 42 and the peripheral devices. In addition, the main processing unit 50 of the main control circuit 41 holds various control data immediately before the power failure as a countermeasure against a so-called power failure in which the power supply from the power circuit 40 is stopped due to a power failure or the like, and the power failure occurs. A measure is taken to return the state of the gaming machine after the recovery to the state immediately before the power is turned off (Patent Document 2).

In addition, in a general game machine, when a predetermined time elapses after an operation on the game machine is no longer detected, an effect that promotes the game is performed using an effect execution unit such as a lamp, a liquid crystal display device, and a speaker. There is.

JP, 2001-70589, A JP, 2001-218948, A

By the way, in the conventional gaming machine, as shown in FIG. 95(b), the power interruption detection signal 122 is prioritized in order to prioritize the power interruption interruption processing over other interruption processing. The interrupt port NMI with the highest frequency is input. On the other hand, the fixed cycle interrupt signal is input to the interrupt port PT0I, but the interrupt request based on this fixed cycle interrupt signal is set to have a lower priority than the interrupt request by the power failure detection signal 122.

Therefore, when the power failure detection signal 122 is input to the interrupt port NMI, the power failure interrupt processing (see FIG. 94) is performed in preference to other interrupt requests based on the fixed-cycle interrupt signal or the like. .. As a result, in the conventional gaming machine, there is a possibility that the fixed-cycle interrupt process is interrupted by the power interruption interrupt process. In that case, incomplete data is created and transmitted, or after the power interruption is restored. There is a problem that it takes time to verify the transmitted data.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a gaming machine that can suppress the creation and transmission of incomplete data even when the power is cut off.

In order to solve the above problems, a gaming machine according to the present invention is provided in the main control circuit including a main CPU that controls a game state setting and a game processing operation, and can store various data. A main RAM having a storage area, and a sub control circuit including a sub CPU capable of controlling an effect based on a command transmitted from the main control circuit are provided, and power is supplied to the main control circuit and the sub control circuit. Possible power supply circuit, a main board power supply circuit provided in the main control circuit for supplying a power supply voltage to the main control circuit, and a power supply voltage provided in the main board power supply circuit and supplied to the main control circuit have a predetermined value. wherein the power interruption detection signal when it becomes less than a and that power interruption detecting means to output the main CPU, and the interrupt port of the plurality of priority of interrupt processing is different provided on the main CPU, before serial main CPU can execute a periodic interrupt process based on the interrupt signal generated at a constant cycle, determine the correctness of this electric disconnection detection signal if the previous SL power interruption detection signal is inputted has a function of, and, in the case of a state where the state of those electrical disconnection detection signal indicates a power interruption sensing more than a certain time, being capable of performing power interruption interrupt processing, the interruption interrupt processing, various after retracts the data is intended to set the access inhibition to the main RAM, the power interruption detection signal output by the pre-Symbol power interruption sensing means, interrupt priority among the plurality of interrupt ports It is characterized in that it is inputted to at least an interrupt port lower than the fixed-cycle interrupt processing.

Further, in the gaming machine according to the present invention, the main CPU sets a power failure flag in the power interruption interrupt processing, and a standby processing of a predetermined time for waiting for the rising of the sub control circuit at power-on. Is performed, the power-on flag is confirmed, and then the power-on process is terminated. The power-off detection signal output by the first power-off detecting means is the plurality of interrupt ports. It is characterized in that it is input to the interrupt port with the lowest priority.

Further, the gaming machine according to the present invention includes a sub-board power supply circuit provided in the sub-control circuit for supplying a power supply voltage to the sub-control circuit, and a sub-side power failure detection signal provided in the sub-board power supply circuit at the time of power failure. Is provided to the sub CPU, and a plurality of interrupt ports provided in the sub CPU and having different interrupt processing priorities are provided. When the power supply voltage supplied to the sub-control circuit is equal to or lower than a predetermined value, the sub-side power failure detection signal is output, and the sub-side power failure detection signal output by the second power failure detection means is The interrupt port having the highest interrupt priority among a plurality of interrupt ports provided in the sub CPU is provided with a variable display unit capable of variably displaying the identification information , and the variable display unit changes the variable information. A gaming machine capable of deriving a game result by starting and stopping display, wherein the main CPU can execute control relating to variable display of the variable display section in the fixed cycle interrupt processing. Is characterized by.
Further, in the gaming machine according to the present invention, the first power failure detection means can output a power failure detection signal when the power supply voltage supplied to the main control circuit becomes equal to or lower than a first threshold value. The second power failure detection means is capable of outputting the sub-side power failure detection signal when the power supply voltage supplied to the sub-control circuit is equal to or lower than a second threshold value, and the first threshold value. Is higher than the second threshold value.

According to the above configuration, the priority of the power interruption interrupt process is set lower than that of other interrupt processes such as the fixed cycle interrupt process, so that the communication data is lost between the main control circuit side and the sub control circuit side. It does not send or send incomplete data. Further, even after the power failure is restored, the processing such as verification of transmitted data, re-transmission, mutual data check, etc. is simplified, so that the gaming machine can be smoothly restarted. Thereby, the reliability and operating rate of the gaming machine can be improved.

According to the embodiments of the present invention, it is possible to provide a gaming machine capable of suppressing the creation and transmission of incomplete data even when the power is cut off.

The functional flowchart of the gaming machine which concerns on embodiment of this invention. The perspective view showing the appearance composition of the game machine concerning the embodiment of the present invention. The perspective view which shows the internal structure of the game machine which concerns on embodiment of this invention. The figure which shows the example of a display of a liquid crystal display device when the game machine which concerns on embodiment of this invention is made into a power saving mode. The figure which shows the modification of the example of a display of a liquid crystal display device when the game machine which concerns on embodiment of this invention is made into a power saving mode. FIG. 3 is a block diagram showing a configuration example of a control unit according to the embodiment of the present invention. FIG. 3 is a block diagram showing a configuration example of a sub control circuit according to the embodiment of the present invention. (A) is a figure which shows the example of transmission of communication data, (b) is a communication data block diagram of a parallel bus, (c) is a packet data block diagram. (A) is a figure which shows the structural example of the main board|substrate power supply circuit which concerns on embodiment of this invention, (b) is a figure which shows the structural example of the sub-board power supply circuit which concerns on embodiment of this invention. The figure which shows the example of the symbol arrangement table which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (1/7) which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (2/7) which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (3/7) which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (4/7) which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (5/7) which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (6/7) which concerns on embodiment of this invention. The figure which shows the example of the symbol combination table (7/7) which concerns on embodiment of this invention. The figure which shows the example of the bonus operation time table which concerns on embodiment of this invention. The figure which shows the example of RT transition table which concerns on embodiment of this invention. The figure which shows the example of RT transition diagram which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table determination table which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for general game states which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for RT1 which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for RT2 which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for RT3 which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for RT4 which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for SB1, 2 which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for RB1 game states which concerns on embodiment of this invention. The figure which shows the example of the internal lottery table for RB8 game state which concerns on embodiment of this invention. The figure which shows the example of the bonus internal winning combination determination table which concerns on embodiment of this invention. The figure which shows the example of the small winning combination / replay internal winning combination determination table (1/4) which concerns on embodiment of this invention. The figure which shows the example of the small winning combination/replay internal winning combination determination table (2/4) which concerns on embodiment of this invention. The figure which shows the example of the small winning combination/replay internal winning combination determination table (3/4) which concerns on embodiment of this invention. The figure which shows the example of the small winning combination/replay internal winning combination determination table (4/4) which concerns on embodiment of this invention. The figure which shows the example of the number selection table for rotation cylinder stop which concerns on embodiment of this invention. The figure which shows the example of the reel stop initialization table which concerns on embodiment of this invention. The figure which shows the example of the control change table at the time of forward pressing which concerns on embodiment of this invention. The figure which shows the example of the stop table for 1st stop at the time of forward pressing which concerns on embodiment of this invention. The figure which shows the example of the stop table A for 2nd and 3rd stop at the time of forward pushing which concerns on embodiment of this invention. The figure which shows the example of the stop table B for 2nd and 3rd stop at the time of forward pushing which concerns on embodiment of this invention. The figure which shows the example of the stop table C for 2nd and 3rd stop at the time of forward pushing which concerns on embodiment of this invention. The figure which shows the example of the stop table at the time of irregular pushing which concerns on embodiment of this invention. The figure which shows the example of the attraction priority table selection table which concerns on embodiment of this invention. The figure which shows the example of the attraction-in priority table which concerns on embodiment of this invention. The figure which shows the example of the search order table which concerns on embodiment of this invention. The figure which shows the example of the correspondence table of a winning combination and stop order which concerns on embodiment of this invention. The figure which shows the example of the symbol corresponding winning operation flag data table which concerns on embodiment of this invention. The figure which shows the example of the display combination storage area which concerns on embodiment of this invention. The figure which shows the example of the game state flag storage area which concerns on embodiment of this invention. The figure which shows the example of the operation stop button storage area which concerns on embodiment of this invention. The figure which shows the example of the pressing order storage area which concerns on embodiment of this invention. The figure which shows the example of the symbol code storage area which concerns on embodiment of this invention. The figure which shows the example of the attraction-in priority data storage area which concerns on embodiment of this invention. The figure which shows the example of the pt in BB lottery table which concerns on embodiment of this invention. The figure which shows the example of the pt lottery table for mode 9 lottery which concerns on embodiment of this invention. 3 is a mode table for explaining modes according to the embodiment of the present invention. The figure which shows the example of the mode transfer lottery table which concerns on embodiment of this invention. The figure which shows the example of the mode transition lottery table at the time of ART termination which concerns on embodiment of this invention. The figure which shows the example of the mode 9 random determination table which concerns on embodiment of this invention. The figure which shows the example of the AT lottery table which concerns on embodiment of this invention. The figure which shows the example of the number-of-sets lottery table which concerns on embodiment of this invention. The figure which shows the example of the lottery table in the BB set number which concerns on embodiment of this invention. The figure which shows the example of the precursor G number determination table which concerns on embodiment of this invention. The figure which shows the example of the mode 4G number lottery table which concerns on embodiment of this invention. The figure which shows the example of the mission generation lottery table which concerns on embodiment of this invention. The figure which shows the example of the mission completion lottery table which concerns on embodiment of this invention. The figure which shows the example of the card lottery table which concerns on embodiment of this invention. The figure which shows the example of the launch preparation effect content lottery table which concerns on embodiment of this invention. The figure which shows the example of the launch preparation production continuous frequency lottery table which concerns on embodiment of this invention. The figure which shows the example of the lottery table at the time of the end of BB which concerns on embodiment of this invention. The figure which shows the example of the navigation corresponding table which concerns on embodiment of this invention. The main flowchart which concerns on embodiment of this invention. 7 is a main flowchart showing an example of initialization processing at power-on according to the embodiment of the present invention. 6 is a flowchart showing an example of medal acceptance/start check processing according to the embodiment of the present invention. The flowchart which shows the example of the internal lottery process which concerns on embodiment of this invention. The flowchart which shows the example of the internal lottery process which concerns on embodiment of this invention. The flowchart which shows the example of the lottery value change process which concerns on embodiment of this invention. 6 is a flowchart showing an example of reel stop initialization processing according to the embodiment of the present invention. The flowchart which shows the example of the attraction-in priority storage process which concerns on embodiment of this invention. The flowchart which shows the example of the attraction priority table selection process which concerns on embodiment of this invention. The flowchart which shows the example of the design code storage process which concerns on embodiment of this invention. 6 is a flowchart showing an example of reel stop control processing according to the embodiment of the present invention. The flowchart which shows the example of the number determination process of sliding pieces which concerns on embodiment of this invention. The flowchart which shows the example of the 2nd, 3rd stop process which concerns on embodiment of this invention. 6 is a flowchart showing an example of line change bit check processing according to the embodiment of the present invention. 6 is a flowchart showing an example of line mask data change processing according to the embodiment of the present invention. The flowchart which shows the example of the priority attraction-in control processing which concerns on embodiment of this invention. The flowchart which shows the example of the control change process which concerns on embodiment of this invention. The flowchart which shows the example of the control change process after a 2nd stop which concerns on embodiment of this invention. 6 is a flowchart showing an example of RT control processing according to the embodiment of the present invention. The flowchart which shows the example of the bonus end check process which concerns on embodiment of this invention. The flowchart which shows the example of the bonus operation check process which concerns on embodiment of this invention. 6 is a flowchart showing an example of fixed-cycle interrupt processing under the control of the main CPU according to the embodiment of the present invention. 6 is a flowchart showing an example of a power interruption interrupt process under the control of the main CPU according to the embodiment of the present invention. (A) is a figure which shows the priority of the interrupt signal which concerns on embodiment of this invention, (b) is a figure which shows the priority of the conventional interrupt signal. 9 is a flowchart of a start command transmission process under the control of the main CPU according to the embodiment of the present invention. 9 is a flowchart of a medal insertion command transmission process under the control of the main CPU according to the embodiment of the present invention. 6 is a flowchart of a reel stop command start command transmission process under the control of the main CPU according to the embodiment of the present invention. 9 is a flowchart of a bonus-end-time command transmission process under the control of the main CPU according to the embodiment of the present invention. 6 is a bonus start command transmission processing flowchart under the control of the main CPU according to the embodiment of the present invention. 6 is a flowchart of a display command transmission process under the control of the main CPU according to the embodiment of the present invention. 6 is a transmission processing flowchart of storage processing of various command signals in the master I/F unit according to the embodiment of the present invention. 6 is a flowchart of communication data transmission processing in the master I/F unit according to the embodiment of the present invention. 6 is a flowchart showing an example of a main board communication task performed by the sub CPU according to the embodiment of the present invention. The flowchart which shows the example of the effect registration task performed by the sub CPU which concerns on embodiment of this invention. The flowchart which shows the example of the production content determination process which concerns on embodiment of this invention. 6 is a flowchart showing an example of processing when a start command is received according to the embodiment of the present invention. 6 is a flowchart showing an example of AT-related processing according to the embodiment of the present invention. The flowchart which shows the example of the mission relevant process which concerns on embodiment of this invention. 6 is a flowchart showing an example of counter updating processing according to the embodiment of the present invention. The flowchart which shows the example of the production lottery process which concerns on embodiment of this invention. 9 is a flowchart showing an example of reel stop command reception processing according to the embodiment of the present invention. 6 is a flowchart showing an example of processing when a display command is received according to the embodiment of the present invention. The flowchart which shows the example of the process at the time of BET command reception which concerns on embodiment of this invention. The flowchart which shows the example of the process at the time of bonus end command reception which concerns on embodiment of this invention. The figure which shows the example of a display of the launch preparation production which concerns on embodiment of this invention. The block diagram which shows the structural example of the control part of the conventional game machine.

An embodiment of a gaming machine according to the present invention will be described below with reference to the drawings.

In the following description, a pachi-slot machine (hereinafter referred to as “pachi-slot machine”) will be described as an example, but the present invention is not limited to this and can be applied to a pachinko machine, a slot machine, or the like.

[Basic configuration of pachi-slot machine]
First, the basic configuration of the pachi-slot machine will be described with reference to FIG.

The pachi-slot machine of this embodiment uses medals as a game medium for playing a game. In addition to medals, coins, game balls, game point data, tokens, or the like can be applied as the game medium.

When a player inserts a medal and operates the start lever, one value (hereinafter, a random number value) is extracted from random numbers in a predetermined numerical value range (for example, 0 to 65535).

The internal lottery means performs lottery based on the extracted random number value and determines an internal winning combination. By the determination of the internal winning combination, the combination of symbols that is allowed to be displayed along the below-described winning determination line is determined. The types of symbol combinations include those related to "winning", in which benefits such as payout of medals, operation of re-game, operation of bonus, etc. are given to the player, and those related to other so-called "miss". Is provided.

When the start lever is operated, the reels are rotated. After that, when the stop button is pressed by the player, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing at which the stop button is pressed.

In the pachi-slot machine, basically, control is performed to stop the rotation of the corresponding reel within a specified time (190 msec) from when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within the specified time is referred to as the “number of sliding pieces”, and the maximum number is set to four symbols.

The reel stop control means, when the internal winning combination allowing the display of the winning combination of symbols is determined, the reel combination is displayed as much as possible along the winning determination line by using the above specified time. To stop the reel from spinning. Further, the reel stop control means uses the specified time to stop the rotation of the reels so that a combination of symbols which is not permitted to be displayed by the internal winning combination is not displayed along the winning determination line.

In this way, when the rotation of the plurality of reels is all stopped, the winning determination means determines whether the combination of symbols displayed along the winning determination line is related to winning. When it is determined that the game is related to winning, a bonus such as payout of medals is given to the player. A series of flows as described above is performed as one game in the pachi-slot machine.

Further, in the pachi-slot machine, in the above-described series of flow, various effects are produced by utilizing the display of images by the liquid crystal display device, the output of light by various lamps, the output of sound by the speaker, or a combination thereof. Is done.

When the start lever is operated, a random number value for rendering (hereinafter, a random number value for rendering) is extracted in addition to the random number value used for determining the internal winning combination described above. When the random number value for effect is extracted, the effect content determination means randomly determines what is to be executed this time from among a plurality of types of effect content associated with the internal winning combination.

When the content of the effect is determined, the effect executing means is interlocked with each trigger such as when the rotation of the reel is started, when the rotation of each reel is stopped, and when the presence/absence of a prize is determined. And execute the performance. In this way, in the pachi-slot machine, the player has the opportunity to know or anticipate the determined internal winning combination (in other words, the combination of symbols to be aimed) by executing the effect contents associated with the internal winning combination. It is provided and the interest of the player is improved.

[Pachislot machine structure]
Next, the structure of the pachi-slot machine 1 according to the embodiment will be described with reference to FIGS. 2 and 3.

(External structure)
FIG. 2 is a perspective view showing the external structure of the pachi-slot machine 1.

The pachi-slot machine 1 includes a cabinet 1a that houses reels, circuit boards, and the like, and a front door 1b that is attached to the cabinet 1a so as to be openable and closable. Inside the cabinet 1a, three reels 3L, 3C, 3R are provided side by side. Hereinafter, the reels 3L, 3C, 3R are referred to as the left reel 3L, the middle reel 3C, and the right reel 3R, respectively.

Each of the reels 3L, 3C, 3R has a cylindrical reel body and a translucent sheet material mounted on the peripheral surface of the reel body. On the surface of the sheet material, a plurality of (for example, 21) symbols are continuously drawn along the circumferential direction.

A liquid crystal display device 10 is provided at the center of the front door 1b. The liquid crystal display device 10 includes a display screen including the symbol display areas 4L, 4C, 4R, and is provided so as to be located on the front side overlapping the three reels 3L, 3C, 3R when viewed from the front. In this embodiment, an image is displayed and an effect is executed by using the entire display screen including the symbol display areas 4L, 4C, 4R.

The symbol display areas 4L, 4C, 4R are provided corresponding to the three reels 3L, 3C, 3R, respectively. The symbol display areas 4L, 4C, 4R serve as a display window, and the reels 3L, 3C, 3R provided behind the symbol display areas 4L, 3C, 3R can be transmitted. Hereinafter, the symbol display areas 4L, 4C, 4R are referred to as a left display window 4L, a middle display window 4C, and a right display window 4R, respectively.

The display windows 4L, 4C, 4R are, when the rotation of the reels 3L, 3C, 3R provided behind the display windows 4L, 4C, 4R is stopped, among the plural kinds of symbols of the reels 3L, 3C, 3R, the upper stage in the frame, One symbol is displayed in each of the middle and lower regions (three in total). A pseudo line formed by combining any one of the predetermined three areas of the upper, middle, and lower rows of each of the display windows 4L, 4C, 4R is the target for determining whether or not to win. It is defined as a line (winning determination line).

In this embodiment, the center line 8 is provided as a winning determination line. The center line 8 is composed of a combination of the middle stage of the left display window 4L, the middle stage of the middle display window 4C, and the middle stage of the right display window 4R. Hereinafter, the center line 8 is also referred to as a winning determination line 8.

On the side of the display screen of the liquid crystal display device 10, a 7-segment display 6 including 7-segment LEDs is provided. The 7-segment display 6 is stored in the pachi-slot machine, the number of medals inserted in the game this time (hereinafter, the number of inserted coins), the number of medals to be paid out to the player as a privilege (hereinafter, the number of coins paid out) Information such as the number of medals (hereinafter, the number of credits) is displayed digitally.

The front door 1b is provided with various devices to be operated by the player. The medal insertion slot 11 is provided to receive medals dropped from the outside by the player. The medals received in the medal insertion slot 11 will be thrown into one game with the predetermined number as the upper limit, and the amount exceeding the prescribed number can be deposited inside the pachi-slot machine 1. (The so-called credit function).

The bet button 12 is provided to determine the number of medals deposited in the pachi-slot machine 1 to be inserted into one game. The settlement button 14 is provided for pulling out the medals stored inside the pachi-slot machine 1 to the outside.

The start lever 16 is provided to start rotation of all reels (3L, 3C, 3R). The stop buttons 17L, 17C, 17R are associated with each of the three reels 3L, 3C, 3R, and are provided to stop the rotation of the corresponding reels. Hereinafter, the stop buttons 17L, 17C, 17R are referred to as the left stop button 17L, the middle stop button 17C, and the right stop button 17R, respectively.

The medal payout opening 18 guides the medals discharged by driving a medal payout device 33, which will be described later, to the outside. The medals discharged from the medal payout opening 18 are stored in the medal tray 19. The lamp (LED or the like) 20 outputs light in a pattern of turning on and off according to the contents of the effect. The lamp 20 of this embodiment is formed into a fireworks ball. The speakers 21L and 21R output sound effects and music such as music according to the effect contents.

(Internal structure)
FIG. 3 is a perspective view showing the internal structure of the pachi-slot machine 1. In FIG. 3, the front door 1b is opened, and the structure on the back surface side of the front door 1b and the internal structure of the cabinet 1a are shown.

A main board 31 that constitutes a main control circuit 41 (see FIG. 6) is provided above the inside of the cabinet 1a. The main control circuit 41 is a circuit for controlling the main flow of the game in the pachi-slot machine 1, such as determining the internal winning combination, rotating and stopping the reels 3L, 3C, 3R, and determining whether or not there is a prize. The specific configuration of the main control circuit 41 will be described later.

Three reels 3L, 3C and 3R are provided in the center of the inside of the cabinet 1a. Stepping motors 61L, 61C, 61R (see FIG. 6) are connected to the reels 3L, 3C, 3R via gears having a predetermined reduction ratio. The three reels 3L, 3C, 3R and the stepping motors 61L, 61C, 61R constitute the variable display means according to the present invention.

On the left side of the left reel 3L, a sub-board 32 that constitutes a sub-control circuit 42 (see FIG. 6) is provided. The sub-control circuit 42 is a circuit that controls execution of effects such as display of images. The specific configuration of the sub control circuit 42 will be described later.

A medal payout device (hereinafter referred to as a hopper) 33 having a structure capable of accommodating a large amount of medals and discharging them one by one is provided below the inside of the cabinet 1a. On the left side of the hopper 33, a power supply device 34 for supplying necessary power to each device of the pachi-slot machine 1 is provided.

A selector 35 is provided at the center on the back side of the front door 1b (below the display windows 4L, 4C, 4R). The selector 35 is a device for selecting whether or not the medal has a proper material and shape, and guides the proper medal received in the medal slot 11 to the hopper 33.

A medal sensor 35S (see FIG. 6) for detecting that a proper medal has passed is provided on the path through which the medal passes in the selector 35.

(Power saving mode)
Next, the power saving mode of the pachi-slot machine 1 will be described with reference to FIG. FIG. 4 is a diagram showing a display example of the liquid crystal display device 10 when the pachi-slot machine 1 is set to the power saving mode.

In a general gaming machine, after a predetermined time has elapsed since an operation on the gaming machine is no longer detected, an effect is promoted by using an effect executing unit such as a lamp, a liquid crystal display device, and a speaker. Inside the cabinet 1a of the pachi-slot machine 1 of the present embodiment, an operation unit (not shown) that can be operated only by game shop personnel such as employees of the game shop is provided. By operating this operation unit, only the person involved in the game shop can make the predetermined settings in the pachi-slot machine 1.

In this embodiment, the power saving mode is provided as one item of the predetermined setting in the pachi-slot machine 1. When the power saving mode is set, the lamp is turned off and the sound of the speaker is turned off after a lapse of a predetermined time after the operation on the pachi-slot machine 1 is no longer detected. Further, as shown in FIG. 4, the characters "power saving" is displayed on the display screen of the liquid crystal display device 10. As a result, the power consumption of the pachi-slot machine 1 can be suppressed as compared with the case of performing an effect that promotes a game.

In this embodiment, the pachi-slot machine 1 is provided with an operation unit for setting the power saving mode. However, the power saving mode according to the present invention may be set so that the player cannot perform the setting, and for example, it may be set by a computer device electrically connected to the pachi-slot machine 1. In this case, a plurality of pachi-slot machines 1 in the game store can be collectively set in the power saving mode using a computer device.

The pachi-slot machine 1 of the present embodiment includes three reels 3L, 3C, 3R, but the gaming machine according to the present invention may include a reel that causes a liquid crystal display device to display a pseudo image. ..

FIG. 5: is a figure which shows the modification when the game machine of this invention is made into a power saving mode. When this game machine is set to the power saving mode, the lamp is turned off and the sound of the speaker is turned off after a lapse of a predetermined time after no operation is detected. Further, as shown in FIG. 5, the character "power saving" is displayed on a portion of the liquid crystal display device 10 corresponding to the liquid crystal reel arranged on the front surface of the reel. Then, except for the portion displaying the reels, the image for promoting the game is displayed. Even in this gaming machine, the power consumption can be suppressed by setting the power saving mode.

[Control part]
Next, the configuration of the control unit included in the pachi-slot machine 1 according to the present embodiment will be described with reference to FIGS. 6 and 7. The pachi-slot machine 1 includes a main control circuit 41, a sub control circuit 42, a power supply circuit 40, and peripheral devices (actuators and the like).

(Main control circuit)
As shown in FIG. 6, the main control circuit 41 includes a main processing unit 50 including a main CPU 51, a main ROM 52 and a main RAM 53, a timer circuit, and the like, and communication data to the sub control circuit 42 and peripheral devices connected to the main processing unit 50. A power supply from a master I/F unit 70 for transmitting and receiving unidirectionally or bidirectionally, a clock path generation circuit 55, a frequency divider 55, a WDT (watchdog timer) 58, and a power supply circuit (board) 40. A main board power supply circuit 59 for receiving the signal is provided.

<Main processing unit>
In the main processing unit 50, the main ROM 52 has a control program (see FIGS. 72 to 101) executed by the main CPU 51, a data table such as an internal lottery table (see FIGS. 10 to 47), and various types of sub control circuits Data and the like for transmitting control commands are stored. Further, the main RAM 53 is provided with a storage area (see FIGS. 48 to 53) for storing various data such as an internal winning combination determined by executing the control program.

In the main processing unit 50, the clock pulse generation circuit 54 and the frequency divider 55 generate clock pulses, and the main CPU 51 executes the control program based on the generated clock pulses.

Further, the main CPU 51 receives a signal input from a switch or the like and controls the operation of peripheral devices such as the stepping motors 81L, 81C and 81R.

<Master I/F section>
The master I/F unit 70 has a storage processing function of storing a plurality of data and a transmission command included in a plurality of communication data transmitted from the main processing unit 50 in a storage area, and a data structure is reorganized for each communication data. Then, it has a transmission processing function of sequentially transmitting the packet data to the sub control circuit 42. Also, it transmits and receives communication data to and from other peripheral devices.

The master I/F unit 70 and the sub control circuit 42 are connected by an optical cable 111, and communication data in packet format is transmitted from the master I/F unit to the sub control circuit via the optical cable 111.

More specifically, the master I/F unit 70 includes a master register control unit 71, a CPU I/F unit 72, a random number generator 73, a transmission control unit 74, a reception control unit 75, and an I/O control unit 76. Communication data is transmitted/received to/from the external reel position detection circuit 83, the medal payout device 19 and the like, and also communication data in packet format for performance is transmitted to the sub-control circuit 42, while the stop sensor 17S, the medal sensor 35S, It receives signals from the start switch 16S, the settlement switch 14S, etc., and transmits communication data to the display drive circuit 84 and the 7SEG display 6.

Further, the random number generator 73 generates a random number within a predetermined range (for example, 0 to 65535), and the main CPU 51 extracts one value from the generated random numbers.

Further, the main processing unit 50 and the master I/F unit 70 are connected by, for example, a data bus 110, as shown in FIG.

In this way, by connecting the master I/F unit 70 and the sub control unit 42 with the optical cable 111, it is possible to eliminate the influence of an electromagnetic field or noise from the outside as compared with the conventional electric cable. ..

The master I/F unit 70 uses an ASIC (Application Specific Integrated Circuit) integrated circuit.

<Main board power supply circuit>
As shown in FIG. 9A, the main board power supply circuit 59 is supplied with a +12V power supply voltage from the power supply circuit 40, and supplies a +5V power supply voltage as an output to each member forming the main control circuit 41. A power failure detection IC 121 for detecting a power loss or a voltage drop due to a power failure, a disconnection, or the like is provided. Further, the +5V output line is provided with a capacitor 123 for the purpose of maintaining the voltage for a fixed time (about 8 msec).

When this power failure detection IC 121 detects a power loss or a voltage drop (for example, when the +12V power supply voltage drops to +9V or less), the power failure is detected in the interrupt port XINT of the main CPU 51 (see FIG. 95(a)) and the main CPU 51. The signal 122 is output, and the main CPU 51 executes the power interruption interrupt processing (see FIG. 94) according to the signal. When the main CPU 51 receives the power failure detection signal 122 to detect an erroneous signal due to noise or voltage fluctuation, the power failure detection signal 122 is checked, for example, by checking the duration of the power failure detection signal 122. Determine the correctness of. When the power cut detection signal 122 is an erroneous signal, the main CPU 51 does not execute the power cut interrupt process even if the power cut detection signal 122 is input to the interrupt port XINT.

As described above, the main CPU 51 has the function of determining whether the power failure detection signal 122 is correct or false, and therefore, the power failure detection signal 122 of the erroneous signal is not subjected to the power failure interrupt processing, so that the gaming machine The reliability and operating rate can be improved.

(Sub control circuit)
FIG. 7 is a block diagram showing a configuration example of the sub control circuit 42 of the pachi-slot machine 1 according to the present embodiment.

The sub control circuit 42 is connected to the main control circuit 41 by the optical cable 111, and performs processing such as determination and execution of effect contents based on communication data transmitted from the main control circuit 41.

The sub control circuit 42 is basically a sub CPU 91, a sub ROM 92, a sub RAM 93, a rendering processor 94, a drawing RAM 95, a driver 96, a DSP (digital signal processor) 100, an audio RAM 101, an A/D converter 102, and an amplifier 103. And a torch drive circuit 105, a sub-board power supply circuit 106 that receives power from the power supply circuit (board) 40, and the like.

<Sub-board power supply circuit>
As shown in FIG. 9B, the sub-board power supply circuit 106 is supplied with a +12V power supply voltage from the power supply circuit 40, and supplies a +5V power supply voltage as an output to each member forming the sub-control circuit 42. A power failure detection IC 131 for detecting power loss or voltage drop due to power failure or disconnection is provided. Further, the +5V output line is provided with a capacitor 133 for the purpose of maintaining the voltage for a fixed time (about 8 msec).

When the power cut detection IC 131 detects a power loss or a voltage drop (for example, when the +12V power supply voltage drops to +8V or less), the power cut detection signal 132 is output to the interrupt port NMI of the sub CPU 91.

The sub CPU 91 controls the output of video, sound, and light according to the control program stored in the sub ROM 92 in accordance with the communication data transmitted from the main control circuit 41. The sub ROM 92 is basically composed of a program storage area and a data storage area.

A control program executed by the sub CPU 91 is stored in the program storage area of the sub ROM 92. For example, in the control program, a main board communication task for controlling communication with the main control circuit 41, and a production registration task for extracting a production random number and determining and registering production content (production data). , A drawing control task for controlling display of an image by the liquid crystal display device 10 based on the determined effect contents, a lamp control task for controlling light output by the lamp 20, and a voice control task for controlling sound output by the speakers 21L and 21R. Etc. are included.

The data storage area stores a storage area for storing various data tables, a storage area for storing effect data forming each effect content, a storage area for storing animation data related to image creation, and sound data related to BGM and sound effects. A storage area, a storage area for storing lamp data relating to a pattern of turning on/off light, and the like are included.

The sub RAM 93 is provided with a storage area for registering the determined effect contents and effect data, and a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 41.

Further, the liquid crystal display device 10, the speakers 21L and 21R, the lamp 20, and the torch 22 are connected to the sub-control circuit 42 as peripheral devices whose operations are controlled.

The sub CPU 91, the rendering processor 94, the drawing RAM (including a frame buffer) 95, and the driver 96 create a video according to the animation data specified by the effect contents, and display the created video on the liquid crystal display device 10.

Further, the sub CPU 91, the DSP 100, the audio RAM 101, the A/D converter 102, and the amplifier 103 output sounds such as BGM from the speakers 21L and 21R according to the sound data specified by the effect contents. In addition, the sub CPU 91 turns on and off the lamp 20 according to the lamp data specified by the effect contents.

The sub CPU 91 and the torches driving circuit 105 drive the torches 22 according to the torch driving data specified by the effect contents. The torches 22 are members for the performance formed with the torches as a motif, and are normally hidden in the decorative portion provided on the upper side of the liquid crystal display device 10. Then, it is driven when a specific effect is performed, and is exposed to the front side of the liquid crystal display device 10 (see FIG. 116 ).

(Peripheral device)
Signals from the stop switch 17S, the medal sensor 35S, the start switch 16S, the settlement switch 14S, and the bet switch 12S are input to the main control circuit 41.

The stop switch 17S detects that each of the stop buttons 17L, 17C, 17R has been pressed by the player (stop operation). The stop switch 17S constitutes stop operation detecting means according to the present invention.

The start switch 16S detects that the start lever 16 has been operated by the player (start operation). The start switch 16S constitutes the start operation detecting means according to the present invention. The settlement switch 14S detects that the settlement button 14 is pressed by the player.

The medal sensor 35S detects that the medal received in the medal slot 11 has passed through the selector 35 described above. Further, the bet switch 12S detects that the bet button 12 has been pressed by the player. The medal sensor 35S and the bet switch 12S form a throwing operation detecting means.

The peripheral devices whose operations are controlled by the main control circuit 41 include the stepping motors 81L, 81C, 81R, the 7-segment display 6 and the medal payout device 33.

The motor drive circuit 82 controls driving of the stepping motors 81L, 81C, 81R provided corresponding to the reels 3L, 3C, 3R. The reel position detection circuit 83 detects, by an optical sensor having a light emitting portion and a light receiving portion, a reel index indicating that the reel has made one rotation, in accordance with each reel 3L, 3C, 3R.

The stepping motors 81L, 81C, 81R have a configuration in which the momentum is proportional to the number of output pulses and the rotation axis can be stopped at a designated angle. The driving force of the stepping motors 81L, 81C, 81R is transmitted to each reel 3L, 3C, 3R via a gear having a predetermined reduction ratio. Each time a pulse is output to each stepping motor 81L, 81C, 81R, each reel 3L, 3C, 3R rotates at a constant angle.

The main control circuit 51 counts the number of times the pulses are output to the stepping motors 81L, 81C, and 81R after detecting the reel index, so that the rotation angle of each reel 3L, 3C, and 3R (mainly How many symbols have been rotated) is managed.

Here, the management of the rotation angle of each reel 3L, 3C, 3R will be specifically described. The number of pulses output to the stepping motors 81L, 81C, 81R is counted by a pulse counter provided in the main RAM 53. Then, the symbol counter provided in the main RAM 53 is incremented by one each time the pulse counter counts the output of the pulse a predetermined number of times (for example, 16 times) necessary to rotate one symbol. The symbol counter is provided for each reel 3L, 3C, 3R. The value of the symbol counter is cleared when the reel position detection circuit 83 detects the reel index.

As described above, in this embodiment, by managing the symbol counter, it is possible to manage how many symbols are rotated after the reel index is detected. Therefore, the position of each symbol on each reel 3L, 3C, 3R is detected with reference to the position at which the reel index is detected.

As described above, in the present embodiment, the maximum number of sliding pieces is set to 4 symbols. Therefore, when the left stop button 17L is pressed, the symbol of the left reel 3L in the middle of the left display window 4L and each symbol within the range up to four symbols ahead are displayed in the middle of the left display window 4L. The pattern can be stopped.

The display drive circuit 84 controls the operation of the 7-segment display 6. The hopper drive circuit 85 controls the operation of the hopper 33. Further, the payout completion signal circuit 86 manages the detection of medals performed by the medal detection unit 33S provided in the hopper 33, and checks whether or not the number of medals discharged from the hopper 33 to the outside has reached the payout number.

[Structure of data table stored in main ROM]
Next, the configuration of various data tables stored in the main ROM 52 will be described with reference to FIGS.

(Design placement table)
First, the symbol arrangement table will be described with reference to FIG. The symbol arrangement table defines the position of each symbol in the rotation direction of each reel 3L, 3C, 3R and the data (hereinafter, symbol code) for specifying the type of symbol arranged at each position.

The symbol arrangement table defines the position of the symbol existing in the middle of the display windows 4L, 4C, 4R as "0" when the reel index is detected. Then, "0" to "20" corresponding to the symbol counter are assigned to each symbol in the order of proceeding in the reel rotation direction with the symbol position "0" as a reference.

That is, by referring to the value (“0” to “20”) of the symbol counter and the symbol arrangement table, the type of symbol displayed in the middle of the display windows 4L, 4C, 4R at that time is specified. be able to. For example, when the value of the symbol counter corresponding to the left reel 3L is “6”, the symbol “lip A” at the symbol position “6” is displayed in the middle of the left display window 4L.

(Pattern combination table)
Next, the symbol combination table will be described with reference to FIGS. 11 to 17. The symbol combination table defines combinations of symbols predetermined according to the type of privilege, a display combination (storage area), and the number of payouts. The display combination is data for identifying a combination of symbols displayed along the winning determination line. This symbol combination table constitutes the symbol combination defining means according to the present invention.

In the present embodiment, when the symbol combination displayed by the reels 3L, 3C, 3R along the winning determination line 8 (see FIG. 2) matches the symbol combination defined by the symbol combination table, the winning combination is achieved. Is determined. Then, when it is determined that the prize has been won, the player is provided with benefits such as payout of medals, operation of a replay, and operation of a bonus game. When the symbol combination displayed along the winning determination line does not match any of the symbol combinations defined by the symbol combination table, a so-called "miss" occurs. In this embodiment, the symbol combination table is not defined as the symbol combination, and thus the lost symbol combination is defined. The symbol combination table according to the present invention has an item of loss, and may directly specify the loss.

The display combination is data for identifying a combination of symbols displayed along the winning determination line.

This display combination is represented as 1-byte data in which a unique symbol combination is assigned to each bit.

In the present embodiment, the combination of symbols is defined according to the number of inserted medals. For example, as shown in FIG. 11, when the number of inserted medals is 3 and the symbol “blue 7” of each reel 3L, 3C, 3R is displayed along the winning determination line, as a display combination “BB1 (00000001)” is determined. On the other hand, when the number of inserted medals is two and the symbol “blue 7” of each reel 3L, 3C, 3R is displayed along the winning determination line, it is “miss”.

The storage area data is data for designating the display combination storage area (see FIG. 48) in which the corresponding display combination is stored. In this embodiment, 28 display combination storing areas are provided.

That is, display combinations having the same bit pattern but different contents are managed as different display combinations depending on the difference in the stored area.

The payout number indicates the number of medals to be paid out to the player. When a value of 1 or more is determined as the payout number, medals are paid out. In the present embodiment, as the display combination, "chance eyes A, B", "determined combination A, B", "corner cherries 1-8", "medium cherries 1-12", "ice middle tiers 1-4", "ice" When any one of "Cross down 1-6", "Ice cross up 1-10", "Bell middle tier 1-8", "Bell upper tier 1-16" and "Bell cross down 1-24" is determined. Medals will be paid out. It should be noted that in the present embodiment, the display combination in which these medals are paid out is collectively referred to as a “small combination”.

When "control rep 1 to 17", "RT1 rep 1 to 36", "RT2 rep 1 to 8", "RT3 rep 1 to 8" and "RT4 rep 1 to 8" are determined as the display combination, The re-game operation is performed. On the other hand, when either "BB1, 2" is determined as the display combination, the big bonus game is operated, and when any of "RB1-7" is determined, the regular bonus game is operated. Done. When either "SB1,2" is determined, the single bonus game is operated.

(Table when bonus is activated)
Next, with reference to FIG. 18, the bonus operation time table will be described. The bonus operation table is data to be stored in the game state flag storage area (see FIG. 49) provided in the main RAM 53, the bonus end number counter, the possible game number counter, and the possible prize number counter when the bonus operation is performed. Is prescribed.

The gaming state flag is data for identifying the type of bonus game in which the operation is performed. In this embodiment, the types of bonus games are a big bonus, a regular bonus, and a single bonus game. The big bonus is a so-called accessory continuous actuating device related to a so-called type 1 special accessory, and is hereinafter referred to as "BB". The regular bonus is a so-called first-class special accessory, and is hereinafter referred to as “RB”. The single bonus game is a so-called normal character, and is hereinafter referred to as "SB". The special game according to the present invention indicates "BB".

The bonus end number counter is data for managing whether or not the specified number (payout number) that triggers the end of the bonus game is reached. In the present embodiment, the operation of "BB1, 2" ends when the medals reaching the specified number "465" have been paid out.

That is, the numerical value defined by the bonus operation time table is stored in the bonus end number counter, and the subtraction is performed through the bonus operation. As a result, the operation of "BB1, 2" is completed on condition that the value of the bonus end number counter is updated to "0". In the present embodiment, “BB1” and “BB2” are managed by the same flag, but they may be managed by individual flags.

The playable number counter is data for managing the number of remaining games that can be played in the operations of “RB” and “SB”, that is, the so-called playable number. The possible winning number counter is data for managing the number of remaining games in which a combination of symbols related to winning can be displayed in one regular bonus (RB) game, that is, a so-called possible winning number.

(RT transition table)
Next, the RT transition table will be described with reference to FIG. The RT transition table defines the conditions for transitioning the RT gaming state and the transition destination.

FIG. 20 is an RT transition diagram corresponding to the RT transition table shown in FIG. As shown in FIG. 19 and FIG. 20, in the present embodiment, if the bell decided as the internal winning combination cannot be displayed during the RT1 gaming state (display of spilled bell), it shifts to the RT0 gaming state. .. Further, when a combination of symbols “SB” or “RT1 rep” is displayed during the RT0 or RT2 game state, the game mode shifts to the RT1 game state.

Further, when the combination of symbols "RT2 REP" is displayed during the RT0 game state, the process shifts to the RT2 game state. In addition, in the RT2 game state, when the symbol combination of "RT3 REP" is displayed, it shifts to the RT3 gaming state, and when the symbol combination of "RT4 REP" is displayed, it shifts to the RT4 gaming state.

Furthermore, when playing the game 50 times in the RT3 or RT4 game state, the game state shifts to the RT2 game state. Then, when "BB" or "RB" is won during the game state of any of RT1 to RT4, the game state shifts to the RT0 game state. When the bonus game (BB gaming state or RB gaming state) is over, the game shifts to the RT1 gaming state. In addition, in the RT3 and 4 game states, the probability that a combination relating to the operation of the re-game such as “RT1 REP” is determined as the internal winning combination is higher than that in the RT0 to 2 game states.

(Internal lottery table determination table)
Next, an internal lottery table determination table will be described with reference to FIG. The internal lottery table determination table defines the internal lottery table and the lottery number according to the game state.

For example, in the general game (non-bonus) state, the internal lottery table for the general game state is used, and “51” is set as the lottery number. When in the RB1 gaming state, the internal lottery table for the RB1 playing state is used, and "8" is set as the lottery number.

Then, when in the RB8 gaming state, the internal lottery table for the RB8 gaming state is used, and "2" is set as the lottery number. During the BB game state in this embodiment, the RB8 game state is repeated. Therefore, in the BB game state, the number of inserted medals becomes two, and the RB8 game state internal lottery table is used.

(Internal lottery table)
Next, the internal lottery table will be described with reference to FIGS. The internal lottery table defines a data pointer and a lottery value when the data pointer is determined according to the winning number.

The data pointer is data acquired as a result of the lottery performed by referring to the internal lottery table, and for designating an internal winning combination defined by an internal winning combination determination table (see FIGS. 31 to 34) described later. Data. The data pointer is provided with a small win/replay data pointer and a bonus data pointer. The lottery value is defined for each setting (settings 1 to 6) for adjusting a preset expected value of the lottery.

In the internal lottery process of the present embodiment, the random number values extracted from the predetermined numerical value range “0 to 65535” are sequentially subtracted by the lottery value defined according to each winning number. And. Internal lottery is performed by determining whether the result of the subtraction is negative (whether a so-called “carry” has occurred). That is, it means that the winning number when the result of the subtraction becomes negative (the “digit” occurs), and the data point assigned to the winning number is acquired.

Therefore, in the internal lottery process of the present embodiment, the larger the numerical value defined as the lottery value, the higher the probability that the data to which this is assigned (that is, the data pointer) is determined. The winning probability of each winning number can be represented by "lottery value corresponding to each winning number/the number of all random number values that may be extracted (65536)".

FIG. 22 shows an internal lottery table for the general game state. This internal lottery table for general game state is used in the case of RT0 game state in the general game state (non-bonus). The general gaming state internal lottery table defines the lottery value and the data pointer according to the winning numbers 1 to 51. For example, when referring to the general gaming state internal lottery table, the probability that the winning number "2" is won and "3" is acquired as the small win/replay data pointer is "0/65536".

23 to 26 show an RT internal lottery table to be referred to in the case of the RT1 to 4 gaming states in the normal gaming state. The RT internal lottery table defines a lottery value and a data pointer according to a lottery number within a predetermined range.

FIG. 23 shows an RT1 internal lottery table. This RT1 internal lottery table is selected in the RT1 gaming state of the general gaming state. The RT1 internal lottery table defines the lottery values and the data pointers of the winning numbers 1 to 15. When the RT1 internal lottery table is selected, the lottery values defined in the winning numbers 1 to 15 of the general game state internal lottery table are rewritten to the lottery values defined in the RT1 internal lottery table. .. As a result, the type and probability of the internal winning combination related to the re-playable winning game are changed.

FIG. 24 shows an RT2 internal lottery table. This RT2 internal lottery table is selected in the RT2 gaming state of the general gaming state. The internal lottery table for RT2 defines the lottery values and the data pointers of the winning numbers 1 to 15. When the RT2 internal lottery table is selected, the lottery values of the winning numbers 1 to 15 defined in the general gaming state internal lottery table are rewritten to the lottery values defined in the RT2 internal lottery table. ..

FIG. 25 shows an RT3 internal lottery table. This RT3 internal lottery table is selected in the RT3 gaming state of the general gaming state. The RT3 internal lottery table defines the lottery values and the data pointers of the winning numbers 1 to 15. When the RT3 internal lottery table is selected, the lottery values of the winning numbers 1 to 15 defined in the above general game state internal lottery table are rewritten to the lottery values defined in the RT3 internal lottery table. ..

FIG. 26 shows an RT4 internal lottery table. This RT4 internal lottery table is selected in the RT4 gaming state in the general gaming state. The internal lottery table for RT4 defines the lottery values and the data pointers of the winning numbers 1 to 15. When the RT4 internal lottery table is selected, the lottery values of the winning numbers 1 to 15 defined in the internal gaming state internal lottery table are rewritten to the lottery values defined in the RT4 internal lottery table. ..

FIG. 27 shows an SB/1.2 internal lottery table. This SB1, 2 internal lottery table A is selected when in the SB gaming state. The SB1/2 internal lottery table defines the lottery value of the winning number 28 and the data pointer. When the SB1/2 internal lottery table is selected, the lottery value of the winning number 28 defined in the above general gaming state internal lottery table becomes the lottery value defined in the SB1/2 internal lottery table. Can be rewritten.

In the present embodiment, only the lottery value of the replay (small winning combination) of the reference internal gaming state internal lottery table is changed according to the type of RT (SB). Therefore, a table (for example, the RT1 internal lottery table shown in FIG. 22) that defines only the lottery value of the replay (SB) to be changed is provided. However, as the gaming machine of the present invention, for example, different internal lottery tables corresponding to RT (SB) may be provided.

FIG. 28 shows an internal lottery table for the RB1 gaming state. This RB1 gaming state internal lottery table is referred to when the RB1 gaming state. The internal lottery table for the RB1 gaming state defines the lottery value and the data pointer according to the winning numbers 1 to 8. The total of the lottery values of the winning numbers 1 to 8 defined in the RB1 gaming state internal lottery table is "65536". That is, when referring to the RB1 gaming state internal lottery table, one of 16, 29 to 35 of the small win/replay data pointers is acquired.

FIG. 29 shows an internal lottery table for the RB8 gaming state. This RB8 gaming state internal lottery table is referred to when the RB8 gaming state (BB gaming state). The internal lottery table for the RB8 gaming state defines the lottery value and the data pointer according to the winning numbers 1 and 2. The total of the lottery values of the winning numbers 1 and 2 defined in the RB8 gaming state internal lottery table is "65516". Therefore, when referring to the internal lottery table for the RB8 gaming state, there is a "miss" with a probability of "20/65536".

(Internal winning combination determination table)
Next, the internal winning combination determination table will be described with reference to FIGS. 30 to 34. The internal winning combination determination table defines the internal winning combination according to the data pointer. That is, when the data pointer is determined, the internal winning combination is uniquely acquired.

The internal winning combination is data for identifying a combination of symbols by the reels 3L, 3C, 3R that are allowed to be displayed along the winning determination line (the center line 8 in this embodiment). The internal winning combination, like the display combination, is represented as 1-byte data in which a unique symbol combination is assigned to each bit. In addition, when the data pointer is "0", the content of the internal winning combination is "miss", which is the combination of all the symbols defined by the symbol combination table (see FIGS. 11 to 17). Indicates that display is not allowed.

For example, the symbol combination table defines a symbol combination of "blue 7-blue 7-blue 7" when the number of inserted medals is three (see FIG. 11). Therefore, when the content of the internal winning combination when the number of inserted medals is three is “miss”, the display of the symbol combination of “blue 7-blue 7-blue 7” is not permitted.

However, the symbol combination table does not prescribe a symbol combination of "blue 7-blue 7-blue 7" when the number of inserted medals is two. Therefore, when the content of the internal winning combination when the number of inserted medals is two is "miss", the display of the symbol combination of "blue 7-blue 7-blue 7" is permitted.

FIG. 30 shows a bonus internal winning combination determination table. The internal winning combination determination table for bonus defines the internal winning combination relating to the operation of the bonus game for the bonus data pointers "1" to "4". In this bonus internal winning combination determination table, the part marked with ◯ is an internal winning combination. For example, when "1" is acquired as the bonus data pointer, "BB1" and "BB2" are won in duplicate.

31 to 34 show a small winning combination/replay internal winning combination determination table. The small winning combination/replay internal winning combination determination table defines the small winning combination and the replay winning combination for the small winning combination/replay data pointers "1" to "40". In other words, the small winning/replaying internal winning combination determination table defines an internal winning combination relating to payout of medals or an internal winning combination relating to operation of a replay. In this small winning combination/replay internal winning combination determination table as well, the part marked with ◯ is an internal winning combination. For example, when "1" is acquired as the small win/replay data pointer, "RT1 Reps 1 to 36" are won in duplicate.

(Number selection table for turning cylinder)
Next, with reference to FIG. 35, the rotation cylinder stop number selection table will be described. The turning cylinder stop number selection table defines the turning cylinder stop number according to the small win/replay data pointer. This spinning cylinder stop number is used when each data is acquired in the reel stop initialization process described later.

The spinning cylinder stop number selection table of the present embodiment defines different spinning cylinder stop numbers for each small win/replay data pointer. However, as the spinning cylinder stop number selection table according to the present invention, the same spinning cylinder stop number may be defined for different small win/replay data pointers to reduce data.

(Reel stop initial setting table)
Next, the reel stop initialization table will be described with reference to FIG. The reel stop initial setting table defines data used for determining the number of sliding pieces of each of the main reels 3L, 3C, 3R according to the spinning cylinder stop number. Specifically, the pull-in priority table number, the pull-in priority table selection data, the table selection data when pressing forward, the table change data when pressing forward, the table change initial data when pressing forward, and the table selection data when anomalous pressing are specified. There is.

The attraction-in priority table number and attraction-in priority table selection data are data used in attraction-in priority table selection processing described later. In the reel stop initialization table, if the pull-in priority table number corresponding to the spinning cylinder stop number is defined, the pull-in priority table (see FIG. 44) corresponding to the pull-in priority table number is selected. On the other hand, if the attraction-in priority table number is not defined, the attraction-in priority table number is determined by referring to the attraction-in priority table selection table (see FIG. 43) corresponding to the attraction-in priority table selection data.

The push-time table selection data, the push-time table change data, and the push-time table change initial data specify the stop table (see FIGS. 37 and 39 to 41) to be referred to when the push-forward is performed. Data. The forward push is a case where the first stop operation (first stop operation) is performed on the left reel 3L, and the pushing order of "left middle right" and "left right middle" corresponds to this.

The irregular pressing table selection data is data that specifies a stop table (see FIG. 42) to be referred to when the irregular pressing is performed. The irregular push is a case where the first stop operation is performed on the middle reel 3C or the right reel 3R, and the pushing order of "middle left and right", "middle right left", "right middle left", and "right left middle". Is applicable.

In this embodiment, basically, the rotation of the corresponding reel is stopped within 190 msec after the stop operation is detected by the stop switch 17S. Specifically, the value of the symbol counter corresponding to the corresponding reel when the stop operation is detected is added with any one of the number of sliding symbols “0” to “3” and corresponds to the obtained value. The symbol position is determined as the symbol position where the rotation of the reel stops (this is referred to as the "scheduled stop position"). The symbol position corresponding to the value of the symbol counter corresponding to the reel when the stop operation is detected is the symbol position where the rotation of the reel starts to be stopped, and this is referred to as the "stop start position".

That is, the number of sliding pieces is the amount of rotation of the reel after the stop operation is detected by the stop switch 17S until the rotation of the corresponding reel stops. In other words, it is the number of symbols passing through the middle stage of the corresponding display window in the period from when the stop operation is detected by the stop switch 17S until the rotation of the corresponding reel is stopped. This is grasped by the value of the symbol counter updated after the stop operation is detected by the stop switch 17S.

Referring to the stop table, the number of sliding pieces is acquired according to the stop start position of each main reel 3L, 3C, 3R. In the present embodiment, the number of sliding pieces is acquired based on the stop table, but this is tentative and the acquired number of sliding pieces does not immediately determine the scheduled stop position of the reel.

In the present embodiment, when there is a more appropriate number of sliding pieces than the number of sliding pieces (hereinafter referred to as “slip piece number determination data”) acquired based on the stop table, a pull-in priority table described later (see FIG. 44). ) To change the number of sliding pieces. In the present embodiment, the number-of-slip-pieces determination data is referred to in order to determine the search order when the priorities are compared with respect to each symbol from the stop start position to the symbol position which is the maximum number of four sliding symbols ahead. (See FIG. 45).

In the present embodiment, the stop table to be referred to is selectively used according to the forward push and the irregular push. In the case of the forward push, the forward push first stop table (see FIG. 37) and the forward push second/third stop table (see FIGS. 39 to 41) are referred to. On the other hand, for an irregular push, the irregular push stop table (see FIG. 42) is referred to.

(Stop table for 1st stop when pushing forward)
Next, with reference to FIG. 35, the first push stop table for forward pressing will be described. The first pressing stop table for forward pressing shown in FIG. 37 is referred to when the forward pressing table selection data is “18”. The first stop table for forward pressing defines the slide piece number determination data and the change status according to the stop start positions "0" to "20" of the left reel 3L. The change status is used when referring to the forward-pressing control change table described later.

(Control change table when pressing forward)
Next, the forward change control change table will be described with reference to FIG. The forward press control change table shown in FIG. 38 is referred to when the forward press table change data is “7”. The forward-press control change table defines the change status and the second-to-third stop stop table at the time of forward push according to the change target position (scheduled stop position of the left reel 3L).

For example, if the change status acquired based on the first stop table for forward pressing is “1” and the planned stop position of the left reel 3L is “8”, the change status becomes “0”, When pressed forward, the stop table number for the second and third stops is "12".

(Stop table for 2nd and 3rd stop when pushing forward and stop table when pushing irregularly)
Next, with reference to FIGS. 39 to 42, the forward pressing second/third stopping stop table and the irregular pressing stop table will be described. The forward pressing second/third stop table and the irregular pressing stop table define 1-byte stop data corresponding to each of the symbol positions “0” to “20”.

Whether the stop data defined by the second/third stop table for forward pressing and the stop table for irregular pressing is appropriate as the position at which the symbol position associated with itself is the position to stop the rotation of the reel Have information Then, in this stop data, the information as to whether or not the corresponding symbol position is appropriate as the position for stopping the rotation of the reel is set in the bit corresponding to the column of "A line" and the bit corresponding to the column of "B line". It is supposed to be assigned. In addition, the stop data defines which of these two types of information should be adopted by allocating a bit corresponding to the column of "line change".

That is, the forward pressing second/third stop table and the irregular pressing stop table define a plurality of ways of determining the position at which the reel rotation is stopped. Therefore, even if the stop start position is the same symbol position, it is possible to change the position to stop the rotation of the reel based on the stop position at the first stop. Such a configuration is intended to compress information.

The forward-pressed second/third stop stop table shown in FIG. 39 is referred to when the forward-pressed second/third stop stop table number is "4". The forward pressing second/third stop table shown in FIG. 40 is referred to when the forward pressing second/third stop table number is "8". The forward press second/third stop stop table shown in FIG. 41 is referred to when the forward press second/third stop stop table number is "12".

The irregular press-time stop table shown in FIG. 42 is referred to when the irregular press-time table selection data is “8”.

The determination of the sliding piece number determination data is performed as follows. First, which of the eight bit strings (the leftmost column in the drawing is the bit 1) forming the stop data is designated according to the type of the stop button in which the stop operation is detected. For example, when the middle stop button 17C is pressed, the column of "medium reel A line data" of bit 4 is designated.

Then, referring to the designated bit string, for each symbol position from the stop start position to the range of the maximum number of sliding pieces, a search is sequentially performed as to whether or not "1" is defined as the corresponding data. As a result of this search, the difference from the stop start position to the symbol position for which "1" is defined as the corresponding data is determined as the sliding piece number determination data.

It should be noted that whether to change the reference bit string from the "A line" column to the "B line" column is referred to the "line change" column, and "1" is defined in the data corresponding to the stop start position. It is determined by whether or not it has been done. Then, when it is determined to change the line, the column of "B line" is designated thereafter, and the above search is performed.

(Pull-in priority table selection table)
Next, the attraction-in priority table selection table will be described with reference to FIG. The pull-in priority table selection table defines the pull-in priority table number according to the pressing order and each stop operation. The attraction-in priority table number is data for designating the attraction-in priority table (see FIG. 42).

The attraction priority table selection table shown in FIG. 41 is referred to when the attraction priority table selection data is “0”. When "0" is determined as the pull-in priority table selection data, for example, when the number for turning cylinder stop is "3" (see FIG. 34), "3" is determined as the number for turning cylinder stop. It is when the small win/replay data pointer is "3". That is, in the present embodiment, when the internal winning combination is “RT1 Reps 1 to 36”, “RT2 Reps 1 to 8” and “Control Lip 10”, the attraction-in priority table selection table shown in FIG. 41 is referred to. (See FIGS. 31 and 32).

When the pull-in priority table selection table shown in FIG. 41 is referred to, the pull-in priority table number “4” is acquired for the first stop operation regardless of the pressing order (pushing order). Further, the pull-in priority table number “4” is also acquired for the second and third stop operations when the pressing order (pressing order) is “left center right” and “left center right”. On the other hand, the pull-in priority table number “3” is acquired for the second and third stop operations when the pressing order is “middle left/right”, “middle right left”, “right left middle” and “right middle left”. It

In the attraction priority table (not shown) having the attraction priority table number “4”, “RT2 rep” has a higher priority than “RT1 rep”. On the other hand, in the pull-in priority table (not shown) having the pull-in priority table number “3”, “RT1 rep” has a higher priority than “RT2 rep”.

(Incoming priority table)
Next, the attraction-in priority table will be described with reference to FIG. The pull-in priority table defines pull-in data according to a predetermined priority.

The pull-in priority table is used to search for a more appropriate number of sliding pieces in addition to the number of sliding pieces in the stop table. The priority order defines the order in which the withdrawal is preferentially performed between the types of the symbol combinations related to the winning. The pull-in data is represented as 1-byte data. In the structure of the attraction-in data, like the structures of the internal winning combination and the display combination described above, a unique symbol combination is assigned to each bit.

In the present embodiment, first, the number of sliding pieces is acquired based on the above-described stop table (see FIGS. 37 and 39 to 42). However, in addition to this number of sliding pieces, if a more appropriate number of sliding pieces exists, the number of sliding pieces is changed to an appropriate number. That is, in the present embodiment, the more appropriate number of sliding pieces is determined based on the priority of the combination of symbols which is permitted to be displayed by the internal winning combination, regardless of the number of sliding pieces acquired by the stop table.

The attraction-in priority table shown in FIG. 44 is a table that is referred to when the attraction-in priority table number is “5”, and defines the priorities “1” to “3” and attraction-in data according to the internal winning combination. doing.

In the attraction priority table shown in FIG. 44, attraction data corresponding to "bell middle tier, bell crossdown" is defined for priority "1", and "all replays, bell top" for priority "2". It defines the corresponding pull-in data. Further, with respect to the priority order “3”, the pull-in data corresponding to “others (opportunity chance, all fixed hands, all cherries, all ice)” is defined.

When the attraction-in priority table shown in FIG. 44 is referred to, the display of the symbol combination of “bell middle tier, bell crossdown” is preferentially performed over the display of the other symbol combinations.
In addition, all replays are all internal winning combinations related to replays defined in the symbol combination table (see FIGS. 11 to 17) such as RT1 to 4 rips and control rips. The all winning combinations are the winning combinations A and B defined in the symbol combination table. All cherries mean all the internal winning combinations related to cherries defined in the symbol combination table such as square choi and medium choi. The whole ice is all internal winning combinations related to the ice specified in the symbol combination table such as the middle ice, ice crossdown, and ice crossup.

(Search order table)
Next, the search order table will be described with reference to FIG. The search order table defines a priority order (hereinafter, referred to as “search order”) from a predetermined numerical value range “0” to “4” as the number of sliding pieces.

In the search order table, each numerical value is searched in order from the lower order to the higher order, and as a result, the numerical value corresponding to the search order “1” is preferentially applied. The search order table is provided on the assumption that there are a plurality of sliding pieces having the same priority, and is configured to apply the search order having a higher order.

The search order table defines the search order based on the sliding piece number determination data described above. That is, the order of the numerical values to be preferentially applied is determined based on the sliding piece number determination data.

(Internal winning combination and press order correspondence table)
Next, with reference to FIG. 46, correspondence between the internal winning combination and the pressing order will be described. FIG. 46 is a correspondence table of the internal winning combination and the pressing order.

In the present embodiment, the display of the combination of the symbols of the RT1 lip to the RT4 lip and the display of the combination of the symbols of the bell are related to the operation of each RT gaming state. The pressing order is set for each of the display of the combination of the symbols RT1 to RT4 and the display of the combination of the bell symbols.

For example, when "2" is acquired as the small win/replay data pointer, the internal winning combination that permits the display of the combination of the symbols "RT1 rep 1-36" and "RT2 rep 1-8" is determined. (See FIG. 31). Then, the pushing order of "left middle right or left middle" is assigned to the small win/replay data pointer "2".

As a result, when "2" is acquired as the small win/replay data pointer, "RT2 Reps 1 to 8" is provided on condition that the pushing order performed by the player is "left middle right or left middle". A combination of symbols is displayed. On the other hand, when the pressing order performed by the player is not "left middle right or left right middle", a combination of symbols of "RT1 Reps 1 to 36" is displayed.

For example, when "21 to 24" is acquired as the small win/replay data pointer, an internal winning combination that permits the display of the combination of the symbols "bell upper row 1-8" and "bell upper row 1-16" is available. Each is determined (FIGS. 33 and 34). Then, the pushing order of "middle left or right or middle right left" is assigned to the small win/replay data pointers "21 to 24".

As a result, when "21 to 24" is acquired as the small win/replay data pointer, the "bell middle tier 1 to 8" is conditioned on the condition that the pressing order performed by the player is "middle left or right or middle right left". Or a combination of symbols "Bell upper row 1 to 16" is displayed. On the other hand, if the pressing order performed by the player is not "middle left or right or middle right left", and if the correct timing is when the stop button is pressed with respect to the spinning reels, "bell middle tier 1-8" or "bell upper tier 1-16 A combination of symbols is displayed. If the timing of pressing the stop button on the rotating reel is incorrect, “Bell spill” is displayed.

(Symbol corresponding winning operation flag data table)
Next, with reference to FIG. 47, the symbol-based winning operation flag data table will be described.

The symbol corresponding winning operation flag data table defines the data of the internal winning combination that can be displayed according to the reel type and the symbol of each reel displayed on the winning determination line. That is, by referring to the symbol corresponding winning operation flag data table, it is possible to determine the internal winning combination that can be displayed at that time. The symbol corresponding winning operation flag data table is provided according to the symbol combination table (see FIG. 11 to FIG. 17) (for each inserted number defined in the symbol combination table, or for each gaming state). For example, at the time of inserting two pieces (in the BB), since the symbol combination relating to BB1 (blue 7, blue 7, blue 7) is not defined in the symbol combination table, the symbol code “00000001” (blue 7) of each reel. 0 is defined in bit 0 (corresponding to BB1) of the storage area 1 of (corresponding to).

For example, the storage areas 1 to 28 corresponding to the symbol code “00000001” in the reel type “left” can be displayed when the symbol “blue 7” is stopped in the middle stage (on the winning determination line) of the left reel 3L. "1" is set in the bit corresponding to the winning combination. The data defined in the symbol corresponding winning operation flag data table is ANDed with the data stored in the symbol code storage area (see FIG. 52) described later and stored.

[Structure of storage area provided in main RAM]
Next, the configuration of various storage areas provided in the main RAM 53 will be described with reference to FIGS.

(Display combination storage area)
First, the configuration of the display combination storing area will be described with reference to FIG. The display combination storing area is composed of display combination storing areas 1-28 each represented by 1-byte data.

In each of the display combination storing areas 1 to 28, when the target bit is set to "1", it means that the symbol combination corresponding to the bit is displayed on the winning determination line. Further, when all the bits are “0”, it indicates that a combination of symbols related to winning or a combination of symbols related to bonus operation is not displayed on the winning determination line. Even when the combination of symbols relating to BB1 or BB2 is displayed when the number of inserted medals is two (during BB), it is not stored in the display combination storing area.

The main RAM 53 is provided with an internal winning combination storing area and a carryover combination storing area (not shown). The internal winning combination storing area and the internal carryover combination storing area have the same configurations as the display winning combination storing area. In the internal winning combination storing areas 1 to 28, when "1" is set in a plurality of bits, the display of the symbol combination corresponding to each bit is permitted. Further, when all the bits are "0", the contents are lost.

When “BB1, BB2, RB1 to 7” is determined as the internal winning combination as a result of the internal lottery, the internal winning combination is stored in the carryover combination storing area as the carryover combination. The internal carryover combination stored in the internal carryover combination storage area is held without being cleared until the corresponding symbol combination (for example, "blue 7-blue 7-blue 7") is displayed on the winning determination line. Then, while the carryover combination is stored in the carryover combination storing area, the carryover combination is stored in the internal winning combination storing area in addition to the internal winning combination determined by the internal lottery.

(Game status flag storage area)
Next, with reference to FIG. 49, the configuration of the game state flag storage area will be described. The game status flag storage area stores a game status flag consisting of 1 byte. The gaming state flag is assigned a unique bonus type or RT type for each bit. When “1” is set in the target bit in the game state flag storage area, the corresponding bonus game or RT is being operated. For example, when "1" is set in bit 0 of the game state flag storage area, the operation of BB1 or BB2 is performed, and it is in the BB game state.

(Operation stop button storage area)
Next, the configuration of the operation stop button storage area will be described with reference to FIG. The operation stop button storage area stores an operation stop button flag consisting of 1 byte. In the operation stop button flag, the operation state of the stop button is assigned to each bit. For example, when the left stop button 17L is the stop button pressed this time, that is, the operation stop button, "1" is stored in bit 0 of the operation stop button storage area.

For example, if the left stop button 17L is a stop button that has not been pressed, that is, if it is a valid stop button, "1" is stored in bit 4. The main CPU 51 identifies the stop button pressed this time and the stop button not pressed yet based on the data stored in the operation stop button storage area.

(Pressing order storage area)
Next, with reference to FIG. 51, the configuration of the pressing order storage area will be described. The pressing order storage area stores a pressing order flag composed of 1 byte. In the pressing order flag, a unique pressing order type is assigned to each bit. For example, if the pressing order is "left middle right", "1" is stored in bit 0 of the pressing order storage area.

(Design code storage area)
Next, the configuration of the symbol code storage area will be described with reference to FIG. In the symbol code storage area, the symbol code (symbol code storage area) of the symbol of the reel operated most recently and the displayable symbols (symbol code storage areas 2 to 29) are stored. After the entire stop, the symbol combination is stored in the symbol code storage areas 2 to 29.

In the symbol code storage area shown in FIG. 52, when the stop control position is determined, the winning operation flag data corresponding to the symbol (code) at the stop control position is read from the symbol corresponding winning action flag data table, and the symbol code The logical product of the data in the storage area is stored.

(Entrance priority data storage area)
Next, the attraction-in priority data storage area will be described with reference to FIG. The pull-in priority data storage area includes three pull-in priority data storage areas for the left reel, a pull-in priority data storage area for the middle reel, and a pull-in priority data storage area for the right reel, depending on the reel type. Composed.

In each attraction priority data storage area, priority attraction priority data determined in accordance with each symbol position “0” to “20” of the corresponding reel is stored. In the present embodiment, by referring to the pull-in priority data storage area, it is searched whether or not there is a more appropriate number of sliding pieces in addition to the number of sliding pieces determined based on the above-mentioned stop table. ..

The contents of the priority attraction-in data stored in the attraction-in priority data storage area differ depending on the type of attraction-in priority table (see FIG. 44) referred to when determining the priority attraction-in data. The attraction priority data storage area shown in FIG. 53 is an example in which the attraction priority table number is "5". In this attraction-in priority data storage area, bit 3 of the priority attraction-in priority data corresponds to "all bell middle row" and "all bell crossdown", and bit 2 corresponds to "all replay" and "all bell upper row". Bit 1 corresponds to “others (all chances, all fixed hands, all choi and all ice)”.

"Stoppable" corresponding to bit 0 is for loss. When the symbol at the target symbol position is displayed, if a combination of symbols corresponding to a winning combination that has not been determined as an internal winning combination is displayed, "0" is set in bit 0 of the priority attraction-in order data. Is stored.

The priority attraction-in order data indicates that the larger the value, the higher the priority. For example, in the attraction priority data storage area shown in FIG. 53, the priority attraction data having the highest priority is “00001111” (at least one of bell middle tier and bell crossdown+all replays/bell upper tier). At least any one+at least one of the others). On the other hand, the priority attraction-in priority data having the lowest priority is “00000000” (stop prohibited).

By referring to the priority attraction-in order data, it is possible to make a relative evaluation of the priority order among the symbols arranged on the peripheral surface of the reel. That is, the symbol for which the largest value is determined as the priority attraction-in order data is the symbol with the highest priority. Therefore, the priority attraction-in order data can be said to indicate the order between the symbols arranged on the peripheral surface of the reel. In addition, when there are a plurality of symbols having the same value of the priority attraction-in order data, the above-described search order table (see FIG. 45).
One symbol is determined according to the search order defined by.

[Configuration of data table stored in sub ROM]
Next, the configuration of various data tables stored in the sub ROM 92 will be described with reference to FIGS. 54 to 71.

(Pt lottery table in BB)
First, with reference to FIG. 54, the pt in BB (point) lottery table will be described. The BB in pt lottery table defines the lottery value when the BB in pt is determined according to the winning number.

In the present embodiment, the in-BB pt random determination process is performed by referring to the in-BB pt random determination table during BB. In the pt during BB lottery process, random number values extracted from a predetermined range of numerical values “0 to 32767” are sequentially subtracted by a lottery value defined according to the winning number. Then, an internal lottery of pt in the BB is performed by determining whether the result of the subtraction is negative (0 or less). That is, the pt in the BB when the result of the subtraction becomes negative (0 or less) is acquired. The lottery process performed by the sub CPU 81 performs the above-mentioned lottery (lottery in which the lottery value is subtracted from the extracted random number value (0 to 32767)).

The acquired pt in BB is accumulated in BB. Then, the accumulated pt in BB is used when performing an AT lottery process and a lottery process in the BB set number (see FIGS. 108 and 115) described later.

(Mode 9 lottery table for lottery)
Next, with reference to FIG. 55, a pt (point) lottery table for mode 9 lottery will be described. The pt lottery table for mode 9 lottery defines the lottery value when the pt for mode 9 lottery is determined according to the internal winning combination and the mode.

In the present embodiment, the pt lottery processing for Mode 9 lottery is performed with reference to the pt lottery table for Mode 9 lottery. The obtained mode 9 lottery pts are accumulated and used when performing a mode 9 lottery process (see FIG. 94) described later. It should be noted that “Rep 3 consecutive” is a case where the replay is won three times in a row, and “Rep 4 consecutive” is a case where the replay is won four consecutive times. Further, “5 consecutive rep” is a case where the replay is won in succession for 5 consecutive times. Further, "Don Lip" is a replay in which "Don-Don-Don" is displayed on the ineffective line.

(Description of modes)
Here, with reference to FIG. 56, modes executed in the sub control circuit 42 will be described. In the gaming machine of this embodiment, one of modes 1 to 9 is executed.

As shown in FIG. 56, "mode 1" is a normal game state, and is a state in which the probability of becoming an AT winning in the AT lottery described later is set to a low probability. "Mode 2" is a normal gaming state, in which the probability of winning the AT in the AT lottery is set to the medium probability. “Mode 3” is a normal gaming state in which the probability of winning an AT in the AT lottery is set to a high probability. The medium probability in this embodiment is higher than the low probability and lower than the high probability. The normal gaming state is a gaming state other than the bonus game (BB gaming state, RB8 gaming state).

The “mode 4” is a mode in which the mode shifts only after the BB ends, and is a state in which the probability of winning the AT in the AT lottery is set to an ultra-high probability. The ultra-high probability in this embodiment is higher than the high probability. “Mode 5” is a state that is a sign from when AT winning is determined by AT lottery until ART is started. “Mode 6” is a state in which AT (with navigation) is executed until the state shifts to the RT3 gaming state or the RT4 gaming state in which the probability of determining an internal winning combination related to replay (re-play) is favored.

“Mode 7” is a mode for the RT3 gaming state, in which the probability of winning the AT in the AT lottery is set to a low probability. “Mode 8” is a mode for the RT3 gaming state, and is a state in which the probability of winning the AT in the AT lottery is set to a high probability. "Mode 9" is a mode for the RT4 game state.

(Mode change lottery table)
Next, with reference to FIG. 57, the mode transition lottery table will be described. The mode transfer lottery table defines the lottery value of the mode to be transferred according to the current mode of the winning number.

In the present embodiment, the mode transition lottery table (the internal lottery of the mode) is performed by referring to the mode transition lottery table in the modes 1 to 3. For example, when the current mode is “mode 1” and the winning number is “0 (miss)”, the same “mode 1” as the current mode is maintained.

(Mode change lottery table at the end of ART)
Next, with reference to FIG. 58, the ART end mode transition random determination table will be described. The ART transition mode lottery table defines the lottery value of the mode to be shifted after the ART is finished.

In the present embodiment, at the time of ART termination, the ART termination mode transition lottery table is referred to, and the ART termination mode transition processing (see FIG. 113) is performed. In this ART-end-time mode shift processing, the internal lottery of the mode to be shifted after the ART is finished is performed. For example, the probability of shifting to “mode 1” at the end of ART is “19768/32768”.

(Mode 9 lottery table)
Next, with reference to FIG. 59, the mode 9 lottery table will be described. The mode 9 lottery table defines the lottery value of the winning or non-winning transition to the mode 9 according to the accumulation of the mode 9 lottery pt.

In the present embodiment, the mode 9 lottery process (see FIG. 107) is performed with reference to the mode 9 lottery table. In the mode 9 lottery process, internal lottery for winning or non-winning of the shift to mode 9 is performed. For example, when the accumulation of the pt for the lottery in Mode 9 is “8”, the probability of determining “winning” for the shift to Mode 9 is “50/32768”.

(AT lottery table)
Next, an AT lottery table will be described with reference to FIG. The AT lottery table defines lottery values such as AT (assist time) according to the internal winning combination and the mode.

In this embodiment, the AT lottery process (see FIG. 115) is performed with reference to the AT lottery table.

In this AT lottery process, random number values extracted from a predetermined numerical value range “0 to 32768” are sequentially subtracted by a lottery value defined according to the internal winning combination and the current mode. Then, an internal lottery is performed to determine whether or not the AT has won by determining whether or not the result of the subtraction is negative (0 or less).

In the AT lottery table, the lottery values are defined for “miss”, “geek sign”, and “special lottery” in addition to “AT lottery”. That is, in the AT lottery process, any one of “AT winning”, “miss”, “predatory sign” and “special winning” is determined. For example, when the internal winning combination is "single BB" in "mode 1", "AT winning" is always determined.

When “AT winning” or “special winning” is determined, the mode shifts to mode 5, and the number of precursor Gs determined in the predictive G number determination process (see FIG. 115) described later is stored in a storage area (not shown). .. That is, it is possible to determine whether or not the sign G is in progress by determining whether or not the mode is 5.

In addition, the “special winning” is provided to facilitate the selection of the one with a small number of precursor G due to the trigger of the AT winning. In the present embodiment, as a trigger for the AT winning, for example, a winning combination such as a “determined winning combination” or a “5 rep” is confirmed, that is, an AT winning is easy for the player to understand.

When the “geek sign” is determined, the mode transition is not performed, and the number of sign G determined in the sign G number determination process is stored in a storage area (not shown). That is, if the number of precursor G is stored even though it is not in mode 5 (predictive G), it is in the premonition. When the “miss” is determined, the mode is not changed and the number of precursor G is not stored.

(Set number lottery table)
Next, with reference to FIG. 61, a set number random determination table will be described. The set number lottery table defines the lottery value of the set number according to the internal winning combination and the mode.

The number of sets is the number with one ART set. ART is a privilege that combines AT (assist time) and RT (replay time). The ART in the present embodiment is executed from the start of AT (assist time) until the transition to the RT3 gaming state or the RT4 gaming state until the end of 50 games in the RT3 gaming state or the RT4 gaming state. ART is managed as one set by a combination of mode 6 and any one of modes 7-9. In addition, in the RT3 gaming state and the RT4 gaming state, the probability that the replay is determined as the internal winning combination is preferentially (increased).

In the present embodiment, the set number random determination process is performed by referring to the set number random determination table (see FIG. 108). In the lottery process for the number of sets, internal lottery of the number of sets is performed. For example, when the current mode is “mode 1” and “miss” is determined as the internal winning combination, “1” is acquired as the number of sets.

(Lottery table for number of sets in BB)
Next, with reference to FIG. 62, the BB medium set number random determination table will be described. The lottery table for the number of sets in BB defines the lottery value of the number of sets according to the cumulative value of pt in BB.

In the present embodiment, the BB medium set number random determination process is performed with reference to the BB medium set number random determination table (see FIG. 102). In the lottery process for the number of sets in BB, the number of sets in BB is internally randomly determined.

For example, the probability that “1” is determined as the number of sets when the cumulative value of pt in BB is “2” is “31758/32768”. The distribution of the lottery value corresponding to the number of sets may be changed according to the cumulative value of pt in BB.

(Preliminary G number determination table)
Next, with reference to FIG. 63, the precursor G (game) number determination table will be described. The precursor G number determination table defines the lottery value of the precursor G number according to the current mode and the reference timing.

In this embodiment, the precursor G number determination process is performed by referring to the precursor G number determination table (see FIG. 102). In this predictive G number determination processing, the internal lottery of the predictive G number is performed. For example, when the current mode is “modes 1 to 3” and is after BB, the probability that “20” is determined as the number of precursor G is “6268/32768”.

(Mode 4G number lottery table)
Next, with reference to FIG. 64, a mode 4G (game) number random determination table will be described. The mode 4G number lottery table defines the lottery value with respect to the value set in the mode 4 counter.

In the present embodiment, the mode 4G number lottery processing (see FIGS. 108 and 115) is performed by referring to the mode 4G number lottery table to determine the value to be set in the mode 4 counter. In this process, the value to be set in the mode 4 counter is internally sampled. For example, the probability that “10” is determined as the value to be set in the mode 4 counter is “1000/32768”.

(Mission occurrence lottery table)
Next, the mission occurrence lottery table will be described with reference to FIG. The mission occurrence lottery table defines the lottery values of the winning of the mission occurrence and the non-winning lottery according to the internal winning combination.

In the present embodiment, the mission occurrence lottery processing (see FIG. 109) is performed with reference to the mission occurrence lottery table. In this mission generation lottery processing, internal lottery for winning or non-winning mission generation is performed.

For example, when the internal winning combination is "SB2", the probability that the mission occurrence is "winning" is "3276/32768". When the mission occurrence is “winning”, the mission flag, the mission precursor counter, the guarantee counter, and the card counter are set. The set values of the mission precursor counter, the security counter, and the card counter in this embodiment are set to 7, 20, and 10, respectively.

(Mission end lottery table)
Next, the mission end lottery table will be described with reference to FIG. 66. The mission occurrence lottery table defines the lottery values of the winning and non-winning missions according to the internal winning combination.

In the present embodiment, the mission end lottery process is performed with reference to the mission end lottery table (see FIG. 109). In this mission end lottery processing, an internal lottery for winning or non-winning (continuation) the end of the mission is performed. For example, when the internal winning combination is “miss”, the probability that the mission end is “non-winning (continuation)” is “26768/32768”.

(Card lottery table)
Next, with reference to FIG. 67, the card lottery table will be described. The card lottery table defines the lottery value of the number of cards according to the internal winning combination and the guaranteed section.

In the present embodiment, processing for determining the number of cards by referring to the card lottery table (see FIG. 109) is performed. In this process, an internal lottery for the number of cards is performed.

For example, when the internal winning combination is "miss" and is within the guaranteed section, "0" is determined as the number of cards. The determined number of cards is subtracted from the card counter. Further, the guarantee section is inside the guarantee section when the guarantee counter is 1 or more, and is outside the guarantee section when the guarantee counter is 0.

(Launch table for launch preparation and production)
Next, the launch preparation effect content lottery table will be described with reference to FIG. 68. The launch preparation effect content lottery table defines the lottery value of the effect number of the launch preparation effect according to the success counter and the internal winning combination.

In the present embodiment, the process of determining the effect number (see FIG. 111) is performed by referring to the launch preparation effect content lottery table. In this processing, an internal lottery of the effect number of the launch preparation effect is performed.

For example, when the success counter is "1" or more, the probability that "6" is determined as the effect number is "11000/32768". Then, when "6" is determined as the effect number, the torch is activated when the start lever 16 is operated, and the "fireworks ball flash" effect in which the fireworks ball shines when the pressing of the stop button of the third stop operation is stopped Is done. This "fireworks ball flash" is an effect for notifying that the number of sets to be described later has been added.

When BB is determined as the internal winning combination during the launch preparation effect, the effect number “7” is determined. When "7" is determined as the effect number, the torches are operated when the start lever 16 is operated, and when the pressing of the stop button of the third stop operation is stopped, "big hit" is displayed on the liquid crystal display device 10. .. The display of "big hit" is an effect for notifying that BB has been decided as an internal winning combination.

(Lottery table for continuous number of launch preparations)
Next, the launch preparation effect continuous number lottery table will be described with reference to FIG. 69.

The launch preparation effect continuous number lottery table defines the lottery value of the number of consecutive times of launch preparation effect according to the added number.

In the present embodiment, a process (see FIG. 111) of determining the continuous number of launch preparation effects is performed by referring to the launch preparation effect continuous number lottery table. In this processing, internal lottery is performed for the number of consecutive times that the launch preparation effect is generated. For example, when the added number is "2", "2" is determined as the continuous number.

The added number is the number of sets added in the AT lottery process in the game. Further, when the number of consecutive times is "0", the launch preparation effect is completed once, and when the number of consecutive times is "1", the launch preparation effect is generated twice in total. Further, in the case of further addition during the launch preparation presentation, the added number is added to the continuous number. In other words, in the present embodiment, the player is notified of the number of additional ARTs by the number of times the launch preparation effects have successively occurred.

(Lottery table at the end of BB)
Next, the lottery table at the end of the BB will be described with reference to FIG. The lottery table at the end of the BB defines the lottery value of the AT winning according to the accumulation of pt in the BB.

In the present embodiment, after the BB ends, the AT lottery process (see FIG. 115) is performed by referring to the BB end lottery table. In this AT lottery process, an internal lottery for AT winning or losing is performed. For example, when the accumulation of pt in BB is “2”, the probability that the AT winning is determined is “4096/32768”.

(Navi compatible table)
Next, the navigation correspondence table will be described with reference to FIG. The navigation correspondence table defines the presence/absence of navigation according to the mode and the small win/replay data pointer.

As shown in FIG. 71, in the present embodiment, in the modes 6 to 9, the pushing order for making the game state beneficial to the player is notified (navigation). A circle in FIG. 71 indicates the pressing order indicated by a thick frame in the correspondence table of the winning combination and the stopping order (see FIG. 46). For example, in the case of "mode 6" and the small win/replay data pointer is "17", the pushing order of "left center right" or "left center right" is notified.

In addition, in the present embodiment, if the mode 9 flag to be described later is turned on in the "mode 6" and the small win/replay data pointer is "7 to 10," "RT4 rep" is set. Notify the displayed pressing order. On the other hand, when the mode 9 flag described later is off, the push order in which "RT3 REP" is displayed is notified.

[Explanation of operation of main processing unit]
Next, the contents of the program executed by the main CPU 51 of the main processing unit 50 will be described with reference to FIGS.

(Main flow chart under control of main CPU)
First, a main flowchart under the control of the main CPU 51 will be described with reference to FIG.

When the power of the pachi-slot machine 1 is turned on, first, the main CPU 51 performs initialization processing at the time of turning on the power, which will be described later with reference to FIG. 73 (S1). In this initialization processing, it is determined whether the backup is normal or the setting has been changed appropriately, and the initialization is performed according to the determination result.

Next, the main CPU 51 conducts initialization processing at the end of one game (S2). In this initialization processing, the designated storage area in the main RAM 53 is cleared. The designated storage area is, for example, an internal winning combination storage area, a display combination storage area, or a storage area that needs to be erased for each game.

Next, the main CPU 51 performs medal acceptance/start check processing, which will be described later with reference to FIG. 74 (S3). In this process, the input of the medal sensor 35S and the start switch 16S is checked.

Next, the main CPU 51 extracts the random number value and stores it in the random number value storage area provided in the main RAM 53 (S4). When the extracted random number value is stored in the random number value storage area, the main CPU 51 performs an internal lottery process, which will be described later with reference to FIGS. 75 and 76 (S5). In this processing, the internal winning combination is determined by lottery based on the random number value.

Next, the main CPU 51 conducts reel stop initialization processing which will be described later with reference to FIG. 78 (S6).

Next, the main CPU 51 performs a start command transmission process (S7). That is, the main CPU 51 transmits the start command to the sub control circuit 42. The start command is configured to include parameters that specify an internal winning combination and the like.

Next, the main CPU 51 performs weight processing (S8). In this process, if the predetermined time (for example, 4.1 seconds) has not elapsed from the start of the previous game, the waiting time is consumed until the predetermined time elapses.

Next, the main CPU 51 executes reel rotation start processing (S9). That is, the main CPU 51 requests rotation start of all reels. When the rotation start of all reels is requested, the driving of the stepping motors 81L, 81C, 81R is controlled by the constant cycle interrupt processing (see FIG. 93) executed at a constant cycle (1.1173 msec), and each reel 3L is controlled. , 3C, 3R starts to rotate. At this time, each of the reels 3L, 3C, 3R is accelerated until its rotation reaches a constant speed, and then controlled so that the constant speed is maintained.

Next, the main CPU 51 performs a pull-in priority storage process, which will be described later with reference to FIG. 79 (S10). In this process, the attraction priority data is acquired and stored in the attraction priority data storage area.

Next, the main CPU 51 conducts reel stop control processing which will be described later with reference to FIG. 82 (S11). In this process, the rotation of the corresponding reel is stopped based on the timing of pressing the stop buttons 17L, 17C, 17R and the internal winning combination.

Next, the main CPU 51 conducts a winning search process (S12). In this process, the data in the symbol code storage area (2 and later) is stored in the display combination storage area. In addition, the reels 3L, 3C, and 3R are collated with the symbol combination table (see FIGS. 11 to 17) and the symbol combination displayed on the winning determination line after all the stops. Then, it may be determined whether or not the display combination is displayed on the winning determination line, and the determination result may be stored in the display combination storage area (see FIG. 48).

Next, the main CPU 51 performs medal payout processing (S13). In this process, the hopper 33 is driven and the credit number is updated based on the payout number of the display combination determined in S12, and the medals are paid out. The main control circuit 41, which executes the winning search process of S12 and the medal payout process of S13, constitutes a game medium giving unit according to the present invention.

Next, the main CPU 51 performs RT control processing which will be described later with reference to FIG. 90 (S14). In this process, the RT game state is managed.

Next, the main CPU 51 conducts bonus end check processing which will be described later with reference to FIG. 91 (S15). In this process, it is checked whether or not to end the bonus operation with reference to various counters for managing the timing of ending the bonus.

Next, the main CPU 51 conducts bonus operation check processing which will be described later with reference to FIG. 92 (S18). In this process, it is checked whether or not the bonus operation is started and whether or not the re-game is performed. When the bonus operation check process ends, the main CPU 51 performs the process of S2 again.

(Initialization processing at power-on)
Next, with reference to FIG. 73, a main flowchart of the initialization process when the power is turned on will be described.

First, the main CPU 31 initializes the output port (S20). In this process, the output port that has become indefinite immediately after the power is turned on is set to off.

Next, the main CPU 51 executes a rising waiting process of the sub control circuit 42 (S21). In this process, the sub-control circuit 42 requires a startup time longer than that of the main control circuit 41. Therefore, a standby process for 600.4 msec is performed to match the operation timings of the main control circuit 41 and the sub-control circuit 42 when they rise.

Next, the sum of the storage area is calculated (S22). In this processing, the sum value of the range is calculated by adding the sum value storage area saved in the power interruption processing to the storage area of the range calculated in the power interruption processing. The sum value calculated in this process is 0 if the sum value is normal, and is a value other than 0 if the sum value is abnormal.

Next, the sum value is checked (S23) and the power interruption flag saved when the power interruption process occurs (S24). If the sum value is normal and the power failure flag is on, the process proceeds to S108. If the sum value is abnormal or the power failure flag is off, and the setting switch is on (S25), the setting value changing process is performed. (S26) is performed, and then the area initialization process (S27) at the time of changing the setting is performed, and when the setting switch is off, the process waits until the setting switch is turned on.

Next, the power interruption flag is cleared (S28), and the process is returned to the main routine.

(Medal reception/start check processing)
Next, the medal acceptance/start check processing will be described with reference to FIG.

First, the main CPU 51 determines whether or not there is an automatic insertion request (S31). The presence/absence of this automatic loading request is determined by whether or not the automatic loading counter is zero. That is, when the automatic charging counter is “0”, it is determined that there is no automatic charging request, and when the automatic charging counter is “1” or more (“2” or “3” in this embodiment), the automatic charging is automatically performed. It is determined that there is a request for input.

The automatic insertion counter is data for identifying whether or not any of the display combinations relating to the re-play such as "RT1 rep 1 to 36" has been established in the previous unit game. When any one of the display combinations related to the re-play is established, the medals of the number of coins inserted in the previous unit game are automatically inserted into the automatic insertion counter.

When determining that there is an automatic loading request, the main CPU 51 performs automatic loading processing (S32). In this process, the value of the automatic insertion counter is copied to the insertion number counter, and then the value of the automatic insertion counter is cleared.

On the other hand, when determining that there is an automatic insertion request, the main CPU 51 permits medal acceptance (S33). In this process, the solenoid of the selector 35 (see FIG. 3) is driven, and medals inserted through the medal insertion slot 11 are accepted. The received medals are counted and then guided to the hopper 33.

Next, the main CPU 51 sets the maximum value of the inserted number according to the game state (S34). In the present embodiment, the maximum value of the inserted number is set to "3" in the general game state and the RB1 game state, and the maximum value of the inserted number is set to "2" in the RB8 (BB) game state.

Next, the main CPU 51 determines whether or not the medal acceptance is permitted (S35). When determining that the medal acceptance is not permitted, the main CPU 51 shifts to the processing of S39. On the other hand, when it is determined that the medal acceptance is permitted, the main CPU 51 performs a medal insertion check process (S36). In this process, it is determined whether a medal has been inserted, and when a medal has been inserted, "1" is added to the inserted number counter.

Next, the main CPU 51 transmits a medal insertion command to the sub control circuit 42 (S37). The medal insertion command includes a parameter for specifying the number of inserted medals and the like.

Next, the main CPU 51 determines whether or not the inserted number is the number at which the game can be started (S38). When determining that the inserted number is not the game startable number, the main CPU 51 returns the process to S35. On the other hand, when it is determined that the inserted number is the number at which the game can be started, or when it is determined that the medal acceptance is not permitted in the process of S35, the main CPU 51 determines whether the start switch is ON (S39). ..

When determining that the start switch is not on, the main CPU 51 returns the process to S35. On the other hand, when determining that the start switch is on, the main CPU 51 prohibits passage of medals (S40). As a result, the solenoid of the selector 35 (see FIG. 3) is not driven, and the inserted medal is ejected from the medal payout opening 18. When this process ends, the main CPU 51 ends the medal acceptance/start check process, and moves the process to the main flow (see FIG. 72).

(Internal lottery process)
Next, the internal lottery process will be described with reference to FIGS. 75 and 76. The main control circuit 41 that executes this internal lottery process constitutes an internal winning combination determination means according to the present invention.

First, the main CPU 51 sets an internal lottery table according to the gaming state (S51). That is, the game state is grasped by referring to the game state flag storage area (see FIG. 49), and the type of the internal lottery table and the lottery number are determined based on the internal lottery table determination table (see FIG. 21). Note that the lottery number indicates the number of times the lottery value is subtracted and whether or not a digit has occurred is determined for each winning number defined by the internal lottery table.

Next, the main CPU 51 conducts lottery value change processing which will be described later with reference to FIG. 77 (S51). In this process, the lottery value of the winning number related to the replay or/and the small winning combination is changed according to the game state.

Next, the main CPU 51 acquires the random number value stored in the random value storage area (S53). Then, 1 is set as the initial value of the winning number. Next, the main CPU 51 refers to the internal lottery table to obtain the lottery value corresponding to the winning number, and subtracts the lottery value from the random number value (S54).

Subsequently, the main CPU 51 determines whether or not the calculation result is >0 (S55). When determining that the calculation result is >0, the main CPU 51 updates the random number value and the winning number (S56). Specifically, the value of the calculation result is set to a random value, and the winning number is incremented by 1.

Next, the main CPU 51 determines whether or not all the winning numbers have been checked (S57). When determining that all the winning numbers have been checked, the main CPU 51 sets 0 as a data pointer (S58). That is, "0" is set as the small win/replay data pointer and the bonus data pointer.

When it is determined in the process of S55 that the calculation result is not >0 (calculation result≦0), the main CPU 51 acquires the small win/replay data pointer and the bonus data pointer according to the current winning number (S59). ).

After the processing of S59 or the processing of S58, the main CPU 51 refers to the small winning combination/replay internal winning combination determination table and acquires the internal winning combination based on the small winning combination/replay data pointer (S60). Then, the main CPU 51 stores the acquired internal winning combination in the internal winning combination storing area (S61).

Next, the main CPU 51 determines whether or not the data stored in the carryover combination storage area is "00000000" (S62). When it is determined that the data stored in the carryover combination storing area is “00000000”, the main CPU 51 refers to the bonus internal winning combination determination table and acquires the internal winning combination based on the bonus data pointer ( S63). Next, the main CPU 51 stores the acquired internal winning combination in the internal winning combination storing area (S64).

Next, the main CPU 51 clears bits 4 to 7 and the RT game number counter of the game state flag storage area (see FIG. 49) (S65). That is, any one of the RT1 to 4 game states shifts to the RT0 game state. Next, the main CPU 51 updates the internal winning combination storing area based on the internal winning combination stored in the internal carryover combination storing area (S66). After that, the main CPU 51 ends the internal lottery process and moves the process to the main flow (see FIG. 72).

(Lottery value change processing)
Next, the lottery value change processing will be described with reference to FIG.

First, the main CPU 51 refers to the game state flag storage area (see FIG. 49) and determines whether or not the RT game state flag is ON (S71). When it is determined that the RT gaming status flag is ON, the main CPU 51 changes the lottery value of the winning numbers (1 to 15) related to the replay by referring to the corresponding RT internal lottery table (S72).

After the processing of S72 or when it is determined in the processing of S71 that the RT gaming status flag is not on, the main CPU 51 refers to the gaming status flag storage area (see FIG. 47), and the SB gaming status flag is on. It is determined whether or not (S73). When it is determined that the SB gaming state flag is not on, the main CPU 51 ends the lottery value change processing and shifts the processing to the internal lottery processing (see FIG. 75).

On the other hand, when it is determined that the SB gaming state flag is ON, the main CPU 51 refers to the SB1/2 internal lottery table (see FIG. 27) and changes the lottery value of the winning number (28) related to the small winning combination. Yes (S74). When the process of S74 ends, the main CPU 51 ends the lottery value change process and shifts the process to the internal lottery process.

(Reel stop initial setting process)
Next, the reel stop initialization process will be described with reference to FIG.

First, the main CPU 51 refers to the turning cylinder stop number selection table (FIG. 35) to acquire the turning cylinder stop number based on the internal winning combination (S91). Next, the main CPU 51 refers to the reel stop initialization table (see FIG. 36) and acquires each information based on the spinning cylinder stop number (S92). Each information in the present embodiment includes the pull-in priority table number, the pull-in priority table selection data, the table selection data when the forward pressing, the table change data when the forward pressing, the table change initial data when the forward pressing and the irregular table pressing data. Is.

Next, the main CPU 51 stores the rotating identifier “0FFH (11111111B)” in all the symbol code storage areas (see FIG. 52) (S93). After that, the main CPU 51 stores 3 in the stop button non-operation counter provided in the main RAM 53 (S94). The stop button non-operation counter is a counter for managing the number of stop buttons whose stop operation has not been detected. When the process of S94 is completed, the main CPU 51 ends the reel stop initialization process, and moves the process to the main flow (see FIG. 72).

(Storing processing for priority order)
Next, with reference to FIG. 79, the pull-in priority storage processing will be described.

First, the main CPU 51 stores the stop button non-operation counter in the main RAM 53 as the number of searches (S101). Next, the main CPU 51 conducts a search target reel determination process (S102). The main CPU 51 determines, for example, as the search target reel in order from the leftmost reel among the spinning reels.

For example, when all (three) reels are rotated, the left reel 3L is first determined as the search target reel. Then, when each processing up to S111 described below is performed on the left reel 3L and the processing returns to S102, the middle reel 3C is subsequently determined as the search target reel. Finally, the right reel 3R is determined as the search target reel.

Next, the main CPU 51 carries out a pull-in priority table selection process which will be described later with reference to FIG. 80 (S103). In this process, the attraction priority table is selected based on the internal winning combination and the operation stop button.

Next, the main CPU 51 sets "0" as the symbol position data and "21" as the number of symbol checks (S104). Subsequently, the main CPU 51 performs a symbol code acquisition process which will be described later with reference to FIG. 78 (S105). In this process, the symbol code is stored for the current symbol position data of the retrieval target reel.

Next, the main CPU 51 updates the display combination storing area based on the acquired symbol code and symbol code storing area (S106). At this point, a combination of symbols that may be displayed is stored in the display combination storing area based on the stopped symbol regardless of whether or not the internal winning combination is won.

Next, the main CPU 51 performs a pull-in priority order acquisition process (S107). In this process, the winning combination selected for the winning combination whose bit is "1" in the display combination storing area (see FIG. 48) and which is "1" in the internal winning combination storing area The priority table is acquired by referring to the priority table. In addition, when a symbol of a winning combination (for example, cherry) is displayed on some reels, the reels of “ANY” do not acquire the attraction priority data of the winning combination. Further, if there is a possibility that a winning combination will be confirmed for the reels for which the winning is confirmed, "prohibit stop (all bits 0)" is set.

Next, the main CPU 51 stores the acquired priority attraction-in order data in the attraction-in priority order data storage area (see FIG. 53) (S108). At this time, the priority attraction-in order data is stored so that the value of each priority and the bit in the storage area correspond to each other. Next, the main CPU 51 adds 1 to the symbol position data and subtracts 1 from the number of symbol checks (S109).

Next, the main CPU 51 determines whether or not the number of symbol checks is 0 (S110). When determining that the number of symbol checks is not 0, the main CPU 51 returns the processing to S105.

When it is determined that the number of symbol checks is 0 in the process of S110, the main CPU 51 determines whether or not the number of times of search has been performed (S111). When it is determined that the search has not been performed the number of times of search, the main CPU 51 returns the process to S102. On the other hand, when determining that the search has been performed the number of times of search, the main CPU 51 ends the attraction-in priority storage process, and moves the process to the main flow (see FIG. 72).

(Pull-in priority table selection process)
Next, the attraction-in priority table selection process will be described with reference to FIG.

First, the main CPU 51 determines whether or not the attraction-in priority table number is set (S121). When it is determined that the attraction-in priority table number is set, the main CPU 51 ends the attraction-in priority table selection processing and moves the processing to the attraction-in priority storage processing (see FIG. 79).

When it is determined in the process of S121 that the pull-in priority table number is not set, the main CPU 51 refers to the pressing order storage area (see FIG. 51) and the operation stop button storage area (see FIG. 50), and pulls in the corresponding pull-in table. The priority table number is set (S122).

In the process of S122, first, the pressing order storage area and the operation stop button storage area are referenced to acquire the pressing order and the operation stop button data. Next, referring to the pull-in priority table selection table corresponding to the pull-in priority table selection data, the pull-in priority table number is acquired based on the pressing order and the operation stop button. Then, the acquired priority table number is set.

When the processing of S122 is completed, the main CPU 51 terminates the attraction-in priority table selection processing, and moves the processing to the attraction-in priority storage processing.

(Design code acquisition process)
Next, the symbol code acquisition process will be described with reference to FIG. 81.

First, the main CPU 51 sets valid line data (S131). In this embodiment, the effective line is only the center line 8 (see FIG. 1). Next, the main CPU 51 sets the checking symbol position data of the search target reel based on the retrieval symbol position and the effective line data (S132). For example, when the effective line is the cross-down line, since it is desired to obtain the information on the upper stage of the search target reel, the check symbol position data indicating the upper stage is set.

Next, the main CPU 51 acquires the symbol code of the checking symbol position data (S133). After that, the main CPU 51 ends the symbol code storing process.

(Reel stop control processing)
Next, the reel stop control processing will be described with reference to FIG. The main control circuit 41 that executes this reel stop control process constitutes stop control means according to the present invention.

First, the main CPU 51 determines whether or not a valid stop button has been pressed (S141). When determining that the valid stop button has not been pressed, the main CPU 51 performs the processing of S141 again, and waits for the pressing operation of the valid stop button.

On the other hand, when determining that the valid stop button has been pressed, the main CPU 51 updates the pressing order storage area and the operation stop button storage area (S142). Next, the main CPU 51 decrements the stop button non-operation counter by 1 (S143).

Next, the main CPU 51 determines the reel to be searched from the operation stop button (S144). Subsequently, the main CPU 51 stores the stop start position in the main RAM 53 based on the symbol counter (S145).

Next, the main CPU 51 performs a sliding piece number determination process, which will be described later with reference to FIG. 83 (S146). Next, the main CPU 51 sends a reel stop command to the sub control circuit 42 (S147). The reel stop command includes information such as the type of reel to be stopped and the number of sliding pieces thereof.

Next, the main CPU 51 determines a planned stop position based on the stop start position and the number of sliding pieces, and stores it in the main RAM 53 (S148). In this process, the main CPU 51 adds the number of sliding pieces to the stop start position and determines the result as the planned stop position.

Next, the main CPU 51 sets the planned stop position as the search symbol position (S149). Next, the main CPU 51 performs the symbol code acquisition process described with reference to FIG. 81 (S150). After that, the main CPU updates the symbol code storage area from the acquired symbol code (S151).

Next, the main CPU 51 performs a control change process described later with reference to FIG. 88 (S152). Next, the main CPU 51 determines whether or not the pressed stop button is released (S153). When determining that the pressed stop button is not released, the main CPU 51 performs the process of S153 again, and waits for the pressed stop button to be released.

On the other hand, when determining that the pressed stop button is released, the main CPU 51 determines whether or not the stop button non-operation counter is 0 (S55). When determining that the stop button non-operation counter is not 0, the main CPU 51 performs the attraction-in priority storage process described with reference to FIG. 79 (S156). After finishing the process of S156, the main CPU 51 returns the process to S141.

On the other hand, when it is determined in the process of S155 that the stop button non-operation counter is 0, the main CPU 51 ends the reel stop control process and moves the process to the main flow (see FIG. 72).

(Slip piece number determination process)
Next, with reference to FIG. 83, the sliding piece number determination processing will be described.

First, the main CPU 51 selects the line mask data corresponding to the operation stop button based on the line mask data table (not shown) (S171). When the left stop button 17L is pressed, the main CPU 51 selects, as the line mask data, "10000000" in which "1" is set in the bit 7 corresponding to the "left reel A line" of the stop data. When the middle stop button 17C is pressed, "00010000" in which "1" is set in the bit 4 corresponding to the "middle reel A line" of the stop data is selected as the line mask data. When the right stop button 17R is pressed, "00000010" in which "1" is set in bit 1 corresponding to the "right reel A line" of the stop data is selected as the line mask data.

Next, the main CPU 51 determines whether or not it is the first stop (the stop button non-operation counter is 2) (S172). When it is determined that the main CPU 51 is not the first stop, the main CPU 51 performs the second/third stop processing described later with reference to FIG. 81 (S173).

On the other hand, when determining that it is the first stop, the main CPU 51 determines whether the operation stop button is the left stop button (S174). When it is determined that the operation stop button is the left stop button, the main CPU 51 acquires the forward selection table selection data and the symbol counter (S175). The forward selection table selection data is acquired by referring to the reel stop initialization table (see FIG. 34).

Next, the main CPU 51 refers to the forward pressing first stop table corresponding to the forward pressing table selection data, and acquires the sliding piece number determination data and the line change status based on the symbol counter (S176). ..

When it is determined that the operation stop button is not the left stop button in the process of S174, the main CPU 51 acquires the irregular press time table selection data and sets the irregular press time table selection data corresponding to the irregular press time table selection data. (S177). The irregular press-time table selection data is acquired by referring to the reel stop initial setting table (see FIG. 36).

Next, the main CPU 51 conducts a line change bit check process described later with reference to FIG. 85 (S178). Next, the main CPU 51 performs a line mask data change process which will be described later with reference to FIG. 83 (S179). Next, the main CPU 51 refers to the set irregular press-time stop table to acquire the number-of-slip-pieces determination data based on the line mask data and the stop start position (S180).

After the processing of S180, the processing of S176, or the processing of S173, the main CPU 51 performs the priority attraction-in control processing described later with reference to FIG. 87 (S181). In this process, the priority attraction-in order data corresponding to each symbol position in the range of the maximum sliding piece number "4" from the stop start position is compared, and the most appropriate sliding piece number is determined. When the processing of S181 ends, the main CPU 51 ends the sliding frame number determination processing, and moves the processing to reel stop control processing (see FIG. 82).

(Second and third stop processing)
Next, the second/third stop processing will be described with reference to FIG.

First, the main CPU 51 determines whether or not it is the second stop operation (S201). When it is determined that the second stop operation is being performed, the main CPU 51 determines whether or not the forward push (first stop is the left reel 3L) is performed (S202). When it is determined that the button has been pressed normally, the main CPU 51 performs a line change bit check process described later with reference to FIG. 85 (S203).

After the processing of S203, when it is determined in the processing of S201 that it is not during the second stop operation or when it is determined in the processing of S202 that it is not the forward push, the main CPU 51 will be described later with reference to FIG. Line mask data change processing is performed (S204). Next, the main CPU 51 conducts a sliding piece number search process (S205). In this processing, the stop table (see FIGS. 39 to 42) is referred to, and the number-of-slip-pieces determination data is determined based on the stop start position.

For example, when the line mask data is “00010000” corresponding to the “middle reel A line”, the main CPU 51 refers to the column of the “middle reel A line” of bit 4. Then, for each symbol position in the range of the maximum number of sliding pieces from the stop start position, a search is sequentially made as to whether or not the corresponding data is "1". Next, the main CPU 51 calculates the difference from the symbol position where the corresponding data is “1” to the stop start position, and determines the calculated value as the sliding piece number determination data. When the process of S205 ends, the main CPU 51 ends the second/third stop process and moves the process to the number of sliding symbols determination process (see FIG. 83).

(Line change bit check processing)
Next, the line change bit check processing will be described with reference to FIG.

First, the main CPU 51 determines whether the change status is 1 or 2 (S211). When determining that the change status is 1 or 2, the main CPU 51 sets the corresponding line status (S211). In this embodiment, the A line status is set when the change status is "1", and the B line status is set when the change status is "2". After finishing the processing of S211, the main CPU 51 carries out a line change bit check processing.

When it is determined that the change status is not 1 or 2 in the process of S211, the main CPU 51 determines whether or not the line change bit is on (S213). In this process, the main CPU 51 refers to the column corresponding to the "middle reel line change bit" or the "right reel line change bit" of the stop table, and determines whether the data corresponding to the stop start position is "1". To determine. When it is determined that the data corresponding to the stop start position is not "1", that is, the line change bit is not on, the main CPU 51 ends the line change bit check process.

On the other hand, when the data corresponding to the stop start position is "1", that is, when the line change bit is determined to be on, the main CPU 51 sets the B line status (S214). The B line status is data used to change the line mask data. When the process of S214 ends, the main CPU 51 ends the line change bit check process.

(Line mask data change processing)
Next, the line mask data changing process will be described with reference to FIG.

First, the main CPU 51 determines whether or not the C line status is set (S221). The C line status is set in the second post-stop control change process, which will be described later with reference to FIG. 89, when the forward push is performed. When determining that the C line status is set, the main CPU 51 determines whether the operation stop button at the time of the second stop is the middle stop button (S222).

When it is determined that the operation stop button at the second stop is the middle stop button in the process of S222, the main CPU 51 rotates the line mask data to the right twice (S223). If the operation stop button at the time of the second stop is the middle stop button, the operation stop button at the time of the third stop is the right stop button. Therefore, the line mask data is changed from "00000010" to "10000000" by the process of S223. As a result, the column of bit 7 corresponding to the "right reel C line data" of the stop table for second and third stops at the time of forward pressing (FIGS. 39 to 41) is referred to. When the process of S223 ends, the main CPU 51 ends the line mask data change process.

When determining in the process of S222 that the operation stop button at the second stop is not the middle stop button, the main CPU 51 rotates the line mask data to the left twice (S224). If the operation stop button at the time of the second stop is not the middle stop button when the button is pressed forward, the operation stop button at the time of the third stop becomes the middle stop button. Therefore, the line mask data is changed from "00010000" to "01000000" by the process of S224. As a result, the column of bit 6 corresponding to the "middle reel C line data" in the second/third stop table for forward pressing is referred to. When the process of S224 ends, the main CPU 51 ends the line mask data change process.

When determining in the process of S221 that the C line status is not set, the main CPU 51 determines whether or not the B line status is set (S225). When determining that the B line status is not set, the main CPU 51 ends the line mask data change process.

On the other hand, when determining that the B line status is set, the main CPU 51 rotates the line mask data once to the right (S226). For example, when the line mask data is “00000010”, it is changed to “00000001”. As a result, the column corresponding to the “B line data” in the stop table is referred to. When the process of S226 ends, the main CPU 51 ends the line mask data change process.

(Priority access control processing)
Next, the priority attraction-in control process will be described with reference to FIG.

First, the main CPU 51 sets a search order table (see FIG. 45) (S241). Next, the main CPU 51 sets initial values for the search order counter and the number of checks (S242). The search order counter is set to "1" as an initial value, and the check count is set to the data length of the search order table as an initial value.

Next, the main CPU 51 sets the start address of the stop order table and adds the address of the search order table based on the sliding piece number determination data (S243).

Next, the main CPU 51 acquires the number of sliding pieces corresponding to the value of the search order counter (S244). Next, the main CPU 51 adds the acquired number of sliding pieces to the predicted address at the start of stop, and acquires priority attraction-in ranking data (S245).

Next, the main CPU 51 determines whether or not the priority attraction-in ranking data acquired in the process of S245 exceeds the priority attraction-in ranking data acquired previously (S246). When it is determined that the priority attraction-in rank data acquired in the process of S245 exceeds the priority attraction-in rank data acquired previously, the main CPU 51 saves the number of sliding pieces acquired in the process of S244 (S247).

After determining in step S247 or in step S246 that the priority attraction-in ranking data does not exceed the previously obtained priority attraction-in ranking data, the main CPU 51 subtracts 1 from the number of checks and adds 1 to the search order counter. (S248). Next, the main CPU 51 determines whether the number of checks is “0” (S249).

When determining in the process of S249 that the number of checks is not “0”, the main CPU 51 shifts the process to S244. On the other hand, when it is determined that the number of checks is "0", the main CPU 51 restores the number of retracted sliding pieces (S250). When the process of S250 ends, the main CPU 51 ends the priority attraction-in control process and shifts the process to the sliding piece number determination process (see FIG. 83).

(Control change processing)
Next, the control change processing will be described with reference to FIG. 88.

First, the main CPU 51 determines whether or not it is after the third stop (S271). When determining that it is after the third stop, the main CPU 51 ends the control change process and moves the process to the reel stop control process (see FIG. 82).

When determining in the process of S271 that it is not after the third stop, the main CPU 51 determines whether it is after the second stop (S272). When determining that it is after the second stop, the main CPU 51 performs a second post-stop control process described later with reference to FIG. 89 (S273). When the process of S273 ends, the main CPU 51 ends the control change process and moves the process to the reel stop control process.

When determining in the process of S272 that it is not after the second stop, the main CPU 51 determines whether or not the forward push is performed (S274). When it is determined that it is not the normal push, the main CPU 51 ends the control change process and shifts the process to the reel stop control process. On the other hand, when it is determined that the forward push is performed, the main CPU 51 acquires the forward push control change table (see FIG. 37) corresponding to the forward push table change data, and sets “21” as the number of searches (S275). ).

Next, the main CPU 51 acquires the scheduled stop position (S276). Then, the main CPU 51 updates the change target position according to the acquired planned stop position (S277). Next, the main CPU 51 determines whether the updated change target position and the planned stop position match (S278). When determining that the updated change target position and the planned stop position do not match, the main CPU 51 determines whether or not the number of searches is "0" (S279). When determining that the number of searches is not “0”, the main CPU 51 shifts the processing to S277.

On the other hand, when it is determined that the number of searches is “0”, the main CPU 51 acquires the value of the initial table change table initial data as the forward press second/third stop stop table number, and the corresponding stop table. Is set (S280). Next, the main CPU 51 sets "0" to the C line check data (S281). When the process of S281 ends, the main CPU 51 ends the control change process and moves the process to the reel stop control process.

When it is determined in the process of S278 that the change target position and the planned stop position match, the main CPU 51 causes the change target position and the forward stop second/third stop table number and C line according to the value of the line change status. Check data is acquired (S282).

Next, the main CPU 51 sets a corresponding stop table based on the second/third stop table numbers for forward pressing (S283). When the process of S283 ends, the main CPU 51 ends the control change process and moves the process to the reel stop control process.

(Control change processing after the second stop)
Next, the second post-stop control change process will be described with reference to FIG. 89.

First, the main CPU 51 determines whether or not the forward push is performed (S301). When the main CPU 51 determines that it is not the normal push, the main CPU 51 ends the second post-stop control change process and shifts the process to the control change process (see FIG. 88).

When it is determined in the process of S301 that the button has been pressed forward, the main CPU 51 determines whether or not the C line check data is on (S302). This C line check data is acquired by the process of S282 of the control change process (see FIG. 88).

When it is determined that the C line check data is on in the process of S302, the main CPU 51 determines whether the line change bit corresponding to the stop start position at the time of the second stop is on (S303). When determining that the line change bit corresponding to the stop start position at the second stop is not ON, the main CPU 51 ends the second post-stop control change process and shifts the process to the control change process.

When it is determined in the process of S303 that the line change bit corresponding to the stop start position at the time of the second stop is ON, the main CPU 51 stores “1 in the stored forward press second/third stop table number for stop. Is added, and the corresponding stop table is set (S304). Next, the main CPU 51 sets the C line status (S305). When the process of S305 ends, the main CPU 51 ends the second post-stop control change process and shifts the process to the control change process.

(RT control processing)
Next, the RT control processing will be described with reference to FIG.

First, the main CPU refers to the carryover combination storing area and determines whether or not the bonus is being carried over (S311). That is, it is determined whether or not the carryover combination storage area is “1” or more. When determining that the bonus is not being carried over, the main CPU 51 determines whether or not the bonus is being carried over (S312). In this process, it is determined whether or not a bonus other than SB is in progress.

When determining in the process of S312 that the bonus is not in progress, the main CPU 51 refers to the RT transition table (see FIG. 19) and sets the game state flag based on the display combination. At this time, the current RT game status flag is cleared and the destination RT game status flag is set. For example, if the display combination is "RT3 REP", to shift from the RT2 gaming state to the RT3 gaming state, bit 5 of the gaming state flag storage area is cleared and bit 6 is set to "1".

Next, the main CPU 51 determines whether or not the RT3 gaming state or the RT4 gaming state is entered (S314). When it is determined that the RT3 game state or the RT4 game state is entered, the main CPU 51 sets "50" to the RT game number counter provided in the main RAM 53 (S315).

When it is determined that the bonus is being carried over in the process of S311, when it is determined that the bonus is in the process of S312, or when it is determined that the RT3 gaming state or the RT4 gaming state is not transitioned in the process of S314, The main CPU 51 determines whether or not the RT game number counter is "0" (S316).

When it is determined in the process of S316 that the RT game number counter is not "0", the main CPU 51 decrements the RT game number counter by 1 (S317). Then, the main CPU 51 determines whether or not the RT game number counter is "0" (S318). When it is determined that the RT game number counter is “0”, the main CPU 51 clears bits 4 to 7 of the game state flag storage area and sets the RT2 game state flag (bit 5) (S319).

After the processing of S319, when it is determined that the RT game number counter is "0" in the process of S316, or when the RT game number counter is not "0" in the process of S318, the main CPU 51 displays Command transmission processing is performed (S320). That is, the main CPU 51 transmits the display command to the sub control circuit. The display command is configured to include parameters that specify the display combination, the number of payouts, and the like. When the process of S320 ends, the main CPU 51 ends the RT control process and moves the process to the main flow (see FIG. 72).

(Bonus end check process)
Next, the bonus end check processing will be described with reference to FIG.

First, the main CPU 51 determines whether or not the bonus is in operation (S341). When determining that the bonus is not in operation, the main CPU 51 ends the bonus end check processing, and shifts the processing to the main flow (see FIG. 72). On the other hand, when determining that the bonus is in operation, the main CPU 51 determines whether or not it is in the SB gaming state.

When it is determined in the process of S342 that the game is in the SB game state, the main CPU 51 executes the process at the end of SB (S343). In this processing, the SB game state flag is turned off and the game possible number counter is cleared. When the process of S343 ends, the main CPU 51 ends the bonus end check process, and moves the process to the main flow (see FIG. 72).

When determining in the process of S342 that it is not in the SB game state, the main CPU 51 determines whether or not the bonus end number counter <0 (S344). When it is determined that the bonus end number counter <0, the main CPU 51 conducts bonus end time processing (S345). In this process, the main CPU 51 clears the bonus end number counter and turns off the BB game state flag. Further, the RB game state flag or the like is turned off, and the possible winning number counter and the possible playing number counter are cleared. When the bonus end number counter is <0, it means that the payout of medals has exceeded 465 during the BB game state. Further, if the RB1 game state during the normal game (non-BB) at the time of the processing of S344, it is determined as "NO" in the processing of S344.

Next, the main CPU 51 conducts bonus end command transmission processing (S346). That is, the main CPU 51 transmits the bonus end command to the sub control circuit 42. The bonus end command includes information indicating that the bonus game has ended, and the like.

Next, the main CPU 51 conducts initialization processing at the end of the bonus (S347). When the process of S347 ends, the main CPU 51 ends the bonus end check process, and moves the process to the main flow (see FIG. 72).

When it is determined in the process of S344 that the bonus end number counter is not <0 (bonus end number counter ≧0), the main CPU 51 updates the possible winning number counter and the possible game number counter (S348). The possible winning number counter is decremented by "1" when a small winning combination (a winning combination having a medal payout) is displayed. Also, the available game number counter is decremented by "1" in one game regardless of the stop symbol.

Next, the main CPU 51 determines whether or not the acquisition number counter or the available game number counter is “0” (S349). When determining that the possible winning number counter and the possible playing number counter are not “0”, the main CPU 51 ends the bonus end check process and shifts the process to the main flow (see FIG. 72).

When it is determined in the process of S349 that the possible winning number counter or the possible playing number counter is "0", the main CPU 51 performs the RB end process (S350). Specifically, the main CPU 51 performs processing such as turning off the RB gaming state flag and clearing the winning possible number counter and the gaming possible number counter. When the process of S350 ends, the main CPU 51 ends the bonus end check process and moves the process to the main flow (see FIG. 72).

(Bonus activation check process)
Next, the bonus operation check process will be described with reference to FIG. The main control circuit 41 that executes this bonus operation check process constitutes special game starting means according to the present invention.

First, the main CPU 51 determines whether or not the BB is operating (S371).

When determining that the BB is operating, the main CPU 51 determines whether the RB is operating (S372). When determining that the RB is in operation, the main CPU 51 ends the bonus operation check process, and shifts the process to the main flow (see FIG. 72).

When determining in the process of S372 that the RB is not operating, the main CPU 51 performs the RB operating process based on the bonus operating table (see FIG. 18) (S373). In this embodiment, the RB8 game state is set during the BB game state. Therefore, in the RB operation process of S373, "12" is set in the game possible number counter and "8" is set in the prize winning number counter. When the process of S373 ends, the main CPU 51 ends the bonus operation check process, and moves the process to the main flow (see FIG. 72).

When determining in the process of S371 that the BB is not operating, the main CPU determines whether or not the bonus is a prize (S374). When it is determined that the bonus is a prize, the main CPU 51 executes a bonus operation time process corresponding to the won bonus based on the bonus operation time table (see FIG. 18) (S375). When the bonus is BB, the BB operation process and the RB operation process are performed.

Next, the main CPU 51 clears the value of the carryover combination storing area (S376). Then, a bonus start command transmission process is performed (S377). That is, the main CPU 51 transmits the bonus start command to the sub control circuit 42. The bonus start command includes information indicating that the bonus game has started. When the process of S377 ends, the main CPU 51 ends the bonus operation check process, and moves the process to the main flow (see FIG. 72).

When it is determined in the process of S374 that the bonus is not a prize, the main CPU 51 determines whether the replay is a prize (S378). When it is determined that the replay is not a winning, the main CPU 51 ends the bonus operation check process and shifts the process to the main flow (see FIG. 72).

When it is determined that the replay is a winning prize in the process of S378, the main CPU 51 requests automatic insertion (S379). That is, the input number counter is copied to the automatic input number counter. After that, the main CPU 51 ends the bonus operation check process, and shifts the process to the main flow (see FIG. 72).

(Periodic interrupt processing under the control of the main CPU)
The main CPU 51 executes a predetermined fixed-cycle interrupt process such as transmission of communication data to the sub-control circuit based on an interrupt signal generated at a constant period (for example, 1.1173 msec) after the reel rotation start process is performed. doing. The fixed-cycle interrupt process controlled by the main CPU will be described with reference to FIG.

First, the main CPU 51 saves registers (S401). Next, the main CPU 51 performs an input port check process (S402). In this process, signals input from various switches such as the stop switch 17S are checked.

Next, the main CPU 51 executes reel control processing (S403). In this process, when the start of rotation of all reels is requested, the drive of the stepping motors 81L, 81C, 81R is controlled so that the reels 3L, 3C, 3R are started to rotate and then rotated at a constant speed. To be done. Further, when the number of sliding pieces is determined, the symbol counter of the corresponding reel is updated by the number of sliding pieces. Then, wait until the updated symbol counter coincides with the value according to the planned stop position (the symbol at the planned stop position reaches the middle stage of the display window), and decelerate and stop the rotation of the corresponding reel. The drive of the stepping motor is controlled.

Next, the main CPU 51 performs communication data transmission processing (S404). In this processing, various command data stored in the communication data storage processing is transmitted to the sub control circuit 23.

Next, the main CPU 51 performs a lamp/7-segment driving process (S405). In this process, drive control of the 7-segment display 6 is performed to display the number of payouts, the number of credits, and the like.

Next, the main CPU 51 performs timer management processing (S406). In this process, each timer storage area is updated.

Next, the main CPU 51 performs a random number value update process (S407). In this processing, the software random number intended for use other than the internal lottery processing is updated.

Next, the main CPU 51 restores the register (S408). When this process ends, the main CPU 51 ends the interrupt process.

(Power interruption interrupt processing under the control of the main CPU)
Next, with reference to FIG. 94, a power interruption interrupt process under the control of the main CPU 51 will be described.

As shown in FIG. 9, when the main board power supply circuit 59 falls below the specified voltage, the main board power supply circuit 59 outputs an interruption detection signal 122 to the interrupt port XINT of the main CPU 51 and the main CPU 51, and the main CPU 51 judges whether the result is correct or not. Start the power interruption interrupt processing.

First, in the power interruption interrupt process, the main CPU 51 checks whether the power interruption detection signal 122 input to the interrupt port XINT is correct, and if it is off, determines that it is an error signal and does not perform the process, and ends the process (S409). ..

Next, if the power failure detection signal 122 is on (positive signal), the register is saved (S410), the current stack pointer is saved (S411), and the occurrence flag is set in the power failure occurrence flag save area. Set (S412).

Next, the sum value of all storage areas (main RAM) is calculated, and the sum value is stored in the sum value storage area (S413).

Next, access prohibition is set to the main RAM (S414), and the process waits until the power is completely turned off (S415).

By the way, in the conventional pachi-slot machine, as shown in FIG. 95(b), the power interruption detection signal 122 is prioritized in order to prioritize the power interruption interruption processing over other interruption processing. The interrupt port NMI with the highest frequency is input. On the other hand, the fixed cycle interrupt signal is input to the interrupt port PT0I, but the interrupt request based on this fixed cycle interrupt signal is set to have a lower priority than the interrupt request by the power failure detection signal 122.

Therefore, when the power failure detection signal 122 is input to the interrupt port NMI, the power failure interrupt processing (see FIG. 94) is performed in preference to other interrupt requests based on the fixed-cycle interrupt signal or the like. .. As a result, in the conventional pachi-slot machine, there is a possibility that the periodic interrupt processing will be interrupted by the power interruption processing, in which case incomplete data will be created and transmitted, and after power failure recovery. It may take time to verify the transmitted data.

On the other hand, in the present embodiment, as shown in FIG. 95(a), the power failure detection signal is input to the interrupt port XINT having the lowest priority of the interrupt request which has not been used conventionally. As a result, even if the power failure detection signal is input to the interrupt port XINT, the main CPU 51 preferentially executes other interrupt processing such as the fixed cycle interrupt processing, and when these interrupt processing ends. The power interruption detection process is performed based on the power interruption detection signal.

Therefore, even when there is a power failure such as a power failure, it is possible to complete the series of processes such as the reel control process by the fixed-cycle interrupt process and the communication data transmission process without interruption, thus creating incomplete data. Never sent or sent.

It should be noted that although it may take a certain time from the time of power interruption to the start of the power interruption interrupt processing, in the present embodiment, the main board power supply circuit 59 has the capacitor 123 provided in the main board power supply circuit 59 even after power failure. As described above, the power supply voltage is supplied to the main control circuit 41 for a predetermined time, so that the interruption interruption process can be performed after the other interruption processes. Since the power supply voltage holding time of the main board power supply circuit 59 after power failure is set to be larger than the time required from the time of power failure until the start of power failure interrupt processing, it is said that power failure interrupt processing cannot be performed. Nothing happens.

As described above, according to the present embodiment, the priority of the power interruption interrupt process is set to be lower than that of other interrupt processes such as the fixed cycle interrupt process, so that the main control circuit side and the sub control circuit side are Communication data will not be lost and incomplete data will not be transmitted. Further, even after the power failure is restored, the processing such as verification of transmitted data, re-transmission, mutual data check, etc. is simplified, so that the gaming machine can be smoothly restarted. Thereby, the reliability and operating rate of the gaming machine can be improved.

In the present embodiment, the power interruption detection signal is input to the lowest-level interrupt port XINT having the lowest priority, but the present invention is not limited to this, and at least the priority of the power interruption interrupt processing is determined by the fixed cycle allocation. It may be designed to be lower than the embedded processing.

[Transmission processing of various command signals]
The main CPU 51 sends communication data such as a start command (FIG. 73), a medal insertion command (FIG. 74), a reel stop command (FIG. 82), a display command (FIG. 90) bonus end, a start command (FIG. 91, FIG. 92). Processing for setting transmission to the master I/F unit 70 is performed. Flow charts of these transmission processing will be described with reference to FIGS. 96 to 101.

(Start command transmission process)
The start command transmission process under the control of the main CPU will be described with reference to FIG. 96.

First, the main CPU 51 sets the small winning combination internal winning combination number in the transmission data parameter 1 (P1) (S501).

Next, the carryover combination winning combination number is set to the transmission data parameter 2 (P2) (S502), and the value of the bonus end number counter is set to the transmission data parameter 3 (P3) and parameter 4 (P4) (S503). ..

Next, it is checked whether or not the current gaming state is during RB operation (S504). Except when RB is operating, RT data state is in transmission data parameter 3 (P3) (S505) and RT data count is in transmission data parameter 4 (P4). The value of the counter is set (S506).

At the time of RB operation, the value of the available game number counter is reset to the transmission data parameter 1 (P1) (S507).

Next, in the transmission data parameter 5 (P5), the first time trunk effect data and the effect display game stop flag are set (S508), the transmission command'start command' is set (S509), and the transmission data storage processing is performed. Call (S510).

When the process of S510 ends, the main CPU 31 ends the start command transmission process, and moves the process to the main flow (see FIG. 72).

(Medal insertion command transmission process)
The medal insertion command transmission process under the control of the main CPU will be described with reference to FIG.

First, the main CPU 51 sets the value of the number of inserted medals in the transmission data parameter 1 (P1) (S511).

Next, the set value is set to the transmission data parameter 2 (P2) (S512), the number of credits is set to the transmission data parameter 5 (P5) (S513), and the transmission command'medal insertion command' is set ( In step S514, the transmission data storage process is called (step S515).

When the process of S515 ends, the main CPU 31 ends the medal insertion command transmission process, and moves the process to the medal acceptance/start check process (see FIG. 74).

(Reel stop command transmission process)
With reference to FIG. 98, a reel stop command transmission process under the control of the main CPU will be described.

First, the stop button operating state is set in the transmission data parameter 1 (P1) (S521).

The expected stop position of the reel to be stopped is set in the transmission data parameter 2 (P2) (S522).

The number of sliding frames of the reel to be stopped is set in the transmission data parameter 3 (P3) (S523).

The transmission command'reel stop command' is set (S524).

The transmission data storage process is called (S525).

When the process of S525 ends, the main CPU 31 ends the reel stop command transmission process, and moves the process to the reel stop control process (see FIG. 82).

(Command transmission process at end of bonus)
With reference to FIG. 99, the bonus end time command transmission process under the control of the main CPU will be described.

First, the main CPU 51 sets the payment state in the transmission data parameter 1 (P1) (S531).

Next, the transmission command'command at the end of bonus' is set (S532), and the transmission data storage process is called (S533).

When the process of S533 ends, the main CPU 51 ends the bonus end command transmission process, and moves the process to the bonus end check process (see FIG. 88).

(Bonus start command transmission process)
Bonus start command transmission processing under the control of the main CPU will be described with reference to FIG.

First, the main CPU 51 sets the value of the bonus end number counter in the transmission data parameter 1 (P1) and the parameter 2 (P2) (S541).

Next, the transmission command'bonus start command' is set (S542), and the transmission data storage process is called (S543).

When the process of S543 ends, the main CPU 31 ends the bonus start command transmission process, and shifts the process to the bonus operation check process (see FIG. 92).

(Display command transmission process)
The display command transmission process under the control of the main CPU will be described with reference to FIG.

First, the main CPU 51 sets the RT operation combination display flag in the transmission data parameter 1 (P1) (S551).

Next, the winning number counter is set to the transmission data parameter 2 (P2) (S552), the transmission command'display command' is set (S553), and the transmission data storage process is called (S554).

When the process of S554 ends, the main CPU 31 ends the display command transmission process and moves the process to the RT control process (FIG. 90).

[Communication data storage and transmission processing]
Next, communication data storage and transmission processing will be described with reference to FIGS.

(Communication data storage process)
The main CPU 51 performs communication data storage processing in the above-described various command transmission processing. A flowchart of this communication data storage processing will be described with reference to FIG.

First, the CPU 51 stores the transmission command data in the +0 position of the communication temporary storage area (S561).

Next, the data of the transmission data parameter 1 (P1) is stored in the +1 position of the communication temporary storage area (S562), and the data of the transmission data parameter 2 (P2) is stored in the +2 position of the communication temporary storage area ( S563), the data of the transmission data parameter 3 (P3) is stored in the +3 position of the communication temporary storage area (S564), and the data of the transmission data parameter 4 (P4) is stored in the +4 position of the communication temporary storage area ( S565), the data of the transmission data parameter 5 (P5) is stored in the +5 position of the communication temporary storage area (S566), and the gaming state flag is stored in the +6 position of the communication temporary storage area (S567).

Next, +0 to +6 BCC data in the communication temporary storage area is generated and stored in the +7 position of the communication temporary storage area (S568).

Next, the address of the communication data storage area is obtained from the communication data storage setting information (S569).

Next, the communication data storage area is checked for space, and if there is no space, the process returns to the original processing (S570). If there is space, the data in the communication temporary storage area is saved in the communication data storage area (571), The value of the communication data storage setting information is updated (S572).

When the process of S572 ends, the main CPU 51 ends the communication data storing process and shifts to the called original process.

(Communication data transmission process)
A flowchart of communication data transmission processing will be described with reference to FIG.

First, the CPU 51 sets the address of the current communication data storage area from the communication data storage setting information (S581).

Next, it is checked whether transmission data is stored in the communication data storage area (S582).

When there is no saved data, the transmission command'non-operation command' is set (S583) and the transmission data storage process is called (S584).

When there is stored data, it is checked whether or not there is a vacancy in the transmission port. When there is no vacancy in the port, the process returns to the original processing (S585).

When the port has a vacancy, the data count value for one packet (8 Byte) is set (S586), and the head port number of the packet transmission output port is set (S587).

Next, the data from the communication data storage area address is set in the output port (S588), the output port number is updated (+1) (S589), and the communication data storage area address is updated (+1) (S590).

Next, the data number count is subtracted (-1) (S591), and if the data number count is other than 0, the process returns to S588 (S592).

Next, the transmission start request is set in the communication register port (S593).

Next, the transmitted data is stored in the communication data storage area (S594), and the communication data storage setting information is updated (S595).

When the processing in S595 ends, the main CPU 51 ends the communication data transmission processing, and moves the processing to the fixed cycle interrupt processing (FIG. 93) under the control of the main CPU 51.

[Function of master I/F section]
The communication data set to be transmitted from the main processing unit 50 to the master I/F unit 70 has an 8-byte data array structure 112 as shown in FIG. 8B.

In the master I/F unit 70, the communication data from the main processing unit 50 is input to the transmission control unit 74 via the CPU I/F unit 72 and the master register control unit 71 via the data bus 110, and the transmission control unit 74 performs polynomial calculation. After adding a CRC (Cyclic Redundancy Check) code for error check using the above, it is converted into packet data having a 17-byte data array structure 113 as shown in FIG. 8C (from S588 of FIG. 103). (See S592), and are sequentially transmitted to the sub control circuit 42 according to an instruction from the CPU 51.

In this embodiment, the transmission command data CMD, the parameter data P0 to P6, etc. are divided into three groups and the CRC1 to CRC3 codes are given to each group in order to increase the error check accuracy, but the present invention is not limited to this. Instead, the data may be divided into a plurality of groups other than 3, and the CRC code may be added to each group.

Here, the meaning of each code in the data array structures 112 and 113 of FIGS. 8B and 8C is as follows.

CMD transmission command data: data given by the transmission control unit 74 of the master I/F unit 70 as a transmission type command.

STA transmission status data: data given by the transmission control unit 74 of the master I/F unit 70 as a transmission status.

CRC1 CMD and STA CRC16: error detection code data (error check code) obtained by a polynomial operation given to the transmission data by the transmission control unit 74 of the master I/F unit 70.

P0 main processing unit 50 main → sub communication type command P1 main processing unit 50 parameter 1 data registered for transmission P2 main processing unit 50 parameter 2 data registered for registration P3 main processing unit 50 transmission Parameter 3 data to be registered CRC2 CRC16 of P0 to P3: Error detection code data (error check code) obtained by a polynomial operation given to the transmission data by the transmission control 74 of the master I/F unit 70.

P4 Parameter 4 data transmitted and registered by the main processing unit 50 P5 Parameter 5 data transmitted and registered by the main processing unit 50 P6 Parameter 6 data transmitted and registered by the main processing unit BCC BCC transmitted and registered by the main processing unit 50 Data CRC3 P4 to BCC CRC16 data, which is error detection code data (error check code) obtained by a polynomial operation given to the transmission data by the transmission control unit 74 of the master I/F unit 70.

CRC16 polynomial arithmetic ^{= X 16 + X 12 + X} 5 +1
As described above, the present embodiment is characterized in that the CRC code is used in order to improve the error check accuracy in accordance with the BCC code, but the error check accuracy is further improved by using a plurality of CRC codes. There is.

[Explanation of operation of sub control circuit]
Next, the contents of the program executed by the sub CPU 81 of the sub control circuit 42 will be described with reference to FIGS.

(Main board communication task)
First, with reference to FIG. 104, a main board communication task performed by the sub CPU 81 will be described.

First, the sub CPU 81 checks the reception of the command transmitted from the main control circuit 41 (S601). Next, when receiving the command, the sub CPU 81 extracts the type of the received command (S602).

Next, the sub CPU 81 determines whether or not a command different from the previous command is received (S603). When it is determined that the command different from the previous command is not received, the sub CPU 81 shifts the processing to S601.

on the other hand. When determining that the command different from the previous command is received, the sub CPU 81 stores the message in the message queue based on the received command (S604). A message queue is a mechanism for exchanging information between processes. When the process of S604 ends, the sub CPU 81 shifts the process to S601.

(Direction registration task)
Next, the effect registration task performed by the sub CPU 81 will be described with reference to FIG. 105.

First, the sub CPU 81 takes out a message from the message queue (S611). Next, the sub CPU 81 determines whether or not there is a message in the message queue (S612). When determining that there is a message, the sub CPU 81 copies the game information from the message (S613). In this process, for example, various data such as an internal winning combination, a reel type whose rotation has stopped, a display combination, a game state flag, etc., which are specified by parameters, are copied to a storage area provided in the sub RAM 83.

Next, the sub CPU 81 performs effect content determination processing which will be described later with reference to FIG. 106 (S614). In this process, depending on the type of the received command, determination of effect contents, effect data registration, and the like are performed.

After the processing of S614 or when it is determined that there is no message in the processing of S612, the sub CPU 81 registers the animation data (S615). Next, the sub CPU 81 registers sound data (S616). Next, the sub CPU 81 registers the lamp data (S617). The registration of animation data, the registration of sound data, and the registration of lamp data are performed based on the effect data registered in the effect content determination processing. After finishing the process of S617, the sub CPU 81 shifts the process to S611.

(Direction content decision processing)
Next, the effect content determination processing will be described with reference to FIG. 106.

First, the sub CPU 81 determines whether or not it is time to receive a start command (S621). When it is determined that the start command is received, the sub CPU 81 performs a start command reception process, which will be described later with reference to FIG. 107 (S622). In this process, a random number value for effect is extracted, and an effect number is randomly determined and registered based on an internal winning combination or the like. Here, the effect number is data that specifies the effect content to be executed this time.

Next, the sub CPU 81 registers the effect data at the start according to the registered effect number (S623). The effect data is data that specifies animation data, sound data, and lamp data. When the effect data is registered, the corresponding animation data and the like are determined, and effects such as video display are executed. When the process of S623 ends, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task (see FIG. 105).

When it is determined in the process of S621 that the start command is not received, the sub CPU 81 determines whether or not the reel stop command is received (S624). When it is determined that the reel stop command is being received, the sub CPU 81 performs a reel stop command reception process, which will be described later with reference to FIG. 112 (S625). In this process, the effect number is changed based on the values of the stop operation and the BET operation counter.

Next, the sub CPU 81 registers the effect data at the time of stop according to the registered effect number and the type of the operation stop button (S626). When the process of S626 ends, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task.

When it is determined in the process of S624 that the reel stop command is not received, the sub CPU 81 determines whether or not the display command is received (S627). When it is determined that the display command is received, the sub CPU 81 performs a display command reception process, which will be described later with reference to FIG. 113 (S628). In this process, the mode is changed based on the game state, the display combination, the lottery, and the like.

Next, the sub CPU 81 registers the effect data at the time of display according to the effect number and the display combination that are registered (S629). When the process of S629 ends, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task.

When it is determined in the process of S627 that the display command is not received, the sub CPU 81 determines whether or not the BET command is received (S630). When it is determined that the BET command is being received, the sub CPU 81 performs a BET command receiving process, which will be described later with reference to FIG. 114 (S631). In this process, "1" is added to the BET operation counter according to the effect number and the reel rotation status.

Next, the sub CPU 81 registers the effect data at the time of BET according to the registered effect number (S632). When the process of S632 ends, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task.

When it is determined in the process of S630 that the BET command is not received, the sub CPU 81 determines whether or not the bonus start command is received (S633). When it is determined that the bonus start command has been received, the sub CPU 81 turns off the inter-flag flag (S634).

The inter-flag flag is a flag for managing the first time the bonus is won (not carried over). In the present embodiment, after the bonus is won for the first time and the AT lottery process is performed, the flag between flags is turned on.

Next, the sub CPU 81 registers effect data for starting a bonus (S635). When the process of S635 ends, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task. The effect data for starting the bonus is registered only in BB, not in RB (1 to 7) and SB.

When determining in the process of S633 that it is not the time to receive the bonus start command, the sub CPU 81 determines whether it is the time to receive the bonus end command (S636). When the sub CPU 81 determines that it is not the time to receive the bonus end command, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task.

When it is determined in the process of S636 that the bonus end command has been received, the sub CPU 81 performs bonus end command reception process which will be described later with reference to FIG. 115 (S637). In this processing, the AT lottery and the set number lottery are performed based on the accumulation of pt in the BB.

Next, the sub CPU 81 registers effect data for ending the bonus (S638). When the process of S638 ends, the sub CPU 81 ends the effect content determination process and moves the process to the effect registration task.

(Processing when a start command is received)
Next, referring to FIG. 107, the start command reception process will be described.

First, the sub CPU 81 determines whether or not it is in BB (S651). When it is determined that the BB is in progress, the sub CPU 81 refers to the in-BB pt random determination table (FIG. 54) and performs the in-BB pt random determination process based on the internal winning combination (S652). The in-BB pt obtained in the in-BB pt lottery process is added to the in-BB pt counter provided in the sub RAM 83 (see FIG. 7) and accumulated until the BB ends.

When it is determined in the process of S651 that the BB is not in progress, it is determined whether the inter-flag is on (S653). When it is determined that the flag between flags is not on, the sub CPU 81 performs AT-related processing described later with reference to FIG. 95 (S654).

Next, the sub CPU 81 determines whether or not the modes 1 to 3 (S655). When it is determined that the mode is the modes 1 to 3, the sub CPU 81 refers to the mode shift lottery table (see FIG. 57) and performs the mode shift lottery process (S656). Next, the sub CPU 81 performs mission-related processing which will be described later with reference to FIG. 96 (S657).

When it is determined that the mode is not the modes 1 to 3 in the processing of S655, the sub CPU 81 determines whether or not the modes 6 to 9 (S658). When it is determined that the mode is the mode 6 to 9, the sub CPU 81 refers to the mode 9 lottery pt lottery table (see FIG. 55) and performs the mode 9 lottery pt lottery process based on the internal winning combination (S659). The mode 9 lottery pt obtained in the mode 9 lottery pt lottery process is added to the mode 9 lottery pt counter provided in the sub RAM 83, and ART (corresponding to either mode 6 or modes 7 to 9). Is accumulated from the beginning to the end.

Next, the sub CPU 81 refers to the mode 9 lottery table (see FIG. 59) and performs the mode 9 lottery process based on the accumulated value of the mode 9 lottery pt (S660). When the mode 9 lottery process wins the mode 9 for the first time, the sub CPU 81 adds “1” to the set number and turns on the mode 9 flag. On the other hand, when the mode 9 is won during the mode 9, the sub CPU 81 turns on the mode 9 flag without adding the set number. After winning the mode 9, the processes of S659 and S660 are not performed until the next ART (the mode 9 lottery pt counter is also cleared). In other words, the winning in Mode 9 is once for each ART.

After the processing of S660 and S657, or when it is determined in the processing of S658 that the mode is not in modes 6 to 9, the sub CPU 81 determines whether or not the bonus (excluding SB) is a winning (S661). When it is determined that the bonus (excluding SB) is won, the sub CPU 81 turns on the inter-flag flag and clears the ceiling counter and the mode 9 lottery pt counter (S662).

When it is determined that the bonus (excluding SB) is not won in the process of S661, the sub CPU 81 performs a counter updating process described later with reference to FIG. 110 (S663). In this counter update processing, the mode 4 counter, the omen counter, and the ceiling counter provided in the sub RAM 83 (see FIG. 7) are updated.

After the processing of S663, S662, S652, or when it is determined that the flag between flags is ON in the processing of S653, the sub CPU 81 performs the effect lottery processing described later with reference to FIG. 111 (S664). In this effect lottery process, the effect number is determined based on the internal winning combination, the mode, and the value of each counter.

When the effect lottery process in S664 is completed, the sub CPU 81 ends the start command reception process, and moves the process to the effect content determination process (see FIG. 106).

(AT related processing)
Next, the AT-related processing will be described with reference to FIG.

First, the sub CPU 81 refers to the AT lottery table (see FIG. 60) and performs the AT lottery process based on the mode and the internal winning combination (S681). In this processing, any one of “AT winning”, “miss”, “predatory sign” and “special winning” is determined.

Subsequently, the sub CPU 81 determines whether or not the AT has been won in the processing of S681 (whether "AT winning" and "special winning" have been selected) (S682). When it is determined that the AT is won, the sub CPU 81 refers to the set number random determination table (see FIG. 61) and performs the set number random determination process based on the mode and the internal winning combination (S683). As the gaming machine of the present invention, the mode 9 lottery process described in the start command reception process (see FIG. 107) may be performed at the first winning of the AT.

Next, the sub CPU 81 determines whether or not the modes 1 to 3 (S684). When it is determined that the mode is not the modes 1 to 3, the sub CPU 81 ends the AT-related processing and shifts the processing to the start command reception processing (see FIG. 107). On the other hand, when it is determined that the modes are 1 to 3, the sub CPU 81 shifts from the current mode to the mode 5 (S685).

When the sub CPU 81 determines in the process of S682 that the AT has not been won, the sub CPU 81 determines whether or not the AT sign was won in the process of S681 (S686). In addition, gasse omen win is invalid. In the same way as in the case of this warning (AT winning), the warning counter manages the number of games to keep the state (the warning sign and the mode 5), but the warning sign counter is provided separately from the warning sign. It may be managed, or may be managed by using a flag according to the type of the sign. When it is determined that the winning sign has not been won, the sub CPU 81 ends the AT-related processing and shifts the processing to the start command reception processing (see FIG. 107).

When the sub CPU 81 determines in the process of S686 that the precursor sign has been won, the sub CPU 81 determines whether or not the precursor counter is “0” (S687). When determining that the precursor counter is not “0”, the sub CPU 81 ends the AT-related processing and shifts the processing to the start command reception processing (see FIG. 107).

When it is determined in the process of S687 that the precursor counter is “0” or after the process of S685, the sub CPU 81 refers to the precursor G number determination table (see FIG. 63) and determines the precursor G number based on the mode. Processing is performed (S688). Then, the determined number of precursor G is stored in the precursor counter. When the process of S688 ends, the sub CPU 81 ends the AT-related process and shifts the process to the start command reception process (see FIG. 107).

(Mission-related processing)
Next, the mission-related processing will be described with reference to FIG.

First, the sub CPU 81 determines whether or not the mission flag is on (S701). When determining that the mission flag is not on, the sub CPU 81 refers to the mission occurrence lottery table (see FIG. 65) and performs the mission occurrence lottery process based on the internal winning combination (S702). In this process, the winning or non-winning of the mission occurrence is determined. When the process of S702 ends, the sub CPU 81 ends the mission related process and moves the process to the start command reception process (see FIG. 107).

When the mission flag is determined to be on in the processing of S701, the sub CPU 81 determines whether or not the mission precursor counter is “0” (S703). When determining that the mission precursor counter is not "0", the sub CPU 81 subtracts "1" from the mission precursor counter (S704). When the process of S704 ends, the sub CPU 81 ends the mission-related process and moves the process to the start command reception process (see FIG. 107).

When the mission precursor counter is determined to be “0” in the process of S703, the sub CPU 81 refers to the card lottery table (see FIG. 67) and determines the number of cards based on the internal winning combination (S705). Subsequently, the sub CPU 81 subtracts the determined number of cards from the card counter (S706).

Next, the sub CPU 81 determines whether or not the card counter is "0" (S707). When it is determined that the card counter is "0", the sub CPU 81 clears the mission flag (S708). Then, the sub CPU 81 sets the number of sets to "2" and shifts the mode to mode 6 (S709). When the process of S709 ends, the sub CPU 81 ends the mission related process and moves the process to the start command reception process (see FIG. 107).

When it is determined that the card counter is not "0" in the processing of S707, the sub CPU 81 determines whether the guarantee counter is "0" (S710). When the sub CPU 81 determines that the guarantee counter is not "0", the sub CPU 81 subtracts "1" from the guarantee counter (S711). When the process of S711 ends, the sub CPU 81 ends the mission-related process and moves the process to the start command reception process (see FIG. 107).

When the guarantee counter is determined to be “0” in the process of S710, the sub CPU 81 refers to the mission end lottery table (see FIG. 66) and performs the mission end lottery process based on the internal winning combination (S712). In this process, the continuation or the end of the mission is determined. When the end of the mission is decided, the mission flag and the card counter are cleared. When the process of S712 ends, the sub CPU 81 ends the mission related process and moves the process to the start command reception process (see FIG. 107).

(Counter update process)
Next, the counter updating process will be described with reference to FIG.

First, the sub CPU 81 determines whether or not the bonus is being carried over or the bonus is being carried out (S721). When it is determined that the bonus is being carried over or the bonus is being carried out, the sub CPU 81 ends the counter updating process and shifts the process to the start command receiving process (see FIG. 107).

When it is determined in the process of S721 that the bonus is not being carried over or the bonus is not being performed, the sub CPU 81 determines whether or not it is the mode 4 (S722). When determining that the mode is the mode 4, the sub CPU 81 subtracts "1" from the mode 4 counter (S723).

Next, the sub CPU 81 determines whether or not the mode 4 counter is "0" (S724). When the sub-CPU 81 determines that the mode 4 counter is not "0", the sub CPU 81 ends the counter update processing and shifts the processing to the start command reception processing (see FIG. 94). On the other hand, when determining that the mode 4 counter is “0”, the sub CPU 81 shifts the mode to mode 6 (S725). When the process of S725 ends, the sub CPU 81 ends the counter update process and moves the process to the start command reception process (see FIG. 107).

When it is determined in the process of S722 that the mode is not the mode 4, the sub CPU 81 determines whether or not the precursor counter is “0” (S726). When determining that the precursor counter is not "0", the sub CPU 81 subtracts "1" from the precursor counter (S727).

Next, the sub CPU 81 determines whether or not it is the mode 5 (S728). When the sub CPU 81 determines that the mode 5 is set, the sub CPU 81 determines whether the precursor counter is “0” (S729). When it is determined that the precursor counter is not “0”, the sub CPU 81 ends the counter update processing and shifts the processing to the start command reception processing (see FIG. 107).

When it is determined in the process of S729 that the precursor counter is "0", the sub CPU 81 shifts the mode to the mode 6 (S630). When the process of S630 ends, the sub CPU 81 ends the counter update process and moves the process to the start command reception process (see FIG. 107).

When it is determined in the process of S726 that the precursor counter is "0", or when it is determined in the process of S728 that it is not the mode 5, the sub CPU 81 subtracts "1" from the ceiling counter (S731).

Next, the sub CPU 81 determines whether or not the ceiling counter is "0" (S732). When the sub CPU 81 determines that the ceiling counter is not “0”, the sub CPU 81 ends the counter updating process and shifts the process to the start command reception process (see FIG. 107). On the other hand, when it is determined that the ceiling counter is “0”, the sub CPU 81 sets the number of sets to “3” and shifts the mode to mode 5 (S733). The sub CPU 81 may randomly determine the number of sets when it is determined that the ceiling counter is “0”.

Next, the sub CPU 81 refers to the precursor G number determination table (see FIG. 63) and performs the precursor G number determination processing based on the mode (S734). When the process of S734 ends, the sub CPU 81 ends the counter update process and moves the process to the start command reception process (see FIG. 107).

(Direction lottery process)
Next, the effect lottery processing will be described with reference to FIG.

First, the sub CPU 81 determines whether or not the BB flag or the inter-flag flag is ON (S741). When it is determined that the flag is not in the BB or the flag between flags is not on, the sub CPU 81 determines whether or not an internal winning is made to any one of the “determined winning combination B”, “RB1 to 7”, and “SB2” ( S742).

When it is determined in the process of S742 that the internal winning has been made to any one of the "defining hand B", "RB1 to 7", and "SB2", the sub CPU 81 determines the effect number of the effect (failure) aiming at BAR (S743). ). When the process of S743 ends, the sub CPU 81 ends the effect lottery process and moves the process to the start command reception process (see FIG. 107).

When it is determined in the process of S742 that the internal winning has not been made to any of the "determined winning combination B", "RB1 to 7", and "SB2", the sub CPU 81 determines whether or not the modes are 6 to 9 ( S744). When it is determined that the mode is 6 to 9, the sub CPU 81 determines whether or not the "specific combination" is internally won (S745). The specific winning combination is a winning combination in the AT lottery process. In this embodiment, each combination from "Don Lip" to "Ice + Medium Che" of the AT lottery table (see FIG. 60) is specified.

When it is determined in the process of S745 that the "specific combination" has been internally won, the sub CPU 81 refers to the launch preparation effect continuous number lottery table (see FIG. 69), and determines the number of consecutive times based on the added number (S746). .. Then, the sub CPU 81 adds the added number to the success counter (S747).

When it is determined in the process of S745 that the "specific combination" is not internally won, the sub CPU 81 determines whether or not the number of consecutive times is "0" (S748). When determining that the number of consecutive times is not “0”, the sub CPU 81 subtracts “1” from the number of consecutive times (S749).

After the processing of S749 or the processing of S747, the sub CPU 81 refers to the launch preparation effect content random determination table (see FIG. 68) and determines the effect number based on the success counter and the internal winning combination (S750).

Next, the sub CPU 81 subtracts "1" from the success counter (S751). Subsequently, the sub CPU 81 determines whether or not the number of consecutive times is "0" (S752). When it is determined in the process of S752 that the continuous number is not “0”, the sub CPU 81 ends the effect lottery process and moves the process to the start command reception process (see FIG. 107). On the other hand, when it is determined that the continuous count is “0”, the sub CPU 81 clears the success counter (S753). After that, the sub CPU 81 ends the effect lottery process and moves the process to the start command reception process (see FIG. 107).

When it is determined that the BB flag or the inter-flag is on in the processing of S741, it is determined that the modes 6 to 9 are not in the processing of S744, and the continuous number is determined to be "0" in the processing of S748. The sub CPU 81 refers to an effect determination table (not shown) and determines an effect number based on the internal winning combination, the mode, and the value of each counter (S754). When the process of S754 ends, the effect lottery process ends, and the process proceeds to the start command reception process (see FIG. 107).

In the present embodiment, even if the launch preparation effects are continuous, the effects aiming at the BAR are interrupted and generated. However, when the launch preparation effects are continuous, the launch preparation effects may be prioritized and the effects may not be generated aiming at the BAR.

Further, in the present embodiment, when "RB1 to 7" are carried over, only the first game is aimed at the BAR and the effect is generated. However, an effect may be generated by aiming at BAR in each game while RB1 to 7” are carried over.

Also, even if "RB1-7" is carried over, if another internal winning combination such as replay is determined and "RB1-7" cannot be displayed according to the search order, aiming at the BAR will not cause an effect. You may set it.

Further, in the present embodiment, it is set that the production (success) is aimed at the BAR only when the combination of symbols corresponding to the “determined hand B” can be displayed. However, as long as the “determined hand B” is internally won, even if the combination of symbols corresponding to the “determined hand B” cannot be displayed, an effect (success) aimed at the BAR may be performed.

In addition, in the present embodiment, the launch preparation effect is always performed when the internal winning is performed in the modes 6 to 9 and the “specific combination”, but it may be determined whether or not to perform the lottery. In addition, the launch preparation effect may be performed in the modes 4 and 5.

Further, in the present embodiment, the launch preparation effect is started from the game in which the "specific combination" is internally won. However, the launch preparation effect may be started from the game next to the game which is internally won as the “specific combination”. In that case, in the game in which the “specific combination” is internally won, it is advisable to perform an effect that gives advance notice that the launch preparation effect will start from the next game.

(Processing when a reel stop command is received)
Next, with reference to FIG. 112, a process upon receipt of a reel stop command will be described.

First, the sub CPU 81 determines whether or not the effect number is a number for performing the launch preparation effect (S761). When it is determined that the effect number is the number for performing the launch preparation effect, the sub CPU 81 determines whether or not it is the first stop (S762).

When it is determined in the process of S762 that it is the first stop, the sub CPU 81 determines whether or not the BET operation counter is equal to or more than a specified number (S763). When determining that the BET operation counter is not equal to or greater than the specified number, the sub CPU 81 changes the effect number to "2" (S764). Subsequently, the sub CPU 81 clears the continuous count and the success counter (S765). The prescribed number of times may be a fixed number of games, or may be randomly determined from a plurality of games.

After the process of S765, when it is determined that the effect number is not the number for performing the launch preparation effect in the process of S761, when it is determined that it is not the first stop in the process of S762, the BET operation counter is set to the specified number of times in the process of S763. When it is determined that the above is the case, the sub CPU 81 clears the BET operation counter (S766). When the process of S766 ends, the sub CPU 81 ends the process at the time of receiving the reel stop command, and performs the process contents determination process (see FIG. 106).
Move to.

(Process when receiving display command)
Next, with reference to FIG. 113, the display command reception process will be described.

First, the sub CPU 81 determines whether or not the flag between flags is off and the display combination is the “fixed combination B” (S781). When it is determined that the flag between flags is off and the display combination is the “fixed combination B”, the sub CPU 81 rewrites the effect number of the target production (failure) for BAR to the production number of the target production (success). (S782). When the process of S782 ends, the sub CPU 81 ends the process at the time of receiving the display command, and moves the process to the effect contents determination process (see FIG. 106).

When it is determined in the processing of S781 that the flag between flags is off and the display combination is not the "fixed combination B", the sub CPU 81 determines whether or not it is in BB (S783). When it is determined that the BB is in progress, the sub CPU 81 determines whether or not the internal winning combination is “miss” (S784). When it is determined that the internal winning combination is not “miss”, the sub CPU 81 ends the display command reception process and shifts the process to the effect content determination process (see FIG. 106).

When it is determined in the process of S784 that the internal winning combination is "miss", the sub CPU 81 adds "3" to the set number and turns on the mode 9 flag (S785). When the process of S785 ends, the sub CPU 81 ends the process at the time of receiving the display command, and moves the process to the effect contents determination process (see FIG. 106).

When it is determined in the process of S783 that the BB is not in progress, the sub CPU 81 determines whether or not the mode is 6 (S786). When the sub CPU 81 determines that the mode 6 is selected, the sub CPU 81 determines whether the RT3 lip or the RT4 lip is displayed (S787). When the sub CPU 81 determines that the RT3 lip or the RT4 lip is not displayed, the sub CPU 81 ends the display command reception processing and shifts the processing to the effect content determination processing (see FIG. 106).

When it is determined that RT3 Lip or RT4 Lip is displayed in the processing of S787, the sub CPU 81 determines whether or not the mode 9 flag is ON (S788). When determining that the mode 9 flag is on, the sub CPU 81 shifts the mode to mode 9 (S789). When the process of S789 ends, the sub CPU 81 ends the process at the time of receiving the display command, and moves the process to the effect contents determination process (see FIG. 106).

When it is determined in the process of S788 that the mode 9 flag is not turned on, the sub CPU 81 performs an ART start high/low lottery process (S790). Subsequently, the sub CPU 81 shifts the mode according to the lottery result of the process of S790 (S791). In the processing of S790 and 691, mode 7 and mode 8 are sorted. In this embodiment, the mode is switched to the mode 7 with a probability of 4/5 and the mode 8 is transferred with a probability of 1/5.

Next, the sub CPU 81 subtracts "1" from the number of sets (S792). When the process of S792 ends, the sub CPU 81 ends the process at the time of receiving the display command, and moves the process to the effect contents determination process (see FIG. 106).

When it is determined that the mode is not the mode 6 in the process of S786, the sub CPU 81 determines whether or not the modes are the modes 7 to 9 (S793). When it is determined that the mode is not in modes 7 to 9, the sub CPU 81 ends the display command reception process and shifts the process to the effect content determination process (see FIG. 106).

When it is determined that the mode is the mode 7 to 9 in the process of S793, the sub CPU 81 determines whether or not it is in the RT2 gaming state (S794). When the sub CPU 81 determines that it is not in the RT2 gaming state, the sub CPU 81 ends the display command reception process, and shifts the process to the effect content determination process (see FIG. 106). On the other hand, when it is determined that the RT2 gaming state, the sub CPU81 clears the mode 9 lottery pt (S795).

Next, the sub CPU 81 determines whether or not the number of sets is “1” or more (S796). When it is determined that the number of sets is “1” or more, the sub CPU 81 shifts the mode to the mode 6 (S797). When the process of S797 ends, the sub CPU 81 ends the display command reception process, and moves the process to the effect content determination process (see FIG. 106).

When the sub CPU 81 determines in the process of S796 that the number of sets is not equal to or greater than "1", the sub CPU 81 refers to the ART end time mode transition lottery table (see FIG. 58) and performs the ART end time mode transition process (S798). In this ART end mode transition process, the mode is assigned to any one of modes 1 to 3.

Next, the sub CPU 81 sets "1400" to the ceiling counter (S799). When the process of S799 ends, the sub CPU 81 ends the display command reception process, and moves the process to the effect contents determination process (see FIG. 106).

(Processing when BET command is received)
Next, the BET command reception process will be described with reference to FIG. 114.

First, the sub CPU 81 determines whether or not the effect number is the launch preparation effect number (S801). When it is determined that the effect number is not the launch preparation effect number, the sub CPU 81 ends the BET command reception time process, and moves the process to the effect content determination process (see FIG. 106).

When the effect number is determined to be the launch preparation effect number in the processing of S801, the sub CPU 81 determines whether or not all reels are rotating (S802). When it is determined that all the reels are not rotating, the sub CPU 81 ends the BET command reception process and shifts the process to the effect content determination process (see FIG. 106).

When it is determined in the process of S802 that all reels are rotating, the sub CPU 81 adds "1" to the BET operation counter (S803). When the process of S803 ends, the sub CPU 81 ends the BET command reception process, and moves the process to the effect content determination process (see FIG. 106).

(Processing when bonus end command is received)
Next, with reference to FIG. 115, the bonus end command reception process will be described.

First, the sub CPU 81 refers to the BB end lottery table (see FIG. 70) and performs the AT lottery process based on the cumulative value of pt in BB (S821). Next, the sub CPU 81 refers to the BB medium set number random determination table (see FIG. 62) and performs the BB medium set number random determination process (S822). In addition, when AT is non-win in the AT lottery process of S821, the BB mid-set lottery process of S822 is not performed.

Next, the sub CPU 81 determines whether or not BB is a winning in modes 4, 6 to 9 (S823). When it is determined that BB is a winning in Modes 4, 6 to 9, the sub CPU 81 refers to the mode 4G number random determination table and performs the mode 4G number random determination process (S824).

When BB is determined as the internal winning combination during mode 4, the value of the mode 4 counter is re-determined without being added. as a result. Mode 4 may end.

Next, the sub CPU 81 determines whether or not the mode 4 counter is “0” (S825). When determining that the mode 4 counter is not "0", the sub CPU 81 shifts the mode to mode 4 (S826). When the process of S826 ends, the sub CPU 81 ends the process at the time of receiving the bonus end command, and moves the process to the effect content determination process (see FIG. 106).

In this embodiment, the mode 4 can be set only by the lottery at the end of the BB. However, other triggers may be adopted as the gaming machine of the present invention. For example, when “Loss” is determined as an internal winning combination during BB, the mode 4 may be entered.

When it is determined in the processing of S823 that BB is not a winning in modes 4, 6 to 9, or when it is determined that the mode 4 counter is "0" in the processing of S825, the sub CPU 81 determines that the number of sets is "1". It is determined whether or not the above is satisfied (S827). When it is determined that the number of sets is “1” or more, the sub CPU 81 shifts the mode to the mode 5 (S828).

After the processing of S828 or when it is determined in the processing of S827 that the number of sets is not "1" or more, the sub CPU 81 refers to the precursor G number determination table (see FIG. 61 (after BB)), and based on the mode. Then, the number of signs G is determined (S829). When the process of S829 ends, the sub CPU 81 ends the bonus end command reception process, and moves the process to the effect content determination process (see FIG. 106).

The configuration and operation of the pachi-slot machine 1 according to the embodiment of the gaming machine have been described above with reference to FIGS. 1 to 117. In the pachi-slot machine 1 according to the present embodiment, in the normal game state and the RB1 game state, the number of inserted medals is defined as "3", and the combination of symbols corresponding to "BB1" is "blue 7-blue 7-blue 7". ”Is specified. Then, when the symbol "blue 7-blue 7-blue 7" is stopped and displayed on the center line 8 (winning determination line), the bonus game is started, and the BB gaming state and the RB8 gaming state are entered.

In the BB game state and the RB8 game state, the number of inserted medals is defined as "2", and the combination of symbols "blue 7-blue 7-blue 7" becomes "miss". Therefore, when “miss” is determined in the internal lottery process (see FIGS. 72 and 73), “blue 7-blue 7-blue 7” is displayed on the center line 8 (winning determination line) even during the bonus game. It is possible to stop and display the design. As a result, the enjoyment of the game can be increased.

In addition, in order to display the bonus symbol, it is not necessary to perform an internal winning of the winning combination for control, and to perform stop control and symbol arrangement in which the bonus symbol can be stopped and displayed, and to reduce the number of display winning combinations (internal winning symbol). You can also

Further, in the pachi-slot machine 1 according to the present embodiment, when it is determined that the internal winning combination is “miss” in the BB in the display command reception process (see FIG. 100 ), “3” is added to the number of sets. The mode 9 flag is turned on. The number of sets is the number of sets from the start to the end of ART. That is, the addition of the set number gives the player an advantageous privilege. Therefore, the interest of the game can be enhanced.

Further, in the pachi-slot machine 1 according to the present embodiment, in the BET command reception process (see FIG. 114 ), when the BET operation is in the preparation for launch and the BET operation is performed while all reels are rotating, the BET operation counter is set to “1. Is added. On the other hand, in the reel stop command reception process (see FIG. 112), when the launch preparation effect is being performed and the first stop operation is performed, the BET operation counter determines whether or not the number of times is equal to or more than a specified number. Then, when it is determined that the BET operation counter is less than the specified number of times, the effect number is changed to "2". If the production number "2" is selected, the production fails and the production of informing the number of times of addition of ART is not performed.

When it is determined that the BET operation counter is the specified number of times or more, the effect number is not changed. That is, the effect corresponding to the effect number determined with reference to the launch preparation effect content lottery table (see FIG. 68) in the effect lottery process (see FIG. 111) is performed. At this time, if the success counter is “1” or more, a torch and/or fireworks ball flash effect is performed.

When the success counter is “1” or more, for example, the production number “6” may be determined (see FIG. 68). When the start lever 16 is operated, the production of the production number “6” activates the torch 22 hidden in the decoration portion provided on the upper side of the liquid crystal display device 10 as shown in FIG. Exposed on the front side of.

After that, when the pressing of the stop button of the third stop operation is stopped, the lamp 20 formed on the fireworks ball is turned on and off in the color defined according to the effect number "6" (fireworks ball flash). In the present embodiment, the player is notified of the number of added ARTs by the number of launch preparation effects in which a fireworks ball flash has occurred. However, the notification of the number of ART sets according to the present invention may be performed by displaying the number of times on the liquid crystal display device 10 or using sound.

As described above, in the pachi-slot machine 1 according to the present embodiment, the operation of the bet button 12 is detected in the state where the BET process is invalid. Then, if the pressing operation is equal to or more than the specified number of times, it is possible to perform an effect of continuously informing the number of times of addition of the ART by a plurality of games (games during launch preparation effects).

As a result, the interruption time of the game can be dispersed, and the interruption time of the game can be shortened as a result by overlapping with the waiting time of the processing in the game. In addition, it is possible to continuously provide effective effects to the player through a plurality of games, and it is possible to enhance the interest of the game over a plurality of times.

Also, if you win more ARTs during multiple games (games during launch preparation effects), the number of additions (cumulative number of additions) will be calculated by adding the additional winnings. Notify me. As a result, the player can be accurately notified of the result of the lottery inside the pachi-slot machine 1.

In the present embodiment, the BET operation counter is cleared regardless of whether the BET operation counter is the specified number of times or less than the specified number of times (see FIG. 114). However, when the BET operation counter is less than the specified number of times, the BET operation counter may be carried over without being cleared, and the BET operation during the rotation of all reels after the next time may be added to the carried-over number. As a result, the BET operation counter can be set to the specified number of times or more in a plurality of games, so that the interruption time during one game can be shortened.

In addition, in the pachi-slot machine 1 according to the present embodiment, when any of the “determined winning combination B”, “RB1 to 7”, and “SB2” is determined as the internal winning combination, the BAR is targeted (unsuccessful). The effect number is determined. The symbol combination corresponding to the "determined hand B" is "BAR-BAR-BAR". That is, in the present embodiment, when any one of the “determined winning combination B”, “RB1 to 7”, and “SB2” is determined as the internal winning combination, a stop operation is displayed so that the “determined winning combination B” is displayed. ..

For example, it is assumed that “RB1 to 7” are determined as the internal winning combination. Then, as a result of the player performing the stop operation aiming at the stop display of "BAR-BAR-BAR", it is assumed that the symbol combination "BAR-BAR-ice A" corresponding to "RB5" is stopped and displayed. The symbol combination "BAR-BAR-Ice A" corresponding to "RB5" is partly different from the symbol combination "BAR-BAR-BAR" corresponding to the "determined hand B".

Therefore, the player recognizes that the stop display of "BAR-BAR-BAR" has failed. However, in reality, the combination of symbols “BAR-BAR-ice A” corresponding to “RB5” is stopped and displayed, so that the bonus game is started and the winning probability of the small combination is increased. However, in the present embodiment, the effect is determined not to be a bonus game, and the effect is determined based on the winning combination or the like by referring to the effect determination table as in the normal game. It should be noted that it may be possible to make a suggestion that is different from the normal game by performing an effect that is partially different from the liquid crystal screen in the normal game.

Moreover, the combination of symbols corresponding to each of "RB1 to 7" is set so that only a part of the symbols differ from the combination of symbols of the "fixing combination B" which is aimed at the stop display. Therefore, it is possible to guide the player to display a combination of symbols corresponding to “RB1 to 7” without being aware of it. Therefore, it is possible to stop and display the combination of these symbols without setting a high withdrawal rate of the symbol combinations corresponding to "RB1 to 7".

For example, in the symbol combination corresponding to “RB5”, the symbol of “ice A” on the right reel 3R is different from that in the symbol combination corresponding to “determined hand B”. However, the symbols on the closest "ice A (symbol position 7, 12)" before and after the symbol "BAR (symbol position 10)" on the right reel 3R are arranged at symbol intervals that do not exceed the maximum number of sliding pieces + 1. ing. Therefore, the symbol combination and arrangement are configured such that when the stop operation is performed aiming at the symbol "BAR" on the right reel 3R, the symbol "Ice A" can always be stopped and displayed. However, when the player does not select the right reel 3R for the third stop, the symbol of "ice A" is displayed without waiting for the third stop, so that "BAR-BAR-BAR" is displayed to the player. It is recognized that it is not displayed. As a result, the interest in the game may be reduced.

On the other hand, for example, the symbol combination corresponding to “RB7” is different only in the symbol of the middle reel 3C as compared with the symbol combination corresponding to “determined hand B”. Therefore, when the middle reel 3C is stopped for the third time, the interest of the game can be maintained until the third stop. Furthermore, since the symbol of "ice A" is adjacent to the symbol of "BAR" on the middle reel 3C, only the symbol of "BAR" is aimed unless the stop operation is performed at the timing of the symbol position "16". I'm trying not to.

The pachi-slot machine 1 of the present embodiment is a gaming machine that recommends a first stop for the left reel 3L. Therefore, the combination of the symbols of RB, which is assumed to be the case where the left reel 3L is stopped at the third position, is not provided. However, an RB for setting the left reel 3L to the third stop may be provided so that the third stop can be expected even in any pressing order.

Further, the RBs other than "RB5" may be configured to be always stopped and displayed when the "fixed hand B" is aimed. In other words, for RBs other than "RB5", symbols different from "determined hand B" are arranged at symbol intervals that do not exceed the maximum number of sliding pieces + 1 before and after the symbol "BAR" that constitutes "determined hand B". You may do it.

As a result, the bonus game (RB) can be recognized by the player as a special game in which the small winning combination in the normal game is internally won with a high probability. As a result, the playability can be diversified and the interest of the game can be increased.

It should be noted that the small winning combination having a high winning probability during the bonus game (RB) in the present embodiment, when stopped and displayed, has the advantage of making the lottery of ART (privilege game) dominant. As a result, the interest of the game can be enhanced.

In the pachi-slot machine 1 of the above-described embodiment, the predetermined number is “3” and the specific number is “2” as the number of game media to be inserted. However, as the gaming machine of the present invention, the predetermined number and the specific number can be set to arbitrary numbers. However, the predetermined number and the specific number must be different.

In the pachi-slot machine 1 of the above-described embodiment, "BB1" and "BB2" are adopted as special internal winning combinations in the normal game performed by inserting a predetermined number (3) of game media. However, the special internal winning combination according to the present invention is not limited to BB, and may be “RB”, “MB (middle bonus)”, “CT (challenge time)”, or the like.

In the pachi-slot machine 1 of the above-described embodiment, the winning determination line is one line, but the position and the number of the winning determination line according to the present invention can be set arbitrarily. As the winning determination line according to the present invention, for example, the top line and the bottom line may be set, and other linear lines may be set as invalid lines.

Although the gaming machine according to the embodiment of the present invention has been described above including its function and effect, the present invention is not limited to the embodiment described here. It goes without saying that various embodiments are included without departing from the gist of the present invention described in the claims.

By the way, in the conventional game machines such as the above-mentioned Patent Documents 1 and 2, the communication data is transmitted from the main processing unit 50 to the sub control circuit 42 or the like as a serial or parallel signal in 1-byte units using an electric cable. Then, in order to check the consistency between the communication data transmitted by the main processing unit 50 and the communication data received by the sub control circuit 42, an error check code composed of a BCC (Block Check Character) code or a SUM code is added to the transmission data. ing.

However, for example, in the case of serial communication, an inter-character margin is generated between one data (one character) and the next data, and in the case of parallel communication, a margin is generated between one byte and the next one byte. Therefore, there is a problem that the transmission time becomes long due to this.

Further, the electric cable used for transmitting the communication data is easily affected by an electromagnetic field or noise from the outside, which may cause an error in the transmission data. Further, the BCC code and the SUM code used for error checking of the transmission data use the parity and the sum value of the bid sequence and have a simple structure, but there is a problem that the error detection accuracy is not necessarily high.

The present invention has been made to solve the above problems, and provides a gaming machine capable of reliably transmitting communication data from a main control circuit to a sub control circuit in a short time and improving error detection accuracy. To aim.

1... Pachi-slot machine, 3L, 3C, 3R... Reel, 4L, 4C, 4R... Symbol display area, 10... Liquid crystal display device, 11... Medal slot, 12... Bet button, 14... Settlement button, 16... Start lever, 17L, 17C, 17R... Stop button, 18... Medal payout exit, 20... Lamp, 21L, 21R... Speaker, 22... Torch, 30... Medal payout device (hopper), 40... Power supply circuit, 41... Main control circuit, 42 ... sub-control circuit, 50... main processing section, 51... main CPU, 59... main board power supply circuit, 70... master I/F section, 106... sub board power supply circuit, 110... data bus, 111... optical cable, 112, 113 ...Data array structure, 122... Power failure detection signal.

Claims (1)

A main control circuit including a main CPU for controlling game state setting and game processing operation,
A main RAM provided in the main control circuit and having a storage area capable of storing various data;
A sub control circuit including a sub CPU capable of controlling the effect based on a command transmitted from the main control circuit,
A power supply circuit capable of supplying power to the main control circuit and the sub control circuit;
A main board power supply circuit which is provided in the main control circuit and supplies a power supply voltage to the main control circuit;
A power interruption sensing means that to output the power interruption detection signal to the main CPU when the power supply voltage supplied to the main control circuit provided in the main substrate power supply circuit is equal to or less than a predetermined value,
A plurality of interrupt ports provided in the main CPU and having different priority levels for interrupt processing;
Before Symbol main CPU,
Fixed-cycle interrupt processing can be executed based on an interrupt signal generated at a fixed cycle.
Before SL power interruption has a function of determining correctness of when the detection signal is input equivalent electric disconnection detection signal, and, if a state in which the state of those electrical disconnection detection signal indicates a power interruption sensing predetermined time or more In addition, it is possible to execute power interruption interrupt processing,
The power interruption interrupt processing is to set access prohibition to the main RAM after saving various data.
The power interruption detection signal output by the pre-Symbol power interruption detecting means includes a feature that an interrupt priority among the plurality of interrupt ports is inputted at least said lower interrupt port than the constant period interrupt process A gaming machine to do.

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