JP6711192B2 - Laminated electronic components - Google Patents

Description

The present invention relates to a laminated electronic component.

In recent years, there has been a great demand for miniaturization of electronic parts accompanying the increase in density of electronic circuits used in digital electronic devices such as mobile phones, and miniaturization and large-capacity increase of laminated electronic parts constituting the circuits are rapidly progressing. I'm out.

In a multilayer electronic component such as a multilayer ceramic capacitor, a plurality of internal electrodes are arranged in an element body. In Patent Document 1, a conductive paste is printed so as to reach the entire width of a rectangular ceramic green sheet, and the conductive paste is used. By laminating a plurality of ceramic green sheets on which is printed and cutting, a laminated body in which both side edges of the conductor layer are exposed is obtained.

Then, in Patent Document 1, a ceramic sintered body in which the conductor layer end edges are exposed not only on the end surface where the connection with the external electrode is planned but also on the pair of side surfaces by firing this laminated body To get Next, ceramic is applied and formed on the side surface of the ceramic sintered body.

However, when a ceramic is baked on the side surface of a monolithic ceramic electronic component, the adhesiveness between the side surface and the ceramic (side gap) applied/formed on the side surface is poor, so that a structural defect of the capacitor easily occurs due to electrostriction. It was difficult to relieve the stress, and there was a problem with the bond strength.

JP 2012-191159 A

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a laminated electronic component having good adhesion strength.

To achieve the above object, the laminated electronic component according to the first aspect of the present invention is as follows.

[1] A laminated electronic component including an element body in which internal electrode layers and dielectric layers substantially parallel to a plane including the first axis and the second axis are alternately laminated along a direction of the third axis. hand,
An insulating layer is provided on each of a pair of end surfaces (side surfaces) of the element body that face each other in the direction of the first axis.
External electrodes electrically connected to the internal electrode layers are provided on a pair of end surfaces of the element body that face each other in the direction of the second axis.
The insulating layer has a mountain-shaped portion formed on a peripheral edge of the end surface of the element body in the first axial direction, and a flat portion of a central portion of the end surface of the element body in the first axial direction,
An angle formed by an imaginary line of the surface along the surface of the flat portion of the insulating layer and a tangent to the curved surface at the first inner predetermined position of the mountain portion is θ1,
When the angle formed by the imaginary line of the surface along the surface of the flat portion of the insulating layer and the tangent of the curved surface at the first outer predetermined position of the mountain portion is θ2,
θ1 is 5° to 25°,
θ2 is 5° to 25°, a laminated electronic component.

According to the present invention, the angle of the angle formed by the imaginary line of the surface along the surface of the flat portion of the insulating layer and the tangent of the curved surface of the first inner predetermined position of the mountain portion, and the virtual line of the surface and the curved surface at the first outer predetermined position. When the angle formed by the tangents is within the predetermined range, it is possible to provide a laminated electronic component having excellent thermal shock resistance and fixing strength.

Further, in order to achieve the above object, the laminated electronic component according to the second aspect of the present invention is as follows.

[2] A laminated electronic component including an element body in which internal electrode layers and dielectric layers substantially parallel to a plane including the first axis and the second axis are alternately laminated along the direction of the third axis. hand,
An insulating layer is provided on each of a pair of end surfaces (side surfaces) of the element body that face each other in the direction of the first axis.
External electrodes electrically connected to the internal electrode layers are provided on a pair of end surfaces of the element body that face each other in the direction of the second axis.
The insulating layer has a mountain-shaped portion formed on a peripheral edge of the end surface of the element body in the first axial direction, and a flat portion of a central portion of the end surface of the element body in the first axial direction,
A laminated electronic component, wherein the external electrode covers a portion of the mountain-shaped portion of the end portion of the insulating layer in the second axial direction having the maximum width in the first axial direction.

ADVANTAGE OF THE INVENTION According to this invention, since the external electrode has covered the part of the maximum width in the 1st axial direction in the mountain-shaped part of the edge part of the 2nd axial direction of an insulating layer, the laminated electronic component with favorable adhesive strength is provided. it can.

The following modes are illustrated as specific modes of the above [2].

[3] The second axial direction from the end of the element body in the second axial direction to the maximum width in the first axial direction of the mountain portion of the end of the insulating layer in the second axial direction. Let α be the length along
When the coating length of the external electrode covering the insulating layer from the end portion of the element body in the second axial direction along the second axial direction is β,
α/β is the laminated electronic component according to the above [2], wherein 1/30≦α/β<1.

In addition, the method for manufacturing the laminated electronic component for achieving the above object is not particularly limited, and the following manufacturing method may be mentioned.

[4] Green sheets that are continuous in the direction of the first axis and have internal electrode pattern layers that are substantially parallel to the plane including the first axis and the second axis are laminated in the direction of the third axis. The process of getting a body,
Cutting the green laminated body so as to obtain a cutting plane parallel to a plane including the second axis and the third axis to obtain a green chip;
Firing the green chip to obtain an element body in which internal electrode layers and dielectric layers are alternately laminated,
A step of applying an insulating layer paste to the end face of the element body in the first axial direction and baking the paste to obtain a ceramic sintered body having an insulating layer formed thereon;
A step of baking an external electrode paste on the end surface of the ceramic sintered body in the second axis direction to obtain a laminated electronic component having external electrodes formed thereon,
The insulating layer has a mountain-shaped portion formed on a peripheral edge of the end surface of the element body in the first axial direction, and a flat portion of a central portion of the end surface of the element body in the first axial direction,
The angle formed by the imaginary line along the surface of the flat portion of the insulating layer and the tangent to the curved surface inside the mountain portion is θ1,
When the angle formed by the imaginary line along the surface of the flat portion of the insulating layer and the tangent to the curved surface outside the mountain portion is θ2,
θ1 is 5° to 25°,
θ2 is 5° to 25°, a method for manufacturing a laminated electronic component.

Further, in order to achieve the above object, the laminated electronic component according to the third aspect of the present invention is as follows.

[5] A laminated electronic component including an element body in which internal electrode layers and dielectric layers substantially parallel to a plane including the first axis and the second axis are alternately laminated along the direction of the third axis. hand,
An insulating layer is provided on each of a pair of side surfaces of the element body that face each other in the direction of the first axis,
External electrodes electrically connected to the internal electrode layers are provided on a pair of end surfaces of the element body that face each other in the direction of the second axis.
The insulating layer has a mountain-shaped portion formed on the peripheral edge of the side surface and a valley-shaped portion in the central portion of the side surface,
An angle formed by a vertical imaginary line perpendicular to the direction of the first axis of the insulating layer and a tangent to the curved surface at a second inner predetermined position of the mountain portion is θ1′,
When an angle formed by a vertical imaginary line perpendicular to the direction of the first axis of the insulating layer and a tangent to the curved surface at the second outer predetermined position of the mountain portion is θ2′,
θ1′ is 5° to 25°,
θ2′ is 5° to 25°, a laminated electronic component.

FIG. 1 is a schematic sectional view of a monolithic ceramic capacitor according to an embodiment of the present invention. 2A is a sectional view taken along line IIA-IIA shown in FIG. FIG. 2B is a sectional view taken along line IIB-IIB shown in FIG. 1. FIG. 2C is a sectional view taken along line IIB-IIB shown in FIG. 1. FIG. 2D is a sectional view taken along line IIB-IIB shown in FIG. 1. FIG. 2E is a sectional view taken along line IIB-IIB shown in FIG. 1. FIG. 2F is a sectional view taken along line IIB-IIB shown in FIG. 1. FIG. 2G is a sectional view taken along line IIB-IIB shown in FIG. 1. FIG. 3A is a cross-sectional view of the main parts of FIG. 2B. 3B is a cross-sectional view of the main parts of FIG. 2A. FIG. 3C is a cross-sectional view of the main parts of FIG. 2D. FIG. 4 is a schematic cross-sectional view showing a step of laminating green sheets in the manufacturing process of the monolithic ceramic capacitor shown in FIG. 5A(a) is a plan view showing a part of the n-th internal electrode pattern layer taken along line VV shown in FIG. 4, and FIG. 5A(b) is an (n+1)-th internal electrode pattern layer. It is a top view showing a part of. FIG. 5B is a plan view showing a part of the internal electrode pattern layer along the line VV shown in FIG. 4. FIG. 6A is a schematic sectional view parallel to the XZ plane of the laminated body after laminating the green sheets shown in FIG. FIG. 6B is a schematic sectional view parallel to the YZ axis plane of the laminated body after laminating the green sheets shown in FIG. FIG. 7 is a schematic diagram for explaining the method for measuring the adhesion strength of this example.

Based on the present embodiment, a detailed description will be given with reference to the drawings, but the present invention is not limited to the embodiments described below.

Further, the constituent elements described below include those that can be easily conceived by those skilled in the art and those that are substantially the same. Furthermore, the components described below can be combined as appropriate.

Hereinafter, the present invention will be described based on the embodiments shown in the drawings.

(First embodiment)
Overall Configuration of Multilayer Ceramic Capacitor An overall configuration of a multilayer ceramic capacitor will be described as an embodiment of a multilayer electronic component according to the present embodiment.

As shown in FIG. 1, the monolithic ceramic capacitor 2 according to the present embodiment includes a ceramic sintered body 4, a first external electrode 6, and a second external electrode 8. Further, the ceramic sintered body 4 has an element body 3 and an insulating layer 16.

The element body 3 has an inner dielectric layer 10 and an internal electrode layer 12 that are substantially parallel to a plane including the X axis and the Y axis, and the internal electrode layer 12 has the Z axis between the inner dielectric layer 10. The layers are alternately stacked along the direction. Here, “substantially parallel” means that most of the parts are parallel, but there may be some parts that are not parallel, and the internal electrode layer 12 and the inner dielectric layer 10 may be slightly parallel. It means that it may be uneven or inclined.

As shown in FIG. 2A, the interior region 13 is a portion where the inner dielectric layers 10 and the internal electrode layers 12 are alternately laminated.

The element body 3 has exterior regions 11 on both end faces in the stacking direction Z (Z axis). The exterior region 11 is formed by laminating a plurality of outer dielectric layers that are thicker than the inner dielectric layer 10 that forms the interior region 13.

In the following, the "inner dielectric layer 10" and the "outer dielectric layer" may be collectively referred to as "dielectric layer".

The materials of the dielectric layers forming the inner dielectric layer 10 and the exterior region 11 may be the same or different, and are not particularly limited. For example, a dielectric material having a perovskite structure such as ABO ₃ or an alkali niobate ceramic. It is composed mainly of.

In ABO ₃ , A is at least one of Ca, Ba, Sr and the like, and B is at least one of Ti, Zr and the like. The molar ratio of A/B is not particularly limited and is 0.980 to 1.020.

Other than these, silicon dioxide, aluminum oxide, magnesium oxide, an alkali metal compound, an alkaline earth metal compound, manganese oxide, a rare earth element oxide, vanadium oxide, and the like can be cited as subcomponents, but not limited to these. The content thereof may be appropriately determined depending on the composition and the like.

The firing temperature can be lowered by using silicon dioxide or aluminum oxide as an accessory component. Further, the life can be improved by using magnesium oxide, an alkali metal compound, an alkaline earth metal compound, manganese oxide, a rare earth element oxide, or vanadium oxide as an accessory component.

The number of layers of the inner dielectric layer 10 and the outer dielectric layer may be appropriately determined according to the application and the like.

The one inner electrode layer 12 that is alternately laminated is electrically connected to the inner side of the first outer electrode 6 that is formed outside the first end of the ceramic sintered body 4 in the Y-axis direction. It has a drawer 12A. The other inner electrode layers 12 that are alternately laminated are electrically connected to the inner side of the second outer electrode 8 formed outside the second end of the ceramic sintered body 4 in the Y-axis direction. It has a drawn-out portion 12B.

The interior area 13 has a capacity area 14 and lead-out areas 15A and 15B. The capacitance region 14 is a region in which the internal electrode layers 12 are stacked along the stacking direction with the inner dielectric layer 10 sandwiched therebetween. The lead-out region 15A is a region located between the lead-out portions 12A of the internal electrode layer 12 connected to the external electrode 6. The lead-out region 15B is a region located between the lead-out portions 12B of the internal electrode layer 12 connected to the external electrode 8.

The conductive material contained in the internal electrode layer 12 is not particularly limited, and metals such as Ni, Cu, Ag, Pd, Al and Pt, or alloys thereof can be used. As the Ni alloy, an alloy of Ni and one or more elements selected from Mn, Cr, Co and Al is preferable, and the Ni content in the alloy is preferably 95% by weight or more. The Ni or Ni alloy may contain various trace components such as P in an amount of about 0.1% by weight or less.

The internal electrode layer 12 may be formed by using a commercially available electrode paste, and the thickness of the internal electrode layer 12 may be appropriately determined according to the application and the like.

As shown in FIGS. 2A to 2C, insulating layers 16 are formed on both end surfaces (both side surfaces) of the element body 3 in the X-axis direction. The insulating layer 16 has a mountain-shaped portion 16b formed on the peripheral edge of the end surface (side surface) in the X-axis direction and a flat portion 16c at the central portion.

2B, 2C, and 3A are cross sections parallel to a plane including the X axis and the Y axis in the central portion of the ceramic sintered body 4 in the Z axis direction, and the mountain-shaped portion 16b is the flat portion 16c. Are formed on both sides in the Y-axis direction. In addition, as shown in FIGS. 2A and 3B, in the central portion of the ceramic sintered body 4 in the Y-axis direction, in the cross section parallel to the plane including the X-axis and the Z-axis, the mountain-shaped portion 16b of the insulating layer 16 is Are formed on both sides of the plane portion 16c in the Z-axis direction. That is, the mountain-shaped portion 16b protruding from the flat surface portion 16c of the insulating layer 16 in the X-axis direction is formed continuously with the peripheral edge portion of the flat surface portion 16c.

The configuration of the insulating layer 16 of the present embodiment having the ridges 16b and the flat surface portion 16c adjusts the viscosity of the insulating layer paste that becomes the insulating layer 16 after baking, and a method of an insulating layer paste applying step described later. It can be formed by selecting appropriate conditions.

In the present embodiment, as shown in FIG. 2B, FIG. 2C, or FIG. 3A, both ends of the external electrodes 6 and 8 in the X-axis direction are in the X-axis direction in the mountain-shaped portions of both ends of the insulating layer 16 in the Y-axis direction. Of the maximum width (Mt) (vertex 16b2) may be covered. As a result, the monolithic ceramic capacitor of the present embodiment has good adhesion strength.

As shown in FIG. 2B, the insulating layer 16 of the present embodiment does not have to cover both end portions in the X-axis direction of the end surface in the Y-axis direction of the element body 3, or as shown in FIG. The insulating layer extension 16a may be integrally provided to cover both end portions of the end surface of the No. 3 in the Y axis direction in the X axis direction.

It is preferable that the insulating layer extension 16a does not widely cover both end faces in the Y-axis direction of the element body 3 shown in FIG. 1, FIG. 2B or FIG. 2C. This is because the external electrodes 6 and 8 need to be formed on both end surfaces of the element body 3 in the Y-axis direction and connected to the internal electrodes 12.

As shown in FIG. 2A, the insulating layer 16 of the present embodiment integrally has an insulating layer extension 16a that covers both ends in the X-axis direction of the end surface (main surface) in the Z-axis direction of the element body 3. May be. Although not shown, the insulating layer extension 16a may cover the entire end surface of the element body 3 in the Z-axis direction.

The external electrodes 6 and 8 of this embodiment may be configured to cover the insulating layer extension 16a formed on the end face in the Z-axis direction.

The softening point of the insulating layer 16 is preferably 500°C to 1000°C. As a result, it is possible to reduce the influence of structural defects that may occur in the preceding and following steps.

The component forming the insulating layer 16 of the present embodiment is not particularly limited, and examples thereof include ceramics, aluminum, glass, titanium, resins, and the like, but the glass component is preferable. By forming the insulating layer 16 with a glass component, the fixing strength is improved. It is considered that this is because the reaction phase is formed at the interface between the glass and the element body 3, and thus the adhesion between the glass and the element body 3 is superior to other insulating substances.

Further, glass has a higher insulating property than ceramics. Therefore, compared with the case where the insulating layer 16 is made of ceramic, when the insulating layer 16 is made of a glass component, the short-circuit occurrence rate is low even if the distance between the external electrodes 6 and 8 facing each other is shortened. it can. Therefore, as compared with the case where the insulating layer 16 is made of ceramic, when the insulating layer 16 is made of a glass component, the external electrodes 6 and 8 have the Y-axis of the end surface in the X-axis direction of the ceramic sintered body 4. Even if the Y-axis direction end portions of the Z-axis direction end surface and the Z-direction end surface are widely covered, the short-circuit occurrence rate can be reduced. This effect is more remarkable when the insulating layer extension portion 16a covers the entire end surface of the element body 3 in the Z-axis direction.

By covering the end surface of the element body 3 in the X-axis direction with the insulating layer 16, not only the insulating property is enhanced, but also the durability and the moisture resistance against the environmental load from the outside are increased. Further, since the insulating layer 16 covers the end surface of the element body 3 after firing in the X-axis direction, it is possible to form a uniform insulating layer 16 having a small side gap width.

The material of the external electrodes 6 and 8 is also not particularly limited, but known conductive materials such as Cu, Ag, Pd, Pt, Au, alloys thereof, and conductive resins can be used. The thickness of the external electrode may be appropriately determined according to the application or the like.

In FIG. 1, the X-axis, the Y-axis, and the Z-axis are mutually perpendicular, the Z-axis coincides with the stacking direction of the inner dielectric layer 10 and the internal electrode layer 12, and the Y-axis shows the extraction region 15A. , 15B (drawing portions 12A, 12B) are formed in the same direction.

In the present embodiment, as shown in FIG. 2A, in the insulating layer 16, along the width direction (X-axis direction) of the ceramic sintered body 4, from the end surface of the element body 3 in the X-axis direction to the outer surface of the insulating layer 16. The section up to is the gap.

In the present embodiment, the width Wgap of the gap portion in the X-axis direction is determined from the end surface of the element body 3 in the X-axis direction along the X-axis direction of the insulating layer 16 along the width direction of the ceramic sintered body 4 (X-axis direction). Match the dimension up to the end face of. The average width Wgap is preferably 0.1 μm to 40 μm, which is extremely smaller than the width W0 of the element body 3.

By setting Wgap within the above range, cracks are less likely to occur, and even if the ceramic sintered body 4 is further downsized, the decrease in capacitance is small.

The width W0 of the element body 3 matches the width of the inner dielectric layer 10 along the X-axis direction.

As shown in FIG. 2A, at the end surface of the element body 3 in the Z-axis direction, the width of each of the insulating layer extension portions 16a in the X-axis direction from both end surfaces of the element body 3 in the X-axis direction is W1. .. In this case, the ratio of W1 and W0 is preferably 1/30≦W1/W0.

By setting W1/W0 to 1/30 or more, it is possible to further reduce structural defects and squealing due to electrostriction.

Also, W1/W0 may be 1/2, but in that case, one insulating layer extension 16a and the other insulating layer extension 16a are connected. That is, the insulating layer 16 is configured to be covered by the four surfaces of the element body 3 including the main surface and the side surfaces. In such a case, depending on the method of applying the insulating layer 16 or the like, the insulating layer that covers the end surface of the element body 3 in the X-axis direction may become thin, and the effect of alleviating electrostriction tends to decrease. .. On the other hand, as described above, when W1/W0 is 1/2, the external electrodes 6 and 8 are the end portions in the Y-axis direction of the end faces in the X-axis direction of the ceramic sintered body 4 when the insulating layer is made of a glass component. Even if the Y-axis direction end of the Z-axis direction end face is widely covered, the effect of reducing the short-circuit occurrence rate becomes remarkable.

In the present embodiment, the X-axis direction end of the internal electrode layer 12 sandwiched between the dielectric layers 10 adjacent in the stacking direction (Z-axis direction) is the X-axis direction end face of the element body 3, that is, the dielectric layer 10. It may be recessed inward from the X-axis direction end portion by a predetermined drawing distance. In the present embodiment, the width Wgap can be made extremely small as compared with the conventional one, and the pull-in distance of the internal electrode layer 12 is sufficiently small. Therefore, in the present embodiment, it is possible to obtain a multilayer capacitor having a large capacity while being small in size.

Note that the X-axis direction end surface of the element body 3 before forming the insulating layer 16 can be polished by barrel polishing or the like to eliminate the pull-in of the X-axis direction end portion of the internal electrode layer 12. The pulling in of the end portion in the X-axis direction of the internal electrode layer 12 is formed, for example, by the difference in the sintering shrinkage rate between the material forming the internal electrode layer 12 and the material forming the dielectric layer.

In the present embodiment, as shown in FIG. 3A or FIG. 3B, the angle formed by the imaginary line of the surface along the surface of the flat portion 16c of the insulating layer 16 and the tangent of the curved surface at the first inner predetermined position 16b1 of the mountain portion 16b. If the angle is θ1, θ1 is preferably 5° to 25°. Thereby, the fixing strength can be improved.

Further, in the present embodiment, as shown in FIG. 3A or FIG. 3B, the surface imaginary line along the surface of the flat surface portion 16c of the insulating layer 16 and the tangent line of the curved surface at the first outer predetermined position 16b3 of the mountain-shaped portion 16b are: When the angle formed is θ2, θ2 is preferably 5° to 25°. Thereby, the thermal shock resistance can be improved.

The first inner predetermined position 16b1 is determined by the method described below. First, the outermost point of the plane portion 16c, which is the outermost point, and the vertex 16b2 of the mountain portion 16b of the mountain portion 16b are determined. The apex 16b2 is the maximum width (Mt) in the X-axis direction in the mountain-shaped portions 16b at both ends in the Y-axis direction of the insulating layer 16. Then, a point on the surface of the mountain-like portion 16b, where the Y-axis direction coordinate or the Z-axis direction coordinate is intermediate between the plane end portion 16c1 and the apex 16b2, is defined as the first inner predetermined position 16b1.

The first outer predetermined position 16b3 is the intersection of the virtual surface and the outer curved surface of the mountain portion 16b.

The method for determining the first inner predetermined position 16b1 and the first outer predetermined position 16b3 is not particularly limited. For example, it can be visually determined using a digital microscope. In the case of visual determination using a digital microscope, there may be some error in the positions of the first inner predetermined position 16b1 and the first outer predetermined position 16b3. The impact on size is usually negligible.

In the past, ceramic was baked onto the internal electrode layer exposed from the element body, but in this case, the adhesion between the ceramic and the side surface of the element body is poor, and structural defects are likely to occur due to electrostriction. It was difficult to relieve the stress, and there was a problem with the bond strength.

In the laminated electronic component of the present embodiment, the angle θ1 of the angle formed by the imaginary surface of the surface along the surface of the flat portion 16c of the insulating layer 16 and the tangent of the curved surface at the first inner predetermined position 16b1 of the mountain portion 16b and the imaginary surface of the surface. And the angle θ2 of the angle formed by the tangents of the curved surface at the first outer predetermined position 16b3 of the mountain portion 16b. By setting the angles θ1 and θ2 of the ridges 16b of the insulating layer 16 within a predetermined range, the ceramic sintered body 4 and the external electrodes 6 and 8 are strongly adhered, and the element body 3 is deformed by electrostriction. And the external stress can be relaxed, and the mountability can be improved.

The widths Wgap on both sides of the ceramic sintered body 4 in the X-axis direction may be the same or different from each other. The widths W1 on both sides of the ceramic sintered body 4 in the X-axis direction may be the same or different from each other.

The thickness td of the inner dielectric layer 10 is not particularly limited, but is preferably 0.1 μm to 5.0 μm.

The thickness te of the internal electrode layer 12 is not particularly limited, but is preferably 0.1 μm to 5.0 μm.

The thickness to of the exterior region 11 is not particularly limited, but is preferably 0.1 μm to 5.0 μm.

Manufacturing Method of Multilayer Ceramic Capacitor Next, a manufacturing method of the multilayer ceramic capacitor 2 as one embodiment of the present invention will be specifically described. In the multilayer ceramic capacitor 2 according to the present embodiment, a green chip is manufactured by a normal printing method or a sheet method using a paste, and after firing the green chip, an insulating layer paste is applied and baked to form an insulating layer 16. Then, the external electrodes 6 and 8 are printed or transferred and baked to be manufactured.

First, in order to manufacture the inner green sheet 10a which will form the inner dielectric layer 10 shown in FIG. 1 and the outer green sheet 11a which will form the outer dielectric layer after firing, an inner green sheet paste and Prepare the outer green sheet paste.

The inner green sheet paste and the outer green sheet paste are usually composed of an organic solvent-based paste obtained by kneading ceramic powder and an organic vehicle, or an aqueous paste.

As the raw material of the ceramic powder, it is possible to appropriately select various compounds such as complex oxides or oxides, for example, carbonates, nitrates, hydroxides, organometallic compounds, etc., and mix them. In this embodiment, the raw material of the ceramic powder is used as a powder having an average particle diameter of 0.45 μm or less, preferably about 0.1 to 0.3 μm. In order to make the inner green sheet extremely thin, it is desirable to use powder finer than the thickness of the green sheet.

The organic vehicle is a binder dissolved in an organic solvent. The binder used for the organic vehicle is not particularly limited and may be appropriately selected from various ordinary binders such as ethyl cellulose and polyvinyl butyral. The organic solvent used is not particularly limited, and may be appropriately selected from various organic solvents such as alcohol, acetone and toluene.

Further, the green sheet paste may contain additives selected from various dispersants, plasticizers, dielectrics, subcomponent compounds, glass frits, insulators, etc., if necessary.

Examples of the plasticizer include phthalic acid esters such as dibutyl phthalate, dioctyl phthalate and benzylbutyl phthalate, adipic acid, phosphoric acid esters and glycols.

Next, in order to manufacture the internal electrode pattern layer 12a that will form the internal electrode layers 12A and 12B shown in FIG. 1 after firing, an internal electrode layer paste is prepared. The internal electrode layer paste is prepared by kneading the above-mentioned conductive material made of various conductive metals or alloys and the above-mentioned organic vehicle.

When Ni is used as the conductive material, for example, a commercially available CVD method, a Ni chemical powder produced by a wet chemical reduction method, or the like may be used.

The external electrode paste that will form the external electrodes 6 and 8 shown in FIG. 1 after firing may be prepared in the same manner as the internal electrode layer paste described above.

Using the inner green sheet paste and the internal electrode layer paste prepared above, the inner green sheets 10a and the internal electrode pattern layers 12a are alternately laminated as shown in FIG. 13a is manufactured. Then, after manufacturing the inner laminated body 13a, the outer green sheet 11a is formed by using the outer green sheet paste, and pressure is applied in the laminating direction to obtain the green laminated body.

The method for producing the green laminate is not particularly limited, and the green laminate can be produced by, for example, a sheet method or a printing method. In addition to the above, a predetermined number of the inner green sheets 10a and the internal electrode pattern layers 12a may be alternately laminated directly on the outer green sheet 11a, and pressure may be applied in the laminating direction to obtain a green laminate.

Specifically, first, the inner green sheet 10a is formed on a carrier sheet (for example, PET film) as a support by a doctor blade method or the like. The inner green sheet 10a is dried after being formed on the carrier sheet.

Next, as shown in FIG. 4, the internal electrode pattern layer 12a is formed on the surface of the internal green sheet 10a by using the internal electrode layer paste to obtain the internal green sheet 10a having the internal electrode pattern layer 12a.

At this time, as shown in FIG. 5A (a), in the nth layer, a gap 32 of the internal electrode pattern layer 12a is formed in the Y-axis direction, and a continuous flat internal electrode pattern layer 12a is formed in the X-axis direction. To do.

Next, as shown in FIG. 5A(b), a gap 32 between the internal electrode pattern layers 12a is formed in the Y-axis direction even in the (n+1)th layer, and a continuous flat internal electrode pattern layer 12a is formed in the X-axis direction. To do. At this time, the gap 32 between the internal electrode pattern layers of the nth layer and the (n+1)th layer is formed so as not to overlap in the Z-axis direction which is the stacking direction.

In this way, a plurality of inner green sheets 10a having the inner electrode pattern layers 12a are laminated to manufacture the inner laminated body 13a, and then the outer green sheet paste is used above and below the inner laminated body 13a to appropriately form A number of outer green sheets 11a are formed and pressed in the stacking direction to obtain a green stack.

Next, the green laminated body is cut along the C1 cut surface and the C2 cut surface of FIGS. 5A(a), 5A(b), 6A, and 6B to obtain a green chip. C1 is a cutting plane parallel to the YZ axis plane, and C2 is a cutting plane parallel to the ZX axis plane.

As shown in FIG. 5A(a), the C2 cut surfaces on both sides of the C2 cut surface for cutting the internal electrode pattern layer 12a in the nth layer cut the gap 32 of the internal electrode pattern layer 12a. The C2 cut surface obtained by cutting the internal electrode pattern layer 12a in the nth layer cuts the gap 32 of the internal electrode pattern layer 12a in the n+1th layer.

By obtaining the green chip by such a cutting method, the internal electrode pattern layer 12a of the nth layer of the green chip is exposed at one cutting surface and not exposed at the other cutting surface in the C2 cutting surface of the green chip. It will be composed. In addition, the internal electrode pattern layer 12a of the (n+1)th layer of the green chip has a structure in which the internal electrode pattern layer 12a is exposed on the C2 cut surface of the green chip, which is the nth layer where the internal electrode pattern layer 12a is exposed. First, the internal electrode pattern layer 12a is exposed on the cut surface of the nth layer where the internal electrode pattern layer 12a is not exposed.

Further, in the C1 cut surface of the green chip, the internal electrode pattern layer 12a is exposed in all layers.

Further, the method of forming the internal electrode pattern layer 12a is not particularly limited, and may be formed by a thin film forming method such as vapor deposition and sputtering in addition to the printing method and the transfer method.

Further, the step absorption layer 20 may be formed in the gap 32 of the internal electrode pattern layer 12a. By forming the step absorption layer 20, there is no step due to the internal electrode pattern layer 12a on the surface of the green sheet 10a, which contributes to preventing deformation of the finally obtained ceramic sintered body 4.

The step absorption layer 20 is formed by a printing method or the like, for example, similarly to the internal electrode pattern layer 12a. The step absorption layer 20 contains the same ceramic powder and organic vehicle as the green sheet 10a, but unlike the green sheet 10a, since it is formed by printing, it is adjusted for easy printing. Examples of the printing method include screen printing and gravure printing.

The green chip is solidified by removing the plasticizer by solidifying and drying. The solidified and dried green chips are put into a barrel container together with a medium and a polishing liquid and barrel-polished by a horizontal centrifugal barrel machine or the like. The green chip after barrel polishing is washed with water and dried. The element main body 3 is obtained by performing a binder removal step, a firing step, and an annealing step that is performed as necessary on the dried green chip.

The binder removal step may be performed under known conditions, for example, the holding temperature may be 200°C to 400°C.

In the present embodiment, the firing process and the annealing process are performed in a reducing atmosphere. Other firing conditions or annealing conditions may be known conditions, for example, the firing holding temperature is 1000°C to 1300°C, and the annealing holding temperature is 500°C to 1000°C.

The binder removal step, firing step, and annealing step may be performed continuously or independently.

Next, the insulating layer paste is applied by screen printing to both end surfaces of the element body 3 in the X-axis direction and baked to form the insulating layer 16, and the ceramic sintered body 4 shown in FIGS. 1 and 2 is formed. To get The insulating layer 16 not only enhances the insulating property but also makes the moisture resistance favorable. When the insulating layer paste is applied, the paste is applied not only to both end surfaces of the element body 3 in the X-axis direction but also to both end portions in the X-axis direction and/or the Y-axis of both end surfaces of the element body 3 in the Z-axis direction. It may also be applied to both ends in the X-axis direction of both end faces in the direction.

When the insulating layer 16 is made of glass, the insulating layer paste is obtained, for example, by kneading the above-mentioned glass raw material, a binder containing ethyl cellulose as a main component, and a dispersion medium such as terpineol with a mixer.

The viscosity of the insulating layer paste of the present embodiment is preferably 30 Pa·s to 120 Pa·s. Thus, it is possible to preferably ranges θ1 and .theta.2, Ru can be thermal shock resistance and bonding strength to obtain a satisfactory multilayer ceramic capacitor.

The viscosity of the insulating layer paste can be adjusted by changing the amount of the dispersion medium such as terpineol.

The method of forming the insulating layer 16 on the element body 3 is not particularly limited, but the following method may be mentioned, for example.

First, the insulating layer paste is applied to the end surface of the element body 3 in the X-axis direction by screen printing and dried. This is the first insulating layer paste applying step. After that, the central portion of the element body 3 in the X-axis direction is masked with resin or the like.

Next, in the second insulating layer paste applying step, the end portion in the X-axis direction of the element body 3 in which the central portion in the X-axis direction is masked is re-applied by dipping or screen printing, followed by drying and binder removal processing. Then, the insulating layer 16 is formed by baking, and the ceramic sintered body 4 is obtained.

The glass component of the insulating layer paste that is liquefied during baking easily enters into the void from the end of the inner dielectric layer 10 to the end of the internal electrode layer 12 by a capillary phenomenon. Therefore, the insulating layer 16 surely fills the above-mentioned voids and enhances the insulating property, and also provides good moisture resistance.

The Y-axis direction end faces and/or the Z-axis direction end faces of the ceramic sintered body 4 obtained as described above are, if necessary, end face-polished by, for example, barrel polishing or sandblasting.

Next, the external electrode paste is applied and baked on both end faces in the Y-axis direction of the ceramic sintered body 4 on which the insulating layer 16 has been baked to form the external electrodes 6 and 8. The external electrodes 6 and 8 may be formed after forming the insulating layer 16 or at the same time as forming the insulating layer 16, but preferably after forming the insulating layer 16.

The method for forming the external electrodes 6 and 8 is not particularly limited, and an appropriate method such as coating/baking of external electrode paste, dipping/baking, plating, vapor deposition, or sputtering can be used.

Then, if necessary, a coating layer is formed on the surfaces of the external electrodes 6 and 8 by plating or the like.

The monolithic ceramic capacitor 2 of the present embodiment manufactured in this manner is mounted on a printed circuit board or the like by soldering or the like and used in various electronic devices or the like.

In the past, since a part of the dielectric layer was used as the gap part, a blank space where the internal electrode pattern layer was not formed at a predetermined interval along the X-axis direction on the part of the surface of the green sheet that became the gap part after firing. Formed a pattern.

On the other hand, in the present embodiment, the internal electrode pattern layer is continuously formed along the X-axis direction, and the gap portion is obtained by forming an insulating layer on the element body. Therefore, a blank pattern for forming the gap portion is not formed. Therefore, unlike the conventional method, a flat internal electrode pattern layer film is formed on the green sheet. Therefore, the number of green chips to be acquired per area of the green sheet can be increased as compared with the conventional case.

Further, in the present embodiment, unlike the conventional case, it is not necessary to care about the blank pattern when cutting the green laminated body, so that the cutting yield is improved as compared with the conventional case.

Further, conventionally, when the green sheets are laminated, the blank pattern portion has a smaller thickness than the portion where the internal electrode pattern layer is formed, and when cutting, the vicinity of the cut surface of the green chip is curved. was there. Further, conventionally, since a bulge is formed near the blank pattern portion of the internal electrode pattern layer, unevenness is generated in the internal electrode layer, and by stacking these, the internal electrode or the green sheet may be deformed. On the other hand, in this embodiment, the blank pattern is not formed and the swelling of the internal electrode pattern layer is not formed.

Further, in the present embodiment, since the internal electrode pattern layer is a flat film, swelling of the internal electrode pattern layer is not formed, and bleeding or scraping of the internal electrode pattern layer does not occur near the gap portion. The capacity can be improved. This effect is more remarkable as the element body is smaller.

(Second embodiment)
In the monolithic ceramic capacitor according to the present embodiment, except that it is essential that the external electrodes 6 and 8 cover the maximum width portion in the X-axis direction in the mountain portion 16b at the end portion in the Y-axis direction of the insulating layer 16. Are the same as those in the first embodiment, and redundant description will be omitted.

In the present embodiment, as shown in FIG. 2B, FIG. 2C, or FIG. 3A, both ends of the external electrodes 6 and 8 in the X-axis direction are in the X-axis direction in the mountain-shaped portions of both ends of the insulating layer 16 in the Y-axis direction. Of the maximum width (Mt) (vertex 16b2). As a result, the monolithic ceramic capacitor of the present embodiment has good adhesion strength.

In addition, as shown in FIG. 3A, the Y-axis direction from the end of the element body 3 in the Y-axis direction to the maximum width (Mt) in the X-axis direction of the mountain portion of the end of the insulating layer 16 in the Y-axis direction. Is defined as α, and the coating length along the Y-axis direction of the external electrodes 6, 8 covering the insulating layer 16 from the end of the element body 3 in the Y-axis direction is defined as β.

In this embodiment, α/β is preferably 1/30≦α/β<1.

In the case of 1/30≦α/β<1, the coating length of the external electrodes 6 and 8 is shorter than that in the case where α/β is smaller than 1/30. The occurrence rate of short circuits can be reduced.

On the other hand, in the case of 1/30≦α/β<1, the coating length of the external electrodes 6 and 8 is longer than in the case where α/β is 1 or more, and the fixing strength can be improved.

When Mt is the maximum width from the X-axis direction end of the element body 3 to the X-axis direction end of the insulating layer 16, Mt/β is preferably 1/30 to 1/10. Thereby, the thermal shock resistance and the fixing strength can be improved.

(Third Embodiment)
In the multilayer ceramic capacitor according to the present embodiment, as shown in FIGS. 2D, 2E, and 3C, the insulating layer 16′ has a mountain-shaped portion 16b′ and a valley formed on the peripheral edge of the end face (side face) in the X-axis direction. The second embodiment is the same as the first embodiment except that the flat portion 16c is not observed and the flat portion 16c' is formed.

In the present embodiment, as shown in FIG. 3C, an imaginary line drawn in a direction perpendicular to the X-axis direction through a valley-shaped portion minimum point 16c1′ in the valley-shaped portion 16c′ of the insulating layer 16′. When the angle formed by the tangents to the curved surface at the second inner predetermined position 16b1′ of the mountain portion 16b′ is θ1′, θ1′ is preferably 5° to 25°. Thereby, the fixing strength can be improved. The valley-shaped minimum point 16c1′ is a portion of the valley-shaped portion 16c′ having the minimum width in the X-axis direction in the central portion of the insulating layer 16 in the Y-axis direction.

Further, in the present embodiment, as shown in FIG. 3C, a vertical imaginary line drawn in the direction perpendicular to the X-axis direction through the valley-shaped minimum point 16c1′ and the second outside predetermined value of the mountain-shaped portion 16b′. When the angle formed by the tangents to the curved surface at the position 16b3′ is θ2′, θ2′ is preferably 5° to 25°. Thereby, the thermal shock resistance can be improved.

The second inner predetermined position 16b1′ in the case shown in FIG. 3C is determined by the method described below. First, the apex 16b2' of the peak 16b' of the valley-shaped minimum point 16c1' and the peak 16b' is determined. A point on the surface of the peak portion 16b' or the valley portion 16c' that is in the middle of the valley-shaped portion minimum point 16c1' and the vertex 16b2' is defined as the second inner predetermined position 16b1'. .. In the present embodiment, the boundary between the mountain-shaped portion 16b' and the valley-shaped portion 16c' is not always clear.

The second outer predetermined position 16b3' is the intersection of the vertical imaginary line and the curved surface on the outer side of the mountain portion 16b'.

In the laminated electronic component of the present embodiment, the angle θ1′ of the angle formed by the vertical imaginary line and the tangent to the curved surface at the second inner predetermined position 16b1′ and the second outer predetermined position 16b3′ of the vertical imaginary line and the mountain portion 16b′. The characteristic is the angle θ2′ of the angle formed by the tangents to the curved surface. By setting the angles θ1′ and θ2′ of the ridges 16b′ or the valleys 16c′ of the insulating layer 16′ within a predetermined range, the adhesiveness between the ceramic sintered body 4 and the external electrodes 6 and 8 is strengthened. In addition, the deformation of the element body 3 due to electrostriction can be mitigated, and the external stress can be mitigated, so that the mountability can be improved.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and can be variously modified without departing from the scope of the present invention. For example, the features of a plurality of embodiments among the first to third embodiments may be provided at the same time.

Further, it is common in all the embodiments that the insulating layer has a mountain-shaped portion formed on the peripheral edge of the side surface, but the mountain-shaped portion need not be formed on the entire circumference of the side surface. For example, as shown in FIGS. 2F and 2G, a mountain-shaped portion may be formed only on a part of the side surface.

In addition, in the first and second embodiments, the flat surface portion 16c does not necessarily have to be perpendicular to the X-axis direction, and may be inclined. When the plane portion 16c is inclined, the imaginary surface line is also inclined.

Further, in the first embodiment and the second embodiment, it is not necessary that θ1 and θ2 be within a predetermined range in all the cut surfaces, and in the third embodiment, θ1′ and θ2′ are predetermined in all the cut surfaces. It does not need to be within the range. For example, in the third embodiment, FIG. 2D and FIG. 3C are obtained by cutting at the central portion in the Z-axis direction of FIG. 1, but in the case of cutting at other points in the Z-axis direction, θ1′ and θ2. There is a case where any one or more of ‘′′ is out of a specific range, and a case where two mountain-shaped portions are not formed.

Further, for example, the internal electrode pattern layer 12a has a pattern having the gaps 32 of the grid-shaped internal electrode pattern layer 12a as shown in FIG. 5B, in addition to the patterns shown in FIGS. 5A(a) and 5A(b). May be

The method of controlling α/β within a predetermined range as in the second embodiment is not particularly limited, but can be controlled by changing the dip of paste and the thickness of printing. The mode in which the flat portion does not exist as in the third embodiment may be obtained by changing the dip and the printing thickness of the second insulating layer paste to be thin. In addition, as shown in FIGS. 2F and 2G, the mode in which the mountain-shaped portion exists only on one side can be changed by changing the cut end of the cross section, tilting the chip, or dipping and printing the second insulating layer paste. May be obtained. In addition, the aspect in which the plane portion is inclined may be obtained by changing the cut end of the cross section, inclining the chip, or inclining the dipping and printing of the second insulating layer paste.

Further, the laminated electronic component of the present invention is not limited to the laminated ceramic capacitor and can be applied to other laminated electronic components. Other laminated electronic components are all electronic components in which dielectric layers are laminated via internal electrodes, such as bandpass filters, chip inductors, laminated three-terminal filters, piezoelectric elements, chip thermistors, chip varistors, chips. Examples include resistors and other surface mount (SMD) chip type electronic components.

Hereinafter, the present invention will be described based on more detailed examples, but the present invention is not limited to these examples.

Example 1
As described below, capacitor samples No. 1 to No. 7 were prepared, and θ1 and θ2 were measured, and thermal shock resistance and adhesive strength were evaluated.

First, 100 parts by weight of BaTiO ₃ -based ceramic powder, 10 parts by weight of polyvinyl butyral resin, 5 parts by weight of dioctyl phthalate (DOP) as a plasticizer, and 100 parts by weight of alcohol as a solvent were mixed in a ball mill. To obtain a paste for the inner green sheet.

Separately from the above, 44.6 parts by weight of Ni particles, terpineol: 52 parts by weight, ethyl cellulose: 3 parts by weight, and benzotriazole: 0.4 parts by weight are kneaded with a three-roll to form a slurry. To prepare the internal electrode layer paste.

The inner green sheet 10a was formed on the PET film using the above-prepared inner green sheet paste so that the thickness after drying was 7 μm. Then, an internal electrode pattern layer 12a was printed thereon with a predetermined pattern using an internal electrode layer paste, and the sheet was peeled from the PET film to obtain an inner green sheet 10a having the internal electrode pattern layer 12a.

As shown in FIG. 4, after the inner green sheets 10a having the inner electrode pattern layers 12a are laminated to manufacture the inner laminated body 13a, an outer green sheet paste is used above and below the inner laminated body 13a as appropriate. The outer green sheets 11a were formed in the same number and were pressure-bonded in the stacking direction to obtain a green stack. The outer green sheet paste was obtained by the same method as the inner green sheet paste.

Next, as shown in FIGS. 5A(a), 5A(b), 6A, and 6B, the green laminated body was cut along the C1 cut surface and the C2 cut surface to obtain a green chip.

Next, the obtained green chip was subjected to binder removal processing, firing and annealing under the following conditions to obtain the element body 3.

The binder removal treatment conditions were a temperature rising rate: 60° C./hour, a holding temperature: 260° C., a temperature holding time: 8 hours, and an atmosphere: in the air.

The firing conditions were a temperature rising rate of 200° C./hour, a holding temperature of 1000° C. to 1200° C., and a temperature holding time of 2 hours. The cooling rate was 200° C./hour. The atmosphere gas was a humidified N ₂ +H ₂ mixed gas.

The annealing conditions were as follows: temperature rising rate: 200° C./hour, holding temperature: 500° C. to 1000° C., temperature holding time: 2 hours, cooling rate: 200° C./hour, atmosphere gas: humidified N ₂ gas.

A wetter was used to wet the atmosphere gas during firing and annealing.

Next, BaO: 14.4 parts by weight, ZnO: 12.0 parts by weight, B ₂ O ₃ : 11.6 parts by weight, CaO: 3.6 parts by weight, SiO ₂ : 3.0 parts by weight, and terpineol: 5.0 to 60.0 parts by weight, ethyl cellulose: 3 parts by weight, and benzotriazole: 0.4 parts by weight were kneaded by a three-roll mill to form a slurry and an insulating layer paste having a viscosity shown in Table 1. Prepared. The softening point of the insulating layer obtained by the insulating layer paste of this example was 655°C.

Further, the viscosity of the insulating layer paste was changed by changing the amount of terpineol for each of Sample Nos. 1 to 7.

The viscosity of the insulating layer paste was measured by using a rheometer (RVDV-II+PCP manufactured by Brookfield Co., Ltd.). The viscosity at a shear rate of 10 sec ^-1 was measured at 25°C.

An insulating layer paste was applied to the end surface of the element body 3 in the X-axis direction by screen printing so that the film thickness was 20 μm (first insulating layer paste applying step).

Next, it is dried at 180° C., an acrylic resin is printed on the surface of the insulating layer, masking is performed, and then the same insulating layer paste as the insulating layer paste used in the first insulating layer paste applying step is used. Screen printing was performed with the film thickness shown in Table 1 (second insulating layer paste applying step). The obtained chips were dried at 180° C., and subjected to binder removal processing and baking using a belt conveyor furnace to form an insulating layer 16 on the element body 3 to obtain a ceramic sintered body 4. The binder removal treatment and baking conditions for the insulating layer paste were as follows.
Binder removal treatment Temperature rising rate: 1000°C/hour Holding temperature: 500°C
Temperature holding time: 0.25 hours Atmosphere: baking in air Temperature rising rate: 700°C/hour Holding temperature: 700°C to 1000°C
Temperature holding time: 0.5 hours Atmosphere: Humidified N ₂ gas

The end surface in the Y-axis direction of the obtained ceramic sintered body 4 was polished by barrel processing.

Next, 100 parts by weight of a mixture of spherical Cu particles having an average particle diameter of 0.4 μm and flaky Cu powder, and 30 parts by weight of an organic vehicle (5 parts by weight of ethyl cellulose resin dissolved in 95 parts by weight of butyl carbitol). And 6 parts by weight of butyl carbitol were kneaded to obtain a paste for external electrodes.

The obtained external electrode paste was transferred to the end surface of the ceramic sintered body 4 in the Y-axis direction with a film thickness of 10 to 15 μm by dipping, and baked at 850° C. for 10 minutes in an N ₂ atmosphere to external electrodes 6, 8 Then, a coating layer was formed on the external electrodes 6 and 8 by plating to obtain a multilayer ceramic capacitor 2.

The size of the capacitor sample (multilayer ceramic capacitor 2) manufactured as described above was 3.2×2.5×1.5 mm, and the inner dielectric layer 10 was 10 layers. The inner dielectric layer 10 had a thickness of 5.0 μm, and the internal electrode layer 12 had a thickness of about 1.2 μm.

The obtained capacitor sample was measured or evaluated by the following method.

<θ1, θ2>
The capacitor sample is filled with resin so that the end face in the Z-axis direction stands downward, and the other end face is polished along the Z-axis direction of the laminated ceramic capacitor 2 so that the height of the element body 3 in the Z-axis direction is A polished cross section of 1/2 H0 was obtained. Next, this polished cross section was subjected to ion milling to remove the sag due to polishing. In this way, a cross section for observation was obtained.

Next, in the cross section for observation, θ1 and θ2 shown in FIG. 3A were measured. Specifically, the angle was calculated from the triangle ratio. For one sample, θ1 and θ2 were measured at four places in the corner of the insulating layer 16. This operation was performed on 30 capacitor samples, and the average of each of θ1 and θ2 at 120 locations was obtained. The results are shown in Table 2. However, the place where the insulating layer was missing was not counted.

A digital microscope (VHX microscope manufactured by Keyence Corporation) was used for measuring the width, and observation and measurement were performed with a 5000× lens. Further, the first inner predetermined position and the first outer predetermined position were visually identified.

<Heat resistance>
100 capacitor samples were immersed in molten solder at 250° C. at a speed of 10 cm/sec, 10 seconds later, pulled up at 10 cm/sec, this was repeated 10 times, and the insulation resistance was measured to determine the short-circuit defect rate. I checked. The results are shown in Table 2. The case where the short circuit defect rate at 250° C. was 0% was judged to be good.

<Fixing strength>
As shown in FIG. 7, while the capacitor sample 102 is mounted on the circuit board 104, the super-hard pressure jig 106 is moved toward the end surface of the capacitor sample 102 in the X-axis direction at a speed of 30 mm/min. Then, the pressing jig 106 pressed the capacitor sample 102 from the direction of arrow P1. At this time, the adhesion strength was evaluated by whether or not the capacitor sample 102 was broken under the load of 10N. A test was conducted on 100 capacitor samples to determine the capacitor defect rate. The results are shown in Table 2. As an evaluation criterion, less than 5% was better, and 5% or more and 15% or less was good. The internal structure of the capacitor sample 102 according to this example is the same as that of the monolithic ceramic capacitor 2 shown in FIGS. 1 and 2.

When θ1 is larger than 2.0° and smaller than 30.0°, θ2 is larger than 4.0° and smaller than 32.0° (sample number 2 to sample number 5), θ1 is 2 It was confirmed that the fixing strength was better than that in the case of 0.0° (Sample No. 1).

It is considered that in sample No. 1, the mountain portion of the insulating layer had a thin shape, so that the portion could not withstand the external stress, and poor adhesion strength occurred.

If θ1 is larger than 2.0° and smaller than 30.0° and θ2 is larger than 4.0° and smaller than 32.0° (sample number 2 to sample number 5), θ2 It was confirmed that the thermal shock resistance was better than that in the case of larger than 32.0° (Sample No. 6 and Sample No. 7).

Sample No. 6 and Sample No. 7 have a shape in which the mountain portion of the insulating layer is largely projected, and it is difficult for the external electrode to suppress the gap portion of the insulating layer. Therefore, it is considered that cracks occurred due to failure to withstand thermal shock.

Example 2
The printed film thickness in the second insulating layer paste applying step is set to 10 μm, and the dip film thickness when the external electrode paste is transferred to the end surface of the ceramic sintered body 4 in the Y-axis direction by dipping is shown in Table 3. Capacitor samples of Sample Nos. 8 to 17 were prepared in the same manner as Sample No. 4 of Example 1 except that they were changed, and α/β was measured and thermal shock resistance, adhesion strength, and short-circuit defect rate were evaluated. It was The results are shown in Table 3.

The composition of the insulating layer paste used in the sample No. 8 to Sample No. 17, BaO: 14.4 parts by weight, ZnO: 12.0 parts by _weight, B ₂ O 3: 11.6 parts by weight, CaO: 3 0.6 parts by weight, SiO ₂ : 3.0 parts by weight, terpineol: 52 parts by weight, ethyl cellulose: 3 parts by weight, and benzotriazole: 0.4 parts by weight.

The thermal shock resistance and the adhesion strength of Sample Nos. 8 to 17 were evaluated in the same manner as in Example 1. The method for measuring α/β and the method for evaluating the short-circuit defect rate are as described below. In addition, in sample numbers 8 to 17, θ1 was 24.5° and θ2 was 23.5°.

<α/β>
A capacitor sample was prepared, and a cross section for observation was obtained in the same manner as in the measurement of θ1 and θ2.

Next, α and β shown in FIG. 3A were measured on the cross section for observation. For one sample, α and β were measured at four corners of the insulating layer 16, and this work was performed on 30 capacitor samples. A total of 120 points were measured for α and β, and the average α and β were measured. Was calculated and α/β was calculated. The results are shown in Table 3. However, the place where the insulating layer was missing was not counted. The average α of all the samples of sample number 8 to sample number 17 was 6 μm.

For the measurement of α and β, a digital microscope (VHX microscope manufactured by Keyence Corporation) was used, and observation and measurement were performed with a 5000× lens.

<Short defect rate>
The resistance value of the capacitor sample was measured by an insulation resistance meter (E2377A manufactured by HEWLETT PACKARD), and a sample having a resistance value of 100 kΩ or less was determined to be a short circuit defect. The above measurement was performed on 100 capacitor samples, and the ratio of the capacitor samples that caused the short circuit defect was defined as the short circuit defect rate. The short-circuit defect rate is preferably 15% or less.

When α/β is larger than 1/40 and smaller than 1 (Sample No. 10 to Sample No. 14), short circuit failure is more than when α/β is 1/40 or less (Sample No. 8 and Sample No. 9). It was confirmed that the rate was good.

In sample No. 8 and sample No. 9, since the external electrodes were over-coated, the extension of the plating covering the external electrodes tended to cause conduction between one external electrode and the other external electrode, resulting in a short circuit failure rate. Is believed to have increased.

Further, when α/β is larger than 1/40 and smaller than 1 (Sample No. 10 to Sample No. 14), as compared with the case where α/β is 1 or more (Sample No. 15 to Sample No. 17), the bonding strength is Was good.

INDUSTRIAL APPLICABILITY As described above, the laminated electronic component according to the present invention is useful as an electronic component used in a laptop computer or a smartphone, which is often used in a small size and a high capacity.

2, 102... Multilayer ceramic capacitor 3... Element body 4... Ceramic sintered body 6... First outer electrode 8... Second outer electrode 10... Inner dielectric layer 10a... Inner green sheet 11... Exterior area 11a... Outer green sheet 12 ... Internal electrode layers 12A, 12B... Lead-out portion 12a... Internal electrode pattern layer 13... Interior region 13a... Inner laminate 14... Capacitance region 15A, 15B... Lead-out region 16... Insulating layer 16a... Insulating layer extension 16b... Mountain-like portion 16b1... 1st predetermined position 16b2... Vertex 16b3... 2nd predetermined position 16c... Plane part 16c1... Plane end part 20... Step absorption layer 32... Internal electrode pattern layer gap 104... Substrate 106... Pressurizing jig

Claims (4)

A laminated electronic component comprising an element body in which internal electrode layers and dielectric layers substantially parallel to a plane including a first axis and a second axis are alternately laminated along a direction of a third axis,
An insulating layer is provided on each of a pair of side surfaces of the element body that face each other in the direction of the first axis,
External electrodes electrically connected to the internal electrode layers are provided on a pair of end surfaces of the element body that face each other in the direction of the second axis.
The insulating layer has a mountain-shaped portion formed on the peripheral edge of the side surface, and a flat portion in the central portion of the side surface,
The outermost point of the plane portion, which is the outermost point, and the second vertex, which is the maximum width portion in the first axial direction, of the mountain portion at both ends in the second axial direction of the insulating layer. A point on the surface of the mountain portion that is intermediate in the axial coordinate or the third axial coordinate is the first inner predetermined position,
A first outer predetermined position is an intersection of a virtual surface line along the surface of the flat portion of the insulating layer and an outer curved surface of the mountain portion,
Wherein a surface imaginary line, the angle of the tangent angle of the curved surface at said first inner position of the mountain-shaped portion and .theta.1,
The surface and the imaginary line, when the tangent of the curved surface in the first outer position of the mountain-shaped portion has an angle θ2 of the angle,
θ1 is 5° to 25°,
θ2 is 5° to 25°, a laminated electronic component. A laminated electronic component comprising an element body in which internal electrode layers and dielectric layers substantially parallel to a plane including a first axis and a second axis are alternately laminated along a direction of a third axis,
An insulating layer is provided on each of a pair of side surfaces of the element body that face each other in the direction of the first axis,
External electrodes electrically connected to the internal electrode layers are provided on a pair of end surfaces of the element body that face each other in the direction of the second axis.
The insulating layer has a mountain-shaped portion formed on the peripheral edge of the side surface, and a flat portion in the central portion of the side surface,
The external electrode covers a maximum width portion in the first axial direction in the mountain portion at the end portion in the second axial direction of the insulating layer ,
In the central portion of the element body in the second axis direction, in a cross section parallel to a plane including the first axis and the third axis, the mountain-shaped portion of the insulating layer is the third axis of the plane portion. A laminated electronic component, which is formed on both sides in the direction . A length along the second axial direction from the end of the element body in the second axial direction to the maximum width in the first axial direction of the mountain portion of the end of the insulating layer in the second axial direction. Is α,
When the coating length of the external electrode covering the insulating layer from the end portion of the element body in the second axial direction along the second axial direction is β,
The laminated electronic component according to claim 2, wherein α/β is 1/30≦α/β<1. A laminated electronic component comprising an element body in which internal electrode layers and dielectric layers substantially parallel to a plane including a first axis and a second axis are alternately laminated along a direction of a third axis,
An insulating layer is provided on each of a pair of side surfaces of the element body that face each other in the direction of the first axis,
External electrodes electrically connected to the internal electrode layers are provided on a pair of end surfaces of the element body that face each other in the direction of the second axis.
The insulating layer has a mountain-shaped portion formed on the peripheral edge of the side surface and a valley-shaped portion in the central portion of the side surface,
Among the valley-shaped portions, a valley-shaped portion minimum point that is a minimum width portion in the first axial direction in a central portion of the insulating layer in the second axial direction and both end portions of the insulating layer in the second axial direction. Is a middle point in the coordinates of the second axial direction of the apex that is the maximum width portion in the first axial direction in the mountain portion, and the point on the surface of the mountain portion or the valley portion is the second inner side. In place,
An intersection of a vertical imaginary line passing through the valley-shaped portion minimum point and perpendicular to the first axis of the insulating layer and a curved surface on the outer side of the mountain-shaped portion is defined as a second outer predetermined position,
And the vertical imaginary line, the angle of the tangent angle of the curved surface in the second inner position of the mountain-shaped portion and Shita1',
If the the vertical imaginary line, the angle of the tangent angle of the curved surface at said second outer predetermined position of the mountain-shaped portion and Shita2',
θ1′ is 5° to 25°,
multilayer electronic component θ2' is characterized by 5 ° to 25 ° der Rukoto.

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