JP6684802B2 - 仮想化されたディスプレイ出力ポートの構成 - Google Patents

仮想化されたディスプレイ出力ポートの構成 Download PDF

Info

Publication number
JP6684802B2
JP6684802B2 JP2017531396A JP2017531396A JP6684802B2 JP 6684802 B2 JP6684802 B2 JP 6684802B2 JP 2017531396 A JP2017531396 A JP 2017531396A JP 2017531396 A JP2017531396 A JP 2017531396A JP 6684802 B2 JP6684802 B2 JP 6684802B2
Authority
JP
Japan
Prior art keywords
display
vdpcd
mst
dpcd
displayport
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017531396A
Other languages
English (en)
Japanese (ja)
Other versions
JP2018510519A (ja
JP2018510519A5 (enExample
Inventor
アザー フセイン サイド
アザー フセイン サイド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ATI Technologies ULC
Original Assignee
ATI Technologies ULC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ATI Technologies ULC filed Critical ATI Technologies ULC
Publication of JP2018510519A publication Critical patent/JP2018510519A/ja
Publication of JP2018510519A5 publication Critical patent/JP2018510519A5/ja
Application granted granted Critical
Publication of JP6684802B2 publication Critical patent/JP6684802B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/10—Use of a protocol of communication by packets in interfaces along the display data pipeline

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Communication Control (AREA)
JP2017531396A 2014-12-10 2015-11-12 仮想化されたディスプレイ出力ポートの構成 Active JP6684802B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/565,583 US9508282B2 (en) 2014-12-10 2014-12-10 Virtualized display output ports configuration
US14/565,583 2014-12-10
PCT/CA2015/051168 WO2016090466A1 (en) 2014-12-10 2015-11-12 Virtualized display output ports configuration

Publications (3)

Publication Number Publication Date
JP2018510519A JP2018510519A (ja) 2018-04-12
JP2018510519A5 JP2018510519A5 (enExample) 2018-12-27
JP6684802B2 true JP6684802B2 (ja) 2020-04-22

Family

ID=56106349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017531396A Active JP6684802B2 (ja) 2014-12-10 2015-11-12 仮想化されたディスプレイ出力ポートの構成

Country Status (6)

Country Link
US (2) US9508282B2 (enExample)
EP (1) EP3230881A4 (enExample)
JP (1) JP6684802B2 (enExample)
KR (2) KR102500264B1 (enExample)
CN (1) CN107003968B (enExample)
WO (1) WO2016090466A1 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10146499B2 (en) * 2015-10-09 2018-12-04 Dell Products L.P. System and method to redirect display-port audio playback devices in a remote desktop protocol session
US10476927B2 (en) * 2015-11-30 2019-11-12 Dell Products L.P. System and method for display stream compression for remote desktop protocols
KR102010456B1 (ko) * 2017-04-05 2019-08-13 삼성전자주식회사 다중 디스플레이 시스템을 구성하는 디스플레이 장치 및 그 제어 방법
US11202028B2 (en) 2017-04-05 2021-12-14 Samsung Electronics Co., Ltd. Display device configuring multi display system and control method thereof
US10714018B2 (en) * 2017-05-17 2020-07-14 Ignis Innovation Inc. System and method for loading image correction data for displays
US11200833B2 (en) 2018-02-21 2021-12-14 Sharp Nec Display Solutions, Ltd. Image display device and image display method
CN112446474B (zh) * 2019-08-31 2022-11-22 安徽寒武纪信息科技有限公司 芯片和多芯片系统及电子设备和数据传输方法
JP6807006B1 (ja) * 2019-12-27 2021-01-06 富士通クライアントコンピューティング株式会社 機能拡張装置及び情報処理システム
CN113259613B (zh) * 2020-02-07 2022-12-06 广东博华超高清创新中心有限公司 一种改进hdmi显示数据流压缩互通互联的方法
US20200320026A1 (en) * 2020-04-27 2020-10-08 Intel Corporation Bandwidth management allocation for displayport tunneling
EP4232911A4 (en) * 2020-10-20 2024-07-10 Hewlett-Packard Development Company, L.P. Ip kvm devices
WO2022159106A1 (en) * 2021-01-22 2022-07-28 Hewlett-Packard Development Company, L.P. Video link repair
TWI795857B (zh) * 2021-08-02 2023-03-11 大陸商集創北方（珠海）科技有限公司 螢幕烙印避免方法及利用其之顯示器和資訊處理裝置
CN116737095A (zh) * 2022-03-04 2023-09-12 瑞昱半导体股份有限公司 分析方法及非暂态电脑可读媒体

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10290401A (ja) * 1997-04-12 1998-10-27 Shinji Kato マルチ スキャン テレビ
US8068485B2 (en) * 2003-05-01 2011-11-29 Genesis Microchip Inc. Multimedia interface
KR20090023331A (ko) * 2006-05-23 2009-03-04 가부시키가이샤 니콘 메인터넌스 방법, 노광 방법 및 장치, 그리고 디바이스 제조 방법
US8237624B2 (en) * 2008-05-06 2012-08-07 Integrated Device Technology, Inc. System having capability for daisy-chained serial distribution of video display data
US20110164065A1 (en) * 2010-01-06 2011-07-07 Ati Technologies Ulc Method And Apparatus For Configuring Display Bezel Compensation For A Single Large Surface Display Formed By A Plurality Of Displays
US9164930B2 (en) * 2010-09-15 2015-10-20 Synaptics Incorporated Multi-device docking with a displayport compatible cable
US8594002B2 (en) 2010-09-15 2013-11-26 Intel Corporation Method and system of mapping displayport over a wireless interface
US8380912B2 (en) * 2010-09-24 2013-02-19 Nxp B.V. Transparent repeater device for handling displayport configuration data (DPCD)
KR101158876B1 (ko) * 2012-03-09 2012-06-25 엘지디스플레이 주식회사 표시장치와 그의 패널 셀프 리프레시 동작 제어방법
US8884977B2 (en) 2012-08-24 2014-11-11 Analogix Semiconductor, Inc. Panel self refreshing with changing dynamic refresh rate
TWI465919B (zh) 2012-11-14 2014-12-21 Acer Inc 採用雷霆介面之電子裝置、其連接方法及底座設備
WO2015153478A1 (en) * 2014-04-01 2015-10-08 Lattice Semiconductor Corporation Orthogonal data organization for error detection and correction in serial video interfaces

Also Published As

Publication number Publication date
WO2016090466A1 (en) 2016-06-16
EP3230881A4 (en) 2018-07-18
US20170069258A1 (en) 2017-03-09
US20160171925A1 (en) 2016-06-16
JP2018510519A (ja) 2018-04-12
KR20170092596A (ko) 2017-08-11
CN107003968A (zh) 2017-08-01
US9508282B2 (en) 2016-11-29
KR102611941B1 (ko) 2023-12-08
KR20230023068A (ko) 2023-02-16
CN107003968B (zh) 2020-10-02
EP3230881A1 (en) 2017-10-18
KR102500264B1 (ko) 2023-02-15
US10056027B2 (en) 2018-08-21

Similar Documents

Publication Publication Date Title
JP6684802B2 (ja) 仮想化されたディスプレイ出力ポートの構成
US8886846B2 (en) Flexible implementation of serial bus support over display interface
US7937501B2 (en) Displayport CE system control functionality
US10031710B2 (en) Display device constituting multi-display system and control method thereof
US9942512B2 (en) Display apparatus and control method thereof
US10817242B2 (en) Image display device, connection method of image display device, and multi-display system
TWI518673B (zh) 影像切換器及其切換方法
KR20140098545A (ko) 싱크 장치, 소스 장치, 기능 블록 제어 시스템, 싱크 장치 제어 방법, 소스 장치 제어 방법 및 기능 블록 제어 방법
KR20220165395A (ko) 싱크 장치, 소스 장치 및 hdmi 제어 방법
US10204067B2 (en) Data transfer device of display equipment and data transfer method
US9992441B2 (en) Displaying multiple videos on sink device using display information of source device
WO2017000835A1 (zh) 一种扩展显示标识数据edid的处理方法和装置
CN109120973B (zh) 一种edid数据改写的方法、装置及存储介质
US9554183B2 (en) Caching of capabilities information of counterpart device for efficient handshaking operation
TW202445341A (zh) 媒體轉接裝置
KR20230079993A (ko) 디스플레이 장치 및 제어 방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20181112

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20181112

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20190814

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20190827

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20191127

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20200303

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20200330

R150 Certificate of patent or registration of utility model

Ref document number: 6684802

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250