JP6668908B2 - Information processing system, transmitting apparatus, and control method for information processing system - Google Patents

Description

  The present invention relates to an information processing system, a transmission device, and a method for controlling an information processing system.

  In an information processing system including a plurality of nodes that transmit and receive data to and from each other, a method is proposed in which a receiving node has a plurality of pointer sets that store a write pointer and a read pointer that indicate a storage position of received data in a queue that stores received data. Have been. In this type of information processing system, a program executed by a transmission node that transmits data stores transmission data and information indicating a pointer set used by a reception node in a transmission register. The transmitting node generates a packet including the transmission data stored in the transmission register and information indicating the pointer set, and transmits the generated packet to the receiving node. The receiving node selects a pointer set indicated by information included in the received packet, and stores the received data in an area indicated by the write pointer of the selected pointer set (for example, see Patent Document 1).

  Further, in an information processing system including a transmitting terminal device that transmits a packet and a receiving terminal device that receives a packet, the receiving terminal device is held in a slot identified by a slot identification value included in the received packet. There is known a method of processing a packet using the information obtained. If the protection key included in the received packet matches the protection key held in the slot identified by the slot identification value, the receiving terminal determines that the received packet is normal and accepts the packet. (See Patent Document 2, for example).

JP 2013-214168 A JP-A-6-309252

  In the information processing system described above, for example, even when another transmitting terminal device transmits a packet including a protection key and an incorrect slot identification value to the receiving terminal device, the receiving terminal device does not even match the protection key. If it does, it will accept the packet. In this case, the receiving terminal device may malfunction due to the processing of the erroneously received packet.

  In some cases, each of a plurality of programs executed by the transmitting terminal uses a slot identification value and a protection key to transmit a packet to each of the plurality of programs executed by the receiving terminal. In this case, if the program executed by the transmitting terminal transmits a packet including the slot identification value and the protection key used by another program, the program of the receiving terminal corresponding to the other program is incorrect. I receive packets.

  In one aspect, the information processing system, the transmission device, and the control method of the information processing system according to the present disclosure can prevent the erroneous packet transmitted by the transmission device from being processed by the reception device, thereby causing the system to malfunction. The purpose is to prevent.

  According to one aspect, in an information processing system including a transmitting device that transmits data and a receiving device that receives data from the transmitting device, the transmitting device includes a data processing unit that executes software for generating data, A first holding unit for holding key information and data generated by software, a management unit for managing operation of the data processing unit and generating second key information, and a second key generated by the management unit. A second holding unit that holds information and is prohibited from being written by software, data and first key information held by the first holding unit, and second key information held by the second holding unit. A packet generating unit that generates a packet including: a packet transmitting unit that transmits the packet generated by the packet generating unit, wherein the receiving device receives a packet from the transmitting device; A third holding unit that holds the first key information and the second key information, a first key information included in the packet received by the packet receiving unit, and a first holding unit that holds the first key information and the second key information. And a second comparing unit that compares the second key information included in the packet received by the packet receiving unit with the second key information held in the third holding unit. If the comparison result of the second comparison unit and the comparison result of the first comparison unit indicate a match, and the comparison result of the second comparison unit indicates a match, the data included in the packet received by the packet reception unit is stored in the storage unit. It has a writing control unit for writing.

  According to another aspect, the transmitting device mounted on the information processing system together with the receiving device and transmitting the data to the receiving device includes a data processing unit that executes software for generating data, the first key information and the software generating the first key information. A first storage unit for storing data, a management unit for managing the operation of the data processing unit and generating second key information, and a second storage unit for storing the second key information generated by the management unit. Packet generation for generating a packet including a second holding unit that is prohibited, a data and first key information held by the first holding unit, and a second key information held by the second holding unit. A packet transmitting unit that transmits the packet generated by the packet generating unit.

  According to yet another aspect, a control method of an information processing system including a transmitting device that transmits data and a receiving device that receives data from the transmitting device, the data processing unit of the transmitting device generates data, A software for storing the generated data in a first holding unit for holding the first key information is executed, and a management unit of the transmission device manages the operation of the data processing unit and generates the second key information. Then, the generated second key information is stored in a second holding unit for which writing by software is prohibited, and the packet generation unit of the transmitting apparatus transmits the data and the first key information held by the first holding unit. And a second key information held by the second holding unit, and a packet transmitting unit of the transmitting device transmits the packet generated by the packet generating unit and a packet of the receiving device. The packet receiving unit receives the packet from the transmitting device, and the first comparing unit of the receiving device stores the first key information included in the packet received by the packet receiving unit and the third key information in the third holding unit. The second comparing unit included in the receiving device compares the second key information included in the packet received by the packet receiving unit with the second key information held in the third holding unit. And the write control unit included in the receiving apparatus determines that the comparison result by the first comparison unit indicates a match and the comparison result by the second comparison unit indicates a match. Writes the data included in the received packet into the storage unit.

  An information processing system, a transmission device, and a control method of an information processing system according to the present disclosure can prevent a system from malfunctioning by suppressing a reception device from processing an erroneous packet transmitted by a transmission device. it can.

FIG. 2 is a diagram illustrating an embodiment of an information processing system, a transmission device, and a control method of the information processing system. FIG. 2 is a diagram illustrating an example of an operation of the information processing system illustrated in FIG. 1. FIG. 11 is a diagram illustrating another embodiment of the information processing system, the transmission device, and the control method of the information processing system. FIG. 4 is a diagram illustrating an example of a CPU illustrated in FIG. 3. FIG. 5 is a diagram illustrating an example of a register unit illustrated in FIG. 4 and elements that operate when a packet is transmitted in a packet control unit. FIG. 6 is a diagram illustrating an example of a packet generated by a packet generator illustrated in FIG. 5. FIG. 4 is a diagram illustrating an example of a state of the information processing system illustrated in FIG. 3. FIG. 8 is a diagram illustrating an example of an access right of a register provided in each entry of the register unit illustrated in FIG. 7. FIG. 5 is a diagram illustrating an example of a register unit illustrated in FIG. 4 and elements that operate when a packet is received in a packet control unit. FIG. 10 is a diagram illustrating an example of a packet determination unit illustrated in FIG. 9. FIG. 4 is a diagram illustrating an example of an operation of the information processing system illustrated in FIG. 3. FIG. 4 is a diagram illustrating another example of the operation of the information processing system illustrated in FIG. 3. FIG. 11 is a diagram illustrating an example of an operation of another information processing system. FIG. 5 is a diagram illustrating an example of a process of transmitting a packet executed by the packet control unit illustrated in FIG. 4. FIG. 5 is a diagram illustrating an example of a process of receiving a packet executed by the packet control unit illustrated in FIG. 4. FIG. 16 is a view illustrating a continuation of the processing illustrated in FIG. 15. FIG. 5 is a diagram illustrating an example of processing when a packet is transmitted by an application program executed by a core illustrated in FIG. 4; FIG. 5 is a diagram illustrating an example of processing when a packet is received by an application program executed by a core illustrated in FIG. 4;

  Hereinafter, embodiments will be described with reference to the drawings.

  FIG. 1 shows an embodiment of an information processing system, a transmitting device, and a control method of the information processing system. The information processing system SYS1 illustrated in FIG. 1 includes a transmitting device 100 that transmits data, and a receiving device 200 that receives data from the transmitting device 100. The transmission device 100 includes a data processing unit 110, a management unit 120, holding units 130 and 140, a packet generation unit 150, and a packet transmission unit 160. The receiving device 200 includes a packet receiving unit 210, a holding unit 220, comparing units 230 and 240, a writing control unit 250, and a storage unit 260. The holding unit 130 is an example of a first holding unit, the holding unit 140 is an example of a second holding unit, and the holding unit 220 is an example of a third holding unit.

  The data processing unit 110 generates the data DATA by executing the application program APRG, and stores the generated data DATA in the holding unit 130 that holds the key information KEY1. The application program APRG is an example of software executed by the data processing unit 110. The data processing unit 110 is a processor such as a CPU (Central Processing Unit) mounted on the transmission device 100 or a processor core of the processor.

  The management unit 120 manages the operation of the data processing unit 110, generates key information KEY2, and stores the generated key information KEY2 in the holding unit 140. The management unit 120 is realized by a management program such as an OS (Operating System) that manages the operation of the data processing unit 110 or a control program such as a hypervisor that controls a virtual machine that executes the OS. Alternatively, the management unit 120 is realized by a state management program executed by a management device such as a service processor that manages the state of the data processing unit 110. Note that the management unit 120 may be provided outside the transmission device 100.

  For example, the storage areas of the holding units 130 and 140 are allocated to the I / O space. The holding unit 130 can be accessed by the application program APRG, and the holding unit 140 is prohibited from writing by the application program APRG. That is, the holding unit 130 and the holding unit 140 have different access rights. For this reason, it is possible to prevent the erroneous key information KEY2 from being stored in the holding unit 140 due to a malfunction or the like of the application program APRG. In other words, the key information KEY2 held in the holding unit 140 is not accidentally rewritten by the application program APRG. The key information KEY1 is an example of first key information, and the key information KEY2 is an example of second key information.

  The packet generation unit 150 generates a packet including the data DATA and the key information KEY1 stored in the storage unit 130 and the key information KEY2 stored in the storage unit 140. That is, the packet generation unit 150 generates a packet including the key information KEY1 and KEY2 stored in the plurality of storage units 130 and 140 having different access rights. The packet transmitting section 160 transmits the packet generated by the packet generating section 150 to the receiving device 200.

  Packet receiving section 210 receives a packet from transmitting apparatus 100. Further, the packet receiving unit 210 previously receives the key information KEY1 and KEY2 generated before the transmitting device 100 transmits the data DATA, and stores the received key information KEY1 and KEY2 in the holding unit 220. That is, the holding unit 220 holds the key information KEY1 and KEY2 generated by the transmitting device 100 before the data DATA is transferred from the transmitting device 100.

  The comparing unit 230 compares the key information KEY1 included in the packet received by the packet receiving unit 210 with the key information KEY1 held in the holding unit 220, and outputs the comparison result to the writing control unit 250. The comparing unit 240 compares the key information KEY2 included in the packet received by the packet receiving unit 210 with the key information KEY2 held in the holding unit 220, and outputs the comparison result to the write control unit 250. The comparison unit 230 is an example of a first comparison unit, and the comparison unit 240 is an example of a second comparison unit.

  When the comparison result by the comparison unit 230 indicates a match and the comparison result by the comparison unit 240 indicates a match, the write control unit 250 determines that the packet received by the packet reception unit 210 is normal and includes the packet in the packet. The data to be written is written to the storage unit 260. On the other hand, when at least one of the comparison result by the comparison unit 230 and the comparison result by the comparison unit 240 indicates a mismatch, the write control unit 250 determines that the packet received by the packet reception unit 210 is not normal. In this case, the write control unit 250 discards the data included in the packet without writing the data to the storage unit 260. For example, the storage unit 260 is allocated to a storage device such as an SDRAM (Synchronous Dynamic Random Access Memory), an HDD (Hard Disk Drive), or an SSD (Solid State Drive). The storage unit 260 may be provided outside the receiving device 200.

  As described above, the receiving device 200 determines whether the received packet is normal using the key information KEY1 and KEY2 held in the plurality of holding units 130 and 140 having different access rights. Therefore, as compared with the case where it is determined whether or not a received packet is normal using one key information or a plurality of key information held in a plurality of holding units having the same access right, Reliability can be improved. As a result, it is possible to prevent the receiving device 200 from executing data processing or the like using erroneous data included in an abnormal packet, and improve the reliability of the information processing system SYS1.

  FIG. 2 shows an example of the operation of the information processing system SYS1 shown in FIG. That is, FIG. 2 illustrates an example of a control method of the information processing system.

  Before the transmission of the data DATA to the receiving device 200 is started, the management unit 120 stores the key information KEY2 in the holding unit 140 and transfers the key information KEY2 to the receiving device 200 (FIG. 2A). That is, the storage of the key information KEY2 in the holding unit 140 by a program such as an OS higher than the application program APRG is executed in advance before the transfer of the data DATA. For this reason, when data DATA is transferred to the receiving device 200, switching of the process for accessing the holding unit 140 does not occur, and context switching for saving the state of the process does not occur at the time of switching the process. Therefore, it is possible to prevent the execution efficiency of the application program APRG from being reduced by a context switch or the like.

  The application program APRG transfers the key information KEY1 to the receiving device 200 before starting transmission of the data DATA to the receiving device 200 (FIG. 2B). The receiving device 200 stores the key information KEY1 and KEY2 transferred from the transmitting device 100 in the holding unit 220 (FIG. 2C).

  When transmitting the data DATA to the receiving device 200, the application program APRG stores the data DATA and the key information AKEY1 in the holding unit 130 (FIG. 2D). Thereafter, as indicated by the broken arrow in FIG. 2, the application program APRG instructs the packet generator 150 to generate a packet (FIG. 2 (e)).

  The packet generation unit 150 reads the data DATA and the key information AKEY1 from the holding unit 130 and reads the key information KEY2 from the holding unit 140 based on the instruction from the application program APRG (FIG. 2 (f)). Then, the packet generation unit 150 generates a packet including the data DATA and the key information KEY1 and KEY2, and transmits the generated packet to the receiving device 200 (FIG. 2 (g)).

  Packet receiving section 210 of receiving apparatus 200 outputs key information KEY1 included in the received packet to comparing section 230, and outputs key information KEY2 included in the received packet to comparing section 240 (FIG. 2 (h)). .

  The comparing unit 230 compares the key information KEY1 from the packet receiving unit 210 with the key information KEY1 held in the holding unit 220, and outputs the comparison result to the writing control unit 250 (FIG. 2 (i)). The comparing section 240 compares the key information KEY2 from the packet receiving section 210 with the key information KEY2 held in the holding section 220, and outputs the comparison result to the writing control section 250 (FIG. 2 (j)).

  In the example illustrated in FIG. 2, since the comparison result by the comparison unit 230 indicates a match and the comparison result by the comparison unit 240 indicates a match, the write control unit 250 determines that the packet received by the packet reception unit 210 is normal. Is determined. Then, the write control unit 250 writes the data DATA included in the packet into the storage unit 260 (FIG. 2 (k)).

  As described above, in the embodiment illustrated in FIGS. 1 and 2, a program such as an OS higher than the application program APRG stores the key information KEY2 in the holding unit 140 that is not permitted to access the application program APRG. Accordingly, it is possible to prevent erroneous key information KEY2 from being stored in the holding unit 140 due to a malfunction of the application program APRG or the like. In addition, by using the key information KEY1 and KEY2 held in the plurality of holding units 130 and 140 having different access rights, it is determined whether or not the received packet is normal, thereby improving the reliability of the determination. Can be.

  Therefore, it is possible to prevent the erroneous packet transmitted by the transmitting device 100 from being processed by the receiving device 200, and the receiving device 200 performs data processing or the like using data included in the erroneous packet. Can be suppressed. As a result, the reliability of the information processing system SYS1 can be improved.

  The storage of the key information KEY2 in the holding unit 140 by a program such as an OS higher than the application program APRG is executed in advance before the transfer of the data DATA. Therefore, a context switch or the like does not occur when the data DATA is transferred to the receiving device 200, and it is possible to suppress a decrease in the execution efficiency of the application program APRG due to the context switch or the like.

  FIG. 3 illustrates another embodiment of the information processing system, the transmitting device, and the control method of the information processing system. The information processing system SYS2 illustrated in FIG. 3 includes a plurality of nodes ND (ND0, ND1, ND2, ND3) interconnected by a crossbar switch GXB. Each node ND is constructed by an information processing device such as a server. Note that the number of nodes ND mounted in the information processing system SYS2 is not limited to four. Since the nodes ND0 to ND3 have the same or similar configuration to each other, the configuration of the node ND0 will be described below.

  The node ND0 has a plurality of CPUs (CPU0, CPU1), a plurality of storage devices MEM (MEM0, MEM1), a crossbar switch LXB, a switch SW, an HDD, and a network interface NWIF. Each CPU is connected to different storage devices MEM via a memory bus MBUS (MBUS0, MBUS1). For example, the storage device MEM is a DIMM (Dual Inline Memory Module) on which a plurality of SDRAMs are mounted. Note that each node ND may have an SSD instead of the HDD, or may have both the HDD and the SSD.

  In each node ND, the CPU can access the storage device MEM connected to another CPU. Further, the CPU of each node ND can access the storage device MEM connected to the CPU of another node ND via the crossbar switches LXB and GXB. That is, the information processing system SYS2 functions as a multiprocessor system employing a cc-NUMA (cache-coherent Non-Uniform Memory Access) architecture.

  The crossbar switch LXB connects each CPU to the crossbar switch GXB. The CPU in each node ND can directly transmit and receive information such as data without passing through the crossbar switch LXB. The switch SW is, for example, a PCIe (Peripheral Component Interconnect express) switch or the like, and connects each CPU to the HDD or the network interface NWIF. The network interface NWIF is connected to a network such as a LAN (Local Area Network).

  The crossbar switch GXB outputs a packet including data received from each node ND to the node ND indicated by the destination information included in the packet. The crossbar switch GXB has a service processor SP that manages resources such as hardware of each node ND.

  For example, the service processor SP controls the power supply voltage and the clock frequency supplied to the CPU by executing the state management program, and changes the temperature of the housing according to the temperature in the housing in which the CPU and the like in the node ND are housed. To control the number of revolutions of a fan (not shown) attached to the controller. The service processor SP is an example of a management device that manages the states of the CPU and the CPU core 10 shown in FIG. Note that the service processor SP may be mounted on each node ND.

  FIG. 4 illustrates an example of the CPU illustrated in FIG. FIG. 4 shows elements related to the processing of a packet transferred between the CPU cores 10. Elements related to the connection between the CPU and the switch SW shown in FIG. Omitted. Note that the CPU that transmits the packet functions as a transmitting device, and the CPU that receives the packet functions as a receiving device.

  The CPU controls the CPU cores 10 (10a, 10b, 10c, and 10d), the register unit 20, the packet control unit 30, the register unit 60, the memory control unit 70, and the memory control unit 70, which are connected to each other via the system bus SBUS. It has a cache memory 80 connected. Note that the CPU core 10 may be connected to the system bus SBUS via the memory control unit 70. The number of CPU cores 10 mounted on the CPU is not limited to four. In the following description, CPU core 10 is also referred to as core 10.

  Each core 10 executes an application program stored in the storage device MEM (FIG. 3) connected via the memory bus MBUS. The application program is an example of software executed by the core 10. Then, each core 10 transmits information such as data used for processing of the application program to another core 10 or receives information such as data from the other core 10. That is, information such as data is transferred between application programs executed by the plurality of cores 10. The core 10 that transfers information such as data to each other may be included in one node ND or may be included in different nodes ND. The application program (instruction code) stored in the storage device MEM is held in the cache memory 80 based on the fact that it has been fetched by the core 10. The core 10 is an example of a data processing unit that executes an application program.

  The register unit 20 includes a plurality of entries holding data to be transmitted from each core 10 to another core 10, information used for data transmission processing, and information included in a response from the other core 10 to the transmitted data. Has ENTS. The entries ENTS are provided corresponding to the cores 10, respectively. The register unit 20 is accessed by each core 10 in the CPU and the packet control unit 30. An example of the entry ENTS is shown in FIG.

  The packet control unit 30 includes a packet transmission control unit 40 and a packet reception control unit 50. When transmitting data, the packet transmission control unit 40 generates a packet using the information including the data held in the entry ENTS of the register unit 20, and transmits the generated packet via the crossbar switch LXB. The data is transmitted to the core 10. Further, when the corresponding packet reception control unit 50 receives the data, the packet transmission control unit 40 generates a response packet, and transmits the generated response packet to the data transmission source core 10 via the crossbar switch LXB. Send.

  The packet reception control unit 50 receives a packet via the crossbar switch LXB, and stores data included in the received packet in a message queue MQUE (FIG. 9) allocated to the storage device MEM (FIG. 3). At this time, the packet reception control unit 50 refers to one of the entries ENTR of the register unit 60 based on the information included in the packet, and determines a message queue MQUE in which to store data. When receiving a response packet corresponding to the packet transmitted by the packet transmission control unit 40, the packet reception control unit 50 performs the following operation. That is, the packet reception control unit 50 extracts, from the response packet, information indicating the state of the message queue MQUE assigned to the core 10 that has transmitted the response packet. Then, the packet reception control unit 50 stores the extracted information in the entry ENTS used for generating the transmission of the original packet among the entries ENTS of the register unit 20.

  When the core 10 transmitting the packet and the core 10 receiving the packet are included in one node ND, the packet is directly transferred between the cores 10 without passing through the crossbar switch LXB. Examples of the packet transmission control unit 40 and the packet reception control unit 50 are shown in FIGS.

  The register unit 60 has a plurality of entries ENTR that hold information accessed by the packet reception control unit 50 during packet reception processing. The entry ENTR is allocated for each application program that receives data. An example of the entry ENTR is shown in FIG.

  The memory control unit 70 operates based on a memory access request received from the core 10 via the system bus SBUS. Here, when the core 10 that issues the memory access request is included in another CPU, the memory access request is transferred from the core 10 of the other CPU to the memory control unit 70 via the packet reception control unit 50. When the target data of the memory access request is held in the cache memory 80 (cache hit), the memory control unit 70 accesses the cache memory 80. When the target data of the memory access request is not held in the cache memory 80 (cache miss), the memory control unit 70 accesses the storage device MEM connected to the memory bus MBUS, or requests the other CPU for the memory access request. To transfer.

  The other CPU to which the memory access request has been transferred accesses the storage device MEM connected to the memory bus MBUS and issues an access result as a response. In addition, the memory control unit 70 maintains the consistency (cache coherency) between the data held by the storage device MEM and the data held by the cache memory 80 by executing an eviction process or the like for eviction of data from the cache memory 80. Execute control. For example, the cache memory 80 is a secondary cache, and holds instructions to be executed by the application program and data to be processed by the application program.

  FIG. 5 illustrates an example of the register unit 20 illustrated in FIG. 4 and elements that operate when the packet control unit 30 transmits a packet. The element illustrated in FIG. 5 functions as a transmitting device that transmits a packet. The packet transmission control unit 40 illustrated in FIG. 4 includes a packet generation unit 42 and a packet transmission unit 44, and the packet reception control unit 50 illustrated in FIG. 4 includes a packet reception unit 52 and a response storage unit 54.

  Each entry ENTS of the register section 20 has registers MSG-DT, MSGQ-ID (Identification), SEND-MSG, PK-SP, PK-HV, PK-OS, and ST. The register unit 20 is provided in an area (for example, an I / O space or the like) different from the address space to which the storage device MEM is assigned. The application program (process) executed by the core 10 generates information to be held in the registers MSG-DT and MSGQ-ID, and stores the generated information in the registers MSG-DT and MSGQ-ID.

  The register PK-SP stores key information generated by a management program executed by the service processor SP. The register PK-HV stores key information generated by the hypervisor HV, which is a control program for controlling a virtual machine started in the node ND. The register PK-OS stores key information generated by the OS executed by the core 10 or the virtual machine. The application program (process) operates under the management of the OS, and the OS operates under the management of the hypervisor HV. The access authority of the registers PK-SP, PK-HV, and PK-OS will be described with reference to FIG. In the following description, the key information stored in the register PK-SP is referred to as key information PK-SP, and the key information stored in the register PK-HV is referred to as key information PK-HV. The key information stored in the OS is called key information PK-OS. The key information PK-SP, PK-HV, and PK-OS are examples of the second key information. The register unit 20 is an example of a first holding unit and a second holding unit.

  For example, different key information PK-SP, different key information PK-HV, and different key information PK-OS are stored in the entry ENTS used by each of the plurality of cores 10 executing the application program (process). . When each of the plurality of cores 10 executes an application program (process), the process can be switched without rewriting the key information PK-SP, PK-HV, and PK-OS held in the entry ENTS. That is, a context switch does not occur when the processes executed by the different cores 10 are switched. On the other hand, when one core 10 executes a plurality of application programs (processes), a plurality of processes use a common entry ENTS, and thus a context switch occurs when the processes are switched.

  Note that each entry ENTS may include at least one of registers PK-SP, PK-HV, and PK-OS. For example, each entry ENTS may have only the register PK-OS, may have only the register PK-HV, or may have only the register PK-SP. Alternatively, each entry ENTS may have two registers PK-OS, PK-HV, two registers PK-OS, PK-SP, and two registers PK-HF, PK-SP. It may have an SP. For example, in an information processing system in which a virtual machine is not started, each entry ENTS has two registers PK-OS and PK-HV.

  The information held by the registers MSG-DT, MSGQ-ID, PK-SP, PK-HV, and PK-OS is read by the packet generation unit 42. When the application program causes the packet generator 42 to generate a packet, the application program sets the register SEND-MSG. The information held by the register ST is written by the response storage unit 54 and read by the application program.

  The register MSG-DT stores data (transmission data) transferred from the packet source application program to the packet destination application program. In the following description, data stored in register MSG-DT is also referred to as message data MSG-DT. Although not particularly limited, the message data MSG-DT is 32 bytes or 64 bytes.

  The register MSGQ-ID stores management information for transmitting the message data MSG-DT to the destination process. In the following description, data stored in the register MSGQ-ID is also referred to as management information MSGQ-ID. FIG. 6 shows an example of the management information MSGQ-ID stored in the register MSGQ-ID.

  When a packet is generated by the packet generation unit 42 and transmitted from the packet transmission unit 44, transmission request information is stored in the register SEND-MSG. For example, the register SEND-MSG is 1 bit, and the transmission request information is logic 1. When the application program writes logical 1 to the register SEND-MSG, the register unit 20 outputs a one-shot pulse signal indicating a transmission request to the packet generation unit 42. In the following description, the logic 1 stored in the register SEND-MSG and the one-shot pulse signal output to the packet generation unit 42 are also referred to as a transmission request SEND-MSG.

  The register ST stores state information included in a response corresponding to the packet transmitted to the destination process. In the following description, the status information stored in the register ST is also referred to as status information ST. An example of the state information ST will be described with reference to FIG.

  The packet generator 42 generates a packet based on the reception of the transmission request SEND-MSG from the process via the register SEND-MSG, and outputs the generated packet to the packet transmitter 44. That is, the packet generation unit 42 transmits the source CPU-ID and the entry ID, the management information MSGQ-ID, the message data MSG-DT and the key information PK-SP, PK-HV, and PK-OS held in the entry ENTS. To generate a packet. The transmission source CPU-ID indicates a number for identifying a CPU including the packet generation unit 42. The entry ID is a sequence number or the like added to the packet, and is used to associate a packet with a response packet. An example of a packet generated by the packet generator 42 is shown in FIG.

  The packet generation unit 42 arbitrates the message data MSG-DT, management information MSGQ-ID, and key information PK-SP, PK-HV, and PK-OS held in the entry ENTS that has output the transmission request SEND-MSG. It has an arbitration unit (not shown) to be selected.

  The packet transmission unit 44 transmits the packet received from the packet generation unit 42 to the transmission destination core 10 via the crossbar switch LXB.

  The packet receiving unit 52 receives a packet (response packet) including the state information ST from the core 10 to which the packet is transmitted via the crossbar switch LXB, and stores the state information ST included in the received packet in the response storage unit. Output to 54. The response storage unit 54 stores the state information ST received from the packet receiving unit 52 in the register ST of the entry ENTS that holds the information that generated the original packet corresponding to the response packet.

  When transmitting the message data MSG-DT, the application program executes a process of transmitting a packet using the corresponding entry ENTS. After transmitting the packet, the application program reads the status information ST from the register ST based on the fact that the status information ST has been written to the register ST.

  FIG. 6 shows an example of a packet generated by the packet generator 42 shown in FIG. The packet includes a destination CPU-ID, a source CPU-ID, an entry ID, management information MSGQ-ID, key information PK-SP, PK-HV, PK-OS, and message data MSG-DT. In the packet, the destination CPU-ID, the source CPU-ID, the entry ID, the management information MSGQ-ID, and the key information PK-SP, PK-HV, PK-OS are a header part, and the message data MSG-DT is , The data section. As the transmission destination CPU-ID, the CPU information CPU-ID included in the management information MSGQ-ID is used.

  The management information MSGQ-ID includes CPU information CPU-ID, register set information REG-ID, key information AKEY, and message size M-SIZE. The CPU information CPU-ID includes a number for identifying a CPU to which a packet is to be transmitted. The register set information REG-ID is a number for identifying the entry ENTR (FIG. 9) of the register unit 60 used by the CPU receiving the packet. The key information AKEY is an example of first key information used by the core 10 transmitting the packet and the core 10 receiving the packet to identify each other, and is used to determine whether the packet is normal or not. . The register set information REG-ID and the key information AKEY are notified in advance from the packet receiving process to the packet transmitting process.

  By managing the transmission and reception of the packet not only by the key information AKEY but also by the key information PK-SP, PK-HV and PK-OS which cannot be rewritten by the application program, the transmission and reception of the packet between predetermined application programs can be performed. Can be guaranteed. In other words, even when an application program malfunctions, transmission and reception of packets between erroneous application programs can be suppressed, so that the reliability of the information processing system SYS2 can be improved. The key information PK-SP, PK-HV, and PK-OS may be stored in the management information MSGQ-ID together with the key information AKEY.

  The message size M-SIZE indicates the size (32 bytes or 64 bytes) of the message data MSG-DT. When there is only one type of message data MSG-DT, the management information MSGQ-ID does not include the message size M-SIZE. The packets shown in FIG. 6 are transmitted to the crossbar switch LXB in order from the destination CPU-ID.

  FIG. 7 illustrates an example of a state of the information processing system SYS2 illustrated in FIG. In the example illustrated in FIG. 7, the hypervisor HV is activated in the node ND0, and the hypervisor HV activates three virtual machines and causes the virtual machines to execute OSs (OS0, OS1, and OS2). OS2 is executed by CPU0. Then, three processes PROC (PROC0, PROC1, PROC2; that is, application programs) operate on the OS2. A broken line frame shown in FIG. 7 indicates an operation state of the software. The OS is an example of a management program that manages the operation of the core 10, and the hypervisor HV is an example of a control program that controls a virtual machine.

  For example, before the process PROC2 starts transmitting data, the state management program executed by the service processor SP stores the key information PK-SP in the entry ENTS used in the process PROC2. Similarly, the hypervisor HV stores the key information PK-HV in the entry ENTS used in the process PROC2, and the OS2 stores the key information PK-OS in the entry ENTS used in the process PROC2. Then, the process PROC2 operating on the OS2 stores the key information AKEY in the entry ENTS to be used.

  As described above, the management unit that stores the key information PK-SP, PK-HV, and PK-OS in the registers PK-SP, PK-HV, and PK-OS is based on the state management program, the hypervisor HV, and the OS. Realized respectively. That is, the state management program, the hypervisor HV, and the OS are examples of a management unit that manages the operation of the core 10 and generates key information PK-SP, PK-HV, and PK-OS. As described in FIG. 5, each entry ENTS may include at least one of the registers PK-SP, PK-HV, and PK-OS.

  FIG. 8 shows an example of the access authority of the registers AKEY, PK-OS, PK-HV, and PK-SP provided in each entry ENTS of the register section 20 shown in FIG. The register AKEY is accessible by the process PROC, the OS, the hypervisor HV, and the service processor SP, and the register PK-OS is accessible by the OS, the hypervisor HV, and the service processor SP. The register PK-HV is accessible by the hypervisor HV and the service processor SP, and the register PK-SP is accessible only by the service processor SP. That is, access to the registers PK-OS, PK-HV, and PK-SP by the process PROC is prohibited.

  FIG. 9 illustrates an example of the register unit 60 illustrated in FIG. 4 and elements that operate when the packet control unit 30 receives a packet. The element illustrated in FIG. 9 functions as a receiving device that receives a packet. The packet reception control unit 50 of the packet control unit 30 illustrated in FIG. 4 includes a packet determination unit 56 and a write control unit 58 in addition to the packet reception unit 52 and the response storage unit 54 illustrated in FIG. The packet transmission control unit 40 illustrated in FIG. 4 includes a response packet generation unit 46 in addition to the packet generation unit 42 and the packet transmission unit 44 illustrated in FIG.

  Each entry ENTR of the register section 60 has a plurality of registers for respectively storing a base address BADRS, key information AKEY, PK-OS, PK-HV, PK-SP, a write pointer WP, and a read pointer RP. The register unit 60 is provided in an area (for example, an I / O space) different from the address space to which the storage device MEM is assigned. The entry ENTR is an example of a third holding unit.

  Also, each entry ENTS has permission information OSEN indicating whether to validate the key information PK-OS, permission information HVEN indicating whether to validate the key information PK-HV, and validates the key information PK-SP. And an area for storing permission information SPEN indicating whether or not the permission information SPEN is provided. For example, each of the permission information OSEN, HVEN, and SPEN is 1 bit, and indicates logical 0 when invalid and logical 1 when valid. The permission information OSEN, HVEN, and SPEN are an example of a valid flag that sets whether or not the comparison of the key information PK-OS, PK-HV, and PK-SP by the packet determination unit 56 is valid. The packet determination unit 56 selects and uses the entry ENTR identified by the register set information REG-ID included in the management information MSGQ-ID of the received packet.

  The key information AKEY is determined in advance between application programs that transmit and receive packets, and the key information AKEY is notified from the receiving process to the transmitting process before the application program starts transmitting the message data MSG-DT. . For example, the key information PK-OS is a unique value determined by the OS on the transmission side of the message data MSG-DT for each process. The key information PK-HV is a unique value determined for each process by the hypervisor HV on the transmission side of the message data MSG-DT. The key information PK-SP is a unique value determined for each process by the service processor SP on the transmission side of the message data MSG-DT.

  When all of the key information PK-SP, PK-HV, and PK-OS are validated by the permission information SPEN, HVEN, and OSEN, the key information PK-SP, PK-HV, and PK-OS are as follows. It may be set as shown. That is, the key information PK-SP is set to the number of the node ND where the process is executed, the key information PK-HV is set to the number of the OS where the process is executed, and the key information PK-OS is set to the process number. May be set.

  The write pointer WP indicates the head address (relative value) for storing the message data MSG-DT included in the received packet in the message queue MQUE assigned to the storage device MEM. The read pointer RP indicates the start address (relative value) of a storage area that holds the unread message data MSG-DT among the message data MSG-DT stored in the message queue MQUE.

  The storage device MEM is assigned a plurality of message queues MQUE respectively corresponding to the entries ENTR of the register unit 60. The message queue MQUE is an example of a storage unit. Each message queue MQUE functions as a ring buffer, and valid message data MSG-DT is held in a storage area between the write pointer WP and the read pointer RP.

  The base address BADRS indicates, for example, a head address (physical address) of the message queue MQUE assigned to the storage device MEM corresponding to each entry ENTR of the register unit 60. Then, by adding the value of the write pointer WP to the base address BADRS, the head address for storing the message data MSG-DT is calculated. Further, by adding the value of the read pointer RP to the base address BADRS, the head address from which the message data MSG-DT is read is calculated.

  The base address BADRS may be indicated by a predetermined number of upper bits in the head address of each message queue MQUE. In this case, the head address for storing the message data MSG-DT is calculated by combining the bit value of the base address BADRS and the bit value of the write pointer WP. Further, by combining the bit value of the base address BADRS and the bit value of the read pointer RP, the head address from which the message data MSG-DT is read is calculated.

  When the packet receiving unit 52 receives the packet, the packet determining unit 56 reads the information stored in the entry ENTR indicated by the register set information REG-ID included in the packet, and determines whether the packet is valid. That is, the packet determination unit 56 compares the key information AKEY included in the packet with the key information AKEY read from the entry ENTR. If the permission information SPEN read from the entry ENTR indicates validity, the packet determination unit 56 compares the key information PK-SP included in the packet with the key information PK-SP read from the entry ENTR. When the permission information HVEN read from the entry ENTR indicates validity, the packet determination unit 56 compares the key information PK-HV included in the packet with the key information PK-HV read from the entry ENTR. When the permission information OSEN read from the entry ENTR indicates validity, the packet determination unit 56 compares the key information PK-OS included in the packet with the key information PK-OS read from the entry ENTR. The packet determination unit 56 determines that the received packet is valid (normal) when all the comparison results indicate a match, and determines that the received packet is invalid when at least one of the comparison results indicates a mismatch. It is determined that there is.

  When the received packet is valid, the packet determination unit 56 reads the base address BADRS and the write pointer WP from the entry ENTR indicated by the register set information REG-ID included in the packet. Then, the packet determination unit 56 outputs the message data MSG-DT included in the packet, the base address BADRS and the write pointer WP read from the entry ENTR to the write control unit 58. Further, the packet determination unit 56 notifies the response packet generation unit 46 that the received packet is normal, and updates the write pointer WP based on the message size M-SIZE included in the packet.

  When the received packet is invalid, the packet determination unit 56 discards the message data MSG-DT included in the packet and notifies the response packet generation unit 46 of information indicating that the received packet is invalid. . In this case, the write pointer WP is not updated.

  When receiving the base address BADRS and the write pointer WP from the packet determination unit 56, the write control unit 58 calculates the address of the storage area of the message queue MQUE indicated by the base address BADRS and the write pointer WP. Then, the write control unit 58 writes the message data MSG-DT received from the packet determination unit 56 into the storage area indicated by the calculated address. The message data MSG-DT written in the message queue MQUE is read by an application program that processes the received message data MSG-DT.

  After writing the message data MSG-DT to the message queue MQUE, the write control unit 58 notifies the response packet generation unit 46 of information indicating the state of the message queue MQUE. For example, if there is room in the message queue MQUE for storing the message data MSG-DT to be received next, the write control unit 58 sends information indicating that further reception of the message data MSG-DT is possible to the response packet generation unit 46. Notify. When the message queue MQUE becomes full, the write control unit 58 notifies the response packet generation unit 46 of information indicating that the message queue MQUE is full. Further, when the message queue MQUE has stopped operating and the message data MSG-DT cannot be written to the message queue MQUE, the write control unit 58 notifies the response packet generation unit 46 of information indicating the non-operation of the message queue MQUE. I do.

  The response packet generator 46 generates a response packet based on the information received from the packet determiner 56 and the information received from the write controller 58, and outputs the generated response packet to the packet transmitter 44. The response packet includes a destination CPU-ID, a source CPU-ID, an entry ID, and status information ST indicating the status of the message queue MQUE. The response packet is sent to the crossbar switch LXB in order from the destination CPU-ID.

  The destination CPU-ID is the source CPU-ID included in the original packet corresponding to the response packet, and the source CPU-ID is the destination CPU-ID included in the original packet corresponding to the response packet. is there. The entry ID is an entry ID included in the original packet corresponding to the response packet.

  The status information ST is, for example, 2 bits, and indicates one of “INVALID”, “INACTIVE”, “FULL”, and “COMPLETE” according to the bit value. “INVALID” indicates that a mismatch of the key information AKEY has occurred (error response). "INACTIVE" indicates that the message queue MQUE has stopped operating and the message data MSG-DT cannot be written (error response). "FULL" indicates that the message queue MQUEUE is full (error response). "COMPLETE" indicates that the message data MSG-DT is normally stored in the message queue MQUE, and that the message data MSG-DT can be further received (normal response).

  The packet transmission unit 44 transmits the response packet received from the response packet generation unit 46 to the packet transmission source CPU.

  FIG. 10 shows an example of the packet determination unit 56 shown in FIG. The packet determination unit 56 includes a selector SEL, a key information extraction unit KEYOUT, key checkers AKEYCHK, OSCHK, HVCHK, SPCHK, and an AND circuit AND. The key checker AKEYCHK is an example of a first comparison unit, and the key checkers OSCHK, HVCHK, and SPCHK are examples of a second comparison unit.

  The selector SEL selects an entry ENTR indicated by the register set information REG-ID included in the received packet, and outputs information held in the selected entry ENTR. The key information extracting unit KEYOUT extracts key information AKEY, PK-OS, PK-HV, and PK-SP from the received packet.

  The key checker AKEYCHK compares the key information AKEY read from the entry ENTR with the key information AKEY extracted from the packet by the key information extraction unit KEYOUT. When the key information AKEY from the entry ENTR matches the key information AKEY from the key information extraction unit KEYOUT, the key checker AKEYCHK outputs a logical 1 indicating a match. When the key information AKEY from the entry ENTR does not match the key information AKEY from the key information extraction unit KEYOUT, the key checker AKEYCHK outputs a logical 0 indicating a mismatch.

  When the permission information OSEN read from the entry ENTR indicates a valid state (logic 1), the key checker OSCHK reads the key information PK-OS read from the entry ENTR and the key information PK-OS extracted from the packet by the key information extraction unit KEYOUT. Compare with When the key information PK-OS from the entry ENTR matches the key information PK-OS from the key information extraction unit KEYOUT, the key checker OSCHK outputs a logical 1 indicating a match. When the key information PK-OS from the entry ENTR does not match the key information PK-OS from the key information extraction unit KEYOUT, the key checker OSCHK outputs a logical 0 indicating a mismatch. When the permission information OSEN from the entry ENTR indicates an invalid state (logic 0), the key checker OSCHK compares the key information PK-OS from the entry ENTR with the key information PK-OS from the key information extraction unit KEYOUT. Regardless, a logic 1 indicating a match is output.

  When the permission information HVEN read from the entry ENTR indicates a valid state (logic 1), the key checker HVCHK extracts the key information PK-HV extracted from the packet by the key information extraction unit KEYOUT and the key information PK- Compare with HV. When the key information PK-HV from the entry ENTR matches the key information PK-HV from the key information extraction unit KEYOUT, the key checker HVCHK outputs a logical 1 indicating a match. When the key information PK-HV from the entry ENTR does not match the key information PK-HV from the key information extraction unit KEYOUT, the key checker HVCHK outputs a logic 0 indicating a mismatch. When the permission information HVEN from the entry ENTR indicates an invalid state (logic 0), the key checker HVCHK compares the key information PK-HV from the entry ENTR with the key information PK-HV from the key information extraction unit KEYOUT. Regardless, a logic 1 indicating a match is output.

  When the permission information SPEN read from the entry ENTR indicates a valid state (logic 1), the key checker SPCHK extracts the key information PK-SP extracted from the packet by the key information extraction unit KEYOUT and the key information PK-SP read from the entry ENTR. Compare with SP. When the key information PK-SP from the entry ENTR matches the key information PK-SP from the key information extraction unit KEYOUT, the key checker SPCHK outputs a logical 1 indicating a match. When the key information PK-SP from the entry ENTR does not match the key information PK-SP from the key information extraction unit KEYOUT, the key checker SPCHK outputs a logical 0 indicating a mismatch. When the permission information SPEN from the entry ENTR indicates an invalid state (logic 0), the key checker SPCHK adds the key information PK-SP from the entry ENTR to the key information PK-SP from the key information extraction unit KEYOUT. Regardless, a logic 1 indicating a match is output.

  As described above, the packet determination unit 56 enables or disables the comparison operation by each of the key checkers OSCHK, HVCHK, and SPCHK according to the logic of the permission information OSEN, HVEN, and SPEN. Thus, the number of pieces of key information PK-OS, PK-HV, and PK-SP to be compared can be changed in accordance with the degree of reliability required for the information processing system SYS2. For example, the logic “PK-OS, PK-HV, PK-SP” of the permission information PK-OS, PK-HV, PK-SP becomes “000” as the reliability required of the information processing system SYS2 increases. , “100”, “110”, and “111”.

  The key information PK-OS, PK-HV, and PK-SP used for the determination by the packet determination unit 56 are determined according to the logic of the permission information OSEN, HVEN, and SPEN set by the packet receiving device. In other words, the packet transmitting apparatus does not rewrite the key information PK-OS, PK-HV, and PK-SP held in the entry ENTS shown in FIG. PK-OS, PK-HV, PK-SP can be changed.

  When receiving a logic 1 from all of the key checkers AKEYCHK, OSCHK, HVCHK, and SPCHK, the AND circuit AND outputs a determination result RSLT (logic 1) indicating that the packet is valid. On the other hand, when receiving a logic 0 from at least one of the key checkers AKEYCHK, OSCHK, HVCHK, and SPCHK, the AND circuit AND outputs a determination result RSLT (logic 0) indicating that the packet is invalid.

  FIG. 11 illustrates an example of an operation of the information processing system SYS2 illustrated in FIG. FIG. 11 shows an example in which message data MSG-DT is transferred from a packet transmitting device to a packet receiving device. In other words, one of the cores 10 corresponding to the transmitting device executes the application program 1, and one of the cores 10 corresponding to the receiving device executes the application program 2. Then, the message data MSG-DT is transferred between the application program 1 and the application program 2.

  The transmitting device uses one of the entries ENTS, and the receiving device uses one of the entries ENTR indicated by the register set information REG-ID included in the packet transmitted from the transmitting device. For example, the entry ENTS is allocated to each core 10 corresponding to the transmission device. In other words, the registers MSG-DT, MSGQ-ID, SEND-MSG, PK-SP, PK-HV, PK-OS, and ST are provided for each core 10 that executes the application program in the transmission device. The entry ENTR is allocated to each application program executed by the core 10 corresponding to the receiving device.

  The transmitting device determines key information PK-SP, PK-HV, and PK-OS to be used before the message data MSG-DT is transmitted / received to / from the receiving device. That is, the state management program executed by the service processor SP illustrated in FIG. 7 determines the key information PK-SP used in the application program 1, and stores the determined key information PK-SP in the register PK-SP of the entry ENTS. . The hypervisor HV illustrated in FIG. 7 determines the key information PK-HV used in the application program 1, and stores the determined key information PK-HV in the register PK-HV of the entry ENTS. The OS that manages the application program 1 determines the key information PK-OS used in the application program 1, and stores the determined key information PK-OS in the register PK-OS of the entry ENTS (FIG. 11A). Note that each of the key information PK-SP, PK-HV, and PK-OS is different for each application program executed by the core 10 corresponding to the transmission device.

  Then, the packet control unit 30 of the transmitting device notifies the receiving device of the key information PK-SP, PK-HV, and PK-OS stored in the entry ENTS used in the application program 1 (FIG. 11B). For example, the key information PK-SP, PK-HV, and PK-OS are notified to the receiving device for each application program. The packet control unit 30 of the receiving device notified of the key information PK-SP, PK-HV, and PK-OS stores the key information PK-SP, PK-HV, and PK-OS in the entry ENTR used by the application program 2. (FIG. 11C).

  Note that, in the example illustrated in FIG. 11, the packet control unit 30 of the reception device stores the permission information SPEN, HVEN, and OSEN indicating the valid state in the entry ENTR together with the key information PK-SP, PK-HV, and PK-OS. . Therefore, when receiving the packet from the transmitting device, the receiving device uses the key information AKEY and the key information PK-SP, PK-HV, and PK-OS corresponding to the permission information SPEN, HVEN, and OSEN indicating validity. , The validity of the packet can be checked.

  The application program 2 reads the value of the write pointer WP and the value of the read pointer RP of the entry ENTR to be used at a predetermined frequency. When there is no difference between the value of the write pointer WP and the value of the read pointer RP, the application program 2 determines that the message data MSG-DT has not been received (FIG. 11D).

  When transferring the message data MSG-DT1 to the application program 2, the application program 1 stores the management information MSGQ-ID together with the message data MSG-DT2 in the entry ENTS (FIG. 11 (e)). For example, the value CD1 set in the key information AKEY of the management information MSGQ-ID is notified from the receiving device to the transmitting device in advance. After storing the information in the entry ENTS, the application program 1 stores the transmission request SEND-MSG of logic 1 in the entry ENTS (FIG. 11 (f)).

  The packet control unit 30 of the transmission device reads the message data MSG-DT1 and the management information MSGQ-ID stored in the entry ENTS by the application program 1 from the entry ENTS based on the logic 1 of the transmission request SEND-MSG (FIG. 11). (G)). Further, the packet control unit 30 reads the key information PK-SP, PK-HV, and PK-OS stored in the entry ENTS. Then, the packet control unit 30 generates a packet including the message data MSG-DT1, the management information MSGQ-ID, and the key information PK-SP, PK-HV, and PK-OS read from the entry ENTS, and sends the packet to the receiving device. It is transmitted (FIG. 11 (h)).

  The packet control unit 30 of the receiving device receives the packet, and reads out the key information AKEY stored in the entry ENTR indicated by the register set information REG-ID of the management information MSGQ-ID included in the received packet. The packet control unit 30 compares the key information AKEY included in the received packet with the key information AKEY read from the entry ENTR.

  The packet control unit 30 compares the key information PK-SP, PK-HV, and PK-OS included in the received packet with the key information PK-SP, PK-HV, and PK-OS read from the entry ENTR. . Here, the entry ENTR for reading the key information PK-SP, PK-HV, and PK-OS is the entry ENTR indicated by the register set information REG-ID included in the received packet.

  In the example shown in FIG. 11, the key information AKEY matches, the key information PK-SP matches, the key information PK-HV matches, and the key information PK-OS matches. It is determined that the packet is valid (FIG. 11 (i)). Then, the packet control unit 30 stores the message data MSG-DT1 included in the received packet in the storage area of the message queue MQUE indicated by the write pointer WP of the entry ENTR (FIG. 11 (j)). Here, the packet control unit 30 detects the size of the message data MSG-DT based on the message size M-SIZE included in the received packet.

  The packet control unit 30 of the receiving device updates the write pointer WP according to the message size M-SIZE. Then, the packet control unit 30 generates a response packet including the status information ST indicating that the message data MSG-DT has been normally received, and transmits the generated response packet to the transmitting device (FIG. 11 (k)). ).

  The packet control unit 30 of the transmitting device receives the response packet, and stores the state information ST included in the response packet in the register ST of the entry ENTS used for generating the transmitted packet (FIG. 11 (l)). The packet control unit 30 notifies the application program 1 that the response packet has been received. The reception of the response packet may be notified to the application program 1 by setting a reception flag assigned to the I / O space or the like, or may be notified to the application program 1 by interruption.

  The application program 1 reads the status information ST stored in the entry ENTS based on the notification of the reception of the response packet, and detects that the message data MSG-DT1 has been normally transferred to the receiving device (see FIG. 11 (m )). Then, the application program 1 releases the entry ENTS from which the status information ST has been read.

  On the other hand, the application program 2 executed by the core 10 corresponding to the receiving device reads the value of the write pointer WP and the value of the read pointer RP of the entry ENTR. Since there is a difference between the value of the write pointer WP and the value of the read pointer RP, the application program 2 determines that new message data MSG-DT has been received (FIG. 11 (n)).

  The application program 2 issues a read access request to the storage device MEM, and reads the received message data MSG-DT1 from the message queue MQUE (FIG. 11 (o)). After reading the message data MSG-DT, the application program 2 updates the read pointer RP of the entry ENTR according to the size of the read message data MSG-DT1. The update of the read pointer RP may be executed by the packet control unit 30 of the receiving device based on the read completion notification from the application program 2. The application program 2 executes data processing and the like using the message data MSG-DT1 read from the message queue MQUE.

  FIG. 12 shows another example of the operation of the information processing system SYS2 shown in FIG. Detailed description of the same or similar operations as in FIG. 11 is omitted. Operation until application program 1 reads out state information ST stored in entry ENTS and detects that message data MSG-DT has been normally transferred to the receiving device (FIGS. 12A to 12M). Is the same as or similar to FIG.

  That is, the packet control unit 30 of the receiving device stores the permission information SPEN, HVEN, and OSEN indicating the valid state in the entry ENT along with the key information PK-SP, PK-HV, and PK-OS. For this reason, when receiving a packet from the transmitting device, the receiving device checks the validity of the packet using the key information PK-SP, PK-HV, and PK-OS together with the key information AKEY.

  In the example illustrated in FIG. 12, first, the application program 1 executed by the core 10 corresponding to the transmitting device transmits the message data MSG-DT1 to the application program 2 executed by the core 10 corresponding to the receiving device. Next, the application program 3 executed by the core 10 corresponding to the transmitting device transmits the message data MSG-DT2 using the incorrect management information MSGQ-ID. For example, the application program 3 transmits the message data MSG-DT2 to the receiving device using the management information MSGQ-ID used by the application program 1.

  The application program 3 executes a process of transferring the message data MSG-DT2 to the receiving device. However, the application program 3 stores the incorrect management information MSGQ-ID in the entry ENTS together with the message data MSG-DT2 (FIG. 12 (p)). For example, the register set information REG-ID of the management information MSGQ-ID indicates the entry ENTR used in the application program 2, and the key information AKEY of the management information MSGQ-ID is the value CD1 agreed between the application programs 1 and 2. Is the same. For example, incorrect management information MSGQ-ID is stored in the entry ENTS due to a bug in the application program 3.

  After storing the information in the entry ENTS, the application program 3 stores the transmission request SEND-MSG of logic 1 in the entry ENTS (FIG. 12 (q)). The packet control unit 30 of the transmitting device reads out the message data MSG-DT2 and the management information MSGQ-ID stored in the entry ENTS by the application program 3 from the entry ENTS based on the logic 1 of the transmission request SEND-MSG (FIG. 12). (R)). Further, the packet control unit 30 reads the key information PK-SP, PK-HV, and PK-OS stored in the entry ENTS. The key information PK-SP, PK-HV, and PK-OS stored in the entry ENTS are different from the key information PK-SP, PK-HV, and PK-OS stored in the entry ENTS used by the application program 2. .

  Then, the packet control unit 30 generates a packet including the message data MSG-DT1, the management information MSGQ-ID, and the key information PK-SP, PK-HV, and PK-OS read from the entry ENTS, and sends the packet to the receiving device. It is transmitted (FIG. 12 (s)).

  The packet control unit 30 of the receiving device receives the packet and reads the key information AKEY stored in the entry ENTR indicated by the incorrect register set information REG-ID included in the received packet. The packet control unit 30 compares the key information AKEY included in the received packet with the key information AKEY read from the entry ENTR, and detects a match.

  Further, the packet control unit 30 compares the key information PK-SP, PK-HV, and PK-OS included in the received packet with the key information PK-SP, PK-HV, and PK-OS read from the entry ENTR. Here, the entry ENTR for reading the key information PK-SP, PK-HV, and PK-OS is an entry ENTR used in the application program 2 indicated by the register set information REG-ID included in the received packet. Therefore, the key information PK-SP, PK-HV, and PK-OS read from the entry ENTR do not correspond to the application program 3, and are incorrect key information PK-SP, PK-HV, and PK-OS. .

  In the example shown in FIG. 12, the key information AKEY matches, but the key information PK-SP, PK-HV, and PK-OS do not match, so the packet control unit 30 determines that the received packet is invalid. (FIG. 12 (t)). Therefore, the packet control unit 30 discards the message data MSG-DT2 included in the received packet without storing it in the message queue MQUE. Then, the packet control unit 30 generates a response packet (error response) including the status information ST indicating that the message data MSG-DT has not been normally received, and transmits the generated response packet to the transmitting device. (FIG. 12 (u)).

  The packet control unit 30 of the transmitting device receives the response packet, and stores the state information ST included in the response packet in the register ST of the entry ENTS used for generating the transmitted packet (FIG. 12 (v)). The packet control unit 30 notifies the application program 3 that the response packet has been received.

  The application program 3 reads the state information ST stored in the entry ENTS based on the notification of the reception of the response packet, and detects that the message data MSG-DT has not been normally transferred to the receiving device (FIG. 12 ( w)). Then, the application program 3 releases the entry ENTS from which the state information ST has been read, and executes error processing and the like.

  On the other hand, the application program 2 executed by the core 10 corresponding to the receiving device reads the value of the write pointer WP and the value of the read pointer RP of the entry ENTR as in FIG. Since there is a difference between the value of the write pointer WP and the value of the read pointer RP, the application program 2 determines that new message data MSG-DT has been received (FIG. 12 (n)).

  The application program 2 issues a read access request to the storage device MEM, and reads the received message data MSG-DT1 from the message queue MQUE (FIG. 12 (o)). After reading the message data MSG-DT, the application program 2 updates the read pointer RP of the entry ENTR according to the size of the read message data MSG-DT1. Then, the application program 2 performs data processing and the like using the message data MSG-DT1 read from the message queue MQUE.

  FIG. 13 shows an example of the operation of another information processing system. The configuration of the information processing system that realizes the operation illustrated in FIG. 13 is the same as the information processing system SYS2 illustrated in FIG. 3, and the configuration of the CPU mounted on the information processing system is similar to the CPU illustrated in FIG. However, the entry ENTS of the register section 20 does not have the registers PK-SP, PK-HV, and PK-OS shown in FIG. That is, the packet control unit 30 of the receiving device determines whether the packet is valid based only on the key information AKEY included in the received packet. The operation until the application program 1 reads the state information ST stored in the entry ENTS is performed except that the packet transferred from the transmitting device to the receiving device does not include the key information PK-SP, PK-HV, and PK-OS. , And FIG.

  13, similarly to FIG. 12, first, the application program 1 executed by the core 10 corresponding to the transmission device transmits the message data MSG-DT1. Next, the application program 3 executed by the core 10 corresponding to the transmitting device transmits the message data MSG-DT2 using the incorrect management information MSGQ-ID.

  For example, the application program 3 transfers the message data MSG-DT2 to the receiving device using the management information MSGQ-ID used by the application program 1. The register set information REG-ID of the management information MSGQ-ID indicates an entry ENTR used in the application program 1, and the key information AKEY of the management information MSGQ-ID is the same as the value CD1 used in the application program 1. The packet control unit 30 of the transmitting device transmits a packet including the message data MSG-DT2 and the management information MSGQ-ID to the receiving device based on the logic 1 of the transmission request SEND-MSG (FIG. 13A). ).

  The packet control unit 30 of the receiving device receives the packet and reads the key information AKEY stored in the entry ENTR indicated by the incorrect register set information REG-ID included in the received packet. The packet control unit 30 compares the key information AKEY included in the received packet with the key information AKEY read from the entry ENTR, and determines that the received packet is valid because the key information AKEY matches (FIG. 13 ( b)).

  Then, the packet control unit 30 stores the message data MSG-DT2 included in the received packet in the storage area of the message queue MQUE indicated by the write pointer WP of the entry ENTR used in the application program 2 (FIG. 13C). ). The packet control unit 30 of the receiving device updates the write pointer WP according to the message size M-SIZE. Then, the packet control unit 30 generates a response packet including the status information ST indicating that the message data MSG-DT has been normally received, and transmits the generated response packet to the transmitting device (FIG. 13D). ).

  The packet control unit 30 of the transmitting device receives the response packet, and stores the state information ST included in the response packet in the register ST of the entry ENTS used in the application program 3 (FIG. 13E). The packet control unit 30 notifies the application program 3 that the response packet has been received. The application program 3 reads the status information ST stored in the entry ENTS based on the notification of the reception of the response packet, and detects that the message data MSG-DT2 has been normally transferred to the receiving device (FIG. 13 (f) )).

  On the other hand, the application program 2 executed by the core 10 corresponding to the receiving device reads the value of the write pointer WP and the value of the read pointer RP of the entry ENTR. Since there is a difference between the value of the write pointer WP and the value of the read pointer RP, the application program 2 determines that new message data MSG-DT has been received (FIG. 13 (g)).

  The application program 2 issues a read access request to the storage device MEM, and reads out the received message data MSG-DT1 and MSG-DT2 from the message queue MQUE (FIG. 13 (h)). However, the message data MSG-DT2 is not data processed by the application program 2.

  After reading the message data MSG-DT1 and MSG-DT2, the application program 2 updates the read pointer RP of the entry ENTR according to the size of the read message data MSG-DT1 and MSG-DT2. Thereafter, the application program 2 performs data processing and the like using the message data MSG-DT1 and MSG-DT2 read from the message queue MQUE. However, since the message data MSG-DT2 is not data processed by the application program 2, the application program 2 executes erroneous data processing. As a result, the application program 2 may malfunction.

  FIG. 14 illustrates an example of a process of transmitting a packet executed by the packet control unit 30 illustrated in FIG. The process shown in FIG. 14 is repeatedly executed at a predetermined frequency.

  First, in step S10, the packet generation unit 42 illustrated in FIG. 5 determines whether any of the registers SEND-MSG of the entry ENTS of the register unit 20 has been set to logic 1. If the register SEND-MSG has been set to logic 1, the process proceeds to step S12. If the register SEND-MSG has not been set to logic 1, the process proceeds to step S16.

  In step S12, the packet generation unit 42 generates a packet using the message data MSG-DT stored in the entry ENTS in which the register SEND-MSG is set to logic 1, and shifts the processing to step S14. In step S14, the packet transmitting unit 44 illustrated in FIG. 5 transmits the packet generated by the packet generating unit 42 to the receiving device.

  Next, in step S16, the packet receiving unit 52 illustrated in FIG. 5 determines whether a response packet has been received. If a response packet has been received, the process proceeds to step S18; otherwise, the process ends. In step S18, the response storage unit 54 shown in FIG. 5 stores the state information ST included in the response packet in the register ST of the entry ENTS, and ends the processing.

  FIG. 15 illustrates an example of a process of receiving a packet executed by the packet control unit 30 illustrated in FIG. The process shown in FIG. 15 is repeatedly executed at a predetermined frequency.

  First, in step S20, the packet receiving unit 52 illustrated in FIG. 9 determines whether a packet has been received. If a packet has been received, the process proceeds to step S22; otherwise, the process ends.

  In step S22, the packet determination unit 56 illustrated in FIG. 9 determines that the key information AKEY included in the received packet matches the key information AKEY stored in the entry ENTR indicated by the register set information REG-ID included in the packet. It is determined whether or not. If the key information AKEY matches, the process proceeds to step S24. If the key information AKEY does not match, the process proceeds to step S44 shown in FIG.

  In step S24, the packet determination unit 56 determines whether the permission information SPEN stored in the entry ENTR indicated by the register set information REG-ID included in the packet is valid. If the permission information SPEN is valid (logic 1), the process proceeds to step S26. If the permission information SPEN is invalid (logic 0), the process proceeds to step S28.

  In step S26, the packet determination unit 56 determines that the key information PK-SP included in the received packet matches the key information PK-SP stored in the entry ENTR indicated by the register set information REG-ID included in the packet. It is determined whether or not. If the key information PK-SP matches, the process proceeds to step S28. If the key information PK-SP does not match, the process proceeds to step S44 shown in FIG.

  In step S28, the packet determination unit 56 determines whether the permission information HVEN stored in the entry ENTR indicated by the register set information REG-ID included in the packet is valid. If the permission information HVEN is valid (logic 1), the process proceeds to step S30. If the permission information HVEN is invalid (logic 0), the process proceeds to step S32 shown in FIG.

  In step S30, the packet determination unit 56 matches the key information PK-HV included in the received packet with the key information PK-HV stored in the entry ENTR indicated by the register set information REG-ID included in the packet. It is determined whether or not. If the key information PK-HV matches, the process proceeds to step S32 shown in FIG. 16, and if the key information PK-HV does not match, the process proceeds to step S44 shown in FIG.

  In step S32 shown in FIG. 16, the packet determination unit 56 determines whether the permission information OSEN stored in the entry ENTR indicated by the register set information REG-ID included in the packet is valid. If the permission information OSEN is valid (logic 1), the process proceeds to step S34. If the permission information OSEN is invalid (logic 0), the process proceeds to step S36.

  In step S34, the packet determination unit 56 determines that the key information PK-OS included in the received packet matches the key information PK-OS stored in the entry ENTR indicated by the register set information REG-ID included in the packet. It is determined whether or not. If the key information PK-OSs match, the process proceeds to step S36. If the key information PK-OSs do not match, the process proceeds to step S44.

  In step S36, the packet determination unit 56 determines whether the message queue MQUE is normal. For example, when the message queue MQUE has stopped operating or when the message queue MQUE is full, it is determined that the message queue MQUE is not normal. If the message queue MQUE is normal, the process proceeds to step S38. If the message queue MQUE is not normal, the process proceeds to step S44.

  In step S38, the write control unit 58 illustrated in FIG. 9 stores the received message data MSG-DT in the message queue MQUE. Next, in step S40, the packet determination unit 56 updates the write pointer WP, and shifts the processing to step S42.

  In step S42, the response packet generator 46 shown in FIG. 9 generates a normal response packet indicating that the received packet has been processed normally, and shifts the processing to step S46. The status information ST included in the normal response packet indicates “COMPLETE” shown in FIG.

  In step S44, the response packet generator 46 generates an error response packet indicating that the message data MSG-DT has not been normally received, and shifts the processing to step S46. The status information ST included in the error response packet indicates one of “INVALID”, “INACTIVE”, and “FULL” shown in FIG.

  Next, in step S46, the packet transmitting unit 44 illustrated in FIG. 9 transmits the response packet generated by the response packet generating unit 46 to the packet transmitting device, and ends the processing.

  FIG. 17 illustrates an example of a process when a packet is transmitted by the application program executed by the core 10 illustrated in FIG. For example, the application program is the application program 1 shown in FIG. 11 and FIG. The processing shown in FIG. 17 is repeatedly executed at a predetermined frequency.

  First, in step S50, when transmitting the message data MSG-DT, the application program stores the message data MSG-DT in one of the entries ENTS of the register unit 20. Next, in step S52, the application program stores the management information MSGQ-ID in the entry ENTS. Next, in step S54, the application program stores the transmission request SEND-MSG of logic 1 in the entry ENTS, causes the packet control unit 30 to transmit the packet, and shifts the processing to step S56.

  In step S56, the application program determines whether or not the state information ST has been stored in the entry ENTS. That is, the application program determines whether a response packet corresponding to the transmitted packet has been received. If the status information ST is stored in the entry ENTS, the process proceeds to step S58. If the status information ST is not stored in the entry ENTS, the process ends. In step S58, the application program reads the state information ST stored in the entry ENTS, checks whether the message data MSG-DT has been normally transferred, and ends the processing.

  FIG. 18 illustrates an example of a process when a packet is received by the application program executed by the core 10 illustrated in FIG. For example, the application program is the application program 2 shown in FIG. 11 and FIG. The process shown in FIG. 18 is repeatedly executed at a predetermined frequency.

  First, in step S60, the application program reads the value of the write pointer WP and the value of the read pointer RP from the entry ENTR of the register unit 60 corresponding to the message queue MQUE to be used. The entry ENTR for reading the value of the write pointer WP and the value of the read pointer RP is indicated by register set information REG-ID included in the received packet.

  Next, in step S62, the application program determines whether or not the message data MSG-DT has been stored in the message queue MQUE based on the difference between the value of the write pointer WP and the value of the read pointer RP. If it is determined that message data MSG-DT is stored in message queue MQUE, the process proceeds to step S64. If it is determined that message data MSG-DT is not stored in message queue MQUE, the process ends. .

  In step S64, the application program reads out the message data MSG-DT from the message queue MQUE. Next, in step S66, the application program updates the read pointer RP, and ends the processing.

  As described above, the same effects as those of the embodiment shown in FIG. 1 can be obtained in the embodiments shown in FIGS. That is, the key information PK-SP, PK-HV, and PK-OS are stored in the registers PK-SP, PK-HV, and PK-OS that are not permitted to be accessed by the application program. Thus, it is possible to prevent erroneous key information PK-SP, PK-HV, and PK-OS from being stored in the register due to a malfunction of the application program or the like. Also, it is determined whether the received packet is normal using the key information held in the registers MSGQ-ID (AKEY) having different access authorities and the registers PK-SP, PK-HV, and PK-OS. Thereby, the reliability of the determination can be improved.

  Therefore, it is possible to prevent the erroneous packet transmitted by the transmission device from being processed by the application program executed by the core 10 corresponding to the reception device. As a result, it is possible to prevent the application program executed by the core 10 corresponding to the receiving device from executing data processing or the like using data included in an erroneous packet, thereby improving the reliability of the information processing system SYS2. can do.

  The storage of the key information PK-SP, PK-HV, and PK-OS in the registers PK-SP, PK-HV, and PK-OS by a program such as an OS higher than the application program is executed in advance before transmission of the transmission data. You. Therefore, a context switch or the like does not occur when the transmission data is transferred to the receiving device, and it is possible to prevent the execution efficiency of the application program from being reduced by the context switch or the like.

  Further, in the embodiment shown in FIGS. 3 to 18, the key information PK-OS, PK-HV, and PK-SP used for the determination by the packet determination unit 56 are the permission information OSEN, HVEN, It is determined according to the logic of SPEN. Therefore, the key information PK-OS, PK-OS, PK-OS used for the determination by the packet determination unit 56 can be used without rewriting the key information PK-OS, PK-HV, and PK-SP held in the entry ENTS of the packet transmitting device. HV, PK-SP can be changed. As a result, the key information PK-OS, PK-HV, and PK-SP used for the determination by the packet determination unit 56 can be changed without causing a context switch or the like in the packet transmitting device. That is, the key information PK-OS, PK-HV, and PK-SP used for the determination by the packet determination unit 56 can be changed without lowering the execution efficiency of the process.

  The features and advantages of the embodiments will be apparent from the above detailed description. This is intended to cover the features and advantages of the embodiments described above without departing from the spirit and scope of the claims. In addition, any person having ordinary skill in the art can easily think of any improvements and changes. Therefore, there is no intention to limit the scope of the inventive embodiment to the above, and it is possible to rely on appropriate improvements and equivalents included in the scope disclosed in the embodiment.

  10 CPU core; 20 register unit; 30 packet control unit; 40 packet transmission control unit; 42 packet generation unit; 44 packet transmission unit; 46 response packet generation unit; 50 packet reception control unit; ... Packet receiving unit; 54 ... Response storage unit; 56 ... Packet judging unit; 58 ... Writing control unit; 60 ... Register unit; 70 ... Memory control unit; 80 ... Cache memory; 120 management unit; 130, 140 storage unit; 150 packet generation unit; 160 packet transmission unit; 200 reception unit; 210 packet reception unit; 220 storage unit; 230, 240 comparison unit; Control unit; 260 storage unit; AKEY key information; AKEYCHK key checker; APRG application program; S: Base address; CPU-ID: CPU information; DATA: Data; ENTR, ENTS: Entry; GXB: Crossbar switch; HV: Hypervisor; HVCHK: Key checker; HVEN: Permission information: KEY1, KEY2: Key information; KEYOUT: Key information extracting unit; LXB: Crossbar switch; MBUS: Memory bus; MEM: Storage device; MQUE: Message queue; MSG-DT: Message data; MSGQ-ID: Management information; M-SIZE: Message size; Node: NWIF Network interface: OSCHK: Key checker; OSEN: Authorization information: PK-HV, PK-OS, PK-SP: Key information; REG-ID: Register set information; RP: Read pointer; SEND-MSG Transmission request; SP ... service processor; SPCHK ... key checker; SPEN ... permission information; ST ... status information; SW ... switch; SYS1, SYS2 ... information processing system; WP ... write pointer

Claims (8)

In an information processing system having a transmitting device that transmits data and a receiving device that receives data from the transmitting device,
The transmission device,
A data processing unit that executes software for generating data,
A first holding unit that holds first key information and data generated by the software;
A management unit that manages the operation of the data processing unit and generates second key information;
A second holding unit that holds the second key information generated by the management unit and is prohibited from being written by the software;
A packet generation unit that generates a packet including the data and the first key information held by the first holding unit and the second key information held by the second holding unit;
A packet transmitting unit that transmits the packet generated by the packet generating unit,
The receiving device,
A packet receiving unit that receives a packet from the transmitting device;
A third holding unit that holds the first key information and the second key information,
A first comparing unit that compares first key information included in the packet received by the packet receiving unit with first key information held in the third holding unit;
A second comparing unit that compares the second key information included in the packet received by the packet receiving unit with the second key information held in the third holding unit;
When the comparison result by the first comparison unit indicates a match and the comparison result by the second comparison unit indicates a match, write control for writing data included in the packet received by the packet receiving unit to a storage unit An information processing system comprising a unit.   The information processing system according to claim 1, wherein the management unit is realized by a management program that manages an operation of the data processing unit. The information processing system according to claim 1 , wherein the management unit is realized by a control program that controls a virtual machine that executes a management program that manages the operation of the data processing unit. The information processing system according to claim 1 , wherein the management unit is realized by a state management program executed by a management device that manages a state of the data processing unit. The third holding unit has a validity flag for setting whether to enable comparison of the second key information by the second comparing unit,
When the validity flag held in the third holding unit indicates invalid, the second comparing unit outputs information indicating a match of the comparison result to the writing control unit regardless of the comparison result. The information processing system according to any one of claims 1 to 4, wherein When the transmitting apparatus has a plurality of the data processing units that execute a plurality of the software,
The first holding unit and the second holding unit are provided for each of the plurality of data processing units,
The information processing system according to claim 1, wherein the third holding unit is provided for each of the plurality of pieces of software. A transmitting device mounted on the information processing system together with the receiving device and transmitting data to the receiving device,
A data processing unit that executes software for generating data,
A first holding unit that holds first key information and data generated by the software;
A management unit that manages the operation of the data processing unit and generates second key information;
A second holding unit that holds the second key information generated by the management unit and is prohibited from being written by the software;
A packet generation unit that generates a packet including the data and the first key information held by the first holding unit and the second key information held by the second holding unit;
A transmission device comprising: a packet transmission unit that transmits a packet generated by the packet generation unit. In a control method of an information processing system having a transmitting device for transmitting data and a receiving device for receiving data from the transmitting device,
A data processing unit of the transmitting device executes software that generates data and stores the generated data in a first holding unit that holds first key information;
A management unit of the transmission device manages the operation of the data processing unit and generates second key information, and stores the generated second key information in a second holding unit in which writing by the software is prohibited. Store,
A packet generation unit of the transmission device generates a packet including data and first key information held by a first holding unit, and second key information held by the second holding unit;
A packet transmission unit of the transmission device transmits the packet generated by the packet generation unit,
A packet receiving unit of the receiving device receives a packet from the transmitting device,
A first comparing unit included in the receiving device compares first key information included in the packet received by the packet receiving unit with first key information held in a third holding unit;
A second comparing unit included in the receiving device compares second key information included in the packet received by the packet receiving unit with second key information held in the third holding unit,
When the write control unit of the receiving device indicates that the comparison result by the first comparison unit indicates a match and the comparison result by the second comparison unit indicates a match, the write control unit includes a packet received by the packet reception unit. A method for controlling an information processing system, comprising writing contained data to a storage unit.

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