JP6668556B2 - Power supply device and power supply system using the same - Google Patents

Description

  The present invention relates to a power supply device and a power supply system, and more particularly to a power supply device having an inverter for converting DC power into AC power and a power supply system using the same.

  For example, Japanese Unexamined Patent Application Publication No. 2008-92734 (Patent Document 1) discloses an inverter that includes a plurality of switching elements and converts DC power into AC power having a commercial frequency, a sine wave signal having a commercial frequency and a commercial frequency. A power supply device including a control device that generates a control signal for controlling a plurality of switching elements based on a comparison result with a triangular wave signal having a sufficiently high frequency is disclosed. Each of the plurality of switching elements is turned on and off at a frequency having a value corresponding to the frequency of the triangular wave signal.

JP 2008-92734 A

  However, the conventional power supply device has a problem that a switching loss occurs every time the switching element is turned on and off, thereby reducing the efficiency of the power supply device.

  Therefore, a main object of the present invention is to provide a high-efficiency power supply device and a power supply system using the same.

  A power supply device according to the present invention includes a plurality of switching elements, an inverter that converts DC power into AC power of a commercial frequency and supplies the AC power to a load, and a deviation between a reference AC voltage and an output AC voltage of the inverter. A first control unit that outputs a sine wave signal of a commercial frequency so as to eliminate the difference between the sine wave signal and a triangular wave signal of a frequency higher than the commercial frequency is compared with each other. The control device includes a second control unit that generates a control signal for controlling the element, and a frequency adjustment unit that adjusts the frequency of the triangular wave signal to a lower limit value within a range where deviation can be eliminated.

  In the power supply device according to the present invention, the frequency of the triangular wave signal is adjusted to the lower limit value within a range in which the deviation between the reference AC voltage and the output AC voltage of the inverter can be eliminated. The number of times can be adjusted to the lower limit. Therefore, the switching loss generated in the switching element can be reduced, and the efficiency of the power supply device can be increased.

FIG. 1 is a circuit block diagram illustrating a configuration of a stabilized power supply device according to Embodiment 1 of the present invention. FIG. 2 is a circuit diagram illustrating a main part of the stabilized power supply device illustrated in FIG. 1. FIG. 2 is a block diagram illustrating a configuration of a portion related to control of an inverter in the control device illustrated in FIG. 1. FIG. 4 is a circuit block diagram illustrating a main part of the gate control circuit illustrated in FIG. 3. 5 is a time chart illustrating waveforms of a voltage command value, a triangular wave signal, and a gate signal illustrated in FIG. 4. FIG. 9 is a circuit block diagram illustrating a modification of the first embodiment. FIG. 13 is a circuit block diagram showing another modification of the first embodiment. FIG. 13 is a circuit block diagram illustrating still another modification of the first embodiment. FIG. 7 is a block diagram showing a configuration of an uninterruptible power supply system according to Embodiment 2 of the present invention. FIG. 10 is a circuit block diagram illustrating a configuration of the uninterruptible power supply illustrated in FIG. 9.

[Embodiment 1]
FIG. 1 is a circuit block diagram showing a configuration of a stabilized power supply device 1 according to Embodiment 1 of the present invention. The stabilized power supply device 1 converts three-phase AC power from a commercial AC power supply 15 into DC power once, converts the DC power into stabilized three-phase AC power, and supplies the stabilized three-phase AC power to a load 16. . FIG. 1 shows only a circuit corresponding to one phase (for example, the U phase) of the three phases (the U phase, the V phase, and the W phase) for simplification of the drawing and the description.

  In FIG. 1, this stabilized power supply device 1 includes an AC input terminal T1, an AC output terminal T2, electromagnetic contactors 2, 10, reactors 3, 8, converter 4, DC line L1, capacitors 5, 9, inverter 6, current It includes a detector 7, an operation unit 11, and a control device 12.

  AC input terminal T1 receives AC power of a commercial frequency from commercial AC power supply 15. The AC output terminal T2 is connected to the load 16. The load 16 is driven by AC power. Electromagnetic contactor 2 is connected between AC input terminal T1 and one terminal (node N1) of reactor 3, and the other terminal of reactor 3 is connected to an input node of converter 4.

  The electromagnetic contactor 2 is turned on when the stabilized power supply 1 is used, and is turned off, for example, when the stabilized power supply 1 is maintained. Reactor 3 limits the current flowing from commercial AC power supply 15 to converter 4. The instantaneous value of the AC input voltage Vo appearing at the node N1 is detected by the control device 12.

  Converter 4 is, for example, a full-wave rectifier, and converts AC power supplied from commercial AC power supply 15 into DC power and outputs the DC power to DC line L1. The capacitor 5 is connected to the DC line L1, and smoothes the voltage of the DC line L1. The DC line L1 is connected to an input node of the inverter 6.

  Inverter 6 is controlled by control device 12, converts DC power supplied from converter 4 via DC line L1 to AC power of a commercial frequency, and outputs the AC power. The output voltage of the inverter 6 can be controlled to a desired value. The output node of inverter 6 is connected to one terminal of reactor 8, and the other terminal (node N 2) of reactor 8 is connected to AC output terminal T 2 via electromagnetic contactor 10. Capacitor 9 is connected to node N2.

  The current detector 7 detects an instantaneous value of the output current Io of the inverter 6 and supplies a signal Iof indicating the detected value to the control device 12. The instantaneous value of the AC output voltage Vo appearing at the node N2 is detected by the control device 12.

  Reactor 8 and capacitor 9 constitute a low-pass filter, and pass the commercial frequency AC power generated by inverter 6 to AC output terminal T2, and the switching frequency signal generated by inverter 6 is supplied to AC output terminal T2. Prevent passing. Inverter 6, reactor 8, and capacitor 9 constitute an inverter. The electromagnetic contactor 10 is turned on when the stabilized power supply 1 is used, and is turned off, for example, when the stabilized power supply 1 is maintained.

  The operation unit 11 includes a plurality of buttons operated by a user of the stabilized power supply device 1, an image display unit that displays various information, and the like. When the user operates the operation unit 11, the power of the stabilized power supply 1 can be turned on and off, and the stabilized power supply 1 can be operated manually or automatically.

  The control device 12 controls the entire stabilized power supply device 1 based on a signal from the operation unit 11, the AC input voltage Vi, the AC output current Io, the AC output voltage Vo, and the like. That is, the control device 12 controls the inverter 6 so that the AC output voltage Vo becomes the reference AC voltage Vor.

  Control device 12 operates based on output signal Iof of current detector 7, and compares the magnitude of output current Io of inverter 6 (that is, load current IL) with predetermined value Ic. When Io> Ic, the control device 12 determines that AC power is being supplied from the stabilized power supply device 1 to the load 16, and selects the normal operation mode (second operation mode). When Io <Ic, the control device 12 determines that AC power is not being supplied from the stabilized power supply device 1 to the load 16, and selects the power saving operation mode (first operation mode).

  Further, when the normal operation mode is selected, the control device 12 compares the level of the sine wave signal of the commercial frequency with the level of the triangular wave signal of the frequency fH sufficiently higher than the commercial frequency, and based on the comparison result, determines the inverter. 6 for generating a plurality of gate signals (control signals).

  Further, when the power saving operation mode is selected, the control device 12 adjusts the frequency of the triangular wave signal to the lower limit value fL within a range in which the output AC voltage Vo can be set to the reference AC voltage Vr, and The level of the sine wave signal is compared with the level of the triangular wave signal of the frequency fL, and a plurality of gate signals for controlling the inverter 6 are generated based on the comparison result.

  FIG. 2 is a circuit diagram showing a main part of the stabilized power supply device 1 shown in FIG. While FIG. 1 shows only a portion related to one phase of the three-phase AC voltage, FIG. 2 shows a portion related to three phases. The illustration of the electromagnetic contactors 2 and 10, the operation unit 11, and the control device 12 is omitted.

  2, the stabilized power supply device 1 includes AC input terminals T1a, T1b, T1c, AC output terminals T2a, T2b, T2c, reactors 3a, 3b, 3c, a converter 4, a DC line L1, L2, capacitors 5, 9a, 9b, 9c, an inverter 6, and a current detector 7.

  AC input terminals T1a, T1b, and T1c receive three-phase AC voltages (U-phase AC voltage, V-phase AC voltage, and W-phase AC voltage) from commercial AC power supply 15 (FIG. 1), respectively. To the AC output terminals T2a, T2b, T2c, a three-phase AC voltage synchronized with the three-phase AC voltage from the commercial AC power supply 15 is output. The load 16 is driven by a three-phase AC voltage from the AC output terminals T2a, T2b, T2c.

  Reactors 3a, 3b, 3c have one terminals connected to AC input terminals T1a, T1b, T1c, respectively, and the other terminals connected to input nodes 4a, 4b, 4c of converter 4, respectively. The instantaneous value of the AC input voltage Vi appearing at one terminal of the reactor 3a is detected by the control device 12 (FIG. 1).

  Converter 4 is a full-wave rectifier circuit and includes diodes D1 to D6. The anodes of the diodes D1 to D3 are connected to the input nodes 4a, 4b, and 4c, respectively, and the cathodes thereof are all connected to the DC line L1 on the positive side. The anodes of the diodes D4 to D6 are all connected to the negative DC line L2, and their cathodes are connected to the input nodes 4a, 4b, 4c, respectively. Capacitor 5 is connected between DC lines L1 and L2.

  For example, when the U-phase AC voltage is higher than the V-phase AC voltage, AC input terminal T1a, reactor 3a, diode D1, DC line L1, capacitor 5, DC line L2, diode D5, reactor 3b, and AC input terminal T1b A current flows through the path, and the capacitor 5 is charged to a positive voltage.

  Conversely, when the V-phase AC voltage is higher than the U-phase AC voltage, the AC input terminal T1b, reactor 3b, diode D2, DC line L1, capacitor 5, DC line L2, diode D4, reactor 3a, and AC input terminal A current flows through the path of T1a, and the capacitor 5 is charged to a positive voltage. The same applies to other cases. Converter 4 converts a three-phase AC voltage from commercial AC power supply 15 into a DC voltage and outputs it between DC lines L1 and L2.

  Inverter 6 includes IGBTs (Insulated Gate Bipolar Transistors) Q1 to Q6 and diodes D11 to D16. The IGBT forms a switching element. The collectors of IGBTs Q1 to Q3 are all connected to DC line L1, and their emitters are connected to output nodes 6a, 6b, 6c, respectively. The collectors of IGBTs Q4 to Q6 are connected to output nodes 6a, 6b, 6c, respectively, and their emitters are all connected to DC line L2. Diodes D11 to D16 are connected in antiparallel to IGBTs Q1 to Q6, respectively.

  IGBTs Q1 and Q4 are controlled by gate signals Au and Bu, respectively, IGBTs Q2 and Q5 are controlled by gate signals Av and Bv, respectively, and IGBTs Q3 and Q6 are controlled by gate signals Aw and Bw, respectively. The gate signals Bu, Bv, Bw are inverted signals of the gate signals Au, Av, Aw, respectively.

  The IGBTs Q1 to Q3 are turned on when the gate signals Au, Av, Aw are set to the “H” level, and are turned off when the gate signals Au, Av, Aw are set to the “L” level. The IGBTs Q4 to Q6 are turned on when the gate signals Bu, Bv, Bw are set to “H” level, and are turned off when the gate signals Bu, Bv, Bw are set to “L” level.

  Each of the gate signals Au, Bu, Av, Bv, Aw, and Bw is a pulse signal train, and is a PWM (Pulse Width Modulation) signal. The phases of the gate signals Au and Bu, the phases of the gate signals Av and Bv, and the phases of the gate signals Aw and Bw are shifted by 120 degrees. A method for generating the gate signals Au, Bu, Av, Bv, Aw, Bw will be described later.

  For example, when IGBTs Q1 and Q5 are turned on, positive DC line L1 is connected to output node 6a via IGBT Q1, and output node 6b is connected to negative DC line L2 via IGBT Q5, and output node 6a , 6b.

  When IGBTs Q2 and Q4 are turned on, positive DC line L1 is connected to output node 6b via IGBT Q2, and output node 6a is connected to negative DC line L2 via IGBT Q4. , 6b.

  Gate signals Au, Bu, Av, Bv, Aw, and Bw turn on and off each of IGBTs Q1 to Q6 at a predetermined timing, and adjust the on time of each of IGBTs Q1 to Q6, thereby connecting between DC lines L1 and L2. Can be converted to a three-phase AC voltage.

  Reactors 8a to 8c have one terminals connected to output nodes 6a, 6b, 6c of inverter 6, and the other terminals connected to AC output terminals T2a, T2b, T2c, respectively. One electrodes of capacitors 6a, 6b, and 6c are connected to the other terminals of reactors 8a to 8c, respectively, and the other electrodes are all connected to neutral point NP.

  Reactors 8a to 8c and capacitors 6a, 6b, 6c constitute a low-pass filter, pass three-phase AC power of a commercial frequency from inverter 6 to AC output terminals T2a, T2b, T2c, and perform switching generated by inverter 6. Cut off frequency signals.

  Current detector 7 detects AC output current Io flowing through reactor 8a, and provides control device 14 with signal Iof indicating the detected value. The instantaneous value of AC output voltage Vo appearing at the other terminal (node N2) of reactor 8a is detected by control device 14 (FIG. 1).

  The voltage fluctuation rate of the three-phase AC voltage appearing at the AC output terminals T2a, T2b, T2c is smaller than the voltage fluctuation rate of the three-phase AC voltage from the commercial AC power supply 15. The voltage fluctuation rate of the AC voltage is represented, for example, by a fluctuation range of the AC voltage when the rated voltage is set as a reference (100%). The voltage fluctuation rate of the AC voltage Vi supplied from the commercial AC power supply 15 is ± 10% based on the rated voltage. On the other hand, the voltage fluctuation rate of the AC voltage Vo output from the stabilized power supply 1 is ± 2%.

  FIG. 3 is a block diagram showing a configuration of a portion related to control of inverter 6 in control device 12 shown in FIG. 3, the control device 12 includes a reference voltage generation circuit 21, a voltage detector 22, subtracters 23 and 25, an output voltage control circuit 24, an output current control circuit 26, and a gate control circuit 27.

  The reference voltage generation circuit 21 generates a reference AC voltage Vr which is a sine wave signal of a commercial frequency. The phase of this reference AC voltage Vr is synchronized with the phase of the AC input voltage Vi of the corresponding phase (here, the U phase) of the three phases (U phase, V phase, W phase). The reference AC voltage Vr corresponds to the rated voltage of the load 16.

  Voltage detector 22 detects an instantaneous value of AC output voltage Vo at node N2 (FIGS. 1 and 2), and outputs signal Vof indicating the detected value. The subtractor 23 calculates a deviation ΔVo between the reference AC voltage Vr and the output signal Vof of the voltage detector 32.

  The output voltage control circuit 24 generates a current command value Ior by adding a value proportional to the deviation ΔVo and an integral value of the deviation ΔVo. The subtracter 25 calculates a deviation ΔIo between the current command value Ior and the signal Iof from the current detector 7. The output current control circuit 26 generates a voltage command value Vor by adding a value proportional to the deviation ΔIo and an integral value of the deviation ΔIo. The voltage command value Vor is a commercial frequency sine wave signal.

  Gate control circuit 27 controls gate signals Au, Bu, Av for controlling IGBTs Q1-Q6 of inverter 6 based on voltage command value Vor, output signal Iof of current detector 7, and deviation ΔVo from subtractor 23. , Bv, Aw, and Bw.

  FIG. 4 is a circuit block diagram showing a main part of the gate control circuit 27. 4, the gate control circuit 27 includes a determiner 31, a frequency adjuster 32, an oscillator 33, a triangular wave generator 34, a comparator 35, a buffer 36, and an inverter 37.

  The determiner 31 operates based on the output signal Iof of the current detector 7, compares the output current Io of the inverter 6 (that is, the load current IL) with a predetermined value Ic, and outputs a signal φ31 indicating the comparison result. I do. If Io> Ic, signal φ31 is set to the “L” level, and the normal operation mode (second operation mode) is selected. When Io <Ic, the signal φ31 is set to the “H” level, and the power saving operation mode (first operation mode) is selected.

  The frequency adjustment unit 32 controls the oscillation frequency of the oscillator 33 (that is, the frequency of the output clock signal φ33 of the oscillator 33) based on the output signal φ31 of the determiner 31 and the deviation ΔVo from the subtractor 23 (FIG. 3). I do. The oscillator 33 is, for example, a voltage controlled oscillator. The oscillation frequency of the oscillator 33 (that is, the frequency of the output clock signal φ33) is controllable.

  When the output signal φ31 of the determiner 31 is at the “L” level (in the normal operation mode), the frequency adjustment unit 32 sets the frequency of the output clock signal φ33 of the oscillator 33 to be sufficiently higher than the commercial frequency (for example, 60 Hz). Is set to a higher predetermined frequency fH (for example, 20 KHz). In this case, since the IGBTs Q1 to Q6 of the inverter 6 are switched at a sufficiently high frequency fH, the response speed of the inverter 6 increases. Therefore, even if the load current IL is larger than the predetermined value Ic, the output AC voltage Vo can be set to the reference AC voltage Vr, and the deviation ΔVo = Vr−Vo from the subtractor 23 becomes zero.

  When the output signal φ31 of the decision unit 31 is changed from “L” level to “H” level (when the normal operation mode is changed to the power saving operation mode), the frequency adjustment unit 32 The frequency of the output clock signal φ33 is gradually lowered from the frequency fH.

  As the frequency of the clock signal φ33 decreases, the switching frequency of the IGBTs Q1 to Q6 of the inverter 6 decreases, and the response speed of the inverter 6 decreases. For this reason, the response speed of changing the output AC voltage Vo to the reference AC voltage Vr decreases, and the deviation ΔVo = Vr−Vo from the subtractor 23 becomes a negative value.

  When the deviation ΔVo becomes the negative predetermined value VM, the frequency adjustment unit 32 stops the decrease of the frequency of the output clock signal φ33 of the oscillator 33. In this case, the deviation ΔVo becomes 0 after a certain delay time has elapsed. If the deviation ΔVo is made lower than the negative predetermined value VM, the deviation ΔVo cannot be reduced to zero. Therefore, in the power saving operation mode, the frequency adjustment unit 32 adjusts the frequency of the clock signal φ33 to a lower limit value fL within a range in which the output AC voltage Vo can be set to the reference AC voltage Vr.

  The triangular wave generator 34 outputs a triangular wave signal Cu having the same frequency as the output clock signal φ33 of the oscillator 33. The comparator 35 compares the level of the voltage command value Vor from the output current control circuit 26 (FIG. 2) with the level of the triangular wave signal Cu from the triangular wave generator 34, and outputs a gate signal Au indicating the result of the comparison. Buffer 36 supplies gate signal Au to inverter 6. Inverter 37 inverts gate signal Au, generates gate signal Bu, and provides it to inverter 6.

  The gate control circuit 27 generates the gate signals Av and Bv and the gate signals Aw and Bw in the same manner as the gate signals Au and Bu. However, the phases of the gate signals Au and Bu, the phases of the gate signals Av and Bv, and the phases of the gate signals Aw and Bw are shifted by 120 degrees.

  FIGS. 5A, 5B, and 5C are time charts showing waveforms of the voltage command value Vor, the triangular wave signal Cu, and the gate signals Au and Bu shown in FIG. As shown in FIG. 5A, the voltage command value Vor is a sine wave signal of a commercial frequency. The frequency of the triangular wave signal Cu is higher than the frequency of the voltage command value Vor (commercial frequency). The positive peak value of the triangular wave signal Cu is higher than the positive peak value of the voltage command value Vor. The negative peak value of the triangular wave signal Cu is lower than the negative peak value of the voltage command value Vor.

  As shown in FIGS. 5A and 5B, when the level of the triangular wave signal Cu is higher than the voltage command value Vor, the gate signal Au becomes the “L” level, and the level of the triangular wave signal Cu becomes the voltage command value Vo. If it is lower than the threshold value, gate signal Au attains "H" level. The gate signal Au is a positive pulse signal train.

  During a period in which the voltage command value Vor is positive, as the voltage command value Vor increases, the pulse width of the gate signal Au increases. During a period in which the voltage command value Vor is negative, as the voltage command value Vor decreases, the pulse width of the gate signal Au decreases. As shown in FIGS. 5B and 5C, the gate signal Bu is an inverted signal of the gate signal Au. Each of the gate signals Au and Bu is a PWM signal.

  The waveforms of the gate signals Av and Bv and the gate signals Aw and Bw are the same as the waveforms of the gate signals Au and Bu. However, the phases of the gate signals Au and Bu, the phases of the gate signals Av and Bv, and the phases of the gate signals Aw and Bw are shifted by 120 degrees.

  As can be seen from FIGS. 5A, 5B and 5C, when the frequency of the triangular wave signal Cu is increased, the frequencies of the gate signals Au, Bu, Av, Bv, Aw and Bw are increased, and the IGBTs Q1 to Q6 The switching frequency (on / off times / second) is increased. When the switching frequency of IGBTs Q1 to Q6 increases, the switching loss generated in IGBTs Q1 to Q6 increases, and the efficiency of stabilized power supply 1 decreases. However, when the switching frequency of the IGBTs Q1 to Q6 increases, the voltage fluctuation rate of the AC output voltage Vo decreases even when the load current IL is large, and a high-quality AC output voltage Vo can be obtained.

  Conversely, when the frequency of the triangular wave signal Cu is lowered, the frequencies of the gate signals Au, Bu, Av, Bv, Aw, Bw are lowered, and the switching frequencies of the IGBTs Q1 to Q6 are lowered. When the switching frequency of IGBTs Q1 to Q6 decreases, the switching loss that occurs in IGBTs Q1 to Q6 decreases, and the efficiency of stabilized power supply device 1 increases. However, when the switching frequency of the IGBTs Q1 to Q6 decreases, when the load current IL is large, the voltage fluctuation rate of the AC output voltage Vo increases, and the waveform of the AC output voltage Vo deteriorates.

  In the conventional stabilized power supply device, the frequency of the triangular wave signal Cu is fixed to a frequency fH (for example, 20 KHz) sufficiently higher than the commercial frequency (for example, 60 Hz), and the voltage fluctuation rate is suppressed to a small value (± 2%). . For this reason, it is possible to drive a load 16 (for example, a computer) having a small allowable range for the voltage fluctuation rate, but a relatively large switching loss occurs in the IGBTs Q1 to Q6, which lowers the efficiency of the stabilized power supply device. are doing.

  However, when the load current IL is sufficiently small, or when the load 16 is in the standby state and does not consume current, the frequency of the triangular wave signal Cu is set to a frequency fL (for example, 15 KHz) lower than the frequency fH. , IGBTs Q1 to Q6 can be reduced.

  Therefore, in the first embodiment, it is possible to set the frequency of the triangular wave signal Cu to a relatively high frequency fH to reduce the voltage fluctuation rate, and to set the AC output voltage Vo to the reference AC voltage Vr. A power saving operation mode in which the frequency of the triangular wave signal Cu is set to the lower limit value fL within the range to reduce switching loss is provided. When the output current Io of the inverter 6 is larger than the predetermined value Ic, the normal operation mode is selected, and when the output current Io of the inverter 6 is smaller than the predetermined value Ic, the power saving operation mode is selected.

  Next, a method of using and operation of the stabilized power supply device 1 will be described. First, the case where AC power is supplied from the stabilized power supply device 1 to the load 16 and the output current Io (that is, the load current IL) is larger than the predetermined value Ic will be described. In this case, the electromagnetic contactors 2 and 10 are turned on. The three-phase AC voltage supplied from the commercial AC power supply 15 is full-wave rectified by the converter 4 and converted into a DC voltage.

  In the control device 12 (FIG. 3), the reference voltage generation circuit 21 generates a sine-wave reference AC voltage Vr, and the voltage detector 22 generates a signal Vof indicating a detection value of the AC output voltage Vo. A difference ΔVo between the reference AC voltage Vr and the signal Vof is generated by the subtractor 23, and a current command value Ior is generated by the output voltage control circuit 24 based on the difference ΔVo. A difference ΔIo between the current command value Ior and the signal Iof from the current detector 7 (FIGS. 1 and 2) is generated by the subtractor 25, and a voltage command value Vor is generated by the output current control circuit 26 based on the difference ΔIo. Is done.

  In the gate control circuit 27 (FIG. 4), since the output current Io is larger than the predetermined value Ic, the output signal φ31 of the determiner 31 is set to “L” level, and the normal operation mode is selected. When signal φ31 is set to the “L” level, triangular wave signal Cu having a relatively high frequency fH is generated by frequency adjustment unit 32, oscillator 33, and triangular wave generator. The voltage command value Vor and the triangular wave signal Cu are compared by the comparator 35, and the gate signals Au and Bu are generated by the buffer 36 and the inverter 37.

  In the gate control circuit 27, gate signals Av and Bv and gate signals Aw and Bw are generated in the same manner as the gate signals Au and Bu. In inverter 6 (FIG. 2), each of IGBTs Q1 to Q6 is turned on and off based on gate signals Au, Bu, Av, Bv, Aw, and Bw, and the DC voltage generated by converter 4 is converted to a three-phase AC having a commercial frequency. Converted to voltage. The load 16 is operated by three-phase AC power supplied from the stabilized power supply device 1.

  In the normal operation mode, each of the IGBTs Q1 to Q6 is turned on and off at a relatively high frequency fH, so that a high-quality AC voltage Vo with a small voltage fluctuation rate can be generated. However, the switching loss generated in IGBTs Q1 to Q6 increases, and the efficiency of stabilized power supply device 1 decreases.

  Next, a case will be described in which, for example, load 16 is in a standby state, AC power is not supplied from stabilized power supply device 1 to load 16, and output current Io (that is, load current IL) is smaller than predetermined value Ic. . Also in this case, the electromagnetic contactors 2 and 10 are turned on. The three-phase AC voltage supplied from the commercial AC power supply 15 is full-wave rectified by the converter 4 and converted into a DC voltage.

  In the control device 12 (FIG. 3), the reference voltage generation circuit 21 generates a sine-wave reference AC voltage Vr, and the voltage detector 22 generates a signal Vof indicating a detection value of the AC output voltage Vo. A difference ΔVo between the reference AC voltage Vr and the signal Vof is generated by the subtractor 23, and a current command value Ior is generated by the output voltage control circuit 24 based on the difference ΔVo. A difference ΔIo between the current command value Ior and the signal Iof from the current detector 7 (FIGS. 1 and 2) is generated by the subtractor 25, and a voltage command value Vor is generated by the output current control circuit 26 based on the difference ΔIo. Is done.

  In the gate control circuit 27 (FIG. 4), since the output current Io is smaller than the predetermined value Ic, the output signal φ31 of the determiner 31 is set to “H” level, and the power saving operation mode is selected. When the signal φ31 is set to the “H” level, the frequency of the output clock signal φ33 of the oscillator 33 is gradually decreased from the frequency fH by the frequency adjustment unit 32.

  When the frequency of the clock signal φ33 decreases, the response speed of changing the output AC voltage Vo to the reference AC voltage Vr decreases, and the deviation ΔVo from the subtractor 23 (FIG. 3) becomes a negative value. When the deviation ΔVo reaches the negative predetermined value VM, the frequency adjusting unit 32 stops the oscillation frequency of the oscillator 33 from decreasing. Thereby, the frequency of clock signal φ33 is set to lower limit value fL within a range where output AC voltage Vo can be set to reference AC voltage Vr.

  The triangular wave generator generates a triangular wave signal Cu having the same frequency fL as the clock signal φ33. The voltage command value Vor and the triangular wave signal Cu are compared by the comparator 35, and the gate signals Au and Bu are generated by the buffer 36 and the inverter 37.

  In the gate control circuit 27, gate signals Av and Bv and gate signals Aw and Bw are generated in the same manner as the gate signals Au and Bu. In inverter 6 (FIG. 2), each of IGBTs Q1 to Q6 is turned on and off based on gate signals Au, Bu, Av, Bv, Aw, and Bw, and the DC voltage generated by converter 4 is converted to a three-phase AC having a commercial frequency. Converted to voltage. The load 16 receives the three-phase AC voltage and stands by without consuming current.

  In this power saving operation mode, since each of the IGBTs Q1 to Q6 turns on and off at a relatively low frequency fL, the switching loss generated in the IGBTs Q1 to Q6 decreases, and the efficiency of the stabilized power supply device 1 increases.

  As described above, in the first embodiment, when the load current IL is larger than the predetermined value Ic, the frequency of the triangular wave signal Cu is set to a relatively high frequency fH, and the load current IL is smaller than the predetermined value Ic. In this case, the frequency of the triangular wave signal Cu is set to the lower limit value fL within a range where the output AC voltage Vo can be set to the reference AC voltage Vr. Therefore, when the load 16 is in a standby state in which no current is consumed, switching loss occurring in the IGBTs Q1 to Q6 of the inverter 6 can be reduced, and the efficiency of the stabilized power supply device 1 can be increased.

  FIG. 6 is a circuit block diagram showing a modification of the first embodiment, and is a diagram to be compared with FIG. 6, in this modified example, the frequency adjustment unit 32 is replaced with a frequency adjustment unit 41. When the output signal φ31 of the decision unit 31 is set to “H” level, the frequency adjustment unit 41 lowers the frequency of the output clock signal φ33 of the oscillator 33 from fH while monitoring the deviation ΔVo from the subtractor 23. Let it.

  When the frequency of the clock signal φ33 is decreased, the response speed of changing the output AC voltage Vo to the reference AC voltage Vr becomes slow, and the deviation ΔVo = Vr−Vof from the subtractor 23 becomes a negative value. When the deviation ΔVo reaches the negative predetermined value Vm, the frequency adjustment unit 41 gradually increases the frequency of the output clock signal φ33 of the oscillator 33, and when ΔVo = 0, increases the frequency of the clock signal φ33. Stop.

  Thus, the frequency of clock signal φ33 is set to lower limit value fL within a range where output AC voltage Vo can be set to reference AC voltage Vr. Other configurations and operations are the same as those of the first embodiment, and therefore description thereof will not be repeated. Also in this modified example, the same effect as in the first embodiment can be obtained.

  FIG. 7 is a circuit block diagram showing another modification of the first embodiment, and is a diagram to be compared with FIG. In FIG. 7, in this modified example, the frequency adjustment unit 32 is replaced with a frequency adjustment unit 42. When the output signal φ31 of the decision unit 31 falls from the “H” level to the “L” level, the frequency adjustment unit 42 monitors the output clock signal of the oscillator 33 while monitoring the deviation ΔVo from the subtractor 23. The frequency of φ33 is increased from the lower limit value fL.

  When the frequency of the clock signal φ33 is increased, the response speed of changing the output AC voltage Vo to the reference AC voltage Vr increases, and the deviation ΔVo = Vr−Vof from the subtractor 23 changes from a negative value toward 0. I do. The frequency adjustment unit 41 stops increasing the frequency of the clock signal φ33 when ΔVo = 0.

  Thereby, the frequency of clock signal φ33 (that is, the frequency of triangular wave signal Cu) is set to the lower limit value within a range where output AC voltage Vo can be set to reference AC voltage Vr regardless of the magnitude of load current IL. Is done. Other configurations and operations are the same as those of the first embodiment, and therefore description thereof will not be repeated. Also in this modified example, the same effect as in the first embodiment can be obtained.

  FIG. 8 is a circuit block diagram showing still another modification of the first embodiment, and is a diagram to be compared with FIG. In FIG. 8, in this modified example, a switch 43 is added between the determiner 31 and the frequency adjuster 32. The first terminal 43a of the switch 43 receives the output signal φ31 of the determiner 31, the second terminal 43b of the switch 43 receives the signal SE generated by the operation unit 11 (FIG. 1), and the common terminal 43c of the switch 43 has the frequency It is connected to the adjustment unit 32. The user of the stabilized power supply device 1 operates the operation unit 11 to generate the signal φ43 and the signal SE.

  The switch 43 is controlled by a signal φ43 generated by the operation unit 11. When signal φ43 is at “H” level, conduction between first terminal 43a and common terminal 43c of switch 43 is conducted, and output signal φ31 of decision unit 31 is provided to frequency adjustment unit 32 via switch 43. In this case, this modified example is the same as the first embodiment.

  When signal φ43 is at the “L” level, conduction is established between second terminal 43b and common terminal 43c of switch 43, and signal SE from operation unit 11 is provided to frequency adjustment unit 32 via switch 43. When signal SE is at the “L” level, frequency adjuster 32 sets the frequency of output clock signal φ33 of oscillator 33 to relatively high frequency fH.

  When the signal SE is at the “H” level, the frequency adjustment unit 32 sets the frequency of the output clock signal φ33 of the oscillator 33 to the lower limit fL within a range where the output AC voltage Vo can be set to the reference AC voltage Vr. Set to.

  That is, when the load current IL decreases and the deviation ΔVo becomes a positive value while the signal SE is at the “H” level, the frequency adjustment unit 32 adjusts the frequency of the triangular wave signal Cu while monitoring the deviation ΔVo. The value of the triangular wave signal Cu is adjusted to the lower limit by lowering the frequency and stopping the lowering of the frequency of the triangular wave signal Cu when the deviation ΔVo becomes a negative value.

  When the signal SE is at the “H” level and the load current IL increases and the deviation ΔVo becomes a negative value, the frequency adjustment unit 32 increases the frequency of the triangular wave signal Cu while monitoring the deviation ΔVo. By stopping the increase in the frequency of the triangular wave signal Cu when the deviation ΔVo becomes 0, the value of the triangular wave signal Cu is adjusted to the lower limit.

  In this modified example, the same effect as in the first embodiment can be obtained. In addition, the normal operation mode in which the frequency of the triangular wave signal Cu is set to a relatively high value fH by operating the operation unit 11, and the frequency of the triangular wave signal Cu The desired operation mode can be selected from the power saving operation mode in which is set to the lower limit value fL. Note that a frequency adjustment unit 41 (FIG. 6) or a frequency adjustment unit 42 (FIG. 7) may be provided instead of the frequency adjustment unit 32.

[Embodiment 2]
FIG. 9 is a block diagram showing a configuration of an uninterruptible power supply system according to Embodiment 2 of the present invention. 9, this uninterruptible power supply system includes a stabilized power supply 1, a plurality (two in FIG. 9) of uninterruptible power supplies U1, U2, and a plurality (two in this case) of batteries B1, B2. .

  As shown in FIG. 1, the stabilized power supply device 1 includes an AC input terminal T1 and an AC output terminal T2. AC input terminal T1 receives an AC voltage from bypass AC power supply 45. The bypass AC power supply 45 may be a private power generator that outputs AC power, or may be a commercial AC power supply.

  As described in the first embodiment, stabilized power supply device 1 once converts AC voltage Vi received from bypass AC power supply 45 into a DC voltage, converts the DC voltage to AC voltage Vo at a commercial frequency, and Output to the output terminal T2. The voltage fluctuation rate of the output AC voltage Vo (for example, ± 2%) is smaller than the voltage fluctuation rate of the input AC voltage Vi (for example, ± 10%).

  Further, as described in the first embodiment, when output current Io is smaller than predetermined value Ic, stabilized power supply device 1 has a triangular wave in a range where output AC voltage Vo can be set to reference AC voltage Vr. The frequency of the signal Cu is adjusted to the lower limit value fL, and the loss generated in the inverter 6 is reduced. When the output current Io is larger than the predetermined value Ic, the stabilized power supply device 1 sets the frequency of the triangular wave signal Cu to a relatively high value fH, and stably maintains the output AC voltage Vo at the reference AC voltage Vr. .

  Each of the uninterruptible power supply devices U1 and U2 includes an AC input terminal T11, a bypass input terminal T12, a battery terminal T13, and an AC output terminal T14. AC input terminal T11 receives an AC voltage having a commercial frequency from commercial AC power supply 15. The bypass input terminal T12 receives the AC voltage Vo from the AC output terminal T2 of the stabilized power supply device 1.

  Battery terminal T13 is connected to corresponding battery B1 or B2. Each of batteries B1 and B2 stores DC power. The AC output terminal T14 is connected to the corresponding load LD1 or LD2. The loads LD1 and LD2 are driven by AC power supplied from the uninterruptible power supplies U1 and U2, respectively.

  The uninterruptible power supply U1 normally converts the AC power from the commercial AC power supply 15 into DC power during normal operation when AC power is supplied from the commercial AC power supply 15, stores the DC power in the battery B1, and stores the DC power in the battery B1. And supplies it to the load LD1.

  At this time, the uninterruptible power supply U1 temporarily converts the AC voltage VI received from the commercial AC power supply 15 into a DC voltage, converts the DC voltage into a commercial frequency AC voltage VO, and outputs the converted voltage to the AC output terminal T2. The voltage change rate of output AC voltage VO (for example, ± 2%) is smaller than the voltage change rate of input AC voltage VI (for example, ± 10%).

  Further, the uninterruptible power supply U1 converts the DC power of the battery B1 into AC power of a commercial frequency and supplies it to the load LD1 at the time of a power outage when the supply of AC power from the commercial AC power supply 15 is stopped. Therefore, even when a power failure occurs, the operation of the load LD1 can be continued during the period in which the DC power is stored in the battery B1.

  Further, when the built-in inverter fails, the uninterruptible power supply U1 supplies the AC power from the stabilized power supply 1 to the load LD1. The uninterruptible power supply U2 is the same as the uninterruptible power supply U1.

  When the inverters of the uninterruptible power supply devices U1 and U2 do not fail, power is not supplied from the stabilized power supply device 1 to the loads LD1 and LD2, so that the output current Io of the stabilized power supply device 1 becomes a predetermined value Ic. Less than. In this case, the inverter 6 of the stabilized power supply device 1 is driven at the frequency of the lower limit value fL, and the loss generated in the inverter 6 is reduced.

  When the inverter of the uninterruptible power supply U1 (or U2) fails, AC power is supplied from the stabilized power supply 1 to the load LD1 (or LD2), so that the output current Io of the stabilized power supply 1 becomes a predetermined value. It becomes larger than Ic. In this case, the inverter 6 of the stabilized power supply device 1 is driven at a relatively high frequency fH and is supplied to the AC voltage VO load LD1 (or LD2) having a small voltage fluctuation rate.

  FIG. 10 is a circuit block diagram illustrating a configuration of the uninterruptible power supply U1. The uninterruptible power supply U1 converts three-phase AC power from the commercial AC power supply 15 into DC power once, converts the DC power into three-phase AC power, and supplies the converted power to the load LD1. FIG. 10 shows only a circuit corresponding to one phase (for example, the U phase) of the three phases (the U phase, the V phase, and the W phase) for simplification of the drawing and the description.

  In FIG. 10, the uninterruptible power supply U1 includes an AC input terminal T11, a bypass input terminal T12, a battery terminal T13, and an AC output terminal T14. AC input terminal T11 receives commercial frequency AC power from commercial AC power supply 15. The bypass input terminal T12 receives the commercial frequency AC power from the stabilized power supply device 1.

  Battery terminal T13 is connected to battery (power storage device) B1. Battery B1 stores DC power. A capacitor may be connected instead of the battery B1. The AC output terminal T14 is connected to the load LD1. The load LD1 is driven by AC power.

  The uninterruptible power supply U1 further includes electromagnetic contactors 51, 57, 63, 65, current detectors 52, 60, capacitors 53, 58, 62, reactors 54, 61, converter 55, bidirectional chopper 56, and inverter 59. , A semiconductor switch 64, an operation unit 66, and a control device 67.

  The electromagnetic contactor 51 and the reactor 54 are connected in series between the AC input terminal T11 and the input node of the converter 55. Capacitor 53 is connected to node N11 between electromagnetic contactor 51 and reactor 54. The electromagnetic contactor 51 is turned on when the uninterruptible power supply U1 is used, and is turned off, for example, during maintenance of the uninterruptible power supply U1.

  The instantaneous value of the AC input voltage VI appearing at the node N11 is detected by the control device 67. Based on the instantaneous value of the AC input voltage VI, whether or not a power failure has occurred is determined. Current detector 52 detects AC input current Ii flowing through node N11, and provides signal Iif indicating the detected value to control device 67.

  Capacitor 53 and reactor 54 constitute a low-pass filter that allows commercial AC power to pass from commercial AC power supply 15 to converter 55, and that a switching frequency signal generated by converter 55 passes to commercial AC power supply 15. To prevent

  Converter 55 is controlled by control device 67, and converts AC power to DC power and outputs the DC power to DC line L11 during normal times when AC power is supplied from commercial AC power supply 15. During a power outage when the supply of AC power from commercial AC power supply 15 is stopped, the operation of converter 55 is stopped.

  Converter 55 has, for example, a configuration similar to that of inverter 6 (FIG. 2), and is a well-known device including a plurality of sets of IGBTs and diodes. The output voltage of converter 55 can be controlled to a desired value. The capacitor 53, the reactor 54, and the converter 55 form a forward converter.

  The capacitor 58 is connected to the DC line L11 and smoothes the voltage of the DC line L11. The instantaneous value of DC voltage VDC appearing on DC line L11 is detected by control device 67. The DC line L11 is connected to the high voltage side node of the bidirectional chopper 56, and the low voltage side node of the bidirectional chopper 56 is connected to the battery terminal T13 via the electromagnetic contactor 57.

  The electromagnetic contactor 57 is turned on when the uninterruptible power supply U1 is used, and is turned off, for example, during maintenance of the uninterruptible power supply U1 and the battery B1. The instantaneous value of the inter-terminal voltage VB of the battery B1 appearing at the battery terminal T13 is detected by the control device 67.

  The bidirectional chopper 56 is controlled by the control device 67, and stores DC power generated by the converter 55 in the battery B <b> 1 during normal operation when AC power is supplied from the commercial AC power supply 15, and outputs AC power from the commercial AC power supply 15. At the time of a power outage when the power supply is stopped, the DC power of the battery B1 is supplied to the inverter 59 via the DC line L11.

  When storing the DC power in the battery B1, the bidirectional chopper 56 lowers the DC voltage VDC of the DC line L11 and provides the DC voltage to the battery B1. When supplying the DC power of battery B1 to inverter 59, bidirectional chopper 56 boosts inter-terminal voltage VB of battery B1 and outputs it to DC line L11. DC line L11 is connected to the input node of inverter 59.

  Inverter 59 is controlled by control device 67, converts DC power supplied from converter 55 or bidirectional chopper 56 via DC line L11 to AC power of a commercial frequency, and outputs the AC power. That is, the inverter 59 converts the DC power supplied from the converter 55 via the DC line L11 into AC power during normal times, and converts the DC power supplied from the battery B1 via the bidirectional chopper 56 into AC power during a power failure. Convert to electric power. The output voltage of the inverter 59 can be controlled to a desired value. Inverter 59 has, for example, the same configuration as inverter 6 (FIG. 2), and is a well-known inverter including a plurality of sets of IGBTs and diodes.

  The output node of inverter 59 is connected to one terminal of reactor 61, and the other terminal (node N12) of reactor 61 is connected to AC output terminal T4 via electromagnetic contactor 63. Capacitor 62 is connected to node N12.

  Current detector 60 detects an instantaneous value of output current IO of inverter 59, and provides signal IOf indicating the detected value to control device 67. The instantaneous value of the AC output voltage VO appearing at the node N12 is detected by the control device 67.

  Reactor 61 and capacitor 62 constitute a low-pass filter, and pass the commercial frequency AC power generated by inverter 59 to AC output terminal T14, and the switching frequency signal generated by inverter 59 is supplied to AC output terminal T14. Prevent passing. Inverter 59, reactor 61, and capacitor 62 constitute an inverter.

  The electromagnetic contactor 63 is controlled by the control device 67, is turned on in an inverter power supply mode in which the AC power generated by the inverter 59 is supplied to the load LD1, and is a bypass that supplies the AC power from the stabilized power supply device 1 to the load LD1. It is turned off in the power supply mode.

  The semiconductor switch 64 includes a thyristor and is connected between the bypass input terminal T12 and the AC output terminal T14. The electromagnetic contactor 65 is connected to the semiconductor switch 64 in parallel. The semiconductor switch 64 is controlled by the control device 67 and is normally turned off. When the inverter 59 fails, the semiconductor switch 64 is turned on instantaneously, and supplies the AC power from the stabilized power supply device 1 to the load LD1. The semiconductor switch 64 turns off after a lapse of a predetermined time from turning on.

  The electromagnetic contactor 65 is turned off in the inverter power supply mode for supplying the AC power generated by the inverter 59 to the load LD1, and is turned on in the bypass power supply mode for supplying the AC power from the stabilized power supply device 1 to the load LD1.

  In addition, the electromagnetic contactor 65 is turned on when the inverter 59 fails, and supplies the AC power from the stabilized power supply device 1 to the load LD1. That is, when the inverter 59 fails, the semiconductor switch 64 is turned on instantaneously for a predetermined time and the electromagnetic contactor 65 is turned on. This is to prevent the semiconductor switch 64 from being overheated and damaged.

  The operation unit 66 includes a plurality of buttons operated by a user of the uninterruptible power supply U1, an image display unit that displays various information, and the like. By operating the operation unit 66 by the user, it becomes possible to turn on and off the power of the uninterruptible power supply U1, and to select one of the bypass power supply mode and the inverter power supply mode. I have.

  The controller 67 controls the entire uninterruptible power supply U1 based on a signal from the operation unit 66, the AC input voltage VI, the AC input current Ii, the DC voltage VDC, the battery voltage VB, the AC output current IO, the AC output voltage VO, and the like. Control. That is, control device 67 detects whether a power failure has occurred based on the detected value of AC input voltage VI, and controls converter 55 and inverter 59 in synchronization with the phase of AC input voltage VI.

  Further, control device 67 controls converter 55 so that DC voltage VDC becomes a desired target voltage VDCT during the normal time when AC power is supplied from commercial AC power supply 15, and controls AC power from commercial AC power supply 15. At the time of a power outage when the supply is stopped, the operation of converter 55 is stopped.

  Further, the control device 67 controls the bidirectional chopper 56 so that the battery voltage VB becomes the desired target battery voltage VBT in a normal state, and controls the DC voltage VDC to the desired target voltage VDCT in the event of a power failure. The direction chopper 56 is controlled. Further, control device 67 controls inverter 59 such that output AC voltage VO becomes a desired target AC voltage VOT.

  Next, the operation of the uninterruptible power supply U1 will be described. It is assumed that the user of the uninterruptible power supply U1 operates the operation unit 17 to select the inverter power supply mode. When the inverter power supply mode is selected during the normal time when AC power is supplied from the commercial AC power supply 15, the semiconductor switch 64 and the electromagnetic contactor 65 are turned off, and the electromagnetic contactors 51, 57, and 63 are turned on.

  AC power supplied from commercial AC power supply 15 is converted to DC power by converter 55. The DC power generated by the converter 55 is stored in the battery B1 by the bidirectional chopper 57, converted into AC power of a commercial frequency by the inverter 59, and supplied to the load LD1.

  When the supply of AC power from the commercial AC power supply 15 is stopped, that is, when a power failure occurs, the operation of the converter 55 is stopped, and the DC power of the battery B1 is supplied to the inverter 59 by the bidirectional chopper 56. Inverter 59 converts the DC power from bidirectional chopper 56 into AC power at a commercial frequency and supplies the AC power to load LD1. Therefore, the operation of the load LD1 can be continued while the DC power is stored in the battery B1.

  As described above, when the inverter 59 does not fail in the inverter power supply mode, power is not supplied from the stabilized power supply 1 to the load LD1, so that the output current Io of the stabilized power supply 1 is about 0A. , Is smaller than the predetermined value Ic. For this reason, the inverter 6 of the stabilized power supply device 1 is driven at the lower limit frequency fL, and the loss generated in the inverter 6 is suppressed to a small value.

  If the inverter 59 breaks down in the inverter power supply mode, the semiconductor switch 64 turns on instantaneously, the electromagnetic contactor 63 turns off, and the electromagnetic contactor 65 turns on. Thus, the AC power from the stabilized power supply device 1 is supplied to the load LD1 via the semiconductor switch 64 and the electromagnetic contactor 65, and the operation of the load LD1 is continued. After a certain time, the semiconductor switch 64 is turned off to prevent the semiconductor switch 64 from being overheated and damaged.

  In this case, since AC power is supplied from the stabilized power supply device 1 to the load LD1, the output current Io of the stabilized power supply device 1 becomes larger than the predetermined value Ic. Therefore, the inverter 6 of the stabilized power supply device 1 is driven at a relatively high frequency fH, and the AC voltage VO having a small voltage fluctuation rate is supplied to the load LD1.

  When the user of the uninterruptible power supply U1 operates the operation unit 66 to select the bypass power supply mode, the operation is the same as when the inverter 59 breaks down in the inverter power supply mode. That is, the electromagnetic contactor 63 and the semiconductor switch 64 are turned off and the electromagnetic contactor 65 is turned on, so that AC power is supplied from the stabilized power supply device 1 to the load LD1 via the electromagnetic contactor 65. At this time, since the output current Io of the stabilized power supply 1 becomes larger than the predetermined value Ic, the inverter 6 of the stabilized power supply 1 is driven at a relatively high frequency fH, and the AC voltage VO having a small voltage fluctuation rate is loaded. It is supplied to LD1.

  Since the configuration and operation of uninterruptible power supply U2 are the same as those of uninterruptible power supply U1, description thereof will not be repeated. Also in the second embodiment, the same effects as in the first embodiment can be obtained.

  The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1 Stabilized power supply, T1, T1a, T1b, T1c, T11 AC input terminal, T2, T2a, T2b, T2c, T14 AC output terminal, T12 bypass input terminal, T13 battery terminal, 2, 10, 51, 57, 63 , 65 Magnetic contactor, 7, 52, 60 Current detector, 5, 9, 9a, 9b, 9c, 53, 58, 62 Capacitor, 3, 3a, 3b, 3c, 8, 8a, 8b, 8c, 54, 61 reactor, 4,55 converter, 6,37,59 inverter, 11,66 operation unit, 12,67 control unit, 15 commercial AC power supply, 16, LD1, LD2 load, D1-D6, D11-D16 diode, Q1- Q6 IGBT, 21 reference voltage generation circuit, 22 voltage detector, 23, 25 subtractor, 24 output voltage control circuit, 26 output current control circuit 27 gate control circuit, 31 determiner, 32, 41, 42 frequency adjuster, 33 oscillator, 34 triangular wave generator, 35 comparator, 36 buffer, 43 switch, U1, U2 uninterruptible power supply, B1, B2 battery, 45 Bypass AC power supply, 56 bidirectional chopper, 64 semiconductor switch.

Claims (9)

An inverter that includes a plurality of switching elements and converts DC power into AC power at a commercial frequency and supplies the AC power to a load;
A first control unit that outputs a sine wave signal of the commercial frequency so that a deviation between a reference AC voltage and an output AC voltage of the inverter is eliminated;
A second control unit that compares a level of the sine wave signal and a level of a triangular wave signal having a frequency higher than the commercial frequency, and generates a control signal for controlling the plurality of switching elements based on a result of the comparison. ,
A power supply device comprising: a frequency adjustment unit that adjusts the frequency of the triangular wave signal to a lower limit within a range in which the deviation can be eliminated.   The frequency adjustment unit is configured to adjust the frequency of the triangular wave signal to the lower limit within a range capable of eliminating the deviation, and the triangular wave to a predetermined value greater than the lower limit. The power supply device according to claim 1, wherein the selected one of the second operation mode for setting the frequency of the signal and the second operation mode is executed. Further, a current detector for detecting a load current,
When the detected value of the current detector is smaller than a predetermined current value, the first operation mode is selected. When the detected value of the current detector is larger than the predetermined current value, the first operation mode is selected. The power supply device according to claim 2, further comprising: a selection unit that selects the second operation mode.   The power supply device according to claim 2, further comprising a selection unit that selects a desired operation mode from the first and second operation modes. A first power supply unit and a second power supply unit;
When the second power supply is normal, AC power is supplied to the load from the second power supply, and the first power supply is placed in a standby state, and the second power supply fails. AC power is supplied from the first power supply device to the load,
The first power supply device includes:
A first inverter having a plurality of switching elements and converting DC power into AC power at a commercial frequency;
A first control unit that outputs a sine wave signal of the commercial frequency so that there is no deviation between a reference AC voltage and an output AC voltage of the first inverter;
A second control unit that compares a level of the sine wave signal and a level of a triangular wave signal having a frequency higher than the commercial frequency, and generates a control signal for controlling the plurality of switching elements based on a result of the comparison. ,
A frequency adjustment unit that adjusts the frequency of the triangular wave signal to a lower limit within a range in which the deviation can be eliminated.   The frequency adjustment unit is configured to adjust the frequency of the triangular wave signal to a lower limit within a range capable of eliminating the deviation, and the triangular wave signal to a predetermined value larger than the lower limit. The power supply system according to claim 5, wherein the selected one of the second operation mode and the second operation mode for setting the frequency is executed. The first power supply device includes:
Further, a current detector for detecting a load current,
When the detected value of the current detector is smaller than a predetermined current value, the first operation mode is selected. When the detected value of the current detector is larger than the predetermined current value, the first operation mode is selected. The power supply system according to claim 6, further comprising: a selection unit that selects the second operation mode.   The power supply system according to claim 6, wherein the first power supply device further includes a selection unit that selects a desired operation mode from the first and second operation modes. The first power supply device further includes a first forward converter that converts AC power from a bypass AC power supply into DC power and supplies the DC power to the first inverter.
The second power supply device includes:
A second forward converter for converting AC power supplied from a commercial AC power supply into DC power,
A second inverter for converting DC power into AC power at a commercial frequency,
At the normal time when AC power is supplied from the commercial AC power supply, DC power generated by the second forward converter is supplied to the second inverter and stored in a power storage device,
The power supply system according to claim 5, wherein a DC power supply of the power storage device is supplied to the second inverter during a power outage when the supply of AC power from the commercial AC power supply is stopped.

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