JP6631124B2 - Information processing apparatus and image forming apparatus - Google Patents

Description

  The present invention relates to an information processing device and an image forming device.

  An information processing device using a processor having a plurality of cores is known. In such an information processing device, the core to which a newly generated task (process) is assigned affects the performance of the entire information processing device. Patent Document 1 relates to a system using a plurality of processors instead of a processor having a plurality of cores, and discloses a technique in which tasks are grouped and tasks are assigned to the same processor for each group. Patent Literature 2 discloses a technique in which the assignment of past tasks is stored, and when the same task as before is started, the task is assigned to the same core as before.

JP-A-10-78942 JP-A-11-259318

  In an information processing apparatus using a processor having a plurality of cores, when allocating tasks to each core, simply assigning the same task (or a task belonging to the same group) to the same core causes the task to concentrate on a specific core. As a result, there is a problem that the performance of the entire apparatus is not always optimized.

  The present invention provides a technique for allocating a task to a plurality of cores more efficiently than allocating the same task in association with the same core.

  The present invention provides control means having a plurality of cores, first acquisition means for acquiring assignment information indicating to which of the plurality of cores each of the plurality of tasks is assigned, and association between the plurality of tasks. A second acquisition unit for acquiring attribute information to be represented, and when a new task occurs, refer to the assignment information acquired by the first acquisition unit and the attribute information acquired by the second acquisition unit, and There is provided an information processing apparatus having an assignment unit for assigning a new task to a core to which a task related to the new task is assigned among the cores.

  The attribute information may include, as information indicating the association, information indicating commonality of input data or output data in the plurality of tasks.

  In the attribute information, commonality of the input data and commonality of the output data may be distinguished from each other.

  The attribute information may include information indicating the weight of the association.

  The control unit may have a cache memory shared by the plurality of cores, and the attribute information may include a usage amount of the cache memory in each of the plurality of tasks.

  The information processing apparatus includes a compiling unit that compiles a program code for executing the plurality of tasks, and the compile unit compiles a program code for executing one of the plurality of tasks. At this time, the attribute information of the one task may be generated.

  The information processing apparatus has third acquisition means for acquiring priority information indicating the priority of the plurality of tasks, and the allocating means assigns an object to be allocated among tasks not yet allocated to the plurality of cores. May be selected according to the priority information acquired by the third acquiring means.

  The information processing apparatus includes a fourth acquisition unit that acquires configuration information indicating a hardware configuration of the control unit, and the assignment unit acquires the configuration information by the fourth acquisition unit in addition to the assignment information and the attribute information. The new task may be assigned with reference to the configured information.

  The plurality of tasks include image processing repeated in a certain unit, and the information processing apparatus determines the assignment of a task related to image processing for a new unit. The information processing apparatus may include an initialization unit that initializes information regarding the completed image processing among the information.

  The present invention also provides a control unit having a plurality of cores, a first obtaining unit for obtaining allocation information indicating to which of the plurality of cores each of the plurality of processes is allocated, and an association between the plurality of tasks. A second acquisition unit for acquiring attribute information indicating the property, and when a new task occurs, referencing the assignment information acquired by the first acquisition unit and the attribute information acquired by the second acquisition unit, Allocating means for allocating the new task to a core to which a task related to the new task is allocated among the plurality of cores, and an image according to data output by the task allocated to the plurality of cores. An image forming apparatus comprising: an image forming unit that forms an image;

According to the information processing apparatus according to the first aspect, a process can be assigned to a plurality of cores according to the relevance between the plurality of processes.
According to the information processing apparatus of the second aspect, it is possible to assign processing to a plurality of cores according to the relevance of input data or output data.
According to the information processing apparatus according to the third aspect, it is possible to assign processing to a plurality of cores while separately considering the relevance of input data and the relevance of output data.
According to the information processing apparatus of the fourth aspect, it is possible to weight the relevance between a plurality of processes.
According to the information processing apparatus of the fifth aspect, it is possible to allocate processing to a plurality of cores in consideration of the amount of cache memory used.
According to the information processing apparatus according to claim 6, attribute information can be generated according to the program code.
According to the information processing apparatus according to claim 7, it is possible to assign processing to a plurality of cores according to the priority of processing.
According to the information processing apparatus of claim 8, it is possible to assign processing to a plurality of cores according to the hardware configuration of the control means.
According to the information processing apparatus of the ninth aspect, in the image processing that is repeatedly performed, the processing can be assigned to the plurality of cores according to the relevance between the plurality of processings.
According to the image forming apparatus of the tenth aspect, it is possible to allocate a process to a plurality of cores according to the relevance between the plurality of processes.

The figure which illustrates the structure of CPU90 concerning related technology. Diagram illustrating task assignment according to the related art Diagram illustrating task structure Diagram illustrating task assignment according to the related art FIG. 1 is a diagram illustrating a configuration of an image forming apparatus 1 according to an embodiment. FIG. 2 illustrates a functional configuration of the image forming apparatus 1. Flow chart illustrating the operation of the image forming apparatus 1 Diagram illustrating tasks assigned to cores The figure which illustrates the schedule information which shows the assignment of the task of FIG. Diagram illustrating a new task The figure which illustrates the attribute information of the task of FIG. Diagram exemplifying assignment results of tasks GL Diagram illustrating further new tasks Diagram illustrating task attribute information Diagram exemplifying assignment results of tasks MO The figure which illustrates the assigned task according to the operation example 2. The figure which shows the attribute information of the task H and the task I in the operation example 2 Diagram showing schedule information The figure which shows the allocation result of the task by the operation example 2 The figure which shows the attribute information of the task H and the task I in the operation example 3 Diagram showing schedule information The figure which shows the allocation result of the task by the operation example 3 The figure which shows the assigned task which concerns on the operation example 4. Diagram showing schedule information The figure which shows the allocation result of the task by the operation example 4 The figure which illustrates the assigned task according to the operation example 5. The figure which shows the attribute information of the task H and the task I in the operation example 5 Diagram showing schedule information The figure which shows the assignment result of the task by the operation example 5 The figure which shows the task which concerns on the operation example 6. The figure which shows the attribute information of the task which concerns on the operation example 6. Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 Diagram showing task assignment according to operation example 6 9 is a flowchart illustrating a process of assigning a new task according to the first modification. Diagram illustrating relevance between tasks including classification The figure which illustrates the structure of the cache memory of CPU. A diagram illustrating an assignment control table 11 is a flowchart illustrating a process of assigning a new task according to the second modification. The figure which illustrates the attribute information concerning the modification 4 The figure which illustrates the schedule information in the modification 5 The figure which illustrates the schedule information in the modification 6 FIG. 5 is a diagram illustrating schedule information in which part of attribute information has been deleted.

1. 1. Outline FIG. 1 is a diagram illustrating a configuration of a CPU (Central Processing Unit) 90 according to the related art. The CPU 90 is a processor having a plurality of cores, in this example, four cores 901 to 904. Here, the “core” of the processor refers to a portion of the processor that executes and executes instructions. The CPU 90 further has cache memories 911 to 914 and 921 to 922. The cache memories 911 to 914 are primary caches (so-called L1 caches), and are dedicated to the cores 901 to 904, respectively. The cache memories 921 and 922 are secondary caches (so-called L2 caches). The cache memory 921 is shared by the cores 901 and 902, and the cache memory 922 is shared by the cores 903 and 904. In general, the “core” may include the L1 cache, but here, the “core” does not include the L1 cache.

  The primary cache refers to a cache memory accessed from the core with the highest priority, and the secondary cache refers to a cache memory accessed at the next priority to the primary cache. The primary cache is faster and has a smaller capacity than the secondary cache. When an access request to the main memory (external memory) occurs, the core first checks whether data at the address of the access destination is stored in the primary cache. When the data of the address of the access destination (hereinafter, simply referred to as “data of the access destination”) is stored in the primary cache, the core reads the data from the primary cache. The fact that the data of the access destination is stored in the cache memory is called a "hit", and the rate at which the hits occur is called a "hit ratio". If the data of the access destination is not stored in the primary cache, the core checks whether the data of the access destination is stored in the secondary cache. When the data of the access destination is stored in the secondary cache, the core reads the data from the secondary cache. If the data of the access destination is not stored in the secondary cache, the core reads the data from the main memory.

  The CPU 90 is a so-called SMP (Symmetric Multi Processing) type processor, and each core has the same function. In addition to the multi-core type processor, there is an AMP (Asymmetric Multi Processing) type processor. For example, there are many tasks to be processed, such as a so-called multifunction device, and print, scan, facsimile transmission / reception, and UI. In an apparatus having many combinations of processes such as processes and network processes, an SMP type processor is generally used. For example, when performing data processing on the premise of continuous operation by pipeline such as image processing, if the hit rate of the cache decreases, the waiting time of the core due to the access to the main memory occurs and the performance of the processor decreases. I will. Therefore, assigning which task to which core is a problem that affects the performance of the processor.

  FIG. 2 is a diagram illustrating task assignment according to the related art. This figure shows a task to be executed by each core, and shows a schedule (schedule) in which each core executes the task. In this example, tasks A to G are assigned to four cores 902 to 904. It is known in advance that tasks A and C, tasks B and D, and tasks E and F share data, respectively. Therefore, tasks A and C, tasks B and D, and tasks E and F are grouped, respectively. In this example, the rule of assigning the same group of tasks to the same core is applied.

  Here, an example in which a plurality of tasks occur in the order of A, B, C, D, E, F, A, B, C, D, G, F, A, B, C, D, E, and G think of. First, the first task A is assigned to the core 901. The second task B is assigned to the core 902. The third task C is assigned to the core 901 because it is grouped with the task A. The fourth task D is assigned to the core 902 because it is grouped with the task B. The fifth task E is assigned to the core 903 because the cores 901 and 902 have already completed the processing schedule. The sixth task F is assigned to the core 903 because it is grouped with the task E. The seventh task G is assigned to the core 904 having the lowest usage rate because it is not grouped with any task. Hereinafter, when tasks are assigned in the same manner, they are assigned as shown in FIG.

  In this example, the ratio of the cores 903 and 904 becoming idle is high, and the four cores cannot always be used effectively, and there is room for improvement.

  Consider yet another example. Here, an example is used in which a so-called pipeline process in which a plurality of tasks are connected in series, such as an image forming apparatus, is repeatedly performed for each predetermined unit (for example, page or band).

  FIG. 3 is a diagram illustrating a task structure. The input data of the tasks A to E are referred to as data a to e. The output data of one task is the input data of the next task. That is, the tasks A to E constitute a pipeline process. For example, when data a is input to the pipeline processing, first, data b is output by task A. Task B processes data b and outputs data c. Thereafter, the processing is similarly performed in series, and the task E outputs data f. That is, when data a is input to this pipeline processing, data f is obtained.

  Next, an example in which tasks F and G, which are not included in the pipeline processing, are assigned to the cores 901 to 904 in addition to the tasks A to E will be considered. In this example, a rule is applied in which tasks A to E are grouped and tasks belonging to the same group are assigned to cores sharing the same L2 cache.

  FIG. 4 is a diagram illustrating task assignment according to the related art. In this example, task allocation is biased toward cores 901 and 902, and the percentage of cores 903 and 904 becoming idle is high. The four cores are not always used effectively, and there is room for improvement.

  By the way, in the example of FIG. 4, the pipeline processing of the first page, the second page, and the third page is all assigned to the core 901 or the core 902. Tasks A to E share data within the same page as described with reference to FIG. 3, but do not share data between pages. For example, the data f, which is the output of the first page pipeline processing, is irrelevant to the data a, which is the input of the second page pipeline processing. Therefore, from the viewpoint of improving the cache hit ratio, it is not meaningful to assign both the first page pipeline processing and the second page pipeline processing to the cores 901 and 902, and rather, the task allocation bias. Contribute to the occurrence of

  On the other hand, the present embodiment provides a technique for more efficiently allocating tasks.

2. Configuration FIG. 5 is a diagram illustrating a configuration of the image forming apparatus 1 according to an embodiment. The image forming apparatus 1 is an example of an information processing apparatus having a function of forming an image, and is, for example, a so-called multifunction peripheral. The image forming apparatus 1 includes a CPU 10, a memory controller 20, a main storage device (main memory) 30, an IO controller 40, an auxiliary storage device 41, an image reading unit 42, an image forming unit 43, and a communication unit 44.

  The CPU 10 is a control device (an example of a control unit) that controls each unit of the image forming apparatus 1, and is an example of a processing unit including N cores (N is a natural number of 2 or more) that execute different processes. In this example, N = 4. The CPU 10 includes cores 101 to 104, cache memories 111 to 114, and cache memories 121 to 122. The cache memories 111 to 114 are primary caches (L1 caches) and are dedicated to the cores 101 to 104, respectively. The cache memories 121 to 122 are secondary caches (L2 caches). The cache memory 121 is shared by the cores 101 and 102, and the cache memory 122 is shared by the cores 103 and 104.

  In the following description, a plurality of cores sharing the same L2 cache is referred to as a “core group”. In the example of FIG. 5, the core 101 and the core 102 belong to the same core group, and the core 103 and the core 104 belong to another core group. For example, a core group including the core 102 and the core 103 is referred to as “core 101/102”.

  The memory controller 20 controls reading and writing of data from and to the main storage device 30. The main storage device 30 is a main storage device and includes, for example, a DRAM (Dynamic Random Access Memory). The main storage device 30 functions as a work area when the CPU 10 executes a program, and is an example of a storage unit that stores various data.

  The IO controller 40 is a device that controls peripheral devices by connecting them to the CPU 10. In this example, an auxiliary storage device 41, an image reading unit 42, an image forming unit 43, and a communication unit 44 are connected to the IO controller 40. The auxiliary storage device 41 is a nonvolatile storage device that stores data and programs, and includes, for example, an HDD (Hard Disk Drive). The image reading unit 42 is a device that optically reads a document, and includes, for example, a so-called scanner. The image forming unit 43 is a device that forms an image on a medium (for example, paper), and forms an image by, for example, an electrophotographic technique or an inkjet technique. The communication unit 44 is an interface for communicating with other devices.

  FIG. 6 is a diagram illustrating a functional configuration of the image forming apparatus 1. The auxiliary storage device 41 is used to implement a program (hereinafter, referred to as an “OS program”) for causing an OS (Operating System) of the image forming apparatus 1 to function and various applications (copy function, scanner function, facsimile transmission / reception function, and the like). A program (hereinafter, referred to as an “application program”) is stored. When the CPU 10 executes these programs, the OS 50 and the applications 61 to 63 are mounted on the image forming apparatus 1.

  Each of the applications 61 to 63 instructs the OS 50 to execute a task. That is, the task is requested. Here, the task refers to a process using hardware resources of the image forming apparatus 1 and constitutes a job. The job is generated by the applications 61 to 63, and includes a process related to the application, for example, a process of copying a document, a process of reading and converting a document into data, a process of reading a document and transmitting a facsimile. Means a process of forming an image according to the data. For example, the job of copying a document includes a task of reading an image from a document using the image reading unit 42, a task of performing image processing on the read image, and a task of forming an image on a medium using the image forming unit 43. Is decomposed into The OS 50 allocates the task requested by the application to any one of the plurality of cores. The cores 101 to 104 are recognized by the OS 50 as independent CPUs.

  When a request for a new task occurs in the application, the OS 50 determines where the core executes the task. Details are as follows. The OS 50 includes an acquisition unit 51, an acquisition unit 52, an acquisition unit 53, an acquisition unit 54, a storage unit 55, an assignment unit 56, an initialization unit 57, and a detection unit 58. The detecting means 58 detects that a new task has occurred. The obtaining unit 51 obtains assignment information. The allocation information indicates to which of the cores 101 to 104 the plurality of tasks are allocated. The acquisition unit 52 acquires attribute information. The attribute information indicates an association between a plurality of tasks. The association between tasks means that data is shared between tasks. For example, if the output data of one task is used as the input data of another task, the two tasks are said to be related. Alternatively, if two tasks output two different data using some common input data, the two tasks are said to be related. The obtaining unit 53 obtains priority information. The priority information indicates the priority of a plurality of tasks. The obtaining unit 54 obtains configuration information. The configuration information indicates the hardware configuration of the CPU 10. In this example, the allocation information, the attribute information, the priority information, and the configuration information are stored in the storage unit 55, and the obtaining units 51 to 54 obtain the respective information from the storage unit 55. The attribute information is generated by, for example, a compiler (an example of a compiling unit) that compiles a program for executing a task. The priority information and the configuration information are set in advance by the system, for example. When a new task occurs, the allocating unit 56 refers to at least a part of the information and determines a core to which the task is allocated (that is, allocates a new task to a certain core). In particular, when the task is related to image processing that is repeated in a certain unit (for example, a page or a band), when the image processing for one unit is completed, the initialization unit 57 sets the attribute information of the task assigned to the core. Initialize information about the completed image processing. Details of the information and the assignment method will be described later.

  Note that the functional configuration in FIG. 6 is an example, and a part of the functional configuration may be omitted, or other functions may be added. In the following description of the operation, the function of the initialization means 57 is omitted.

3. Operation 3-1. Operation Flow FIG. 7 is a flowchart illustrating an operation of the image forming apparatus 1. Here, processing for allocating tasks to cores is particularly described. 7 is started, for example, when the power of the image forming apparatus 1 is turned on. In the following description, software such as the OS 50 may be described as a subject of processing, which means that the CPU 10 executing the software executes processing in cooperation with other hardware resources. .

  In step S100, the OS 50 determines whether a new task has occurred. The new task is a task newly requested by the applications 61 to 63. When a new task occurs, a request is sent from the applications 61 to 63 to the OS 50, so that the OS 50 can detect the occurrence of the new task. The OS 50 identifies each task by, for example, assigning an identification number to each task. When the same type of task is repeatedly executed, for example, when task A is executed twice, different identification numbers are assigned to the first task A and the second task A, respectively. Be identified. When it is determined that a new task has not occurred (S100: NO), the OS 50 waits until a new task occurs. When it is determined that a new task has occurred (S100: YES), the OS 50 shifts the processing to Step S101.

  In step S101, the OS 50 determines whether there is an unassigned task. An unassigned task is a task for which the core that executes the task has not been determined. The OS 50 holds schedule information (an example of allocation information) describing a task execution schedule for each core, and determines whether there is any unallocated task with reference to the schedule information. When it is determined that there is an unassigned task (S101: YES), the OS 50 shifts the processing to Step S102. When it is determined that there is no unassigned task (S101: NO), the OS 50 shifts the processing to Step S100.

  In step S102, the OS 50 selects one task having the highest priority from unassigned tasks. The task selected here is hereinafter referred to as a “target task”. When there are a plurality of tasks having the highest priority, the OS 50 selects a target task from the plurality of tasks having the highest priority according to another criterion. The other criterion is, for example, a criterion for selecting an object to be processed first as a target task first.

  In step S103, the OS 50 determines whether the target task has a relationship with the assigned task. An assigned task is a task for which a core for executing the task has been determined and the execution schedule of the task is described in the schedule information. That is, an assigned task refers to a task that has not been executed yet. The executed task is deleted from the schedule information. The OS 50 holds attribute information indicating the relationship between the tasks, and determines whether the target task has a relationship with the assigned task by referring to the attribute information. When it is determined that the target task has a relationship with the assigned task (S103: YES), the OS 50 shifts the processing to Step S104. When it is determined that the target task has no relation with the assigned task (S103: NO), the OS 50 shifts the processing to Step S105.

In step S104, the OS 50 assigns the target task to a core group to which a task having a relationship with the target task is assigned. Hereinafter, the core to which the target task is assigned is referred to as “assignee”. When there are a plurality of cores that are candidates for the allocation, the OS 50 determines the allocation according to, for example, the following priority order.
(I) A core belonging to a core group with the smallest number of assigned tasks.
(Ii) The core with the least number of assigned tasks.
(Iii) The core whose identification number is earlier.
Alternatively, the OS 50 may determine the assignment destination according to the following priority order.
(I) A core belonging to a core group with the smallest number of assigned tasks.
(Ii) The core with the least number of assigned tasks.
(Iii) A core to which an associated task has been assigned.
(Iv) Cores with newer tasks assigned.
The OS 50 adds the relationship between the target task and the assignment destination to the schedule information. After finishing the process in step S104, the OS 50 shifts the process to step S101.

  In step S105, the OS 50 determines whether there is a task associated with the target task among the unassigned tasks. When it is determined that there is a task associated with the target task among the unassigned tasks (S105: YES), the OS 50 shifts the processing to Step S106. When it is determined that there is no task associated with the target task among the unallocated tasks (S105: NO), the OS 50 shifts the processing to Step S107.

In step S106, the OS 50 assigns a task to a core belonging to the core group having the least assigned tasks among the plurality of core groups. Which cores and which cores belong to the same core group is indicated by the configuration information. The OS 50 holds configuration information, and specifies cores belonging to the same core group with reference to the configuration information. In addition, the OS 50 refers to the schedule information to specify a core group having the least number of assigned tasks. When there are a plurality of core groups with the least assigned tasks, the OS 50 narrows the number of core groups that are candidates for allocation to one according to, for example, the following priority order.
(1) A core group in which the maximum number of tasks assigned to a single core is small.
(2) A core group including a core having an early identification number.
The OS 50 determines an allocation destination from the cores included in the specified core group according to the following priority order.
(I) A core with the least number of assigned tasks.
(Ii) The core whose identification number is earlier.
The OS 50 adds the relationship between the target task and the assignment destination to the schedule information. After ending the processing of step S106, the OS 50 shifts the processing to step S101.

  In step S107, the OS 50 assigns the target task to the core having the least assigned task among the cores 101 to 104. When there are a plurality of cores with the least assigned tasks, the OS 50 determines, for example, the core having the identification number earlier as the assignment destination. The OS 50 adds the relationship between the target task and the assignment destination to the schedule information. After ending the processing in step S107, the OS 50 shifts the processing to step S101.

  The OS 50 executes the task independently of the task assignment. The OS 50 refers to the schedule information, specifies a task to be executed by each core, and controls each core to execute the task. When the execution of the task is completed, the OS 50 deletes the execution schedule of the task from the schedule information.

3-2. Operation example 1
Hereinafter, the assignment processing of the new task according to the flow of FIG. 7 will be described in more detail using a specific example. In the operation examples 1 to 5, execution of a task is not considered for the sake of simplicity.

  FIG. 8 is a diagram illustrating an example of a task that has been assigned to a core. In this example, three task groups of task groups 801 to 803 have been assigned to the core. The task group 801 is a process in which task A and task B are connected in series. When data a is input to the task group 801, data c is finally output from the task B. The task group 801 is, for example, pipeline processing for performing image processing. The task group 802 is a process in which the task D and the task E are connected in parallel. Specifically, when data d is input to the task group 802, data e is output by the task C, and data f is output by the task D. The task group 802 is processing for referring to, for example, an LUT (Look Up Table). The task group 803 is a set of tasks that are not related to other tasks. The task group 803 includes a task E and a task F, which are independent of each other and do not share data. The task group 803 is processing related to an interface such as a network or a USB (Universal Serial Bus).

  FIG. 9 is a diagram exemplifying schedule information indicating task assignment in FIG. In the example of FIG. 9, the tasks assigned to each core are recorded together with information indicating the execution order. At this point, tasks A and E are assigned to the core 101, tasks B and F are assigned to the core 102, tasks C are assigned to the core 103, and tasks D are assigned to the core 104, respectively. In this figure, those described in higher layers are executed first.

  In the above situation, when a new task occurs, which core is assigned to the new task will be described. Prior to the description, the structure and attribute information of the new task will be described first.

FIG. 10 is a diagram illustrating a new task. For example, when a new job is generated by the application, the application activates task groups 804 to 806 to execute the job. The task group 804 is a process in which the task G and the task H are connected in series. When the data a is input to the task group 804, the data 1 is finally output from the task H. The task group 805 is a process in which the task I and the task J are connected in parallel. When data m is input to the task group 805, data n is output by task I and data o is output by task J. The task group 806 is a set of tasks that are not related to other task groups. In this example, the priorities of the tasks G to L are set as follows.
Task G: Priority 1 (highest)
Task H: Priority 1 (highest)
Task I: Priority 2
Task J: Priority 3
Task K: Priority 4
Task L: Priority 5

  FIG. 11 is a diagram illustrating attribute information of the task in FIG. As can be seen by comparing FIGS. 10 and 8, task G is associated with task A and task H, task H is task G, task I is task J, and task J is task I. I have.

  Let's move on to assigning tasks to cores. The OS 50 detects that the new task in FIG. 10 has occurred (Step S100). These new tasks are not assigned to the core at the time of detection. Therefore, the flow proceeds from step S101 to S102. The OS 50 selects a target task from the new tasks. Specifically, the OS 50 selects the one with the highest priority as the target task. Therefore, first, the task G is selected as a target task (step S102). The process proceeds to step S103. Looking at the attribute information on the task G, it is shown that the task G has a relationship with the assigned task A (S103: YES). Therefore, the process proceeds to step S104. The cores 101/102 to which task A has been allocated are candidates for the allocation destination. Since both the core 101 and the core 102 have the same number of assigned tasks, the target task is assigned to the core 101 whose identification number is earlier (step S104).

  Next, task H is selected as a target task (step S102). Looking at the attribute information about the task H, it is shown that the task H has a relationship with the task G (S103: YES). Therefore, the flow proceeds to step S104. The cores 101/102 to which the task G is assigned are candidates for the assignment destination. Since the number of tasks already assigned to the core 102 is smaller than that of the core 101, the target task is assigned to the core 102 (step S104).

  Next, task I is selected as a target task (step S102). Looking at the attribute information on the task I, it is shown that there is no relationship with the assigned tasks (tasks A to H) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information of the task I, it is shown that the task I has a relationship with the unassigned task J (S105: YES). Therefore, the flow proceeds to step S106. The cores 103/104 with few assigned tasks are candidates for the assignment destination. Since both the core 103 and the core 104 have the same number of assigned tasks, the target task is assigned to the core 103 having the earlier number (step S106).

  Next, task J is selected as a target task (step S102). Looking at the attribute information on the task J, it is shown that the task J has relevance to the task I (S103: YES). Therefore, the flow proceeds to step S104. The cores 103/104 to which the task I has been allocated are candidates for the allocation destination. Since the number of tasks already assigned to the core 104 is smaller than that of the core 103, the target task is assigned to the core 104 (step S104).

  Next, task K is selected as a target task (step S102). Looking at the attribute information of the task K, it is shown that the task K has no relationship with the assigned tasks (tasks A to J) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information of the task K, it is shown that the task K has no relationship with the unassigned task (task L) (S105: NO). Therefore, the flow proceeds to step S107. The cores 103 and 104 with the least number of tasks assigned at this time are candidates for assignment. The OS 50 assigns the target task to the core 103 whose number is earlier (Step S107).

  Next, the task L is selected as a target task (Step S102). Looking at the attribute information of the task L, it is shown that the task L has no relationship with the assigned tasks (tasks A to K) (S103: NO). Therefore, the flow proceeds to step S105. At this point, there are no unassigned tasks. Therefore, the target task has no relationship with the unassigned task (S105: NO). The flow proceeds to step S107. The OS 50 assigns the target task to the core 104 having the least assigned task at this time (Step S107).

  FIG. 12 is a diagram illustrating an example of the assignment result of the tasks G to L. As described above, according to the present embodiment, the tasks are equally allocated to the respective cores. Next, a description will be given of task assignment when a new task occurs from the state of FIG. First, the structure and attribute information of a new task will be described.

FIG. 13 is a diagram illustrating a further new task. Task group 807 and task group 808 are new tasks. The task group 807 includes a task O. Task O has no relationship with other tasks. The task group 808 includes a task M and a task N. Task M and task N are tasks that use common input data. In this example, the priorities of the tasks M to O are set as follows.
Task M: Priority 3
Task N: priority 2
Task O: Priority 1 (highest)

  FIG. 14 is a diagram illustrating attribute information of a task. It is shown that task M and task N are related to each other.

  Let's move on to assigning tasks to cores. The OS 50 detects that the new task in FIG. 13 has occurred (Step S100). These new tasks are not assigned to the core at the time of detection. Therefore, the flow proceeds from step S101 to S102. The OS 50 selects a target task from the new tasks. Specifically, the OS 50 selects the one with the highest priority as the target task. Therefore, first, the task O is selected as the target task (Step S102). The process proceeds to step S103. Looking at the attribute information on the task O, it is shown that the task O does not have a relationship with the assigned tasks (tasks A to L) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information on the task O, it is shown that the task O has no relationship with the unassigned tasks (task M and task N) (S105: NO). Therefore, the flow proceeds to step S107. At this point, the number of tasks already assigned to each core is the same, and thus the cores 101 to 104 are candidates for the assignment destination. The OS 50 assigns the target task to the core 101 having the earliest number (step S107).

  Next, the task M is selected as a target task (step S102). Looking at the attribute information of the task M, it is shown that the task M has no relationship with the assigned tasks (tasks A to L and O) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information of the task M, it is shown that the task M has a relationship with the unassigned task N (S105: YES). Therefore, the flow proceeds to step S106. Comparing the number of tasks assigned to the cores 101/102 and 103/104, the core 103/104 is a candidate for the assignment destination because the number of assigned tasks is smaller. Since both the core 103 and the core 104 have the same number of assigned tasks, the target task is assigned to the core 103 having the earlier number (step S106).

  Next, task N is selected as a target task (step S102). Looking at the attribute information on the task N, it is shown that the task N has a relationship with the task M (S103: YES). Therefore, the flow proceeds to step S104. The cores 103/104 to which the task M has been allocated are candidates for the allocation destination. Since the number of tasks already assigned to the core 104 is smaller than that of the core 103, the target task is assigned to the core 104 (step S104).

  FIG. 15 is a diagram illustrating an example of an assignment result of tasks MO. As described above, according to the present embodiment, the tasks are equally allocated to the respective cores.

3-3. Operation example 2
FIG. 16 is a diagram illustrating an assigned task according to the operation example 2. That is, FIG. 16 shows schedule information at the present time. In this example, tasks A to G are assigned to cores 101 to 104. Consider an example in which task H and task I newly occur in this situation.

  FIG. 17 shows the attribute information of task H and task I in this example. Task H has a relationship with task E and task I, and task I has a relationship with task H. There is no other relevance for the new task. Among the new tasks, the priority of the task H is higher than the priority of the task I.

  First, task H is selected as a target task (step S102). Looking at the attribute information on the task H, it is shown that the task H has a relationship with the assigned task E (S103: YES). Therefore, the flow proceeds to step S104. The cores 101/102 to which the task E is assigned are candidates for the assignment destination. Since the number of tasks already assigned to the cores 101 and 102 is the same, the target task is assigned to the core 101 whose identification number is earlier (step S104).

  FIG. 18 is a diagram showing schedule information at this point.

  Next, task I is selected as a target task (step S102). Looking at the attribute information on the task I, it is shown that the task I has a relationship with the assigned task H (S103: YES). Therefore, the flow proceeds to step S104. The cores 101/102 to which the task H is assigned are candidates for the assignment destination. Now, the core 102 has fewer tasks assigned than the core 101. Therefore, the target task is assigned to the core 102 (step S104).

  FIG. 19 is a diagram illustrating a task assignment result according to the operation example 2.

3-4. Operation example 3
Consider the same assigned task (FIG. 16) as in Operation Example 2. Tasks A to G are assigned to cores 101 to 104. Consider an example in which task H and task I newly occur in this situation.

  FIG. 20 shows attribute information of task H and task I in the operation example 3. Task H has a relationship with task I, and task I has a relationship with task H. There is no other relevance for the new task. Among the new tasks, the priority of the task H is higher than the priority of the task I.

  First, task H is selected as a target task (step S102). Looking at the attribute information of the task H, it is shown that the task H has no relationship with the assigned tasks (tasks A to G) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information about the task H, it is shown that the task H has a relationship with the unassigned task I (S105: YES). Therefore, the flow proceeds to step S106. Comparing the cores 101/102 and 103/104, there are fewer tasks assigned to the cores 103/104. Therefore, the core 103 / core 104 are candidates for the allocation destination. Since the number of tasks already assigned to the core 103 is smaller than that of the core 104, the target task is assigned to the core 103 (step S106).

  FIG. 21 is a diagram showing schedule information at this point.

  Next, task I is selected as a target task (step S102). Looking at the attribute information on the task I, it is shown that the task I has a relationship with the assigned task H (S103: YES). Therefore, the flow proceeds to step S104. The core 103/104 to which the core 103 to which the task H is allocated belongs is a candidate for the allocation destination. The number of tasks already assigned to the cores 103 and 104 is the same. Therefore, the target task is assigned to the core 103 having the earlier identification number (step S104).

  FIG. 22 is a diagram illustrating a task assignment result according to the third operation example.

3-5. Operation example 4
FIG. 23 is a diagram illustrating assigned tasks according to the operation example 4. That is, FIG. 23 shows schedule information at the present time. In this example, tasks A to G and J are assigned to cores 101 to 104. Consider an example in which task H and task I newly occur in this situation. The attribute information of task H and task I is the same as in operation example 3 (FIG. 20).

  First, task H is selected as a target task (step S102). Looking at the attribute information of the task H, it is shown that the task H has no relationship with the assigned tasks (tasks A to G and J) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information about the task H, it is shown that the task H has a relationship with the unassigned task I (S105: YES). Therefore, the flow proceeds to step S106. Comparing the cores 101/102 and the cores 103/104, the number of assigned tasks is the same. Comparing the maximum number of tasks assigned to the cores, there are two cores 101/102 and three cores 103/104. Therefore, the cores 101/102 are candidates for the allocation destination. Since the number of tasks already assigned to the core 101 and the core 102 is the same, the target task is assigned to the core 101 having the earlier identification number (step S106).

  FIG. 24 is a diagram showing schedule information at this point.

  Next, task I is selected as a target task (step S102). Looking at the attribute information on the task I, it is shown that the task I has a relationship with the assigned task H (S103: YES). Therefore, the flow proceeds to step S104. The cores 103/104 to which the core 101 to which the task H is assigned belong are candidates for the assignment destination. Now, the core 102 has fewer tasks assigned than the core 101. Therefore, the target task is assigned to the core 102 (step S104).

  FIG. 25 is a diagram illustrating a task assignment result according to the operation example 4. In comparison with the operation example 4 (FIG. 22), it can be seen that even if the attribute information of the new task is the same, the assignment destination changes according to the status of the task already assigned at that time.

3-6. Operation example 5
FIG. 26 is a diagram illustrating an assigned task according to the operation example 5. That is, FIG. 26 shows schedule information at the present time. In this example, tasks A to G and J are assigned to cores 101 to 104. Task G has occurred twice, and both have been assigned to the core 104. Consider an example in which task H and task I newly occur in this situation.

  FIG. 27 shows the attribute information of task H and task I in this example. Neither task H nor task I has an association with another task. Among the new tasks, the priority of the task H is higher than the priority of the task I.

  First, task H is selected as a target task (step S102). Looking at the attribute information of the task H, it is shown that the task H has no relationship with the assigned tasks (tasks A to G and J) (S103: NO). Therefore, the flow proceeds to step S105. Looking at the attribute information on the task H, it is shown that the task H has no relationship with the unassigned task (task I) (S105: NO). Therefore, the flow proceeds to step S107. At this point, the number of tasks assigned to the core 103 is the smallest. Therefore, the target task is assigned to the core 103 (step S107).

  FIG. 28 is a diagram showing schedule information at this point.

  Next, task I is selected as a target task (step S102). Looking at the attribute information of the task I, it is shown that there is no relationship with the assigned tasks (tasks A to G, J, and H) (S103: NO). Therefore, the flow proceeds to step S105. There are no unassigned tasks at this time. That is, the target task has no relationship with the unassigned task (S105: NO). Therefore, the flow proceeds to step S107. At this time, the number of tasks assigned to the cores 101 to 103 is the smallest. Therefore, the target task is assigned to the core 101 having the earliest identification number (step S107).

  FIG. 29 is a diagram illustrating a task assignment result according to the fifth operation example.

3-7. Operation example 6
FIG. 30 is a diagram illustrating a task according to the operation example 6. The tasks according to the operation example 6 include tasks A to G. Tasks A to E constitute a series of pipeline processing. Tasks F and G are independent of each other. In this example, tasks AE occur repeatedly.

  FIG. 31 is a diagram illustrating task attribute information according to the operation example 6. Task A is associated with task B, task B is associated with tasks A and C, task C is associated with tasks B and D, task D is associated with tasks C and E, and task E is associated with task D. Task F and task G have no relationship with other tasks. The priorities are tasks A, B, C, D, E, F, and G in descending order.

  32 to 42 are diagrams illustrating task assignment according to the operation example 6. FIG. Here, the occurrence, assignment, and execution of tasks are shown in chronological order. The vertical axis in the figure represents the passage of time in units of the time required to execute the task. Here, for simplicity of description, an example in which the time required to execute each task is equal will be used. Here, subscripts are added after tasks to distinguish repetitive tasks of the same type. For example, “A1” indicates task A that has occurred for the first time. This figure includes columns for task occurrence, task assignment, and task assignment (comparative example). The task occurrence column describes a task that has newly occurred at that time. For example, at time t1, tasks A1, B1, C1, D1, E1, and F1 occur. The task assignment column describes the tasks to be executed between that time and the next time. For example, tasks A1, B1, and F1 are executed between time t1 and time t2. In the column of task assignment (comparative example), a task execution schedule in the comparative example is described. In the comparative example, the assignment destination is determined in advance for each task. In the following, the task assignment of the comparative example is not specifically described in detail.

  At time t1, tasks A1, B1, C1, D1, E1, and F1 occur. Before time t1, no core has an assigned task. Tasks A1, D1, and E1 are assigned to the core 101, tasks B1 and C1 to the core 102, and task F1 to the core 103, respectively (FIG. 32). At the time t2, the execution of the task on the first line has been completed. No task occurs at time t2.

  At time t3, tasks A2, B2, C2, D2, E2, and G1 occur. At this point, the task E1 has been assigned to the core 101. Since the tasks assigned to the cores 103/104 are zero, first, the task A2 is assigned to the core 103. When the assignment of all tasks is completed, the task E1 is assigned to the core 101, the task G2 is assigned to the core 102, the tasks A2, D2, and E2 are assigned to the core 103, and the tasks B2 and C2 are assigned to the core 104 (FIG. 33). ). Tasks that have been executed at time t3 are indicated by hatching. The same applies to the following drawings.

  At time t4, a task F2 occurs. At this point, the tasks D2 and E2 have been assigned to the core 103, and the task C2 has been assigned to the core 104. Task F2 is allocated to core 101 (FIG. 34).

  At time t5, tasks A3, B3, C3, D3, and E3 occur. At this point, the task E2 has been assigned to the core 103. Tasks A3, D3, and E3 are assigned to the core 101, and tasks B3 and C3 are assigned to the core 102 (FIG. 35). No task occurs at time t6.

  At time t7, tasks A4, B4, C4, D4, E4, and F3 occur. At this point, the task E3 has been assigned to the core 101. A task F3 is assigned to the core 102, tasks A4, C4, and E4 are assigned to the core 103, and tasks B4 and C4 are assigned to the core 104 (FIG. 36).

  At time t8, a task G2 occurs. At this point, the tasks C4 and E4 have been assigned to the core 103, and the task C4 has been assigned to the core 104. The task G2 is allocated to the core 101 (FIG. 37).

  At time t9, tasks A5, B5, C5, D5, E5, and F4 occur. At this point, the task E4 has been assigned to the core 103. Tasks A5, D5, and E5 are assigned to the core 101, tasks B5 and C5 to the core 102, and task F4 to the core 104 (FIG. 38). No task occurs at time t10.

  At time t11, tasks A6, B6, C6, D6, and E6 occur. At this point, the task E5 has been assigned to the core 101. Tasks A6, D6, and E6 are assigned to the core 103, and tasks B6 and C6 are assigned to the core 104 (FIG. 39).

  At time t12, tasks F5 and G3 occur. At this point, tasks D6 and E6 have been allocated to the core 103, and task C6 has been allocated to the core 104. The task F5 is assigned to the core 101 and the task G3 is assigned to the core 102 (FIG. 40).

  At time t13, tasks A7, B7, C7, D7, and E7 occur. At this point, the task E6 has been assigned to the core 103. Tasks A7, D7, and E7 are assigned to the core 101, and tasks B7 and C7 are assigned to the core 102 (FIG. 41). No task occurs at time t14.

  At time t15, tasks A8, B8, C8, D8, E8, and F6 occur. At this point, the task E7 has been assigned to the core 101. The task F6 is assigned to the core 102, the tasks A8, D8, and E8 are assigned to the core 103, and the tasks B8 and C8 are assigned to the core 104 (FIG. 42).

  At time t16, a task G4 occurs. At this point, the tasks D8 and E8 have been allocated to the core 103, and the task C8 has been allocated to the core 104. The task G4 is assigned to the core 101 (FIG. 43).

  Execution of all the tasks assigned as described above is completed at time t18. On the other hand, in the comparative example, the execution of the assigned task is completed at time t21. Thus, according to the present embodiment, tasks are more efficiently allocated to cores. Thereby, the performance of the CPU 10 is improved.

4. Modifications The present invention is not limited to the above-described embodiment, and various modifications can be made. Hereinafter, some modified examples will be described. Two or more of the following modifications may be used in combination.

4-1. Modification 1
FIG. 43 is a flowchart illustrating a process of assigning a new task according to the first modification. The process according to the first modification is different from the flow of FIG. 7 in that the algorithm of task assignment is changed depending on the combination of the type of task relevance and the hardware configuration of the CPU (the configuration of the cache memory). Hereinafter, this processing will be described in comparison with the flow of FIG.

In step S200, the OS 50 determines whether a new task has occurred. When it is determined that a new task has not occurred (S200: NO), the OS 50 waits until a new task occurs. When it is determined that a new task has occurred (S200: YES), the OS 50 shifts the processing to Step S201.
In step S201, the OS 50 determines whether there is an unassigned task. When it is determined that there is an unassigned task (S201: YES), the OS 50 shifts the processing to Step S202. When it is determined that there is no unassigned task (S201: NO), the OS 50 shifts the processing to Step S200. In step S202, the OS 50 selects one task having the highest priority from unassigned tasks as a target task. The processing of steps S200 to S202 corresponds to the processing of steps S100 to S102.

  In step S203, the OS 50 reads the assignment control table. The assignment control table is a table in which information for determining a task assignment algorithm is recorded. The task allocation algorithm is determined according to the relevance between tasks and the cache memory structure of the CPU.

  First, the classification of task relevance will be described. In this example, the relevance of the tasks is classified into three categories (categories α to γ). The category α is a classification corresponding to relevance in so-called pipeline processing. This corresponds to, for example, a structure like the task group 801 (FIG. 8). For example, in image processing performed by a multifunction peripheral, the data size is large, so that a large data transfer latency between tasks has a significant adverse effect on performance. Therefore, a high cache hit rate is expected in this classification process.

  The category β is a classification corresponding to the relevance in the processing for referring to the LUT, and corresponds to, for example, a structure such as the task group 802 (FIG. 8). This process is used for a process of replacing data with reference to a certain data table. For example, in the case of color space conversion performed by a multifunction peripheral, the data size of the referenced LUT is large, and the referenced data differs depending on the image. Therefore, it is not expected that the hit rate of the cache is high as compared with the category α.

  The category γ is relevance in processing independent of other tasks, and corresponds to, for example, a structure such as a task group 803 (FIG. 8). This processing is used, for example, for processing of a detection system and interface processing. In these processes, it is hardly expected that the cache hit rate will increase, and it is not necessary.

  In consideration of the above circumstances, generally, the strength of the relationship between tasks is α> β> γ. Therefore, in this example, the algorithm of task assignment is changed according to the strength of the association. For example, when compiling software, the relevance of each task to other tasks can be extracted as information including the above classification.

  FIG. 44 is a diagram illustrating a relationship between tasks including a classification. In this example, for example, it is shown that task A has a relationship between task B and category α. It is also shown that task J has a relationship between task C and category α, and has a relationship between task I and category β.

  FIG. 45 is a diagram illustrating the configuration of the cache memory of the CPU. The configuration of the cache memory is classified into, for example, categories W to Z. Category W corresponds to a structure in which the L2 cache is shared by two cores. Category X corresponds to a structure in which the L2 cache is shared by four cores. Category Y corresponds to a structure in which the L2 cache is shared by two cores and the L3 cache is shared by four cores. Category Z corresponds to a structure in which the L2 cache is shared by four cores and the L3 cache is shared by four cores.

  FIG. 46 is a diagram illustrating an assignment control table. In the assignment control table, information for specifying a task assignment algorithm is recorded for each cache memory structure of the CPU and each category of task relevance. In this example, the first algorithm and the second algorithm are used as the algorithm for task assignment. The first algorithm is an algorithm described in the embodiment, that is, an algorithm that considers the relevance to the assigned task. The second algorithm is an algorithm different from the first algorithm. It can be said that the classification of the categories α to γ indicates the weight of relevance between tasks in the sense that it affects the applied allocation algorithm.

  For example, since the CPU 10 (FIG. 5) has the structure of the category W, the task is assigned by the first algorithm for the task having the category α, and the task is assigned by the first algorithm for the task having the category β. Each task is assigned according to the second algorithm.

  FIG. 43 is referred to again. In step S204, the OS 50 determines whether or not there is a task that has a relationship to apply the first algorithm with the target task among the assigned tasks. When it is determined that there is a target task and a related task to which the first algorithm is applied among the allocated tasks (S204: YES), the OS 50 shifts the processing to step S205. When it is determined that there is no task that has a relationship to apply the first algorithm with the target task among the assigned tasks (S204: NO), the OS 50 shifts the processing to step S206.

  In step S205, the OS 50 assigns the target task to a core group to which a task having a relationship to apply the first algorithm to the target task is assigned. The processing in step S205 corresponds to the processing in step S104. After finishing the processing in step S205, the OS 50 shifts the processing to step S201.

  In step S206, the OS 50 determines whether or not there is a task that has a relationship to which the first algorithm is applied with the target task among unassigned tasks. When it is determined that there is a task that has a relationship to apply the first algorithm with the target task among the unallocated tasks (S206: YES), the OS 50 shifts the processing to Step S207. When it is determined that there is no task that has a relationship to apply the first algorithm to the target task among the unallocated tasks (S206: NO), the OS 50 shifts the processing to Step S208.

  In step S207, the OS 50 assigns a task to a core belonging to the core group having the least assigned task among the plurality of core groups. The processing in step S207 corresponds to the processing in step S106. After finishing the process in step S106, the OS 50 shifts the processing to step S201.

  In step S208, the OS 50 assigns the target task to the core having the least assigned task among the cores 101 to 104. The processing in step S208 corresponds to the processing in step S107. After finishing the process in step S208, the OS 50 shifts the process to step S201.

  In the first modification, task assignment in consideration of task relevance is performed only for a task expected to be highly effective in relation to the cache memory structure of the CPU.

4-2. Modification 2
FIG. 47 is a flowchart illustrating a process of assigning a new task according to the second modification. The process according to the second modification is different from the flow in FIG. 7 in that the size of data shared between tasks is considered. Hereinafter, this processing will be described in comparison with the flow of FIG.

In step S300, the OS 50 determines whether a new task has occurred. When it is determined that a new task has not occurred (S300: NO), the OS 50 waits until a new task occurs. When it is determined that a new task has occurred (S300: YES), the OS 50 shifts the processing to Step S301.
In step S301, the OS 50 determines whether there is an unassigned task. When it is determined that there is an unassigned task (S301: YES), the OS 50 shifts the processing to Step S302. When it is determined that there is no unassigned task (S301: NO), the OS 50 shifts the processing to Step S300. In step S302, the OS 50 selects one task having the highest priority as a target task from unassigned tasks. The processing of steps S300 to S302 corresponds to the processing of steps S100 to S102.

  In step S303, the OS 50 determines whether or not there is a task related to the target task among the assigned tasks. If it is determined that there is a task associated with the target task among the assigned tasks (S303: YES), the OS 50 shifts the processing to Step S304. If it is determined that there is no task associated with the target task among the assigned tasks (S304: NO), the OS 50 shifts the processing to Step S307. The processing in step S303 corresponds to the processing in step S103.

  In step S304, the OS 50 determines whether the size of the data shared by the target task and the task related to the target task is larger than the size of the L1 cache. The size of data shared between tasks is indicated by attribute information. The size of the L1 cache is indicated by the configuration information. The OS 50 makes the determination with reference to these pieces of information. When it is determined that the size of the shared data is larger than the size of the L1 cache (S304: YES), the OS 50 shifts the processing to Step S305. When it is determined that the size of the shared data is equal to or smaller than the size of the L1 cache (S304: NO), the OS 50 shifts the processing to Step S306.

  In step S305, the OS 50 assigns the target task to a group of tasks to which tasks having a relationship with the target task have been assigned. The processing in step S305 corresponds to the processing in step S104. After finishing the process in step S305, the OS 50 shifts the processing to step S301.

  In step S306, the OS 50 assigns the target task to a task to which a task related to the target task has been assigned. After ending the processing in step S306, the OS 50 shifts the processing to step S301.

  In step S307, the OS 50 determines whether there is a task related to the target task among the unassigned tasks. When it is determined that there is a task associated with the target task among the unallocated tasks (S307: YES), the OS 50 shifts the processing to Step S308. When it is determined that there is no task having a relationship with the target task among the unallocated tasks (S307: NO), the OS 50 shifts the processing to Step S310. The process in step S307 corresponds to the process in step S105.

  In step S308, the OS 50 determines whether the size of the data shared by the target task and the task related to the target task is larger than the size of the L1 cache. When it is determined that the size of the shared data is larger than the size of the L1 cache (S308: YES), the OS 50 shifts the processing to Step S309. When it is determined that the size of the shared data is equal to or smaller than the size of the L1 cache (S308: NO), the OS 50 shifts the processing to Step S310.

  In step S309, the OS 50 assigns a task to a core belonging to the core group having the least assigned task among the plurality of core groups. The processing in step S309 corresponds to the processing in step S106. After finishing the process in step S309, the OS 50 moves the process to step S301.

  In step S310, the OS 50 assigns the target task to the core having the least assigned task among the cores 101 to 104. The processing in step S310 corresponds to the processing in step S107. After finishing the process in step S310, the OS 50 shifts the processing to step S301.

  In the second modification, when the size of data shared between tasks is equal to or smaller than the size of the L1 cache, these tasks are assigned to the same core.

4-3. Modification 3
In the first modification, the tasks may be allocated according to the type of association between the tasks without considering the cache memory structure of the CPU.

4-4. Modification 4
FIG. 48 is a diagram illustrating attribute information according to the fourth modification. In this example, the relevance of input data and the relevance of output data are distinguished in the attribute information. This figure shows attribute information in the task groups 801 to 803 in FIG. Since the output data of task A is the input data of task B, task B is recorded in the “output” section of task A. Similarly, task A is recorded in the “input” section of task B, and task C is recorded in the “output” section.

  By using such attribute information, the association between tasks is defined in more detail. In this case, the flow of FIG. 7 is modified as follows, for example. In step S103, the OS 50 determines whether there is a task having a relationship between the target task and the input data among the assigned tasks. When the task B in FIG. 48 is the target task, it is determined that the target task has a relationship between the assigned task A and the input data. When the task A is the target task, it is determined that there is no assigned task having a relationship between the target task and the input data even if the assigned task includes the task B. When it is determined that there is a task having a relationship between the target task and the input data among the assigned tasks (S103: YES), the OS 50 shifts the processing to Step S104. When it is determined that there is no task having a relationship between the target task and the input data among the assigned tasks (S103: NO), the OS 50 shifts the processing to step S105.

  In step S105, the OS 50 determines whether there is a task having a relationship between the target task and the output data among the unassigned tasks. When the task B in FIG. 48 is the target task, it is determined that there is no task having a relationship between the target task and the output data even if the task A is included in the unassigned task. If the task A is the target task, it is determined that the unassigned task B has a relationship between the target task and the output data.

4-5. Modification 5
The attribute information referred to when determining the relevance between the target task and the assigned task in step S103 and the like is not limited to the information stored independently in the storage unit 55. "Independently stored" means stored separately from other information such as schedule information. The schedule information, that is, the assignment information, may include attribute information of the assigned task. The details are as follows.

  When a task of a type not recorded in the schedule information is newly recorded in the schedule information, the OS 50 refers to the attribute information independently stored in the storage unit 55, and stores the attribute information of the target task into the target task. And the relationship with the allocation destination core and the schedule information.

  FIG. 49 is a diagram illustrating schedule information according to the fifth modification. In this example, a task A is assigned to the core 101, tasks B and C are assigned to the core 102, a task D is assigned to the core 103, and a task E is assigned to the core 104. The schedule information includes attribute information of each task in addition to the correspondence between the core and the task. For example, the attribute information of task E is recorded as having relevance to tasks D and F. In this example, the relevance of input data and the relevance of output data are not distinguished.

  Consider the assignment of task F in the state of FIG. The OS 50 refers to the schedule information. Then, it is shown that the task F has a relationship with the assigned task E. Therefore, the OS 50 determines that the target task has a relationship with the assigned task (S103: YES). In the embodiment, in order to make the determination in step S103, it is necessary to access not only the schedule information but also the attribute information that is separate from the schedule information. On the other hand, in the fifth modification, the OS 50 makes the determination only by accessing the schedule information.

4-6. Modification 6
FIG. 50 is a diagram illustrating schedule information according to the sixth modification. As described in the fifth modification, the schedule information also includes attribute information of the assigned task. There is no distinction between input data relevance and output data relevance. Here, the details of the function of the initialization means 57 will be described.

  Now, consider an example in which tasks A2 to E2 occur before tasks are executed in a state where tasks A1 to F1 are allocated as shown in FIG. First, the task A2 is a target task. The OS 50 refers to the schedule information and determines whether there is a task related to the target task among the assigned tasks. In the schedule information, the attribute information of the task B1 is recorded as having an association with the task A. Therefore, the OS 50 determines that there is a task (task B1) related to the target task (task A2) among the assigned tasks (S103: YES). Therefore, task A2 is assigned to core 102, and tasks B2 to E2 are also assigned to cores 101/102.

  However, for example, when the tasks A1 to E1 are related to the image processing of the first page and the tasks A2 to E2 are related to the image processing of the second page, there is no data to be shared. From the viewpoint of improvement, it is meaningless to assign the tasks A1 to E1 and the tasks A2 to E2 to the same core group. However, if it is attempted to assign the tasks A2 to E2 with reference to the schedule information in FIG. 50, when determining the assignment of the task A2, the relevance between the tasks A and B is dragged, and the task A2 is It is assigned to the assigned core group. This causes a bias in task assignment.

  In the sixth modification, the OS 50 first copies the attribute information included in the schedule information to a storage area on the main storage device 30 when the target task becomes a task of a new page. In this example, the task includes information for specifying a page to be processed, and the OS 50 refers to this information to determine that the target task has become a task of a new page.

  When the attribute information of the assigned task is copied, the OS 50 deletes, that is, initializes, of the attribute information recorded in the schedule information, the one whose deletion flag indicates “delete”. In the attribute information of the second task (task B in this example) of the series of pipeline processing, the deletion flag of the information indicating the relevance to the task (task A in this example) sharing the input data is “deletion”. Is shown. The erasure flags of the other attribute information do not indicate “delete”.

  FIG. 51 is a diagram illustrating schedule information in which part of the attribute information has been deleted. After erasing the attribute information, the OS 50 proceeds to the determination in step S103. Here, the attribute information of the assigned task does not include information indicating the relevance to task A (S103: NO). Therefore, the process proceeds to step S105. When determining the association with the unassigned task, the OS 50 refers to the schedule information. Alternatively, the OS 50 may refer to the copied attribute information. In this example, since the target task is determined to be related to the unallocated task (S105: YES), the OS 50 allocates the target task to the task group 103/104 having the least allocated tasks in step S106. . The OS 50 writes, in the schedule information, the association information included in the copied attribute information, in addition to the correspondence between the target task and the assignment destination. According to this example, the above-described problem is solved, and assignment with less bias is performed.

4-7. Other Modifications The configuration of the CPU 10 is not limited to the configuration illustrated in FIG. The number of cores and the hierarchical structure of the cache memory are merely examples. The CPU 10 may include at least two cores sharing the first cache memory and at least one core using the first cache memory and another second cache memory. The first cache memory may be shared by three or more cores. Further, the CPU 10 may have an L3 cache below the L2 cache.

  In addition, the CPU 10 is not limited to a physical chip in which a plurality of cores and a cache memory are mounted. The present invention may be applied to an information processing apparatus in which one cache memory is shared by a plurality of CPU chips.

  Further, the “plural cores” in the embodiments are not limited to a plurality of physically different cores. One physical core may be used as a plurality of cores logically (pseudo) in a time sharing manner.

  The information processing apparatus according to the present invention is not limited to the image forming apparatus 1 illustrated in FIG. The information processing device may be any device as long as a plurality of processes are executed in parallel using the CPU 10. For example, the information processing device may be a personal computer, a smartphone, or a tablet terminal.

  The software configuration of the information processing device is not limited to that illustrated in FIG. The sharing of functions by the OS and the application is merely an example. The information processing device only needs to have a software component that generates a process and a software component that determines a core that executes the generated process.

DESCRIPTION OF SYMBOLS 1 ... Image forming apparatus, 10 ... CPU, 20 ... Memory controller, 30 ... Main storage device, 40 ... IO controller, 41 ... Auxiliary storage device, 42 ... Image reading unit, 43 ... Image forming unit, 44 ... Communication unit, 50 ... OS, 51 acquisition means, 52 acquisition means, 53 acquisition means, 54 acquisition means, 55 storage means, 56 assignment means, 57 initialization means, 58 detection means, 61 to 63 applications, 90 CPU, 101-104 core, 111-114 cache memory (L1), 121-122 cache memory (L2), 901-904 core, 911-914 cache memory (L1), 921-922 Cache memory (L2)

Claims (8)

Control means having a plurality of cores;
First acquisition means for acquiring assignment information indicating to which core a plurality of tasks are respectively assigned to the plurality of cores;
A second acquisition unit for acquiring attribute information indicating a relationship between a plurality of tasks;
When a new task occurs, the task related to the new task among the plurality of cores is referred to by referring to the assignment information acquired by the first acquisition means and the attribute information acquired by the second acquisition means. Assigning means for assigning the new task to the assigned core;
Has,
The attribute information, as the information indicating the association, includes information indicating commonality of input data or output data in the plurality of tasks,
In the attribute information, the commonality of the input data and the commonality of the output data are distinguished from each other. Control means having a plurality of cores;
First acquisition means for acquiring assignment information indicating to which core a plurality of tasks are respectively assigned to the plurality of cores;
A second acquisition unit for acquiring attribute information indicating a relationship between a plurality of tasks;
When a new task occurs, the task related to the new task among the plurality of cores is referred to by referring to the assignment information acquired by the first acquisition means and the attribute information acquired by the second acquisition means. Assigning means for assigning the new task to the assigned core;
Has,
The information processing device, wherein the attribute information includes information indicating a weight of the association. Control means having a plurality of cores;
First acquisition means for acquiring assignment information indicating to which core a plurality of tasks are respectively assigned to the plurality of cores;
A second acquisition unit for acquiring attribute information indicating a relationship between a plurality of tasks;
When a new task occurs, the task related to the new task among the plurality of cores is referred to by referring to the assignment information acquired by the first acquisition means and the attribute information acquired by the second acquisition means. Assigning means for assigning the new task to the assigned core;
Has,
The control means has a cache memory shared by the plurality of cores,
The information processing device, wherein the attribute information includes a usage amount of the cache memory in each of the plurality of tasks. Control means having a plurality of cores;
First acquisition means for acquiring assignment information indicating to which core a plurality of tasks are respectively assigned to the plurality of cores;
A second acquisition unit for acquiring attribute information indicating a relationship between a plurality of tasks;
When a new task occurs, the task related to the new task among the plurality of cores is referred to by referring to the assignment information acquired by the first acquisition means and the attribute information acquired by the second acquisition means. Assigning means for assigning the new task to the assigned core;
A fourth obtaining means for obtaining configuration information showing a hardware configuration of the control means,
The information processing apparatus, wherein the assigning unit assigns the new task by referring to the configuration information acquired by the fourth acquiring unit, in addition to the assignment information and the attribute information. Control means having a plurality of cores;
First acquisition means for acquiring assignment information indicating to which core a plurality of tasks are respectively assigned to the plurality of cores;
A second acquisition unit for acquiring attribute information indicating a relationship between a plurality of tasks;
When a new task occurs, the task related to the new task among the plurality of cores is referred to by referring to the assignment information acquired by the first acquisition means and the attribute information acquired by the second acquisition means. Assigning means for assigning the new task to the assigned core;
Has,
The plurality of tasks include image processing repeated in a certain unit,
An information processing apparatus, comprising: an initialization unit configured to initialize information regarding the completed image processing among the attribute information regarding the tasks allocated to the plurality of cores when determining the assignment of the task regarding the image processing for the new unit. . Compiling means for compiling program code for executing the plurality of tasks,
The compile means, when compiling a program code for executing one of the plurality of tasks, generates the attribute information of the one task. 6. An information processing device according to claim 1. A third obtaining unit configured to obtain priority information indicating a priority of the plurality of tasks,
The assignment unit selects a task to be assigned among tasks that have not been assigned to the plurality of cores, according to the priority information acquired by the third acquisition unit. The information processing device according to any one of claims 1 to 6. An information processing apparatus according to any one of claims 1 to 7,
And an image forming unit that forms an image in accordance with data output by a task assigned to the plurality of cores.

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