JP6625904B2 - Filter device and inverter device - Google Patents

Description

  Embodiments described herein relate generally to a filter device and an inverter device.

  2. Description of the Related Art Conventionally, a power conversion device represented by an inverter performs power conversion by a switching operation of a semiconductor switching element. When performing power conversion, a common mode voltage is generated. The common mode voltage causes a leakage current (high-frequency noise) flowing to the ground via the stray capacitance of the motor or the like. As a measure against the leakage current, a method of providing a filter circuit has been proposed.

JP 2005-204438 A

  However, in the related art, there is a problem that filter characteristics are deteriorated due to the influence of a parasitic component generated in the filter circuit. In order to solve such a problem, it is necessary to sparsely wind the winding using a core having a large sectional area and a long effective magnetic path length. However, such a configuration is not practical because it causes an increase in the size of the filter.

A filter device according to an embodiment includes a first multilayer substrate, a second multilayer substrate, and an iron core. The first multilayer substrate is a multilayer substrate provided with a first opening, the first multilayer substrate connecting a first input / output terminal and a first connection terminal, and having a spiral shape surrounding the first opening. A first layer provided with a first wiring pattern representing one winding, a second connection terminal connected to the first connection terminal, and a second input / output terminal are connected, and current is A second wiring pattern provided with a second winding pattern that represents a spiral second winding that surrounds the first opening and generates a magnetic field in the same direction as the magnetic field generated in the first winding in a flowing state; And a conductive third layer provided between the first layer and the second layer and connectable to an external current path. The second multilayer substrate is a multilayer substrate provided with a second opening, and connects the third input / output terminal to the third connection terminal and surrounds the second opening in a spiral shape. A fourth layer provided with a third wiring pattern representing a third winding, a fourth connection terminal connected to the third connection terminal, and a fourth input / output terminal are connected, and a current is A fifth wiring pattern provided with a fourth wiring pattern representing a spiral fourth winding surrounding the second opening, which generates a magnetic field in the same direction as the magnetic field generated in the third winding in a flowing state. And a conductive sixth layer provided between the fourth layer and the fifth layer and connectable to an external current path. Iron core, a first leg for inserting the first opening及 beauty second opening, a first winding, a second winding, a third winding, a fourth winding , A second leg provided in parallel with the first leg across a part of the first leg, a first winding and a second winding sandwiched between the first leg and the second leg. , A third winding, a fourth winding, and a first winding, a second winding, a third winding, and a fourth winding. A third leg provided in parallel with the first leg and the second leg across another part of the winding of the first leg, one end of the first leg, the second leg, and the third leg And a second yoke portion connecting the other ends of the first leg, the second leg, and the third leg.

FIG. 1 is a diagram illustrating a configuration example of the power conversion system according to the first embodiment. FIG. 2 is a diagram illustrating an appearance of the common mode choke coil according to the first embodiment. FIG. 3 is an exploded view illustrating the common mode choke coil of the first embodiment. FIG. 4 is a top view of the common mode choke coil according to the first embodiment. FIG. 5 is a diagram showing a cross-sectional view of the common mode choke coil before connecting the first fixing member and the second fixing member in the first embodiment. FIG. 6 is a diagram illustrating a wiring pattern of the first layer of the first multilayer substrate of the first embodiment. FIG. 7 is a diagram illustrating a wiring pattern of the second layer of the first multilayer substrate of the first embodiment. FIG. 8 is a diagram showing a cross-sectional view of the common mode choke coil before connecting the first fixing member and the second fixing member in the first embodiment. FIG. 9 is a side view of the common mode choke coil according to the first embodiment. FIG. 10 is a diagram illustrating a relationship between the common mode choke coil and the low impedance layer connected to the bypass path. FIG. 11 is a diagram illustrating stray capacitance generated in the common mode choke coil according to the first embodiment. FIG. 12 is a diagram illustrating the stray capacitance. FIG. 13 is a diagram exemplifying an appearance of the common mode choke coil according to the second embodiment before connecting the first fixing member and the second fixing member. FIG. 14 is a diagram showing a cross-sectional view of a common mode choke coil before connecting a first iron core and a second iron core in the second embodiment. FIG. 15 is a diagram showing the flow of magnetic flux when current flows in the same direction on the primary side and the secondary side of the common mode choke coil of the second embodiment. FIG. 16 is a diagram showing the flow of magnetic flux when currents flow in different directions on the primary side and the secondary side of the common mode choke coil of the second embodiment.

  Next, an embodiment of a power conversion system including an inverter device provided with a filter device will be described with reference to the drawings. In the present embodiment, an EMI filter including a common mode choke coil will be described as a filter device, but another filter device may be used. In this embodiment, a PCS (Power Conditioning System) is described as an inverter device, but another inverter device may be used.

(1st Embodiment)
FIG. 1 is a diagram illustrating a configuration example of a power conversion system according to the present embodiment. As shown in FIG. 1, the power conversion system includes a photovoltaic power generator 150, a PCS (Power Conditioning System) 100, and a three-phase system linked load 180.

  The photovoltaic power generator 150 has a stray capacitance 152 to the ground 190 in addition to functioning as an input power supply 151 which is a direct current.

  The three-phase system-linked load 180 is assumed to be a household or industrial commercial power supply, but may be any load.

  The PCS (Power Conditioning System) 100 includes an EMI filter 110, a three-phase inverter 120, and a radiation fin. The PCS 100 converts the DC power supplied from the photovoltaic power generator 150 into three-phase AC power, and enables output to the three-phase grid-linked load 180.

  The PCS 100 includes connection terminals 131_1, 131_2, and 131_3 for connecting to the three-phase system linking load 180.

  The PCS 100 includes connection terminals 132 and 133 for connecting to the photovoltaic power generator 150.

  The three-phase inverter 120 can convert DC power and three-phase AC power.

  The radiation fins 130 are fins for cooling the three-phase inverter 120.

  By the way, in an inverter for system linkage, it is required that noise to the commercial power supply side does not exceed a certain regulation value. For this reason, in the example shown in FIG. 1, it is necessary to prevent noise to the three-phase system link load 180 from exceeding a certain regulation value. If noise leaks to the three-phase system linking load 180, the noise may leak to the ground 190 through the stray capacitance from the three-phase system linking load 180 to the ground 190. Therefore, in the present embodiment, the EMI filter 110 is provided.

  The EMI filter 110 includes a common mode choke coil 111, a three-phase bypass capacitor 112, and a normal mode reactor 113.

  The three-phase bypass capacitor 112 is provided so as to be branched from each line that connects the three-phase inverter 120 and the terminals 131_1, 131_2, and 131_3 that can be connected to the three-phase system linking load 180, so as to be in series with the reactor. ing.

  The bypass path 145 is a branch wiring from a connection point 140 of each line that connects the three-phase inverter 120 and the terminals 131_1, 131_2, and 131_3 that can be connected to the three-phase system-linked load 180, and includes three three-phase inverters. A neutral point to which the bypass capacitor 112 is connected and a connection point 141 on the DC side of the three-phase inverter 120 are connected. Further, the bypass path 145 is connected to two of the six terminals (not shown) of the common mode choke coil 111. Such a bypass 145 functions as a noise current bypass.

  Since the noise current bypass path includes the three-phase bypass capacitor 112 and the like, the noise current bypass path acts as a lower impedance path than the path via the outer ground 190. This results in a larger current passing through the inner bypass path than through the outer ground 190.

  The normal mode reactor 113 is provided on the three-phase AC side of the three-phase inverter 120 for each line that connects the three-phase inverter 120 and the terminals 131_1, 131_2, and 131_3 that can be connected to the three-phase system linked load 180. I have.

  The common mode choke coil 111 is provided between connection terminals 132 and 133 for connecting to the photovoltaic power generator 150 and the three-phase inverter 120. The common mode choke coil 111 is a filter device that functions as an inductor with respect to the common mode current. By providing the common mode choke coil 111, the absolute value of noise can be reduced.

  FIG. 2 is a diagram illustrating an appearance of the common mode choke coil 111 of the present embodiment. In general, a common mode choke coil has at least four input / output terminals because of a structure in which two conductors are wound around one core, and has two input / output terminals for connection to the bypass path 145. ing.

  The common mode choke coil 111 of the present embodiment includes a first multilayer substrate 211, a second multilayer substrate 212, and an iron core 213 that fixes the first multilayer substrate 211 and the second multilayer substrate 212. Have been.

  In the common mode choke coil 111, the first multilayer board 211 is provided with two input / output terminals 201 and 202 at both ends of one of the conductor patterns and an input / output terminal 203 for connecting to the bypass path 145. Has been. Similarly, the second multilayer substrate 212 also includes two input / output terminals 204 at both ends of the other conductor and an input / output terminal for connecting to the bypass path 145.

  As shown in FIG. 2, in the common mode choke coil 111, the first multilayer substrate 211 and the second multilayer substrate 212 are displaced from each other, thereby facilitating the drawing of the wires (leads).

  In the present embodiment, an example in which the common mode choke coil 111 is shown as one configuration will be described. However, a common mode choke coil and another circuit (for example, an inverter or the like) are arranged on one substrate. Is also good.

  FIG. 3 is an exploded view illustrating the common mode choke coil 111 of the present embodiment. As shown in FIG. 3, a first iron core portion passes through an opening 301 provided in the first multilayer substrate 211 and an opening (not shown) provided in the second multilayer substrate 212. 213a and the second iron core 213b are connected.

  The first core portion 213a includes a first leg 311a, a second leg 312a, a third leg 313a, and a first yoke portion 314. The first yoke part 314 connects one ends of the first leg 311a, the second leg 312a, and the third leg 313a.

  The second iron core 213b includes a first leg 311b, a second leg 312b, a third leg 313b, and a second yoke 315. The second yoke portion 315 connects the other ends of the first leg 311b, the second leg 312b, and the third leg 313b.

  The first leg 311a of the first core portion 213a and the first leg 311b of the second core portion 213b are connected to the opening 301 provided in the first multilayer substrate 211 and the second multilayer substrate 212. An opening (not shown) is provided for connection.

  The second leg 312a of the first core portion 213a and the second leg 312b of the second core portion 213b are connected with the first multilayer substrate 211 and the second multilayer substrate 212 interposed therebetween. Thus, the second legs 312a and 312b are provided in parallel with the first legs 311a and 311b.

  The third leg 313a of the first core portion 213a and the third leg 313b of the second core portion 213b are connected to the first multilayer substrate 211 and the second multilayer substrate 212 by the second legs 312a and 312b. Is connected with another position. The third legs 313a, 313b are provided between the first legs 311a, 311b and the second legs 312a, 312b of the first multilayer substrate 211 and the second multilayer substrate 212, respectively. It is provided in parallel with the second legs 312a, 312b.

  FIG. 4 shows a top view of the common mode choke coil 111 of the present embodiment. As shown in FIG. 4, the first multilayer substrate 211 and the second multilayer substrate 211 are provided so as to overlap. Next, a sectional view of the common mode choke coil 111 will be described.

  FIG. 5 is a diagram showing a cross-sectional view of the common mode choke coil 111 before connecting the first core portion 213a and the second core portion 213b. The cross-sectional view shown in FIG. 5 shows AA of FIG. In the example shown in FIG. 5, the first iron core 213a and the second iron core 213b are planar ferrite cores. The first leg (formed by connecting the first leg 311a and the first leg 311b) that penetrates the opening 301 of the first multilayer substrate 211 and the opening 302 of the second multilayer substrate 212. The leg is the core of the common mode choke coil 111.

  The first multilayer substrate 211 includes a first layer, an insulating layer, a bypass layer 411, an insulating layer, a second layer, and an insulating layer. In FIG. 5, the layer 211a includes a first layer and an insulating layer, and the layer 211b includes an insulating layer, a second layer, and an insulating layer. The first layer is provided with a wiring pattern 401a serving as a first winding, and the second layer is provided with a wiring pattern 401b serving as a second winding.

  The first layer wiring pattern 401a and the second layer wiring pattern 401b function as a spiral winding surrounding the core. The windings indicated by the wiring patterns 401a and 401b are P-side coils of the common mode choke coil 111. The winding may be represented by a copper pattern, for example. In addition, the windings of the wiring patterns 401a and 401b of the first layer generate a magnetic field in the same direction in a state where a current flows. For example, in the wiring patterns 401a and 401b, a current flows in a depth direction on the left side of the opening 301, and a current flows in a front direction on the right side of the opening 301, thereby generating a magnetic field in the same direction.

  FIG. 6 is a diagram illustrating the first layer of the first multilayer substrate 211 of the present embodiment. As shown in FIG. 6, the first multilayer substrate 211 is provided with an opening 511. In the first layer of the first multilayer substrate 211, a wiring pattern 401a that connects the via 501 and the interlayer via 502 and represents a spiral first winding surrounding the opening 511 is provided. . As a result, the first-layer wiring pattern 401a of the first multilayer substrate 211 becomes a spiral winding that surrounds the leg (core) of the first iron core 213a inserted through the opening 511. Is formed.

  Vias 501 and interlayer vias 502 are connected to both ends of the first layer wiring pattern of the first multilayer board 211. The via 501 is an input / output terminal for connecting to the outside. The interlayer via 502 is a connection terminal for connecting to a wiring pattern of another layer. Then, when a current flows from the via 501 and a current flows from the via 502, a current flows in an arrow 550.

  The first layer of the first multilayer substrate 211 has a hole 504 for passing a wiring connected to an input / output terminal provided in the second layer and a hole for passing a wiring connected to the bypass layer 411. 503 are provided.

  FIG. 7 is a diagram illustrating the second layer of the first multilayer board 211 of the present embodiment. As shown in FIG. 7, the second layer of the second multilayer substrate 211 is a layer provided with an opening 611, connects the interlayer via 602 and the via 601, and has a spiral shape surrounding the opening 611. The wiring pattern 401b representing the second winding is provided. Thereby, the wiring pattern 401b of the second layer of the first multilayer board 211 is formed so as to be a winding applied to the leg (core) 611 of the first iron core 213a inserted into the opening 611. Have been.

  Further, a via 601 and an interlayer via 602 are connected to both ends of the wiring pattern 401b representing the winding of the second layer of the first multilayer board 211. The via 601 is an input / output terminal for connecting to the outside. The interlayer via 602 is an interlayer via for connecting to the first layer wiring pattern 401a via the interlayer via 502. Then, when a current flows from the via 602 connected to the first layer and a current flows from the via 601, a current flows in an arrow 650. As shown by the arrow 550 in FIG. 5 and the arrow 650 in FIG. 6, the direction of the flowing current is the same.

  The second layer of the first multilayer board 211 has a hole 603 for passing a wiring connected to an input / output terminal provided in the first layer and a hole for passing a wiring connected to the bypass layer 411. 604 are provided.

  As described above, the number of turns of the P-side coil of the present embodiment is constituted by the windings represented by the wiring patterns of the plurality of layers. Note that the N-side coil has the same configuration and the description is omitted.

  In the examples shown in FIGS. 6 and 7, the case where the wire widths of the windings are substantially the same is shown. However, there is no particular limitation on the wire width. It may be different. The number of turns is also set according to the embodiment. Further, in the present embodiment, the example in which the wiring pattern representing the winding is formed in two layers in the first multilayer substrate has been described, but may be three or more layers. Even in the case of three or more layers, a bypass layer is provided between layers on which wiring patterns representing windings are formed.

  Returning to FIG. 5, the bypass layer 411 is a conductive layer that can be connected to an external current path. For example, the bypass layer 411 is a layer that is connected to the bypass layer 412 of the second multilayer substrate 212 via an interlayer via and that forms a bypass path that connects the three-phase AC side and the DC side of the three-phase inverter 120. In addition, by being provided between the first layer and the second layer, a low-impedance path that is planarly opposed to the wiring pattern 401a of the first layer and the wiring pattern 401b of the second layer is realized. As a result, the bypass layer 411 generates a stray capacitance between the windings represented by the wiring patterns of the first layer and the second layer.

  In the example shown in FIG. 5, the first winding of the wiring pattern 401a of the first layer and the second winding of the wiring pattern 401b of the second layer are line-symmetric with respect to the bypass layer 411. However, the present invention is not limited to such an arrangement method. That is, any arrangement method may be used as long as stray capacitance is generated between the windings of the wiring patterns 401a and 401b and the bypass layer 412.

  The opening 301 penetrates through the region surrounded by the winding of the wiring pattern of the first layer and the region surrounded by the winding of the wiring pattern of the second layer with respect to the first multilayer substrate 211. I have.

  The second multilayer substrate 212 includes a third layer, an insulating layer, a bypass layer 412, an insulating layer, a fourth layer, and an insulating layer. In FIG. 5, the layer 212a includes a third layer and an insulating layer, and the layer 212b includes an insulating layer, a fifth layer, and an insulating layer. The third layer is provided with a wiring pattern 402a serving as a third winding, and the fourth layer is provided with a wiring pattern 402b serving as a fourth winding.

  The wiring pattern 402a of the third layer and the wiring pattern 402b of the fourth layer function as spiral windings surrounding the core. The windings indicated by the wiring patterns 402a and 402b are N-side coils of the common mode choke coil 111. In addition, the windings of the wiring pattern 402a and the wiring pattern 402b generate a magnetic field in the same direction when a current flows. For example, in the wiring pattern 402a and the wiring pattern 402b, a current flows in a depth direction on the left side of the opening 302 and a current flows in a front direction on the right side of the opening 301, thereby generating a magnetic field in the same direction.

  The winding pattern of the third layer wiring pattern 402a and the fourth layer wiring pattern 402b of the second multilayer substrate 212 is the same as that of the first layer wiring pattern 401a and the second layer wiring pattern 401b of the first multilayer substrate 211. The description is omitted because they are the same and can be realized by the same configuration.

The bypass layer 412 is a conductive layer that can be connected to an external current path. For example, the bypass layer 412 is connected to the bypass layer 411 of the first multilayer substrate 211 via an interlayer via, and is a layer on which a bypass path connecting the three-phase AC side and the DC side of the three-phase inverter 120 is formed. In addition, by being provided between the first layer and the second layer, a low-impedance path that is planarly opposed to the wiring pattern 401a of the first layer and the wiring pattern 401b of the second layer is realized. As a result, the bypass layer 412 generates a stray capacitance between the windings represented by the first layer wiring pattern 401a and the second layer wiring pattern 401b.

  The second leg (the leg formed by connecting the second leg 312a and the second leg 312b) includes a first winding of the first layer and a second winding of the second layer. And the third winding of the third layer and the fourth winding of the fourth layer are provided in parallel with the first leg with a part interposed therebetween.

  The third leg (a leg formed by connecting the third leg 313a and the third leg 313b) includes a first winding and a first winding sandwiched between the first leg and the second leg. A first winding, a second winding, and a third winding in which a current flows in a direction opposite to the direction of the current flowing through the second winding, the third winding, and the fourth winding. , And another part of the fourth winding is provided in parallel with the first leg and the second leg.

  The common mode choke coil 111 functions as an inductor when a current in the same direction flows through all of the wiring patterns 401a, 401b, 402a, and 402b (a common mode current flows).

  FIG. 8 is a diagram showing a cross-sectional view of the common mode choke coil 111 before connecting the first core portion 213a and the second core portion 213b. The cross-sectional view shown in FIG. 8 shows BB of FIG. In the example shown in FIG. 8, the first iron core 213a and the second iron core 213b are planar ferrite cores. Then, the opening 301 of the first multilayer board 211 and the opening 302 of the second multilayer board 212 are inserted, and the first legs of the first core 213a and the second core 213b are The core of the common mode choke coil 111.

  FIG. 9 is a side view of the common mode choke coil 111 of the present embodiment. As shown in FIG. 9, in the common mode choke coil 111, a first multilayer substrate 211 and a second multilayer substrate 212 are fixed by an iron core 213.

  A line (1) in FIG. 9 is a line extending from the via 501 serving as an input / output terminal, and corresponds to (1) in FIG. Lines are shown. A line (2) in FIG. 9 is a line extending from the via 601 serving as an input / output terminal and corresponds to (2) in FIG. Is shown.

  Then, by connecting the interlayer via 502 and the interlayer via 602 in the first multilayer substrate 211, the current input through the via 501 serving as the input / output terminal is output from the via 601 serving as the input / output terminal. Will be.

  A line (3) in FIG. 9 is a line extending from the via 801 serving as an input / output terminal and corresponds to (3) in FIG. Lines are shown. A line (4) in FIG. 9 is a line extending from the via 802 serving as an input / output terminal, and corresponds to (4) in FIG. Is shown.

  By connecting the interlayer via 803 and the interlayer via 804 in the second multilayer substrate 212, the current input through the via 803 serving as the input / output terminal is output from the via 804 serving as the input / output terminal. Will be.

  Further, line (5) in FIG. 9 corresponds to (5) in FIG. 1 and is connected to the bypass. The description of the connection method is omitted because any method may be used.

  FIG. 10 is a diagram illustrating the relationship between the common mode choke coil 111 and the low impedance layer connected to the bypass path. As shown in FIG. 10, the common mode choke coil 111 is configured such that a bypass layer serving as a low impedance path is provided so as to be sandwiched between the P-side coil and the N-side coil of the common mode choke coil 111. A stray capacitance 901 is created between the coil and the low impedance path.

  FIG. 11 is a diagram illustrating stray capacitance generated in the common mode choke coil 111. As shown in FIG. 11, in the coil represented by the wiring pattern of the first multilayer substrate 211, a stray capacitance 1001 is generated between the windings. Also, a stray capacitance 1002 is generated between the windings connected by the interlayer via. When these stray capacitances occur, noise may leak out. Therefore, in the present embodiment, by generating the stray capacitance 1111 between the winding and the bypass path, the stray capacitances 1001 and 1002 which are equivalently undesirable between the windings and the like are canceled.

  FIG. 12 is a diagram illustrating the stray capacitance. As shown in FIG. 12, a stray capacitance 1001 (the size of the stray capacitance 1100 is Cs) is generated between the windings, and a stray capacitance 1111 (the stray capacitance is set between the winding and a low impedance path (bypass path)). 1111 is assumed to be Cb). In FIG. 12A, the inductance L of the winding of the common mode choke coil 111 is assumed. Note that only one side of the common mode choke coil 111 is shown for convenience of explanation. The stray capacitance Cb is generated between the winding for each turn and the low impedance path.

  12B can be derived by replacing the circuit shown in FIG. 12A with an equivalent circuit. Further, by replacing FIG. 12B with a π-type circuit, the circuit configuration of FIG. 12C can be derived. The admittance Y1 shown in FIG. 12 (c) can be expressed by equation (1).

  As shown in Expression (1), it can be confirmed that as the stray capacitance Cb between the winding and the low impedance path increases from ‘0’, the degree of cancellation of the stray capacitance Cs between the windings increases. When the stray capacitance Cb becomes four times the stray capacitance Cs, the effect of the stray capacitance Cs is cancelled, and the admittance Y1 can be expressed by the following equation (2).

  The stray capacitance Cb between the winding and the low-impedance path may be adjusted by adjusting the area of the low-impedance path or the distance from the winding, but other methods may be used.

  That is, the common mode choke coil 111 of the present embodiment has the above-described configuration, thereby canceling an undesirable stray capacitance generated in the common mode choke coil 111 and realizing a filter capable of suppressing noise up to a higher frequency region. .

  In other words, even when an undesirable stray capacitance is generated between the windings, the impedance rises up to a certain frequency, and the inductance also keeps a constant value. It approaches 0 '. The certain frequency is a resonance frequency, and at or above the frequency, the function as a filter for suppressing noise is reduced. However, by reducing the undesired stray capacitance between the windings, the value of the resonance frequency increases, and the noise can be attenuated to a higher frequency range.

(Second embodiment)
In the first embodiment, the case where nothing is interposed between the first multilayer substrate and the second multilayer substrate has been described. On the other hand, in the second embodiment, a case where a soft magnetic sheet is added will be described. The configuration is the same as that of the first embodiment except that a soft magnetic sheet is added. The same components as those of the first embodiment are assigned the same reference numerals, and description thereof is omitted.

  FIG. 13 is a diagram exemplifying an appearance of a common mode choke coil 1400 according to the second embodiment before connecting a first iron core 213a and a second iron core 213b. As shown in FIG. 12, a soft magnetic layer is provided between the wiring pattern of the first multilayer board 211 on which the winding is formed and the wiring pattern of the second multilayer board 212 on which the winding is formed. A sheet 1201 is provided. The soft magnetic sheet 1201 is shaped so as to be provided only between the coils, avoiding the core formed by the first iron core 213a and the second iron core 213b. As the soft magnetic sheet 1201, for example, it is conceivable to use a nanocrystalline soft magnetic sheet, but any material may be used.

  FIG. 14 is a diagram illustrating a cross-sectional view of the common mode choke coil 111 before connecting the first core portion 213a and the second core portion 213b. The cross-sectional view shown in FIG. 14 shows AA of FIG. In the example shown in FIG. 14, a soft magnetic sheet 1201 is provided between a first multilayer substrate 211 and a second multilayer substrate 212. Next, a description will be given of the magnetic flux when the common mode current is applied, with the first multilayer substrate 211 being the primary side and the second multilayer substrate 212 being the secondary side.

  Arrows 550 and 650 shown in FIG. 6 and FIG. 7 indicate the direction in which the common mode current flows. As described above, on both the primary side and the secondary side, the current flows from the near side to the far side in the left half coil of FIG. In the examples shown in FIGS. 6 and 7, when a common mode current is flowing, current flows in the same direction on the primary side and the secondary side.

  FIG. 15 is a diagram showing the flow of magnetic flux when a current flows in the same direction on the primary side and the secondary side (when a common mode current flows). As shown in FIG. 15, when the current flows in the same direction, the flow of the magnetic flux by the left half coil is the same as that of the coil (first multilayer substrate 211) above the soft magnetic sheet 1201. A magnetic flux φcm 1 flows in a direction 1501 through a direction 1201. In the coil below the soft magnetic sheet 1201, a magnetic flux φcm 2 flows in the direction 1502 through the soft magnetic sheet 1201. For this reason, the magnetic fluxes φcm1 and φcm2 of the two coils are offset in the soft magnetic sheet 1201, so that the magnetic flux φDM = φcm1−φcm2 = 0. That is, since the magnetic flux φDM when the common mode current flows is “0”, the common mode inductance of the soft magnetic sheet 1201 is “0”.

  FIG. 16 is a diagram showing the flow of magnetic flux when current flows in different directions on the primary side and the secondary side (when differential mode current flows). That is, a current flows from the near side to the back in the left half coil on the primary (first multilayer board 211) side, and the left half coil on the secondary (second multilayer board 212) side from the back. Current flows toward you.

  In such a case, in the coil above the soft magnetic sheet 1201, the magnetic flux φ′cm1 flows in the direction 1601 through the soft magnetic sheet 1201, and in the coil below the soft magnetic sheet 1201 (the same applies near the soft magnetic sheet 1201). A magnetic flux φ′cm2 flows in a direction 1602 (ie, a direction). That is, the magnetic flux φ′DM of the soft magnetic sheet 1201 is the sum of both magnetic fluxes (φ′cm1 + φ′cm2). Therefore, the inductance of the soft magnetic sheet 1201 when a differential mode current flows increases.

  In the present embodiment, by inserting the soft magnetic sheet 1201 between the primary (the first multilayer substrate 211) and the secondary (the second multilayer substrate 212), an inductance with respect to the differential mode current can be generated. .

  In the present embodiment, the common mode inductance is obtained by inserting the soft magnetic sheet 1201 between the primary (first multilayer substrate 211) and the secondary (second multilayer substrate 212) while avoiding the core. In addition, a differential mode inductance can be obtained. Thereby, the noise in the differential mode can be reduced without disposing the coil for the differential mode. Further, since there is no need to dispose a coil, the size of the apparatus can be reduced.

  In the above-described embodiment, by providing the above-described configuration in the EMI filter provided as a measure against high-frequency noise, it is possible to reduce an equivalently undesirable stray capacitance generated between windings or the like. Thereby, noise can be reduced to a higher frequency band.

  When the EMI filter circuit of the above-described embodiment is incorporated in an inverter and a system linking system that supplies power from the inverter, it is possible to suppress EMI that causes malfunction or the like. Further, since noise can be reduced to a high frequency band without sparsely winding the winding by using a large coil, an increase in the size of the device can be suppressed.

  While some embodiments of the invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. These new embodiments can be implemented in other various forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and their equivalents.

  110 EMI filter, 111, 1400 common mode choke coil, 112 three-phase bypass capacitor, 113 normal mode reactor, 120 three-phase inverter, 130 radiation fin, 150 photovoltaic power generator, 151 input power supply 180: three-phase system linked load, 190: ground, 211: first multilayer substrate, 212: second multilayer substrate, 213: iron core, 1201: soft magnetic sheet

Claims (3)

A multilayer substrate provided with a first opening, wherein a first spiral connection winding connects a first input / output terminal and a first connection terminal and surrounds the first opening. A first layer on which the first wiring pattern is provided, a second connection terminal connected to the first connection terminal, and a second input / output terminal. A second layer provided with a second wiring pattern representing a spiral second winding surrounding the first opening, which generates a magnetic field in the same direction as the magnetic field generated in the first winding; A first multilayer substrate having a conductive third layer provided between the first layer and the second layer and connectable to an external current path;
A multilayer substrate provided with a second opening, wherein a spiral third winding which connects a third input / output terminal and a third connection terminal and surrounds the second opening is shown. A fourth layer on which the third wiring pattern is provided, a fourth connection terminal connected to the third connection terminal, and a fourth input / output terminal. A fifth layer provided with a fourth wiring pattern representing a spiral fourth winding that surrounds the second opening and generates a magnetic field in the same direction as the magnetic field generated in the third winding; A second multilayer substrate provided between the fourth layer and the fifth layer, and having a conductive sixth layer connectable to an external current path;
A first leg inserted through the first opening and the second opening, the first winding, the second winding, the third winding, and the fourth winding; A second leg provided in parallel with the first leg with a part of the winding interposed therebetween; the first winding sandwiched between the first leg and the second leg; The first winding, the second winding, wherein current flows in a direction opposite to the direction of current flowing through the second winding, the third winding, and the fourth winding; A third leg provided in parallel with the first leg and the second leg across another part of the third winding and the fourth winding; A first yoke connecting one end of the leg, the second leg, and the third leg, and connecting the other end of the first leg, the second leg, and the third leg. A core having a second yoke portion;
A filter device comprising: A soft magnetic sheet between the first multilayer substrate and the second multilayer substrate,
The filter device according to claim 1, further comprising: A three-phase inverter,
A multilayer substrate provided with a first opening, wherein a first spiral connection winding connects a first input / output terminal and a first connection terminal and surrounds the first opening. A first layer on which the first wiring pattern is provided, a second connection terminal connected to the first connection terminal, and a second input / output terminal connected to the three-phase inverter. A second wiring pattern representing a spiral second winding surrounding the first opening, which generates a magnetic field in the same direction as a magnetic field generated in the first winding in a state where a current flows. A first multilayer substrate, comprising: a second layer provided; and a conductive third layer provided between the first layer and the second layer and connectable to an external current path. And a multi-layer substrate provided with a second opening, the third substrate connecting a third input / output terminal and a third connection terminal, and A fourth layer on which a third wiring pattern representing a spiral third winding surrounding the opening is provided; a fourth connection terminal connected to the third connection terminal; A spiral that surrounds the second opening and connects to a fourth input / output terminal connected to an inverter to generate a magnetic field in the same direction as a magnetic field generated in the third winding in a state where a current flows; A fifth layer on which a fourth wiring pattern representing the fourth winding is provided, and a conductive layer provided between the fourth layer and the fifth layer and connectable to an external current path. A second multi-layer substrate having a sixth layer having the same nature, a first leg inserted through the first opening and the second opening, the first winding, and the second And a second leg provided in parallel with the first leg with a part of the third winding and the fourth winding therebetween. And the direction of the current flowing through the first winding, the second winding, the third winding, and the fourth winding between the first and second legs. The first leg, the second leg, the third winding, and another part of the fourth winding, in which current flows in opposite directions, are sandwiched between the first leg and the first leg. A third leg provided in parallel with the second leg, a first yoke portion connecting one end of the first leg, the second leg, and the third leg, And a second yoke part connecting the other ends of the second leg, the second leg, and the third leg, and a core device having the same.
A reactor provided for each line connecting the three-phase inverter and a terminal connectable to a load,
A capacitor that is branched from each line connecting the three-phase inverter and a terminal connectable to the load, and is provided in series with the reactor;
A wire connecting the neutral point connecting the capacitor and a connection point on the DC side of the three-phase inverter, and connecting the third layer and the sixth layer of the filter device;
An inverter device comprising: