JP6596760B1 - Image processing apparatus, imaging apparatus, image processing method, and program - Google Patents

Abstract

It is desired to reduce the influence of noise more reliably when the resolution is reduced by binning processing of image data. An image processing apparatus includes a first image in which a plurality of first pixel blocks including N pixels of the same color (N is an integer of 2 or more) are arranged in a predetermined arrangement for each color. A generating unit configured to generate N pieces of second image data in which pixels extracted from each of the plurality of first pixel blocks are arranged in a predetermined arrangement for each color from the data; and the N pieces of second image data A first processing unit that performs demosaic processing on each of the first processing unit, and a second processing unit that combines the N second image data subjected to demosaic processing by binning processing and outputs one third image data. You may be prepared. [Selection] Figure 5

Description

  The present invention relates to an image processing device, an imaging device, an image processing method, and a program.

Patent Document 1 discloses that binning processing is performed by adding four pixels in a cluster in an image sensor using a Bayer color filter array.
Patent Document 1 Japanese Patent Application Laid-Open No. 2015-228650

  It is desired that the influence of noise can be reduced more reliably when the resolution is reduced by binning the image data.

  In the image processing device according to one aspect of the present invention, a plurality of first pixel blocks each including N pixels of the same color (N is an integer of 2 or more) are arranged in a predetermined arrangement for each color. You may provide the production | generation part which produces | generates N 2nd image data by which the pixel extracted from each of several 1st pixel blocks is arrange | positioned with the arrangement | sequence predetermined for every color from 1st image data. The image processing apparatus may include a first processing unit that performs demosaic processing on each of the N second image data. The image processing apparatus may include a second processing unit that synthesizes N pieces of second image data subjected to demosaic processing by binning processing and outputs one piece of third image data.

  The generation unit may generate N pieces of second image data in which pixels at the same position extracted from each of the plurality of first pixel blocks are arranged in a predetermined arrangement for each color.

  The generation unit may generate N second image data in which pixels at different positions extracted from each of the plurality of first pixel blocks are arranged in a predetermined arrangement for each color.

  The predetermined arrangement may be a Bayer arrangement.

  N may be four.

  The first image data may have a resolution of 7680 × 4320. The second image data may have a resolution of 3840 × 2160.

  An imaging device according to one embodiment of the present invention may include the image processing device. The imaging device may include an image sensor that outputs the first image data.

  In an image processing method according to an aspect of the present invention, a plurality of first pixel blocks each including N pixels (N is an integer of 2 or more) of the same color are arranged in a predetermined arrangement for each color. The method may include generating N pieces of second image data in which pixels extracted from each of the plurality of first pixel blocks are arranged in a predetermined arrangement for each color from the first image data. The image processing method may include a step of performing demosaic processing on each of the N second image data. The image processing method may include a step of combining the N second image data subjected to the demosaic process by a binning process and outputting one third image data.

  The program according to one embodiment of the present invention may be a program for causing a computer to function as the image processing apparatus.

  According to one embodiment of the present invention, when the resolution is reduced by performing binning processing on image data, the influence of noise can be more reliably reduced.

  It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

It is a figure which shows an example of the external appearance perspective view of the imaging device which concerns on this embodiment. It is a figure which shows the functional block of the imaging device which concerns on this embodiment. It is a figure which shows an example of the pixel arrangement | sequence of image data. It is a figure which shows an example of the procedure of the image process with respect to the image data of the pixel arrangement | sequence shown in FIG. It is a figure which shows an example of the procedure of the image process in an image process part. It is a figure which shows another example of the procedure of the image process in an image process part. It is a figure which shows an example of a hardware constitutions.

  Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Moreover, not all the combinations of features described in the embodiments are essential for the solution means of the invention. It will be apparent to those skilled in the art that various modifications or improvements can be made to the following embodiments. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The claims, the description, the drawings, and the abstract include matters subject to copyright protection. The copyright owner will not object to any number of copies of these documents as they appear in the JPO file or record. However, in other cases, all copyrights are reserved.

  Various embodiments of the present invention may be described with reference to flowcharts and block diagrams, where a block is either (1) a stage in a process in which an operation is performed or (2) an apparatus responsible for performing the operation. May represent a “part”. Certain stages and “units” may be implemented by programmable circuits and / or processors. Dedicated circuitry may include digital and / or analog hardware circuitry. Integrated circuits (ICs) and / or discrete circuits may be included. The programmable circuit may include a reconfigurable hardware circuit. Reconfigurable hardware circuits include logical AND, logical OR, logical XOR, logical NAND, logical NOR, and other logical operations, flip-flops, registers, field programmable gate arrays (FPGA), programmable logic arrays (PLA), etc. The memory element or the like may be included.

  Computer-readable media may include any tangible device that can store instructions executed by a suitable device. As a result, a computer readable medium having instructions stored thereon comprises a product that includes instructions that can be executed to create a means for performing the operations specified in the flowcharts or block diagrams. Examples of computer readable media may include electronic storage media, magnetic storage media, optical storage media, electromagnetic storage media, semiconductor storage media, and the like. More specific examples of computer readable media include floppy disks, diskettes, hard disks, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM or flash memory), Electrically erasable programmable read only memory (EEPROM), static random access memory (SRAM), compact disc read only memory (CD-ROM), digital versatile disc (DVD), Blu-ray (RTM) disc, memory stick, integrated A circuit card or the like may be included.

  The computer readable instructions may include either source code or object code written in any combination of one or more programming languages. The source code or object code includes a conventional procedural programming language. Conventional procedural programming languages include assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state setting data, or Smalltalk, JAVA, C ++, etc. It may be an object-oriented programming language and a “C” programming language or a similar programming language. Computer readable instructions may be directed to a general purpose computer, special purpose computer, or other programmable data processing device processor or programmable circuit locally or in a wide area network (WAN) such as a local area network (LAN), the Internet, etc. ). The processor or programmable circuit may execute computer readable instructions to create a means for performing the operations specified in the flowcharts or block diagrams. Examples of processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, and the like.

  FIG. 1 is a diagram illustrating an example of an external perspective view of an imaging apparatus 10 according to the present embodiment. FIG. 2 is a diagram illustrating functional blocks of the imaging apparatus 10 according to the present embodiment.

  The imaging device 10 includes an imaging unit 100 and a lens unit 300. The lens unit 300 includes a lens control unit 310, a lens driving unit 312, a lens 314, and a memory 320. The lens 314 may function as a zoom lens, a varifocal lens, and a focus lens. The lens 314 may be composed of a plurality of optical elements. The lens 314 is arranged to be movable along the optical axis. The lens unit 300 may be an interchangeable lens that is detachably attached to the imaging unit 100.

  The lens driving unit 312 moves the lens 314 along the optical axis via a mechanism member such as a cam ring. The lens driving unit 312 may include an actuator. The actuator may include a stepping motor. The lens control unit 310 drives the lens driving unit 312 according to the lens control command from the imaging unit 100 to move the lens 314 along the optical axis direction via the mechanism member. The lens control command is, for example, a zoom control command and a focus control command. The lens control unit 310 performs at least one of a zoom operation and a focus operation by moving the lens 314 along the optical axis.

  The lens unit 300 further includes a memory 320. The memory 320 stores a control value of the lens 314 that moves through the lens driving unit 312. The memory 320 may include at least one of flash memory such as SRAM, DRAM, EPROM, EEPROM, USB memory, and solid state drive (SSD).

  The imaging unit 100 includes a sensor unit 210, an imaging control unit 220, a memory 230, an image processing unit 110, an encoding unit 120, and a memory 130.

  The sensor unit 210 converts an optical image formed through the lens 314 into an electrical signal and outputs the electrical signal to the imaging unit 100. The imaging control unit 220 controls the sensor unit 210. The memory 230 may be a computer-readable recording medium, and may include at least one of flash memory such as SRAM, DRAM, EPROM, EEPROM, USB memory, and solid state drive (SSD). The memory 230 stores a program necessary for the imaging control unit 220 to control the sensor unit 210 and the like.

  The sensor unit 210 includes a pixel array 212, a vertical selection circuit 214, a horizontal selection circuit 216, and a column processing unit 218. The pixel array 212 includes a plurality of pixels arranged in a predetermined array having a photoelectric conversion unit that generates and accumulates charges according to the amount of received light. The plurality of pixels are two-dimensionally arranged in the row direction (horizontal direction) and the column direction (vertical direction).

  The pixel array 212 is connected to the vertical selection circuit 214 via a plurality of pixel drive lines 215 corresponding to the pixel rows. The pixel driving line 215 transmits a driving signal for performing driving when reading a signal from the pixel.

  The vertical selection circuit 214 includes a shift register, an address decoder, and the like, and drives each pixel of the pixel array 212 at the same time or in units of rows. The vertical selection circuit 214 constitutes a drive unit that controls the operation of each pixel in the pixel array 212 together with the imaging control unit 220 that controls the vertical selection circuit 214.

  The vertical selection circuit 214 performs read scanning and sweep scanning. The vertical selection circuit 214 sequentially selects and scans each pixel of the pixel array 212 in units of rows in readout scanning. In the sweep-out scanning, the vertical selection circuit 214 performs the sweep-out scan preceding the readout scan by the exposure time with respect to the readout row in which the readout scan is performed. The vertical selection circuit 214 performs a so-called electronic shutter by performing readout scanning and sweep-out scanning.

  A signal output from each pixel in the row scanned by the vertical selection circuit 214 is input to the column processing unit 218 via the vertical signal line 219 for each column. The column processing unit 218 performs predetermined signal processing on a signal output from each pixel in the selected row via the vertical signal line 219 for each column of the pixel array 212, and outputs an electric signal of each pixel. Is output.

  The column processing unit 218 performs noise removal processing such as CDS (correlated double sampling) processing and DDS (Double Data Sampling) processing as signal processing. By executing the CDS process, reset noise and the like are removed. The column processing unit 218 may convert an analog signal into a digital signal.

  The horizontal selection circuit 216 includes a shift register, an address decoder, and the like, and sequentially selects and scans circuit portions corresponding to the columns of the column processing unit 218. By scanning by the horizontal selection circuit 216, the column processing unit 218 outputs a signal subjected to signal processing for each column as image data.

  The image processing unit 110 performs various types of image processing on the image data output from the sensor unit 210. The encoding unit 120 compresses the image data that has been subjected to the image processing using a predetermined encoding method, and stores the compressed image data in the memory 130. For example, the encoding unit 120 may compress the image data on which image processing has been performed using the JPEG method and store the compressed image data in the memory 130.

  FIG. 3 shows an example of a pixel arrangement of the image data 500 output from the pixel array 212. The image data 500 is configured by arranging a plurality of pixel blocks 501 composed of four pixels of the same color in a Bayer arrangement for each of R, G, and B colors. One set of four 2 × 2 pixel blocks 501. The configuration of the image data 500 is not limited to the configuration shown in FIG. The image data 500 only needs to be configured by arranging a plurality of pixel blocks including N pixels of the same color (N is an integer of 2 or more) in a predetermined arrangement for each color. The image data 500 may be configured by arranging a plurality of pixel blocks 501 composed of N pixels of the same color in a honeycomb arrangement for each of R, G, and B colors.

  FIG. 4 shows an example of an image processing procedure for the image data 500 having the pixel array shown in FIG. The image processing unit 110 performs a binning process on the image data 500 for each pixel block 501. The image processing unit 110 may perform binning processing by mixing the image data 500 in units of pixel blocks 501. The image processing unit 110 may perform binning processing on the image data 500 by adding and averaging the pixel values of the pixels in the pixel block 501. The image processing unit 110 performs demosaic processing on the binned image data 510 and outputs image data 520. The image processing unit 110 may perform demosaic processing by performing pixel complementation processing on each pixel of the binned image data 510. By performing such image processing, the image processing unit 110 can reduce the resolution of the image data 500 and output it. For example, the image processing unit 110 converts the image data 500 having a resolution of 7680 × 4320 into image data 520 having a resolution of 3840 × 2160 and outputs the image data.

  However, as described above, when the demosaic process is performed after the binning process is performed on the image data 500, the noise included in one pixel in the pixel block is added as it is, and the demosaic process is performed only once. Applied. When the accuracy of pixel complementation in a single demosaic process is low, the effect becomes large. In such processing, noise included in the image data after demosaic processing may increase.

  Therefore, the imaging apparatus 10 according to the present embodiment aims to reduce noise in image processing. The image processing unit 110 includes a generation unit 112, a demosaic processing unit 114, and a binning processing unit 116.

  The generation unit 112 generates a plurality of first image data in which a plurality of first pixel blocks each including N pixels of the same color (N is an integer of 2 or more) are arranged in a predetermined arrangement for each color. N pieces of second image data in which pixels extracted from each of the first pixel blocks are arranged in a predetermined arrangement for each color are generated. The generation unit 112 generates a first pixel block composed of four pixels of the same color from first image data in which a first pixel block is arranged in a Bayer arrangement for each of R, G, and B colors. Four second image data may be generated in which pixels extracted from are arranged in a Bayer array for each of R, G, and B colors.

  The generation unit 112 may generate N pieces of second image data in which pixels at the same position extracted from each of the plurality of first pixel blocks are arranged in a predetermined arrangement for each color. The generation unit 112 generates four pieces of second image data in which pixels at the same position extracted from each of the plurality of first pixel blocks are arranged in a Bayer array for each of R, G, and B colors. Good.

  The generation unit 112 may generate N pieces of second image data in which pixels at different positions extracted from each of the plurality of first pixel blocks are arranged in a predetermined arrangement for each color. The generation unit 112 may generate four pieces of second image data in which pixels at different positions extracted from each of the plurality of first pixel blocks are arranged in a Bayer array for each of R, G, and B colors. . The generation unit 112 generates four pieces of second image data in which pixels at different predetermined positions extracted from each of the plurality of first pixel blocks are arranged in a Bayer array for each of R, G, and B colors. May be generated. The generation unit 112 generates four second image data in which pixels at different positions randomly extracted from each of the plurality of first pixel blocks are arranged in a Bayer array for each of R, G, and B colors. It's okay.

  The demosaic processing unit 114 performs demosaic processing on each of the N second image data. The demosaic processing unit 114 may perform demosaic processing separately on each of the N second image data. The demosaic processing unit 114 may perform demosaic processing separately on each of the four second image data. The demosaic processing unit 114 is an example of a first processing unit.

  The binning processing unit 116 combines the N pieces of second image data subjected to the demosaic process by binning processing and outputs one piece of third image data. The binning processing unit 116 may combine the four second image data subjected to the demosaic process by the binning process and output one third image data. The binning processing unit 116 is an example of a second processing unit.

  FIG. 5 is a diagram illustrating an example of an image processing procedure in the image processing unit 110. FIG. 5 shows an example in which pixels at the same position are extracted from each of the pixel blocks.

  The generation unit 112 generates four pieces of image data 530, 531, 532, and 533 in which pixels extracted from each of the plurality of pixel blocks 501 are arranged in a Bayer array for each of R, G, and B colors. Is generated. That is, the generation unit 112 extracts one pixel for each pixel block 501 from the image data 500, and four images in which the extracted pixels are arranged in a Bayer array for each of R, G, and B colors. Data 530, 531, 532, and 533 are separated. The generation unit 112 generates image data 500 and four pieces of image data 530, 531, 532, and 533 in which pixels at the same position extracted from each of the plurality of pixel blocks 501 are arranged in a Bayer arrangement for each color. You can do it.

  The generation unit 112 extracts the pixel R0, the pixel Gr0, the pixel Gb0, and the pixel B0 at the same position from each of the pixel blocks 510 for each color, and arranges the pixel R0, the pixel Gr0, the pixel Gb0, and the pixel B0 in a Bayer array. Thus, image data 530 is generated. The generation unit 112 extracts the pixel R1, the pixel Gr1, the pixel Gb1, and the pixel B1 at the same position from each of the pixel blocks 510 for each color, and arranges the pixel R1, the pixel Gr1, the pixel Gb1, and the pixel B1 in a Bayer array. Thus, image data 531 is generated. The generation unit 112 extracts the pixel R2, the pixel Gr2, the pixel Gb2, and the pixel B2 at the same position from each of the pixel blocks 510 for each color, and arranges the pixel R2, the pixel Gr2, the pixel Gb2, and the pixel B2 in a Bayer array. Thus, image data 532 is generated. The generation unit 112 extracts the pixel R3, the pixel Gr3, the pixel Gb3, and the pixel B3 at the same position from each of the pixel blocks 510 for each color, and arranges the pixels R3, Gr3, Gb3, and B3 in a Bayer array. Thus, image data 533 is generated.

  The demosaic processing unit 114 performs demosaic processing on each of the four pieces of image data 530, 531, 532, and 533. The binning processing unit 116 combines the four pieces of image data 530, 531, 532, and 533 that have been subjected to demosaic processing by binning processing, and outputs one piece of image data 550.

  As described above, four pixels in the pixel block 501 are separated, four image data are generated, and demosaic processing is performed on each of them. Accordingly, for example, one demosaic process is performed on each of the four pixels. Even if one of the demosaic processes has a large influence of noise and pixel complementation fails, the other demosaic processes may reduce noise and succeed in pixel complementation. Since a plurality of demosaic processes are performed using different pixels for one pixel block, the probability of successful pixel interpolation can be improved. That is, according to the image processing unit 110 according to the present embodiment, it is possible to generate low-resolution image data while reducing the influence of noise included in pixels.

  FIG. 6 is a diagram illustrating another example of an image processing procedure in the image processing unit 110. FIG. 6 shows an example in which pixels at different positions are extracted from each of the pixel blocks.

  The generation unit 112 may generate four pieces of image data 560, 561, 562, and 563 in which pixels at different positions extracted from each of the plurality of pixel blocks 501 are arranged in a Bayer array for each color. The generation unit 112 extracts the pixel R0, the pixel Gr1, the pixel Gb1, and the pixel B2 at different positions for each color from each of the pixel blocks 510 for each color, and extracts the pixel R0, the pixel Gr1, the pixel Gb1, and the pixel B2. Bayer arrangement is performed to generate image data 560. The generation unit 112 extracts the pixel R1, the pixel Gr2, the pixel Gb2, and the pixel B3 at different positions for each color from each of the pixel blocks 510 for each color, and extracts the pixel R1, the pixel Gr2, the pixel Gb2, and the pixel B3. Image data 561 is generated by the Bayer array. The generation unit 112 extracts the pixel R2, the pixel Gr3, the pixel Gb3, and the pixel B0 at different positions for each color from the pixel block 510 for each color, and extracts the pixel R2, the pixel Gr3, the pixel Gb3, and the pixel B0. Image data 562 is generated by the Bayer array. The generation unit 112 extracts the pixel R3, the pixel Gr0, the pixel Gb0, and the pixel B1 at different positions for each color from the pixel block 510 for each color, and extracts the pixel R3, the pixel Gr0, the pixel Gb0, and the pixel B1. Image data 563 is generated by the Bayer array.

  The demosaic processing unit 114 performs demosaic processing on each of the four pieces of image data 560, 561, 562, and 563. The binning processing unit 116 combines the four image data 570, 571, 572, and 573 that have been subjected to demosaic processing by binning processing and outputs one image data 580.

  In this way, pixels at different positions for each color are extracted from the image data 500 to generate four image data, and demosaic processing is performed on each image data. Each piece of image data to be demosaiced is composed of pixels at different positions in the pixel block. Therefore, when demosaic processing is performed on each separated image data, for example, the influence of high-frequency noise that occurs periodically can be reduced. When one demosaic process is performed on each of the four pixels, it is possible to reduce the probability that pixel complementation for each pixel fails. That is, it is possible to further improve the probability of successful pixel interpolation when extracting pixels at different positions than when extracting pixels at the same position. That is, according to the image processing unit 110 according to the present embodiment, it is possible to generate low-resolution image data while further reducing the influence of noise included in the pixels.

  According to the imaging apparatus 10 according to the present embodiment, for example, 3840 × 2160 obtained by combining four pixels having a resolution of 7680 × 4320 as one pixel block and combining the four pixels into one pixel. When the image data is converted into image data having the resolution and output, the influence of noise can be reduced more reliably.

  FIG. 7 illustrates an example computer 1200 in which aspects of the present invention may be embodied in whole or in part. A program installed in the computer 1200 can cause the computer 1200 to function as an operation associated with the apparatus according to the embodiment of the present invention or as one or more “units” of the apparatus. Alternatively, the program can cause the computer 1200 to execute the operation or the one or more “units”. The program can cause the computer 1200 to execute a process according to an embodiment of the present invention or a stage of the process. Such a program may be executed by CPU 1212 to cause computer 1200 to perform certain operations associated with some or all of the blocks in the flowcharts and block diagrams described herein.

  A computer 1200 according to this embodiment includes a CPU 1212 and a RAM 1214, which are connected to each other by a host controller 1210. The computer 1200 also includes a communication interface 1222 and an input / output unit, which are connected to the host controller 1210 via the input / output controller 1220. Computer 1200 also includes ROM 1230. The CPU 1212 operates according to programs stored in the ROM 1230 and the RAM 1214, thereby controlling each unit.

  The communication interface 1222 communicates with other electronic devices via a network. A hard disk drive may store programs and data used by the CPU 1212 in the computer 1200. The ROM 1230 stores therein a boot program executed by the computer 1200 at the time of activation and / or a program depending on the hardware of the computer 1200. The program is provided via a computer-readable recording medium such as a CR-ROM, a USB memory, or an IC card or a network. The program is installed in the RAM 1214 or the ROM 1230 that is also an example of a computer-readable recording medium, and is executed by the CPU 1212. Information processing described in these programs is read by the computer 1200 to bring about cooperation between the programs and the various types of hardware resources. An apparatus or method may be configured by implementing information operations or processing in accordance with the use of computer 1200.

  For example, when communication is performed between the computer 1200 and an external device, the CPU 1212 executes a communication program loaded in the RAM 1214 and performs communication processing on the communication interface 1222 based on the processing described in the communication program. You may order. The communication interface 1222 reads transmission data stored in a RAM 1214 or a transmission buffer area provided in a recording medium such as a USB memory under the control of the CPU 1212 and transmits the read transmission data to a network, or The reception data received from the network is written into a reception buffer area provided on the recording medium.

  In addition, the CPU 1212 allows the RAM 1214 to read all or necessary portions of a file or database stored in an external recording medium such as a USB memory, and executes various types of processing on the data on the RAM 1214. Good. The CPU 1212 may then write back the processed data to an external recording medium.

  Various types of information, such as various types of programs, data, tables, and databases, may be stored on a recording medium and subjected to information processing. The CPU 1212 describes various types of operation, information processing, conditional judgment, conditional branching, unconditional branching, and information retrieval that are described in various places in the present disclosure for data read from the RAM 1214 and specified by the instruction sequence of the program. Various types of processing may be performed, including / replacement, etc., and the result is written back to RAM 1214. In addition, the CPU 1212 may search for information in files, databases, etc. in the recording medium. For example, when a plurality of entries each having an attribute value of the first attribute associated with the attribute value of the second attribute are stored in the recording medium, the CPU 1212 specifies the attribute value of the first attribute. The entry that matches the condition is searched from the plurality of entries, the attribute value of the second attribute stored in the entry is read, and thereby the first attribute that satisfies the predetermined condition is associated. The attribute value of the obtained second attribute may be acquired.

  The programs or software modules described above may be stored on a computer-readable storage medium on or near the computer 1200. In addition, a recording medium such as a hard disk or a RAM provided in a server system connected to a dedicated communication network or the Internet can be used as a computer-readable storage medium, whereby the program is transferred to the computer 1200 via the network. provide.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.

DESCRIPTION OF SYMBOLS 10 Imaging device 100 Imaging part 110 Image processing part 112 Generation part 114 Demosaic processing part 116 Binning processing part 120 Encoding part 130 Memory 210 Sensor part 212 Pixel array 214 Vertical selection circuit 215 Pixel drive line 216 Horizontal selection circuit 218 Column processing part 219 Vertical signal line 220 Imaging control unit 230 Memory 300 Lens unit 310 Lens control unit 312 Lens drive unit 314 Lens 320 Memory 1200 Computer 1210 Host controller 1212 CPU
1214 RAM
1220 Input / output controller 1222 Communication interface 1230 ROM

Claims (9)

From the first image data in which a plurality of first pixel blocks composed of N pixels of the same color (N is an integer of 2 or more) are arranged in a predetermined arrangement for each color, the plurality of first pixels A generation unit configured to generate N second image data in which pixels extracted from each of the blocks are arranged in the predetermined arrangement for each color;
A first processing unit that performs demosaic processing on each of the N second image data;
An image processing apparatus comprising: a second processing unit that combines the N pieces of second image data subjected to the demosaicing process by a binning process and outputs one piece of third image data.   The generation unit generates N second image data in which pixels at the same position extracted from each of the plurality of first pixel blocks are arranged in the predetermined arrangement for each color. The image processing apparatus according to 1.   2. The generation unit generates N second image data in which pixels at different positions extracted from each of the plurality of first pixel blocks are arranged in the predetermined arrangement for each color. An image processing apparatus according to 1.   The image processing apparatus according to claim 1, wherein the predetermined array is a Bayer array.   The image processing apparatus according to claim 1, wherein N is four. The image processing apparatus according to claim 1, wherein the first image data has a resolution of 7680 × 4320, and the second image data has a resolution of 3840 × 2160. An image processing apparatus according to any one of claims 1 to 6,
An imaging apparatus comprising: an image sensor that outputs the first image data. From the first image data in which a plurality of first pixel blocks composed of N pixels of the same color (N is an integer of 2 or more) are arranged in a predetermined arrangement for each color, the plurality of first pixels Generating N second image data in which pixels extracted from each of the blocks are arranged in the predetermined arrangement for each color;
Performing demosaic processing on each of the N second image data;
Combining the N second image data subjected to the demosaicing process by a binning process and outputting one third image data.   The program for functioning a computer as an image processing apparatus as described in any one of Claim 1 to 6.

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