JP6572667B2 - Electronic control unit - Google Patents

Description

  The present invention relates to an electronic control device including an A / D conversion unit that performs A / D conversion processing on analog input voltages of a plurality of channels.

  The A / D conversion device converts an analog signal into a digital signal, and various methods have been proposed in the past (for example, see Patent Document 1). The technique described in Patent Document 1 discloses applying a precharge voltage when digitally converting an analog signal. This precharge voltage is applied until the voltage at the connection point between the plurality of MOS capacitors reaches the threshold voltage of the CMOS inverter, and is set to match the threshold voltage of the CMOS inverter. .

JP-A-11-205145

  When the technique described in Patent Document 1 is used, the precharge voltage becomes a fixed value. On the other hand, the inventors input an analog input voltage of a plurality of channels through an RC filter circuit, and when the analog input voltage of one channel is RC filtered by the RC filter circuit and charged, the RC filter of another channel is charged. A configuration is considered in which the A / D conversion input voltage charged in the circuit is held while changing the holding voltage of the holding unit, and the holding voltage is A / D converted at a desired timing.

  In this case, even if a technique described in Patent Document 1 is applied and a fixed precharge voltage is applied to the holding voltage of the holding unit when switching channels, the precharge voltage is preferable depending on the value of the analog input voltage. Otherwise, the error may increase. In such a case, in order to perform A / D conversion of the analog input voltage with high accuracy, for example, it is necessary to wait for a long time, which is not preferable.

  An object of the present invention is to provide an electronic control device capable of performing A / D conversion in a short time as much as possible while suppressing an A / D conversion error as much as possible.

  According to invention of Claim 1, it acts as follows. The RC filter circuit (4) performs RC filter processing on analog input voltages (VINA, VINB) of a plurality of channels (A, B) and outputs them as A / D conversion input voltages, and the switching unit (3) includes a plurality of channels. The A / D conversion input voltages (VADA, VADB; VADA1, VADA2, VADB1, VADB2) of (A, B) are switched. The holding unit (9) continuously inputs the A / D conversion input voltages of the plurality of channels and holds them while changing the holding voltages. At this time, when the analog input voltage of one channel is charged by RC filter processing by the RC filter circuit, the A / D conversion input voltage charged in the RC filter circuit of the other channel is used as the holding voltage of the holding unit. Hold while changing.

  The precharge circuit (7) is an arbitrary variable that can be changed according to the plurality of channels with respect to the holding voltage of the holding unit (9) when the A / D conversion input voltages of the plurality of channels are switched by the switching unit (3). A precharge voltage is applied, and the A / D converter (6) performs A / D conversion by sampling at a timing that changes after the holding voltage of the holding unit (9) is precharged by the precharge circuit (7).

According to the first aspect of the present invention, the precharge circuit (7) applies arbitrary variable precharge voltages (VPRE) corresponding to a plurality of channels to the holding voltage of the holding unit (9). It is possible to apply a precharge voltage (VPRE) according to the channel of the A / D conversion, and A / D conversion processing can be performed in a short time as much as possible while suppressing errors related to the A / D conversion processing.
The A / D conversion unit samples and holds an A / D conversion of the holding voltage of the holding unit at a timing after the holding voltage of the holding unit is precharged by the precharge circuit. The acquisition unit acquires an external status or an internal status of the A / D conversion unit. The precharge circuit sets the precharge voltage based on an external status or an internal status of the acquisition unit.

Electrical configuration diagram schematically showing the electronic control device in the first embodiment Explanatory diagram for schematically explaining an example of time change of analog input voltage Timing chart schematically showing time change of input voltage of A / D converter Timing chart that schematically illustrates an example for comparison Electrical configuration diagram schematically showing an electronic control unit according to the second embodiment Electrical configuration diagram schematically showing an electronic control unit according to the third embodiment Timing chart schematically showing the time change of the input voltage of the A / D converter in the fourth embodiment Electrical configuration diagram schematically showing an electronic control device in a fifth embodiment Timing chart schematically showing time change of input voltage of A / D converter

  Hereinafter, some embodiments of the electronic control device will be described with reference to the drawings. In each embodiment described below, configurations that perform the same or similar operations are denoted by the same or similar reference numerals, and description thereof is omitted as necessary.

(First embodiment)
1 to 4 are explanatory views of the first embodiment. FIG. 1 schematically shows an electrical configuration example of an electronic control unit. An electronic control device (equivalent to an electronic control device main body) 101 includes a microcomputer (hereinafter abbreviated as a microcomputer) 2, a multiplexer 3 as a switching unit, and an RC filter circuit 4. The microcomputer 2 includes a control unit 5, an A / D conversion unit 6, a precharge circuit 7, a switch 8, and a capacitor 9 as a holding unit. The control unit 5 includes a memory (corresponding to a storage unit) 10 serving as a non-transitional tangible recording medium such as a CPU, a ROM, and a RAM, and corresponds to a program based on a program stored in the memory 10. Execute. Here, the A / D conversion device Z1 includes a multiplexer 3, a control unit 5, an A / D conversion unit 6, a precharge circuit 7, and a capacitor 9.

  The electronic control device 101 inputs analog input voltages VINA and VINB of a plurality of channels A and B to the A / D conversion device Z1, performs A / D conversion, and performs various electronic control processes using the A / D conversion results. Configured to do. Hereinafter, a description will be given of a two-channel form of “channel A” and “channel B”, but the present invention can also be applied to a form of three or more channels, that is, if at least two or more channels are provided.

  The analog input voltages VINA and VINB of the plurality of channels A and B are input to the electronic control unit 101 through the RC filter circuit 4 respectively. The RC filter circuit 4 is configured by connecting resistors 11 and 12 and capacitors 13 and 14 between the input terminals 15 and 16 and the ground 17, respectively, and removes high frequency noise and voltage for A / D conversion processing. Is charged in the capacitors 13 and 14 and held. The RC filter circuit 4 outputs the charging voltages of these capacitors 13 and 14 to the input terminals of the multiplexer 3 as A / D conversion input voltages VADA and VADB.

  The multiplexer 3 can switch and output the A / D conversion input voltages VADA and VADB according to the control of the control unit 5 and can disconnect the input / output. The output voltage Vn of the multiplexer 3 is input to the capacitor 9 and to the A / D conversion unit 6. When the output node of the output voltage Vn of the multiplexer 3 is Nn, the capacitor 9 holds the voltage Vn of this node Nn. This voltage Vn is input to the A / D converter 6. The A / D conversion unit 6 performs A / D conversion of the voltage Vn at a desired timing according to control by the control unit 5 and stores the voltage Vn in the memory 10. A precharge circuit 7 is connected to the memory 10, and the precharge circuit 7 can generate a precharge voltage VPRE by referring to an A / D conversion result that is stored in the memory 10 under the control of the control unit 5. It has become.

  The precharge circuit 7 is connected to the node Nn via the switch 8. The precharge circuit 7 includes, for example, a variable voltage source, and can output an arbitrary precharge voltage VPRE that can be varied from, for example, the maximum voltage Vmax to 0 V in accordance with the control of the control unit 5. The switch 8 is turned on / off in accordance with control by the control unit 5. When the switch 8 is turned on, the precharge voltage VPRE of the precharge circuit 7 is applied to the node Nn. Here, the internal resistance value of the switch 8 is configured to be smaller than the resistance values of the resistors 11 and 12. The capacitance values of the capacitors 13 and 14 provided outside the A / D conversion device Z1 are set larger than the capacitance value of the capacitor 9 provided inside the A / D conversion device Z1. Therefore, the time constant when the on-resistance of the switch 8 and the capacitor 9 are connected in series is smaller than the time constant when the resistors 11 and 12 and the capacitors 13 and 14 are connected in series, respectively.

  An example of each value of the resistors 11 and 12 and the capacitors 9, 13, and 14 is given. The resistors 11 and 12 are set to about several tens of kΩ, for example, and the capacitors 13 and 14 have capacitance values of, for example, 0. It is configured to have several μF. The internal impedance of the multiplexer 3 is configured to be, for example, about several kΩ, and the on-resistance of the switch 8 is also set to, for example, about several kΩ. The capacitor 9 has a capacitance value of about several pF, for example.

  FIGS. 2A to 2D show examples of the contents of the analog input voltages VINA and VINB. As shown in FIGS. 2A to 2D, the analog input voltages VINA and VINB of the channels A and B are expressed as follows: (a) a monotonically increasing characteristic T1, (b) a monotonically decreasing characteristic T2, ( c) For example, regular or irregular for each channel A or B according to time t, such as a characteristic T3 of a variation function (for example, a trigonometric function), (d) a characteristic T4 of a constant voltage within a predetermined voltage range, etc. The characteristic which fluctuates automatically.

  The operation of the above configuration will be described. The electronic control device 101 inputs A / D conversion input voltages VADA and VADB by the A / D conversion device Z1 at each sampling point S1, S2, S3, and S4, and performs sampling and A / D conversion processing.

  The multiplexer 3 disconnects between the A / D conversion input terminal and the output terminal of the channel B when the capacitor 9 is charged with the A / D conversion input voltage VADA of the channel A according to the control of the control unit 5. That is, when the multiplexer 3 switches the input to the channel A side and charges the capacitor 9 with the A / D conversion input voltage VADA of the channel A, the RC filter circuit 4 applies the analog input voltage VINB of the channel B to the resistor 12 and the capacitor 14. To charge independently while performing RC filter processing.

  Thereafter, when the multiplexer 3 switches the input to the channel B side and charges the capacitor 9 with the A / D conversion input voltage VADB of the channel B, the RC filter circuit 4 applies the analog input voltage VINA of the channel A to the resistor 11 and the capacitor 13. To charge independently while performing RC filter processing. As a result, while the analog input voltages VINA and VINB of one channel are charged, the A / D conversion input voltages VADA and VADB of other channels can be charged to the capacitor 9.

  As shown in FIGS. 2A to 2D, the analog input voltages VINA and VINB of the plurality of channels A and B exhibit independent time change characteristics. For this reason, for example, when the A / D conversion device Z1 performs the A / D conversion process in the order of channels A → B → A → B →. The voltage may be almost the same. Therefore, in the present embodiment, the precharge circuit 7 is characterized in that when the multiplexer 3 switches channels, an arbitrary precharge voltage VPRE that can be varied for each of a plurality of channels is applied to the node Nn.

  FIG. 3A and FIG. 3B show the time change characteristics of the voltage Vn at the node Nn using a timing chart, and further show an example of the change of the precharge voltage VPRE. Periods TA1 and TA2 shown in FIG. 3A indicate times for charging the capacitor 9 with the A / D conversion input voltage VADA of the channel A. At the sampling points SA1 and SA2, which are the final timings of these periods TA1 and TA2, the A / D converter 6 A / D converts the charging voltage of the capacitor 9 and stores the A / D conversion result in the memory 10.

  The periods TB1 and TB2 indicate the time for charging the capacitor 9 with the A / D conversion input voltage VADB of the channel B. At the sampling points SB1 and SB2, which are the final timings of these periods TB1 and TB2, The A / D conversion unit 6 A / D converts the charging voltage of the capacitor 9 and stores the A / D conversion result in the memory 10.

  FIG. 3A shows characteristics when the analog input voltages VINA and VINB (≈A / D conversion input voltages VADA and VADB) sampled continuously become voltages close to each other. FIG. 3B shows characteristics when the continuous analog input voltages VINA and VINB (≈A / D conversion input voltages VADA and VADB) are greatly different from each other. For simplification of explanation, the analog input voltages VINA and VINB shown in FIGS. 3A and 3B are substantially constant with time t as shown in FIG. 2D. An example is shown.

  Hereinafter, an operation after the A / D conversion process is performed at the sampling point SA1 will be described. After A / D conversion is performed by the A / D converter 6 at the sampling point SA1, the controller 5 once disconnects the input / output connection of the multiplexer 3. Then, after the precharge circuit 7 adjusts the precharge voltage VPRE corresponding to the channels A and B, the controller 5 controls the switch 8 to turn on the precharge voltage VPRE at the node Nn using the precharge circuit 7. The voltage Vn of the node Nn is adjusted to the precharge voltage VPRE (timing TAa after the period TP after the sampling point SA1).

  At this time, since the time constant of the series circuit of the switch 8 and the capacitor 9 in the A / D converter Z1 is smaller than the time constant of the RC filter circuit 4, the precharge circuit 7 reduces the precharge voltage VPRE. Even if it is applied to the node Nn, it can be quickly adjusted to the set precharge voltage VPRE.

  In this case, the precharge circuit 7 adjusts the precharge voltage VPRE for each of channels A and B, for example, based on the A / D conversion result stored in the memory 10. To explain with an example, the precharge circuit 7 is, for example, the assumed voltage of the A / D conversion input voltage VADB of the channel B to be A / D converted this time, and the immediately preceding A / D of the channel A executed immediately before, for example. The precharge voltage VPRE is changed to a predetermined voltage between the conversion results. The precharge voltage VPRE may be changed by setting a predetermined voltage with a large weight on the assumed voltage side between the assumed voltage and the immediately preceding A / D conversion result. Then, the precharge voltage VPRE can be set to the assumed voltage side.

  Here, the control unit 5 performs the A / D conversion by the A / D conversion unit 6 before this time in the channel B where the A / D conversion unit 6 executes the current A / D conversion process as the “assumed voltage”. For example, the same voltage as the result is set. For this reason, the precharge voltage VPRE can be appropriately adjusted, and the holding voltage of the capacitor 9 can be adjusted in advance before the A / D conversion process.

  Thereafter, the control unit 5 controls the switch 8 to turn off, switches the input / output connection of the multiplexer 3 to the channel B side, waits for the time TB1, and the A / D conversion unit 6 sets the holding voltage of the capacitor 9 at the sampling point SB1. Sampling and A / D conversion. At the timing TAa, since the holding voltage of the capacitor 9 is adjusted in advance to the assumed voltage side of the A / D conversion input voltage VADB of the channel B, it can be quickly converged to the A / D conversion input voltage VADB of the channel B. it can.

  Thereafter, the same applies when the A / D conversion input voltage VADA of channel A is input and A / D conversion processing is performed. An example of A / D conversion processing at the sampling point SA2 in FIG. 3 will be described. After A / D conversion is performed by the A / D conversion unit 6 at the sampling point SB1, the control unit 5 once disconnects the input / output connection of the multiplexer 3. Then, after the precharge circuit 7 adjusts the precharge voltage VPRE, the control unit 5 turns on the switch 8 to apply the precharge voltage VPRE to the node Nn using the precharge circuit 7, and the voltage Vn of the node Nn. Is adjusted to the precharge voltage VPRE (timing TBa after the period TP after the sampling point SB1).

  At this time, the precharge circuit 7 is, for example, between the assumed voltage of the A / D conversion input voltage VADA of the channel A to be subjected to A / D conversion processing this time and the immediately preceding A / D conversion result in the channel B, which is executed immediately before, for example. After the precharge voltage VPRE is changed to the predetermined voltage, the control unit 5 turns on the switch 8.

  Here, the “assumed voltage” is, for example, the same as the A / D conversion result by the A / D conversion unit 6 before this time in the channel A where the A / D conversion unit 6 performs the current A / D conversion process. This is the voltage set to the voltage. In this case, the voltage is the same as the A / D conversion result at the sampling point SA1. Therefore, the holding voltage of the capacitor 9 can be adjusted in advance before the A / D conversion process while appropriately adjusting the precharge voltage VPRE.

  Thereafter, the control unit 5 controls the switch 8 to turn off, switches the input / output connection of the multiplexer 3 to the channel A side and waits for the period TA2, and the A / D conversion unit 6 sets the holding voltage of the capacitor 9 at the sampling point SA2. Sampling and A / D conversion. At the timing TBa, since the holding voltage of the capacitor 9 is adjusted in advance to the assumed voltage side of the A / D conversion input voltage VADA of the channel A, it can be quickly converged to the A / D conversion input voltage VADA of the channel A. it can.

  FIG. 4 shows a timing chart for a comparative example (conventional equivalent example) corresponding to FIG. As shown in FIG. 4, when the precharge voltage VPRE is set constant as, for example, one half of the maximum voltage Vmax, the characteristics of the A / D conversion input voltages VADA and VADB similar to those in FIG. Even if it is provided, it is once precharged to half of the maximum voltage Vmax. Therefore, when the same charging time as that shown in FIGS. 3A and 3B is provided thereafter, an error ΔV is generated between the actual A / D conversion input voltage VADB and the sampling voltage at the sampling point SB. End up. At this time, for example, as the time constant by the RC filter circuit 4 becomes larger or / and the sampling period required for the A / D conversion process becomes shorter, the charge charge amount of the external capacitors 13 and 14 becomes larger. The amount of charge supplied from the external capacitors 13 and 14 to the internal capacitor 9 increases. In this case, when the A / D converter Z1 switches between the plurality of channels A and B and repeats the A / D conversion process, the amount of charge supplied to the external capacitors 13 and 14 cannot catch up and the number of samplings increases. The A / D conversion accuracy deteriorates. In the case where the precharge circuit 7 is not provided, the error ΔV is further increased if the A / D conversion input voltages VADA and VADB are greatly different from each other.

  According to the present embodiment, the precharge circuit 7 is provided so that the precharge voltage VPRE can be changed, and the precharge circuit 7 holds the arbitrary precharge voltage VPRE that can change according to the channels A and B in the capacitor 9. After that, the A / D conversion unit 6 performs A / D conversion after waiting for the periods TA1, TB1, TA2, and TB2 during which the capacitors 9 are charged with the A / D conversion input voltages VADA and VADB. Yes. For this reason, the error ΔV can be reduced as much as possible. Further, it is possible to quickly converge to a desired voltage while reducing the sampling interval.

  The time constant when the precharge circuit 7 precharges the capacitor 9 is configured to be lower than the time constant when the RC filter circuit 4 performs the RC filter process on the analog input voltages VINA and VINB. Therefore, the precharge circuit 7 can quickly charge the capacitor 9 with the precharge voltage VPRE.

  For example, specifically, the time constant of the series circuit of the switch 8 and the capacitor 9 is smaller than the time constant of the RC filter circuit 4, and the multiplexer 3 is connected to the RC filter when the precharge circuit 7 charges the precharge voltage VPRE. The input / output connection between the circuit 4 and the capacitor 9 is disconnected. Therefore, the precharge circuit 7 can quickly charge the capacitor 9 with the precharge voltage VPRE.

  In addition, according to the present embodiment, the precharge circuit 7 performs the assumed voltage of the A / D conversion input voltage VADB of the channel B to be subjected to A / D conversion processing this time, and the A / D immediately before the channel A executed immediately before, for example. The precharge voltage VPRE is changed to a predetermined voltage between the conversion results. Therefore, the precharge voltage VPRE can be set reflecting the A / D conversion result of the channel A performed immediately before the A / D conversion processing of the channel B, and the error ΔV can be reduced as much as possible.

(Modification)
The “assumed voltage” described in the first embodiment is equal to the A / D conversion unit 6 before this time in the same channel (eg, B) as the channel (eg, B) that the A / D conversion unit 6 performs A / D conversion this time. An example is shown in which the same voltage as the A / D conversion result is set. This shows a case where the voltage fluctuation characteristic of the channel (for example, B) is known in advance as the characteristic shown in FIG. 2D, and for example, FIG. 2A to FIG. When it is assumed in advance that the characteristics shown in c) are obtained, the precharge voltage VPRE may be set based on the assumed voltage in the same channel.

  In addition, a mode in which the precharge voltage VPRE is set and applied based on the A / D conversion result of the immediately preceding channel A when performing the A / D conversion process on the channel B is shown. The present invention may be applied to a mode in which the precharge voltage VPRE is set and applied based on the / D conversion result. This is because if the A / D conversion result of the immediately preceding channel A is referred to and the precharge voltage VPRE of the immediately following channel B is set, there is a concern that a long internal processing time of the control unit 5 is required. This is to prevent the A / D conversion processing from being periodically and periodically disabled as the processing time increases. That is, when the precharge voltage VPRE is set and applied based on the A / D conversion result immediately before (that is, two or more points before) in the channel A, the precharge circuit 7 stores the A stored in the memory 10 in advance. The precharge voltage VPRE can be easily set by referring to the / D conversion result, and the internal processing time of the A / D conversion device Z1 can be shortened.

  If it is not necessary to take into account the effect of the prolonged internal processing time, the control unit 5 may, for example, perform the A / D conversion result of the channel A immediately before and the A / D conversion of the channel A before the previous time. The correlation with the result is estimated (for example, linear approximation), and the precharge circuit 7 may set and apply the precharge voltage VPRE based on the extension voltage or the voltage, for example. That is, the precharge circuit 7 may set and apply the precharge voltage VPRE based on the previous A / D conversion result in the channel (for example, A) executed immediately before. Needless to say, the processing contents described in the first embodiment and the modifications thereof can be selectively combined.

(Second Embodiment)
FIG. 5 shows an additional explanatory diagram according to the second embodiment. In the A / D conversion device Z1 of the electronic control device 101 in the first embodiment, the control unit 5 sets the precharge voltage VPRE with reference to the contents stored in the memory 10, but the electronic control device ( In the A / D conversion device Z2 of the electronic control device main body 201), the precharge circuit 7 precharges each of the predetermined channels A and B without referring to the A / D conversion result stored in the memory 10. A mode in which the voltage VPRE is applied is shown.

  As shown in FIG. 5, the memory 10 is not connected to the precharge circuit 7 in the A / D conversion device Z2, and the precharge circuit 7 does not refer to the A / D conversion result stored in the memory 10. A precharge voltage VPRE can be applied to the node Nn. In this case, the precharge circuit 7 varies the precharge voltage VPRE based on a predetermined rule. For example, as described in the first embodiment, the input / output disconnecting process of the multiplexer 3 by the control unit 5 and the switch 8 The precharge voltage VPRE is applied to the node Nn in synchronization with the ON switching process. Even in such a case, the precharge circuit 7 can apply an arbitrary voltage that can vary according to the channels A and B to the node Nn. Thereby, the same operation effect as the above-mentioned embodiment is obtained.

(Third embodiment)
FIG. 6 shows an additional explanatory diagram of the third embodiment. As shown in FIG. 6, the electronic control device 301 (equivalent to the electronic control device main body) includes an A / D conversion device Z3 instead of the A / D conversion device Z1. The A / D conversion device Z3 includes an internal status acquisition unit 18 and an external status acquisition unit 19. The internal status acquisition unit 18 is configured by connecting a temperature sensor (not shown), for example, and acquires, for example, a temperature measurement result obtained by measuring the temperature of the main body of the microcomputer 2. The internal status acquisition unit 18 outputs this internal status to the precharge circuit 7. The precharge circuit 7 makes the precharge voltage VPRE variable by using the internal status acquired by the internal status acquisition unit 18.

  In addition, the external status acquisition unit 19 is configured by connecting, for example, a temperature sensor, a current / voltage sensor, a vehicle speed sensor, and the like (all not shown), and is based on the outside air temperature of the vehicle and an engine ECU (Electronic Control Unit) (not shown). An external status such as a load driving state (for example, driving current), an engine operating state, and a vehicle speed is acquired. The engine ECU is configured with various circuits for controlling the drive of the engine. The precharge circuit 7 is configured to be able to vary the precharge voltage VPRE using the external status acquired by the external status acquisition unit 19.

  Therefore, the precharge circuit 7 uses the internal status or / and external status acquired by the internal status acquisition unit 18 and / or external status acquisition unit 19 to convert the precharge voltage VPRE before the A / D conversion process. By applying, the influence of the internal state of the electronic control device 301 (for example, the A / D conversion device Z3) and the external state of the electronic control device 301 can be reflected in the precharge voltage VPRE, and the precharge voltage VPRE is more appropriate. Can be applied.

  In FIG. 6 illustrating the description of the third embodiment, the memory 10 is not connected to the precharge circuit 7, and the precharge circuit 7 cannot refer to the A / D conversion result stored in the memory 10. However, it is needless to say that the present invention can be applied to a mode in which the configuration of the first embodiment is combined to make it possible to refer to the A / D conversion result.

(Fourth embodiment)
FIG. 7 shows an additional explanatory diagram of the fourth embodiment. In the fourth embodiment, the precharge circuit 7 includes a determination unit that determines whether or not to apply the precharge voltage VPRE. When the determination unit determines that the precharge voltage is not applied, the precharge circuit 7 The precharge voltage application process is omitted, and the A / D conversion unit 6 performs the A / D conversion process.

  In the configuration described in the first embodiment or the second embodiment, an A / D conversion process by the A / D conversion unit 6 as described with reference to the timing charts of FIGS. 3A and 3B, for example. The precharge circuit 7 applies the precharge voltage VPRE before. For example, as shown in FIG. 3A, when the effect of applying the precharge voltage VPRE is low, the precharge circuit 7 is applied. The application process of the precharge voltage VPRE by the above is preferably omitted.

  In this case, it is preferable to determine whether or not to apply the precharge voltage VPRE by referring to the A / D conversion result stored in the memory 10 by causing the control unit 5 to function as the above-described determination unit. At this time, the control unit 5 performs pre-processing based on the A / D conversion result before this time in the same channel (for example, A) as the channel (for example, A) in which the A / D conversion unit 6 executes the current A / D conversion process. It may be determined whether to apply the charge voltage VPRE.

  A specific example of this content will be described with reference to FIG. At the sampling point SB2 shown in FIG. 7, the A / D conversion unit 6 performs A / D conversion processing on the A / D conversion input voltage VADB of the channel B, but the control unit 5 performs A / D conversion of the channel B at the sampling point SB1. With reference to the conversion result and / or the A / D conversion result of channel B before this, the precharge circuit 7 determines whether or not to apply the precharge voltage VPRE. By setting in this way, the control unit 5 can determine whether or not the precharge effect is lower than a predetermined value. When the precharge effect is lower than the predetermined value, the sequence of the precharge process by the precharge circuit 7 is omitted. The A / D conversion unit 6 is caused to perform A / D conversion processing. Thereby, the A / D conversion processing time can be shortened.

  Further, the control unit 5 determines whether or not to apply the precharge voltage VPRE based on the A / D conversion result of the previous A / D conversion unit in the channel executed immediately before by the A / D conversion unit 6. You may make it do.

  A specific example of this content will be described with reference to FIG. At the sampling point SB2 shown in FIG. 7, the A / D conversion unit 6 performs A / D conversion processing on the A / D conversion input voltage VADB. At this time, the control unit 5 determines the A / D conversion input voltage VADA at the sampling point SA2. With reference to the A / D conversion result or / and the A / D conversion result of channel A at sampling points SA1... Before this, it is determined whether or not the precharge voltage VPRE is applied by the precharge circuit 7. To do. With this setting, the control unit 5 can determine whether or not the precharge effect is lower than a predetermined value. When the precharge effect is lower than the predetermined value, the sequence of the precharge process by the precharge circuit 7 is omitted. The A / D conversion unit 6 is caused to perform A / D conversion processing. Thereby, the A / D conversion processing time can be shortened.

  In particular, if the precharge circuit 7 determines whether or not to apply the precharge voltage VPRE with reference to the A / D conversion results of the channels A and B, it can be more accurately determined whether or not the precharge effect is lower than a predetermined value. Similarly, in this case, the sequence of the precharge process by the precharge circuit 7 can be omitted, and the A / D conversion process time can be shortened.

  In some cases, it is better to provide the application time of the precharge voltage VPRE for reasons such as synchronizing the A / D conversion timing. In this case, as a dummy time in which no processing is performed for the application time of the precharge voltage VPRE. It may be provided.

  Further, the precharge circuit 7 may determine whether to apply the precharge voltage VPRE based on a predetermined rule. In such a case, it is not necessary to refer to the A / D conversion result stored in the memory 10, and for example, the configuration shown in the second embodiment can be applied.

  In this case, the precharge circuit 7 functions as a determination unit, and the precharge circuit 7 determines whether to apply the precharge voltage VPRE based on a predetermined rule, and applies the precharge voltage VPRE. For example, the precharge voltage VPRE is changed based on a predetermined rule. At this time, the precharge circuit 7 determines the application timing of the precharge voltage VPRE based on a predetermined rule. When the application timing is reached, the control unit 5 performs the input / output disconnection processing of the multiplexer 3 and the switch 8. The precharge voltage VPRE is applied to the node Nn in synchronization with the ON switching process, and the application process of the precharge voltage VPRE is omitted when it is not applied. As a result, the A / D conversion processing time can be shortened.

(Fifth embodiment)
8 and 9 show additional explanatory views of the fifth embodiment. The fifth embodiment is characterized in that the precharge circuit sets the precharge voltage VPRE by selecting from a prescribed voltage used inside the electronic control device main body.

  As shown in FIG. 8, the electronic control device (equivalent to the electronic control device main body) 501 includes an A / D conversion device Z5. The A / D converter Z5 includes a precharge circuit 20 that replaces the precharge circuit 7. The precharge circuit 20 includes a switch 21, and the specified voltages VDD 1, VDD 2, VDD 3, and VDD 4 used inside the electronic control device 501 can be supplied to the node Nn via the switch 8 by being switched and selected by the switch 21. Configured.

  A stabilized power supply circuit (not shown) is configured inside the electronic control unit 501. This stabilized power supply circuit generates the above-mentioned specified voltages VDD1 to VDD4. These specified voltages VDD1 to VDD4 are power supply voltages supplied to other circuits in the electronic control unit 501, for example, DC power supply voltages such as 1.3V, 2.5V, 3.3V, and 5.0V. is there. In the A / D converter Z5, the specified voltages VDD1 to VDD4 are shared as the precharge voltage VPRE of the precharge circuit 20.

  FIG. 9 shows a timing chart. In FIG. 9, it is assumed that the A / D conversion input voltage of channel A rises like VADA1, VADA2,..., And the A / D conversion input voltage of channel B falls like VADB1, VADB2,. As a timing chart. The relationship between the specified voltages VDD1 to VDD4 is set to VDD1> VDD2> VDD3> VDD4.

  Here, for example, the A / D conversion input voltage VADA1 is a voltage close to the specified voltage VDD2, the A / D conversion input voltage VADA2 is a voltage close to the specified voltage VDD1, and the A / D conversion input voltage VADB1 is specified. The voltage is close to the voltage VDD3, and the A / D conversion input voltage VADB2 is close to the specified voltage VDD4.

  The precharge circuit 20 adjusts the precharge voltage VPRE for each of the channels A and B based on the A / D conversion result stored in the memory 10. For example, the precharge circuit 20 may, for example, assume the assumed voltage of the A / D conversion input voltage VADB1 of the channel B to be A / D converted this time, and the A / D of the sampling point SA1 in the channel A executed immediately before, for example. The precharge voltage VPRE is changed to a predetermined voltage between the conversion results. After calculating the predetermined voltage, the precharge voltage VPRE is switched to the specified voltage VDD3 closest to the predetermined voltage among the specified voltages VDD1 to VDD4. The specified voltage may be switched by providing a strong weight on the assumed voltage side between the assumed voltage and the immediately preceding A / D conversion result, and setting the predetermined voltage. Then, the precharge voltage VPRE can be set to the assumed voltage side.

  Here, the control unit 5 performs the A / D conversion by the A / D conversion unit 6 before this time in the channel B where the A / D conversion unit 6 executes the current A / D conversion process as the “assumed voltage”. For example, the voltage is set lower than the result. This is because the control unit 5 knows in advance that the analog input voltage VINB of channel B gradually decreases. At this time, the precharge voltage VPRE can be appropriately adjusted, and the holding voltage of the capacitor 9 can be adjusted in advance before the A / D conversion processing. As a result, the A / D conversion input voltage VADB1 of channel B can be quickly converged.

  Thereafter, the same applies when the A / D conversion input voltage VADA2 of channel A is input and A / D conversion processing is performed. The contents of A / D conversion processing at the sampling point SA2 will be described. The precharge circuit 20 is a predetermined value between, for example, an assumed voltage of the A / D conversion input voltage VADA2 of the channel A to be subjected to A / D conversion processing this time, and an immediately preceding A / D conversion result of the channel B executed immediately before, for example. The precharge voltage VPRE is changed to the voltage. After calculating the predetermined voltage, the voltage is switched to the specified voltage VDD1 closest to the predetermined voltage among the specified voltages VDD1 to VDD4. It is also possible to set a predetermined voltage with a strong weight on the assumed voltage side between this assumed voltage and the immediately preceding A / D conversion result to switch the specified voltage. Then, the precharge voltage VPRE can be set to the assumed voltage side.

  Here, the control unit 5 performs the A / D conversion by the A / D conversion unit 6 before this time in the channel A where the A / D conversion unit 6 executes the current A / D conversion process as the “assumed voltage”. For example, the voltage is set higher than the result. This is because the control unit 5 knows in advance that the analog input voltage VINA of channel A gradually increases. For this reason, the precharge voltage VPRE can be appropriately adjusted, and the holding voltage of the capacitor 9 can be adjusted in advance before the A / D conversion process. As a result, the A / D conversion input voltage VADA of channel A can be quickly converged.

In addition, the same effects can be obtained when the A / D conversion input voltages VADA1 and VADB2 are subjected to A / D conversion processing at the sampling points SA1 and SB2.
FIG. 8 showing the description of the fifth embodiment shows a form in which the memory 10 is connected to the precharge circuit 7 and the precharge circuit 7 can refer to the A / D conversion result stored in the memory 10. Although shown, the present invention can also be applied to a form in which the A / D conversion result cannot be referred to as shown in the second embodiment.

  In this case, the precharge circuit 20 may apply the precharge voltage VPRE by switching the specified voltages VDD1 to VDD4 based on a predetermined rule. At this time, the switching process by the switch 21 of the specified voltages VDD1 to VDD4 is synchronized with the input / output disconnecting process of the multiplexer 3 by the control unit 5 and the ON switching process of the switch 8, and the precharge circuit 20 sets the precharge voltage VPRE. Applied to node Nn. Therefore, even if the precharge circuit 20 cannot refer to the A / D conversion result stored in the memory 10, it can be similarly applied.

(Other embodiments)
The present invention is not limited to the above-described embodiments, and can be applied to various embodiments without departing from the scope of the invention. The configurations of the first to fifth embodiments can be combined as appropriate. Further, the switching unit is not limited to the multiplexer 3. The holding unit is not limited to the capacitor 9. As long as there are a plurality of channels, the number of channels is not limited to two and may be three or more.

  In the drawings, 101, 201, 301, and 501 are electronic control devices (electronic control device main body), 3 is a multiplexer (switching unit), 4 is an RC filter circuit, 5 is a control unit (determination unit), and 6 is A / D conversion. , 7 and 20 are precharge circuits (determination units), 9 is a capacitor (holding unit), 10 is a memory (storage unit), 18 is an internal status acquisition unit (acquisition unit), and 19 is an external status acquisition unit (acquisition unit). ).

Claims (8)

RC filter circuit (4) for performing RC filter processing on analog input voltages (VINA, VINB) of a plurality of channels (A, B) and outputting them as A / D conversion input voltages;
A switching unit (3) for switching A / D conversion input voltages (VADA, VADB; VADA1, VADA2, VADB1, VADB2) of the plurality of channels;
A holding unit (9) for continuously inputting A / D conversion input voltages of a plurality of channels switched by the switching unit and holding the voltage while changing a holding voltage;
A precharge circuit that applies a precharge voltage (VPRE) that can be changed according to the plurality of channels to the holding voltage of the holding unit when the A / D conversion input voltages of the plurality of channels are switched by the switching unit. 7, 20)
An A / D converter (6) for sampling and A / D converting the holding voltage of the holding unit at a timing after the holding voltage of the holding unit is precharged by the precharge circuit;
An acquisition unit (18, 19) for acquiring an external status or an internal status of the A / D conversion unit,
The electronic control apparatus, wherein the precharge circuit sets the precharge voltage based on an external status or an internal status of the acquisition unit. RC filter circuit (4) for performing RC filter processing on analog input voltages (VINA, VINB) of a plurality of channels (A, B) and outputting them as A / D conversion input voltages;
A switching unit (3) for switching A / D conversion input voltages (VADA, VADB; VADA1, VADA2, VADB1, VADB2) of the plurality of channels;
A holding unit (9) for continuously inputting A / D conversion input voltages of a plurality of channels switched by the switching unit and holding the voltage while changing a holding voltage;
A precharge circuit that applies a precharge voltage (VPRE) that can be changed according to the plurality of channels to the holding voltage of the holding unit when the A / D conversion input voltages of the plurality of channels are switched by the switching unit. 7, 20)
An A / D converter (6) for sampling and A / D converting the holding voltage of the holding unit at a timing after the holding voltage of the holding unit is precharged by the precharge circuit;
A determination unit (5, 7) for determining whether the precharge circuit applies the precharge voltage;
The precharge circuit omits the application process of the precharge voltage when the determination unit determines not to apply the precharge voltage, and the A / D conversion unit performs the A / D conversion process . ,
A storage unit (10) for storing an A / D conversion result by the A / D conversion unit;
The determination unit includes the precharge voltage based on an A / D conversion result by the A / D conversion unit before this time in the same channel as the channel on which the A / D conversion unit performs the current A / D conversion process. It is determined whether or not to apply an electronic control device. RC filter circuit (4) for performing RC filter processing on analog input voltages (VINA, VINB) of a plurality of channels (A, B) and outputting them as A / D conversion input voltages;
A switching unit (3) for switching A / D conversion input voltages (VADA, VADB; VADA1, VADA2, VADB1, VADB2) of the plurality of channels;
A holding unit (9) for continuously inputting A / D conversion input voltages of a plurality of channels switched by the switching unit and holding the voltage while changing a holding voltage;
A precharge circuit that applies a precharge voltage (VPRE) that can be changed according to the plurality of channels to the holding voltage of the holding unit when the A / D conversion input voltages of the plurality of channels are switched by the switching unit. 7, 20)
An A / D converter (6) for sampling and A / D converting the holding voltage of the holding unit at a timing after the holding voltage of the holding unit is precharged by the precharge circuit;
A determination unit (5, 7) for determining whether the precharge circuit applies the precharge voltage;
The precharge circuit omits the application process of the precharge voltage when the determination unit determines not to apply the precharge voltage, and the A / D conversion unit performs the A / D conversion process. ,
A storage unit (10) for storing an A / D conversion result by the A / D conversion unit;
The determination unit determines whether to apply the precharge voltage based on an A / D conversion result by the A / D conversion unit immediately before and immediately before the channel executed immediately before by the A / D conversion unit. An electronic control device. RC filter circuit (4) for performing RC filter processing on analog input voltages (VINA, VINB) of a plurality of channels (A, B) and outputting them as A / D conversion input voltages;
A switching unit (3) for switching A / D conversion input voltages (VADA, VADB; VADA1, VADA2, VADB1, VADB2) of the plurality of channels;
A holding unit (9) for continuously inputting A / D conversion input voltages of a plurality of channels switched by the switching unit and holding the voltage while changing a holding voltage;
A precharge circuit that applies a precharge voltage (VPRE) that can be changed according to the plurality of channels to the holding voltage of the holding unit when the A / D conversion input voltages of the plurality of channels are switched by the switching unit. 7, 20)
An A / D converter (6) for sampling and A / D converting the holding voltage of the holding unit at a timing after the holding voltage of the holding unit is precharged by the precharge circuit;
The precharge circuit (20) is selected from a plurality of specified voltages (VDD1 to VDD4) used in the electronic control device main body (501) and set as the precharge voltage. . The electronic control device according to any one of claims 1 to 4,
The time constant when the precharge circuit precharges to the holding voltage of the holding unit is configured to be lower than the time constant when the RC filter circuit performs RC filtering on the analog input voltage. An electronic control device. The electronic control device according to claim 1, any one of 5,
When the precharge circuit precharges the holding voltage of the holding unit,
The switching unit disconnects the connection between the RC filter circuit and the holding unit. The electronic control device according to any one of claims 1 to 4,
A storage unit (10) for storing an A / D conversion result by the A / D conversion unit;
The precharge circuit is configured to perform the precharge based on an A / D conversion result by the A / D conversion unit before this time in the same channel as the channel on which the A / D conversion unit performs the current A / D conversion process. An electronic control device characterized by applying a voltage. The electronic control device according to any one of claims 1 to 7,
The A / D converter and the precharge circuit are configured using a microcomputer (2).

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